TWI841477B - Pixel circuit, OLED display device, and information processing device - Google Patents

Abstract

The present invention mainly discloses a pixel circuit, which is used to form an OLED pixel unit with an OLED element, and includes: a data driving unit, a storage capacitor, and five switch units. In particular, the present invention uses three LTPS TFT elements to form the data driving unit, and each of the switch units includes an LTPS TFT element. According to this design, the pixel circuit of the present invention redesigns the storage capacitor leakage path to achieve a balanced state. In addition, a plurality of switch units are used to provide reverse voltage stress (voltage stress) to the driving TFT element contained in the data driving unit, so that the brightness fluctuation (flicker) caused by the characteristic deviation of the TFT element is also improved. Finally, the pixel circuit of the present invention is composed of 8 LTPS TFT elements and a storage capacitor, so that an OLED panel including the pixel circuit of the present invention can be manufactured with a stable TFT process and low manufacturing cost.

Description

Pixel circuit, OLED display device and information processing device

The present invention relates to the technical field of OLED display devices, and in particular to a pixel circuit used to form an OLED pixel unit with an OLED element.

It is known that in addition to popular electronic products such as laptops, handheld game consoles, smartphones and tablets, OLED displays are also widely used in various wearable electronic devices, such as smart watches. In order to ensure a good user experience, wearable electronic devices are required to have a standby time of at least 10 days. Therefore, in order to save power consumption of wearable electronic devices, when the screen is turned off or a static image is displayed, the OLED display will be switched to a low refresh rate operation, for example, 15Hz is switched to 5Hz.

Electronic engineers familiar with the design and manufacture of OLED displays should know that an OLED display includes: an OLED panel and at least one display driver chip, wherein the OLED panel includes M×N OLED elements (i.e., sub-pixels) and M×N pixel circuits. Currently, pixel circuits generally adopt a 6T1C or 7T1C architecture, where T refers to a low temperature polysilicon (LTPS) TFT element and C refers to a storage capacitor. Practical experience shows that under low refresh rate operation, LTPS TFT elements will have leakage or characteristic deviation, resulting in visible flicker on the OLED panel. Therefore, some improvement schemes have been proposed to overcome the flicker problem. For example, the LTPS TFT element used as a switch in the pixel circuit is replaced with an indium gallium zinc oxide (IGZO) TFT element to improve the leakage problem under low refresh rate operation. However, practical experience shows that this technical solution causes LTPS TFT elements and IGZO TFT elements to coexist in the OLED panel, which not only makes it more difficult to adjust the parameters of the TFT process, but also increases the manufacturing cost of the OLED panel. In other improvement schemes, the LTPS TFT element of the switch is designed as a TFT series structure. Unfortunately, relevant data show that there is still a leakage path in the TFT series structure, so it is impossible to completely overcome the leakage problem under low refresh rate operation.

From the above description, it can be seen that a new pixel circuit is urgently needed in this field.

The main purpose of the present invention is to provide a pixel circuit for forming an OLED pixel unit with an OLED element, and M×N OLED pixel units form an OLED panel. The pixel circuit of the present invention includes: a data drive unit, a storage capacitor, and five switch units. In particular, the present invention uses three LTPS TFT elements to form the data drive unit, and each of the switch units includes an LTPS TFT element. According to this design, the pixel circuit of the present invention redesigns the storage capacitor leakage path to achieve a balance state.

Furthermore, the present invention uses a plurality of switch units to provide reverse voltage stress to the driving TFT element contained in the data driving unit, so that the brightness fluctuation (flicker) caused by the characteristic deviation of the TFT element is also improved. Finally, the pixel circuit of the present invention is composed of 8 LTPS TFT elements and a storage capacitor, so that an OLED panel including the pixel circuit of the present invention can be manufactured with a stable TFT process and low manufacturing cost. Furthermore, the OLED panel and at least one display driver chip together form an OLED display, and the OLED display will not have leakage or characteristic deviation of the LTPS TFT element under low refresh rate operation, thereby ensuring that the display screen does not flicker.

To achieve the above object, the present invention proposes an embodiment of the pixel circuit, which includes: a data driving unit, having a first electrical terminal, a first control terminal, a second electrical terminal, a second control terminal, a third control terminal, a third electrical terminal, a fourth electrical terminal, and a fifth electrical terminal; wherein the first electrical terminal is coupled to a first driving voltage, the first control terminal and the third control terminal are both coupled to a light regulation signal, and the third electrical terminal is used to couple to a 0 LED element; a storage capacitor having a first end and a second end, wherein the first end is coupled to the first electrical end, and the second end is coupled to the second control end; a first switch unit having a control end, a first end and a second end, wherein the control end is coupled to a switch signal, the first end is coupled to the fifth electrical end, and the second end is coupled to a working voltage; a second switch unit also having a control end, a first end and a second end, wherein the control end is coupled to a switch signal, the first end is coupled to the fifth electrical end, and the second end is coupled to a working voltage. The first terminal is coupled to a first switch signal, the first terminal is coupled to a first common point between the second control terminal and the second terminal of the storage capacitor, and the second terminal is coupled to a first initialization voltage; a third switch unit, which also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a second switch signal or a third switch signal, the first terminal is coupled to the second electrical terminal, and the second terminal is coupled to the first common point; a fourth switch unit, which also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second switch signal, the first terminal is coupled to the fourth electrical terminal, and the second terminal is coupled to a display data voltage; and a fifth switch unit, which also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the switch signal, the first terminal is coupled to a second common point between the third electrical terminal and the OLED element, and the second terminal is coupled to a second initialization voltage.

In one embodiment, the data drive unit includes: a first TFT element having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the second control terminal of the data drive unit; a second TFT element also having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the first control terminal of the data drive unit, and the first element terminal serves as the control terminal of the data drive unit. The first electrical terminal of the data drive unit is connected to the second component terminal of the first TFT element; and a third TFT element also has a gate terminal, a first component terminal and a second component terminal, wherein the gate terminal serves as the third control terminal of the data drive unit, the second component terminal serves as the third electrical terminal of the data drive unit, and the first component terminal is coupled to the second component terminal of the first TFT element.

In one embodiment, the first switch unit includes: a fourth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the first switch unit.

In one embodiment, the second switch unit includes: a fifth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the second switch unit.

In one embodiment, the third switch unit includes: a sixth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the third switch unit.

In one embodiment, the fourth switch unit includes: a seventh TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the fourth switch unit.

In one embodiment, the fifth switch unit includes: an eighth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the fifth switch unit.

The present invention also provides an OLED display device, which includes a display driver circuit and an OLED display panel, wherein the OLED display panel includes M×N pixel units, M and N are positive integers, and each of the pixel units is composed of a pixel circuit and an OLED element; the pixel circuit includes: a data driver unit having a first electrical terminal, a first control terminal, a second electrical terminal, a second control terminal, a third control terminal, a third electrical terminal, a fourth electrical terminal, and a first five electrical terminals; wherein the first electrical terminal is coupled to a first driving voltage, the first control terminal and the third control terminal are both coupled to a light-emitting control signal, and the third electrical terminal is used to couple to an OLED element; a storage capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the first electrical terminal, and the second terminal is coupled to the second control terminal; a first switch unit having a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a switch signal, the first terminal is coupled to the fifth electrical terminal, and the second terminal A second switch unit is coupled to a working voltage; a second switch unit also has a control end, a first end and a second end, wherein the control end is coupled to a first switch signal, the first end is coupled to a first common point between the second control end and the second end of the storage capacitor, and the second end is coupled to a first initialization voltage; a third switch unit is also coupled to a control end, a first end and a second end, wherein the control end is coupled to a second switch signal or a third switch signal, the first end is coupled to the second electrical end, and the second end is coupled to to the first common point; a fourth switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to the second switch signal, the first end is coupled to the fourth electrical end, and the second end is coupled to a display data voltage; and a fifth switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to the switch signal, the first end is coupled to a second common point between the third electrical end and the OLED element, and the second end is coupled to a second initialization voltage.

In one embodiment, the data drive unit includes: a first TFT element having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the second control terminal of the data drive unit; a second TFT element also having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the first control terminal of the data drive unit, and the first element terminal serves as the control terminal of the data drive unit. The first electrical terminal of the data drive unit is connected to the second component terminal of the first TFT element; and a third TFT element also has a gate terminal, a first component terminal and a second component terminal, wherein the gate terminal serves as the third control terminal of the data drive unit, the second component terminal serves as the third electrical terminal of the data drive unit, and the first component terminal is coupled to the second component terminal of the first TFT element.

In one embodiment, the first switch unit includes: a fourth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the first switch unit.

In one embodiment, the second switch unit includes: A fifth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the second switch unit.

In one embodiment, the third switch unit includes: a sixth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the third switch unit.

In one embodiment, the fourth switch unit includes: a seventh TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the fourth switch unit.

In one embodiment, the fifth switch unit includes: an eighth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the fifth switch unit.

The present invention also provides an information processing device, which is characterized by having an OLED display device as described above.

In one embodiment, the information processing device is an electronic device selected from the group consisting of a head-mounted display device, a smart TV, a smart phone, a smart watch, a tablet computer, an all-in-one computer, a laptop computer, an in-vehicle entertainment device, a digital camera, and a video door phone.

1:OLED display device

11: OLED panel

111: Pixel circuit

112: OLED components

12: Display driver chip

1D: Data drive unit

1DT1: First electrical terminal

1DT2: Second electrical terminal

1DT3: The third electrical terminal

1DT4: Fourth electrical terminal

1DT5: Fifth electrical terminal

1DC1: First control terminal

1DC2: Second control terminal

1DC3: The third control terminal

SW1: First switch unit

SW2: Second switch unit

SW3: The third switch unit

SW4: The fourth switch unit

SW5: The fifth switch unit

Cst: Storage capacitor

M1: first TFT element

M2: Second TFT element

M3: The third TFT element

M4: the fourth TFT element

M5: The fifth TFT element

M6: Sixth TFT element

M7: Seventh TFT element

M8: The eighth TFT element

S0: switch signal

S1: First switch signal

S2: Second switch signal

S3: The third switch signal

EM: luminescence modulation signal

ELVDD: first drive voltage

ELVSS: Reference location

Vint1: First initialization voltage

Vint2: Second initialization voltage

VDH: Operating voltage

Vdata: Display data voltage

T1: Time period

T2: Time period

T3: Time period

T4: Time period

T5: Time zone

FIG. 1 is a block diagram of an OLED display device including a pixel circuit of the present invention; FIG. 2 is a circuit topology diagram of the pixel circuit shown in FIG. 1; FIG. 3 is a first operation timing diagram of multiple signals for controlling the pixel circuit of the present invention; and FIG. 4 is a second operation timing diagram of multiple signals for controlling the pixel circuit of the present invention.

In order to enable the review committee to further understand the structure, features, purpose, and advantages of the present invention, the detailed description of the drawings and preferred specific embodiments is attached as follows.

FIG1 is a block diagram of an OLED display device including a pixel circuit of the present invention. As shown in FIG1 , the OLED display device 1 mainly includes: an OLED panel 11 and at least one display driver chip 12, wherein the OLED panel 11 includes M×N pixel circuits 111, M×N OLED elements 112, M gate lines, and N source lines, where M and N are positive integers. During normal operation, the display driver chip 12 receives display data transmitted from a host computer 2 (such as an application processor of a smart watch), and controls each of the pixel circuits 111 to operate according to the display data so that each of the light-emitting elements 112 emits light or does not emit light, thereby making the OLED panel 11 display an image.

Fig. 2 is a circuit topology diagram of the pixel circuit 111 shown in Fig. 1. As shown in Fig. 2, the pixel circuit 111 of the present invention includes: a data driving unit 1D, a storage capacitor Cst, a first switch unit SW1, a second switch unit SW2, a third switch unit SW3, a fourth switch unit SW4, and a fifth switch unit SW5. Specifically, the data driving unit 1D has a first electrical terminal 1DT1, a first control terminal 1DC1, a second electrical terminal 1DT2, a second control terminal 1DC2, a third control terminal 1DC3, a third electrical terminal 1DT3, a fourth electrical terminal 1DT4, and a fifth electrical terminal 1DT5; wherein the first electrical terminal 1DT1 is coupled to a first driving voltage ELVDD, the first control terminal 1DC1 and the third control terminal 1DC3 are both coupled to a light-emitting control signal EM, and the third electrical terminal 1DT3 is used to couple to the anode of an OLED element 112, and the cathode of the OLED element 112 is coupled to a reference ground ELVSS.

In one embodiment, the data driving unit 1D is composed of a first TFT element M1, a second TFT element M2 and a third TFT element M3. Electronic engineers who are familiar with the design and manufacture of LCD and/or OLED pixel circuits must know that the TFT element is a symmetrical element, whose gate terminal is the element control terminal, and its two ends are two electrical terminals, which are determined as the source terminal and the drain terminal according to the direction of the current flow. Simply put, when one electrical terminal serves as the source terminal, the other end is the drain terminal, and vice versa. Based on this concept, as shown in Figure 2, the first TFT element M1 has a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the second control terminal 1DC2 of the data driving unit 1D. On the other hand, the second TFT element M2 also has a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the first control terminal 1DC1 of the data driving unit 1D, the first element terminal serves as the first electrical terminal 1DT1 of the data driving unit 1D, and the second element terminal is coupled to the first element terminal of the first TFT element M1. Moreover, the third TFT element M3 also has a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the third control terminal 1DC3 of the data driving unit 1D, the second element terminal serves as the third electrical terminal 1DT3 of the data driving unit 1D, and the first element terminal is coupled to the second element terminal of the first TFT element M1.

To explain in more detail, the storage capacitor Cst has a first end and a second end, wherein the first end is coupled to the first electrical end 1DT1, and the second end is coupled to the second control end 1DC2. Further, FIG. 2 also shows that the first switch unit SW1 has a control end, a first end and a second end, wherein the control end is coupled to a switch signal S0, the first end is coupled to the fifth electrical end 1DT5, and the second end is coupled to an operating voltage VDH. Specifically, the present invention uses a fourth TFT element M4 which also has a gate end, a first element end and a second element end as the first switch unit SW1, so the gate end, the first element end and the second element end of the fourth TFT element M4 respectively serve as the control end, the first end and the second end of the first switch unit SW1.

As shown in FIG2 , the second switch unit SW2 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a first switch signal S1, the first terminal is coupled to a first common point between the second control terminal IDC2 and the second terminal of the storage capacitor Cst, and the second terminal is coupled to a first initialization voltage Vint1. Specifically, the present invention uses a fifth TFT element M5 which also has a gate terminal, a first element terminal and a second element terminal as the second switch unit SW2, so the gate terminal, the first element terminal and the second element terminal of the fifth TFT element M5 serve as the control terminal, the first terminal and the second terminal of the second switch unit SW2, respectively. In addition, as shown in FIG. 2 , the third switch unit SW3 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to a second switch signal S2 or a third switch signal S3, the first terminal is coupled to the second electrical terminal 1DT2, and the second terminal is coupled to the first common point. In addition, specifically, a sixth TFT element M6 having a gate terminal, a first element terminal and a second element terminal can be directly used as the third switch unit SW3, so the gate terminal, the first element terminal and the second element terminal of the sixth TFT element M6 are respectively used as the control terminal, the first terminal and the second terminal of the third switch unit SW3.

According to the design of the present invention, the fourth switch unit SW4 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second switch signal S2, the first terminal is coupled to the fourth electrical terminal 1DT4, and the second terminal is coupled to a display data voltage Vdata. Specifically, the present invention uses a seventh TFT element M7 having a gate terminal, a first element terminal and a second element terminal as the fourth switch unit SW4, so the gate terminal, the first element terminal and the second element terminal of the seventh TFT element M7 serve as the control terminal, the first terminal and the second terminal of the fourth switch unit SW4, respectively. In addition, as shown in FIG. 2 , the fifth switch unit SW5 also has a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the switch signal S0, the first terminal is coupled to a second common point between the third electrical terminal 1DT3 and the OLED element 112, and the second terminal is coupled to a second initialization voltage Vint2. In addition, specifically, an eighth TFT element M8 having a gate terminal, a first element terminal and a second element terminal can be directly used as the fifth switch unit SW5, so the gate terminal, the first element terminal and the second element terminal of the eighth TFT element M8 are respectively used as the control terminal, the first terminal and the second terminal of the fifth switch unit SW5.

The first application operation example of the pixel circuit.

FIG3 is a first operation timing diagram of multiple signals for controlling the pixel circuit of the present invention. As shown in FIG2 and FIG3, in the time interval T1, the luminescence control signal EM is pulled to a high level (pull high) so that the second TFT element M2 and the third TFT element M3 are turned off, so that the OLED element 112 has no current flowing through and does not emit light. In addition, in the time interval T1, the switch signal S0 and the first switch signal S1 are both pulled to a low level (pull low) so that the fourth TFT element M4, the fifth TFT element M5 and the eighth TFT element M8 are turned on. At this time, the anode (Anode) of the OLED element 112 is reset by being written by the second initialization voltage Vint2. At the same time, the working voltage VDH (higher positive voltage) is written into the first element terminal of the first TFT element M1, and the first initialization voltage Vint1 is written into the gate terminal of the first TFT element M1, so that the storage capacitor Cst is reset. At this time, the VGS of the first TFT element M1 = VDH-Vint1, and this period of time (i.e., time interval T1) can be used to perform an equal negative voltage stress on the first TFT elements M1 of all pixel circuits 111 to eliminate the electrical offset (e.g., black and white state voltage difference) caused by the bias voltage difference in the previous frame. In summary, during the time period T1, the pixel circuit 111 of the present invention operates in a first working stage, thereby achieving the anode reset of the OLED element 112, the reset of the storage capacitor Cst, and the negative voltage stress of the first TFT element M1.

During the time period T2, the second switch signal S2 is pulled to a low level (pull low), and the switch signal S0, the first switch signal S1 and the light-emitting control signal EM are all pulled to a high level (pull high), so that the sixth TFT element M6 and the seventh TFT element M7 are turned on, so that the display data voltage Vdata is written to the gate terminal of the first TFT element M1 through the seventh TFT element M7, the first element terminal of the first TFT element M1 and the sixth TFT element M6. It is worth noting that since the gate terminal of the first TFT element M1 and its first element terminal are coupled through the sixth TFT element M6, the first TFT element M1 becomes a diode-connected TFT element. In this case, the gate voltage of the first TFT element M1 will be charged to Vdata+Vth at the end of the time period T2, and then the charging end time period T2 is closed. In summary, during the time period T2, the pixel circuit 111 of the present invention operates in a second working stage, so that Vdata is charged to the gate of the first TFT element M1 to achieve Vth compensation.

In the time interval T3, the luminescence control signal EM is pulled to a low level (pull low), and the switch signal S0, the first switch signal S1 and the second switch signal S2 are all pulled to a high level (pull high), so that the second TFT element M2, the first TFT element M1 and the third TFT element M3 are turned on and the other TFT elements are all turned off. Therefore, in the time interval T3, the pixel circuit 111 of the present invention operates in a third working stage, that is, the luminescence stage of the OLED element 112. At this time, the current flowing through the OLED element 112 can be calculated using the following mathematical formula:

From the above mathematical calculation results, it can be seen that Vth is offset, and the driving current of the OLED element 112 has nothing to do with Vth, thus eliminating the phenomenon of uneven OLED display brightness and screen caused by inconsistent Vth.

As shown in FIG. 2 and FIG. 3 , the pixel circuit 111 of the present invention can also operate in a fourth working stage, wherein this stage is divided into two parts. In the first part, the switch signal S0 is pulled to a low level (pull low), and the luminous control signal EM is sent to a high level (pull high). The purpose of doing so is to be able to continue to provide reverse voltage stress (voltage stress) to the first TFT element M1 during the holding frame, so as to prevent the first TFT element M1 from flickering due to current fluctuations caused by characteristic deviation, which causes the display screen to flicker. It should be noted that Vth cannot be sampled and compensated during the holding stage, so Vint2 will also reset the anode of the OLED element 112 during the holding stage to prevent the anode potential fluctuation from causing the display screen to flicker. The second part is no different from the light-emitting phase of the OLED element 112 in the aforementioned refresh frame, and will not be repeated here.

The second application operation example of the pixel circuit.

FIG4 is a second working timing diagram for controlling multiple signals of the pixel circuit of the present invention. As shown in FIG2 and FIG4, in the time interval T1, the luminescence control signal EM is pulled to a high level (pull high) so that the second TFT element M2 and the third TFT element M3 are turned off, so that the OLED element 112 has no current flow and does not emit light. In addition, in the time interval T1, the switch signal S0 and the third switch signal S3 are both pulled to a low level (pull low) so that the fourth TFT element M4, the sixth TFT element M6 and the eighth TFT element M8 are turned on. At this time, the anode (Anode) of the OLED element 112 is reset by the second initialization voltage Vint2. At the same time, the working voltage VDH (higher positive voltage) is written into the first element terminal and the gate terminal of the first TFT element M1, so that the VGS of the first TFT element M1 = 0V.

During the time interval T2, the first switch signal S1 and the third switch signal S3 are pulled to a low level (pull low), and the other control signals are pulled to a high level (pull high). At this time, the fifth TFT element M5 is turned on so that the first initialization voltage Vint1 is written into the gate of the first TFT element M1, completing the reset of the storage capacitor Cst. At the same time, since the VGS of the first TFT element M1 is close to Vth, it is still in the stress release stage (i.e., releasing the bias effect of the previous frame).

During the time interval T3, the second switch signal S2 is pulled to a low level, the third switch signal S3 is maintained at a low level, and other control signals are maintained at a high level). At this time, the sixth TFT element M6 and the seventh TFT element M7 are turned on, so that the display data voltage Vdata is written to the gate terminal of the first TFT element M1 through the seventh TFT element M7, the first element terminal of the first TFT element M1, and the sixth TFT element M6. It is worth noting that since the gate terminal of the first TFT element M1 and its first element terminal are coupled through the sixth TFT element M6, the first TFT element M1 becomes a diode-connected TFT element. In this case, the gate voltage of the first TFT element M1 will be charged to Vdata+Vth at the end of the time interval T2, and then the charging end time interval T2 is closed. In summary, during the time period T3, the pixel circuit 111 of the present invention operates in a second working phase, so that Vdata is charged to the gate terminal of the first TFT element M1 to achieve Vth compensation.

In the time interval T4, only the switch signal S0 is pulled to a low level (pull low), while other control signals maintain a high level. At this time, VDH is written into the first element terminal of the first TFT element M1 again, so that VGS=VDH-(Vdata+Vth). Since VDH is a higher positive working voltage, an equal negative voltage stress is applied to the first TFT elements M1 of all pixel circuits 111 in this stage (i.e., time interval T4) to eliminate the electrical offset (such as black and white state voltage difference) caused by the bias voltage difference in the previous frame. In summary, the first TFT element M1 undergoes three stresses in the time intervals T1, T2 and T4, so that the characteristic differences of the first TFT elements M1 at different positions of the OLED panel 11 are consistent.

In the time interval T5, the luminous modulation signal EM is pulled to a low level (pull low), and the other control signals are pulled to a high level (pull high), so that the second TFT element M2, the first TFT element M1 and the third TFT element M3 are turned on and the other TFT elements are turned off. Therefore, in the time interval T5, the pixel circuit 111 of the present invention operates in the luminous phase of the OLED element 112. At this time, the current flowing through the OLED element 112 can be calculated using the following mathematical formula:

From the above mathematical calculation results, it can be seen that Vth is offset, and the driving current of the OLED element 112 has nothing to do with Vth, thus eliminating the phenomenon of uneven OLED display brightness and screen caused by inconsistent Vth.

As shown in FIG. 2 and FIG. 4 , in the holding frame stage, the operation of the pixel circuit 111 of the present invention is divided into two parts. In the first part, the switch signal S0 is pulled to a low level (pull low), and the luminous modulation signal EM is sent to a high level (pull high). The purpose of doing this is to continue to provide reverse voltage stress (voltage stress) to the first TFT element M1 in the holding frame to prevent the first TFT element M1 from flickering due to current fluctuations caused by characteristic deviation. It should be noted that Vth cannot be sampled and compensated in the holding stage, so Vint2 will also reset the anode of the OLED element 112 in the holding stage to prevent the anode potential fluctuation from causing flickering in the display screen. The second part is no different from the light-emitting phase of the OLED element 112 in the aforementioned refresh frame, and will not be repeated here.

Thus, the above has completely and clearly described a pixel circuit of the present invention; and, from the above, it can be known that the present invention has the following advantages:

(1) The present invention discloses a pixel circuit for forming an OLED pixel unit with an OLED element, which includes: a data drive unit, a storage capacitor, and five switch units. In particular, the present invention uses three LTPS TFT elements to form the data drive unit, and each of the switch units includes an LTPS TFT element. According to this design, the pixel circuit of the present invention redesigns the storage capacitor leakage path to achieve a balanced state.

(2) In addition, a plurality of switch units are used to provide reverse voltage stress to the driving TFT element contained in the data driving unit, so that the brightness fluctuation (flicker) caused by the characteristic deviation of the TFT element is also improved. Finally, the pixel circuit of the present invention is composed of 8 LTPS TFT elements and a storage capacitor, so that an OLED panel containing the pixel circuit of the present invention can be manufactured with a stable TFT process and low manufacturing cost.

(3) Furthermore, the OLED panel and at least one display driver chip together form an OLED display, and the OLED display will not have leakage or characteristic deviation of the LTPS TFT element under low refresh rate operation, thereby ensuring that the display screen does not flicker.

(4) The present invention also provides an OLED display device, which includes a display driving circuit and an OLED display panel including M×N pixel units, wherein each of the pixel units is composed of an OLED element and a pixel circuit of the present invention as described above.

(5) Furthermore, the present invention also provides an information processing device, which is characterized by having the OLED display device of the present invention as described above. In one embodiment, the information processing device is an electronic device selected from the group consisting of a head-mounted display device, a smart TV, a smart phone, a smart watch, a tablet computer, an all-in-one computer, a laptop computer, an in-vehicle entertainment device, a digital camera, and a video door machine.

It must be emphasized that the above-mentioned case is a preferred embodiment. Any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

In summary, this case shows that it is very different from the known technology in terms of purpose, means and effect, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely ask the review committee to examine it carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.

111: Pixel circuit

112: OLED components

1D: Data drive unit

1DT1: First electrical terminal

1DT2: Second electrical terminal

1DT3: The third electrical terminal

1DT4: Fourth electrical terminal

1DT5: Fifth electrical terminal

1DC1: First control terminal

1DC2: Second control terminal

1DC3: The third control terminal

SW1: First switch unit

SW2: Second switch unit

SW3: The third switch unit

SW4: The fourth switch unit

SW5: The fifth switch unit

Cst: Storage capacitor

Claims (11)

A pixel circuit includes: A data drive unit having a first electrical end, a first control end, a second electrical end, a second control end, a third control end, a third electrical end, a fourth electrical end, and a fifth electrical end; wherein the first electrical end is coupled to a first driving voltage, the first control end and the third control end are both coupled to a light-emitting control signal, and the third electrical end is used to couple to an OLED element; A storage capacitor having a first end and a second end, wherein the first end is coupled to the first electrical end, and the second end is coupled to the second control end; A first switch unit having a control end, a first end, and a second end, wherein the control end is coupled to a switch signal, the first end is coupled to the fifth electrical end, and the second end is coupled to a working voltage; A second switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to a first switch signal, the first end is coupled to a first common point between the second control end and the second end of the storage capacitor, and the second end is coupled to a first initialization voltage; A third switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to a second switch signal or a third switch signal, the first end is coupled to the second electrical end, and the second end is coupled to the first common point; A fourth switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to the second switch signal, the first end is coupled to the fourth electrical end, and the second end is coupled to a display data voltage; and A fifth switch unit also has a control end, a first end and a second end, wherein the control end is coupled to the switch signal, the first end is coupled to a second common point between the third electrical end and the OLED element, and the second end is coupled to a second initialization voltage. A pixel circuit as described in claim 1, wherein the data driving unit comprises: a first TFT element having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the second control terminal of the data driving unit; a second TFT element also having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the first control terminal of the data driving unit, the first element terminal serves as the first electrical terminal of the data driving unit, and the second element terminal is coupled to the first element terminal of the first TFT element; and A third TFT element also has a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the third control terminal of the data driving unit, the second element terminal serves as the third electrical terminal of the data driving unit, and the first element terminal is coupled to the second element terminal of the first TFT element. A pixel circuit as described in claim 2, wherein the first switch unit includes a fourth TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the first switch unit; the second switch unit includes a fifth TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the second switch unit. A pixel circuit as described in claim 3, wherein the third switch unit includes a sixth TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the third switch unit; the fourth switch unit includes a seventh TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the fourth switch unit. The pixel circuit as described in claim 4, wherein the fifth switch unit includes: An eighth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the fifth switch unit. An OLED display device includes a display driving circuit and an OLED display panel, wherein the OLED display panel includes M×N pixel units, M and N are positive integers, and each pixel unit is composed of a pixel circuit and an OLED element; the pixel circuit includes: a data driving unit having a first electrical terminal, a first control terminal, a second electrical terminal, a second control terminal, a third control terminal, a third electrical terminal, a fourth electrical terminal, and a fifth electrical terminal; wherein the first electrical terminal is coupled to a first driving voltage, the first control terminal and the third control terminal are both coupled to a light-emitting control signal, and the third electrical terminal is used to couple to an OLED element; a storage capacitor having a first terminal and a second terminal, wherein the first terminal is coupled to the first electrical terminal, and the second terminal is coupled to the second control terminal; A first switch unit, having a control end, a first end and a second end, wherein the control end is coupled to a switch signal, the first end is coupled to the fifth electrical end, and the second end is coupled to a working voltage; A second switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to a first switch signal, the first end is coupled to a first common point between the second control end and the second end of the storage capacitor, and the second end is coupled to a first initialization voltage; A third switch unit, also having a control end, a first end and a second end, wherein the control end is coupled to a second switch signal or a third switch signal, the first end is coupled to the second electrical end, and the second end is coupled to the first common point; a fourth switch unit, also having a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the second switch signal, the first terminal is coupled to the fourth electrical terminal, and the second terminal is coupled to a display data voltage; and a fifth switch unit, also having a control terminal, a first terminal and a second terminal, wherein the control terminal is coupled to the switch signal, the first terminal is coupled to a second common point between the third electrical terminal and the OLED element, and the second terminal is coupled to a second initialization voltage. An OLED display device as described in claim 6, wherein the data drive unit comprises: a first TFT element having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the second control terminal of the data drive unit; a second TFT element also having a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the first control terminal of the data drive unit, the first element terminal serves as the first electrical terminal of the data drive unit, and the second element terminal is coupled to the first element terminal of the first TFT element; and A third TFT element also has a gate terminal, a first element terminal and a second element terminal, wherein the gate terminal serves as the third control terminal of the data driving unit, the second element terminal serves as the third electrical terminal of the data driving unit, and the first element terminal is coupled to the second element terminal of the first TFT element. An OLED display device as described in claim 7, wherein the first switch unit includes a fourth TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the first switch unit; the second switch unit includes a fifth TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the second switch unit. An OLED display device as described in claim 8, wherein the third switch unit includes a sixth TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the third switch unit; the fourth switch unit includes a seventh TFT element also having a gate terminal, a first component terminal and a second component terminal, and the gate terminal, the first component terminal and the second component terminal respectively serve as the control terminal, the first terminal and the second terminal of the fourth switch unit. The OLED display device as described in claim 9, wherein the fifth switch unit includes: An eighth TFT element, which also has a gate terminal, a first element terminal and a second element terminal, which respectively serve as the control terminal, the first terminal and the second terminal of the fifth switch unit. An information processing device, characterized in that it has at least one OLED display device as described in any one of claim 6 to claim 10.

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