TW202343408A - Image data identification circuit and panel system controller - Google Patents

Abstract

A video data identification circuit (12) for identifying video data output from a video data reception circuit (11) and controlling a drive current of a source driver, the video data identification circuit (12) being provided with: a memory (122) for storing video data of a current horizontal line and video data of a plurality of horizontal lines preceding the current horizontal line among the video data; an image pattern detection circuit (123) that reads the pattern of the image data of the plurality of horizontal lines stored in the memory (122) when the image data of the current horizontal line and the image data of the previous horizontal line are compared and do not match; and a drive current setting circuit (124) that sets a drive current for driving the source driver (13) of the current horizontal line on the basis of the pattern of the image data of the plurality of horizontal lines read from the memory (122) by the image pattern detection circuit (123).

Description

Image data recognition circuit and panel system controller

The invention relates to a panel system controller that outputs analog image data of a display panel and the image data recognition circuit it contains. Specifically, the present invention relates to a circuit technology that minimizes errors in the driving voltage of a source driver.

The market for mobile devices such as notebook computers and tablet computers has been demanding reductions in power consumption and costs. On the other hand, as the resolution of the panel increases or the image quality of the display improves, the amount of data processed and the frequency of operations continue to increase, and reducing power consumption and reducing costs have become major and opposite issues. In a notebook computer or tablet computer, the circuit that inputs graphics data signals to the display panel is composed of the following: a CPU (Central Processing Unit) responsible for the calculation of the graphics data itself or various calculation processing or graphics processing; or Processors such as GPU (Graphics Processing Unit); a timing controller (Timing Controller: TCON) that uses the graphics data transmitted from this processor as input to perform timing control of the display panel or image processing; and a Timing Controller (TCON) that uses graphics data from the processor as input. The graphics data of the timing controller is used as input, and the source driver (SD) and other driver chips that output the graphics data are analogous to the type of the display panel.

In mobile devices such as laptops and tablets, the timing controller and the source driver are mostly separated. For example, in the case of the FHD (Full High Definition, ultra-high definition: 1920×1080 pixels) display panel shown in Figure 1, a timing controller and four source drivers are often required. In addition, in the case of 4K2K panels (panels with a resolution close to 4000×2000 pixels), a timing controller and eight source drivers are often required. Furthermore, as shown in Figure 1, the FPC (Flexible Printed Cable) that connects the timing controller to the source driver needs to match the number of source drivers. As the panel resolution increases, the number of components increases. has also increased, which is the main reason for the increase in costs. Furthermore, although it is necessary to provide an interface between the timing controller and the source driver, power is consumed due to the interface. Due to such background factors, the circuit configuration shown in FIG. 1 is in a situation where it is difficult to reduce costs and power consumption.

Therefore, in order to reduce the number of components and power consumption, the so-called system driver (TCON+SD) in which the timing controller and source driver as shown in Figures 2 and 3 form one chip can also be explored. Figure 2 shows a configuration in which two system drivers are provided, and Figure 3 shows a configuration in which the system driver is integrated into one. By converting the system into a driver, the number of components can be reduced and the cost can be reduced. Furthermore, since there is no interface between the timing controller and the source driver, power consumption can also be reduced. In particular, from the viewpoint of reducing the number of components and power consumption, as shown in Figure 3, it can be said that it is better to have only one system driver. However, the system driver is mounted on the glass of the LCD panel like the previous source driver. The graphics data is directly input from the processor (CPU/GPU) to the system driver through the eDP interface or mipi interface.

Here, the liquid crystal panel is composed of source lines and gate lines. In the case of an FHD panel, the source line requires 1920×3 (RGB) lines, and the gate line requires 1080 lines. The source lines are lines (data lines) for analog outputting graphics data from the source driver, and are wired parallel to each other at predetermined intervals. The gate lines are control lines that drive the drawing data of the source lines while moving temporally one by one. They are wired parallel to each other at predetermined intervals in a direction orthogonal to the source lines. Display pixels are provided at each intersection of the gate line and the source line. In addition, at the current stage, the source driver or system driver is installed on the liquid crystal glass, which is the so-called COG (Chip On the Glass) method.

As shown in Figure 4, in a configuration in which four source drivers are arranged in the frame area, and image data are output from these four source drivers to the source lines on the display panel, only one source driver is required to drive the display panel. The required wiring load of the COG only needs to be small, and the difference in wiring length between the longest source line and the shortest source line only needs to be small. However, as shown in FIG. 5 , in the case where only one system driver composed of a source driver and a timing controller is arranged in the frame area, and image data is output from one source driver to all the source lines on the display panel, , the wiring load of the COG required to drive the driver output becomes significantly larger, and the difference in wiring length between the longest source line and the shortest source line also becomes larger. Display panels such as LCD panels adjust the brightness of the image by using the voltage level (potential) of the analog voltage of the image data output by the source driver. Therefore, if the output voltage of the source driver does not accurately reach the desired voltage level, display problems such as dark spots in parts of the panel may occur.

FIG. 6 shows a model of the wiring load of the source line of the liquid crystal panel. The LCD panel is divided into the fan-out area (corresponding to the frame area), which is the area where the source driver is installed, and the active area (Active Area) where the pixels of the liquid crystal are arranged in a matrix. In the case where multiple source drivers are installed as shown in Figure 4, although the load in the fan-out area driven by one source driver is small, if it is configured with one wafer as shown in Figure 5 or the panel As the size increases, the load will increase. The source driver is required to be driven under the load of this panel to display the image on the display.

Next, FIG. 7 shows the driving timing of one source line of the liquid crystal panel. Although the source line with a small load (a line with a short COG wiring length) quickly reaches the desired voltage level, the line with a large load (a line with a long COG wiring length) reaches the desired voltage level slowly. In the case of an FHD panel, since the time for one horizontal column is 7.5μs (in the case of a dual-gate panel), the desired voltage level needs to be reached within this time. However, in the case of a single-wafer configuration as shown in FIG. 5 or in a case where the panel size is large, the wiring load will become larger, so there is a possibility that the desired voltage level cannot be reached within this driving time.

In addition, FIG. 8 shows the driving timing of the source lines based on the magnitude of the driving current (driving capability) of the source driver. When the drive current of the source driver is large, the desired voltage level is reached quickly, while when the drive current is small, the desired voltage level is reached slowly. This affects display quality when the desired voltage level is not reached. This is the same as the case where the COG wiring length is different as shown in Figure 7 . Furthermore, if the driving current is large, the power consumption of the panel will be large, and if the driving current is small, the power consumption of the panel will be small.

In this way, if the panel size becomes larger, the load from the panel on the source line will become larger, and the source driver may not be able to drive the source line to a desired voltage level within a predetermined time. In addition, as the resolution of the panel increases, the time required to drive one source line becomes shorter. Therefore, even if the load capacitance of the source lines of the panel is the same, the source driver may not be able to drive the source line to the desired value. voltage level. Furthermore, in a configuration in which the timing controller and the source driver are integrated into one chip, the load capacitance of the source line of the panel that needs to be driven increases, and the source driver sometimes cannot drive the source line to the desired voltage level. As mentioned above, since display panels such as liquid crystal panels adjust the brightness of the image through the voltage level of the analog voltage of the image data output by the source driver, if the output voltage of the source driver does not accurately reach the desired voltage level, If it is flat, there will be problems with the display quality. In addition, when the driving current (driving capability) of the source driver is small, display quality problems may occur due to the same reason.

In notebook computers and smartphones, low power consumption of panel systems has become an important differentiation indicator. To address this problem, a source line with a physically larger wiring load can be used in the source driver to increase the overall drive current of the source driver in advance, so that charging can be achieved within one horizontal column to a desired voltage level. An example of a source line with a physically large wiring load is a long COG wiring length as mentioned above. However, in this case, since the driving current of the source driver increases, the power consumption of the panel increases. In addition, as another countermeasure, it is also conceivable to set a larger drive current in advance for the source line with a larger panel load, and to set a smaller drive current in advance for the source line with a smaller panel load. In this way, by adjusting the drive current according to the panel load and for each source line, and fixing the setting of the drive current, the power consumption of the panel system can be rationalized to a certain extent.

In addition, the applicant of the present application has proposed a circuit technology that minimizes the error in the driving voltage of the source driver (Patent Document 1). The data output device described in Patent Document 1 includes: a source driver that drives a plurality of source lines of a display panel; and an overdrive control unit that controls the source driver to overdrive at a voltage level exceeding a desired voltage level. The source line is driven for a predetermined time. The overdrive control unit has an overdrive setting table that sets both or any one of the overdrive voltage and the overdrive time based on the difference in voltage levels of the image data of the current horizontal column and the previous horizontal column; and An overdrive setting control circuit controls the overdrive voltage and overdrive time for driving the source line of the current horizontal column based on the overdrive setting table. By appropriately adjusting the overdrive setting voltage and setting time, the image quality of the liquid crystal panel can be improved. [Known technical documents] [Patent Document]

[Patent Document 1] Japanese Patent Application Publication No. 2018-63332

[Problem to be solved by the invention] However, the image pattern of the display does not repeatedly transition to a high level or a low level between each horizontal column. It is also common for consecutive horizontal columns to maintain the same voltage level. As mentioned above, in the conventional technology, the source driver sets a large drive current in source lines with a large panel load and reduces the drive current in source lines with a small panel load. However, in the same horizontal column, it is difficult to recognize the image pattern and dynamically change the driving current of the source driver. The main reason for this is that the panel structure of conventional notebook computers is that the TCON and source driver are composed of separate chips as shown in Figure 1. Although the TCON can have an input pattern detection function, the actual source line is driven. It is a different chip from the source driver IC, so it is difficult to flexibly control the drive current of the source driver. If the drive current of the source driver can be dynamically optimized according to the image pattern, it can significantly contribute to the reduction of power consumption of the panel system.

In addition, the data output device described in Patent Document 1 can steepen the rise by dynamically setting a voltage (overdrive voltage) exceeding a desired voltage level for a fixed period of time within a horizontal column of time. , and can speed up the time to reach the desired voltage level. In order to control the source driver with an overdrive voltage, the drive current of the source driver needs to be rapidly increased, and accordingly there is a problem of increased power consumption. In addition, when the source driver is controlled with an overdrive voltage in a case where the voltage level changes from a maximum value to a minimum value in a continuous horizontal column, such as when the voltage level changes from a maximum value to a minimum value, the image quality of the liquid crystal panel may be affected The aspect of improvement is effective, but Patent Document 1 does not examine the case where the voltage levels do not differ in consecutive horizontal columns. Particularly in applications such as notebook computers and tablet computers, there are many cases where there is no difference in voltage level between consecutive horizontal columns. In such cases, suppression cannot be achieved with the data output device described in Patent Document 1. Power consumption is still an issue. Furthermore, in a liquid crystal panel, not only does the voltage level of all source driver channels do not differ in consecutive horizontal columns, but also the voltage level of some source driver channels does not vary in consecutive horizontal columns. In the case where a difference occurs, suppression of power consumption is not studied in Patent Document 1.

Therefore, the present invention was completed to solve the problems of the conventional technology, and its main purpose is to dynamically set the driving current of the source driver to an optimal value to achieve low power consumption and improved image quality of the panel system.

[Technical means to solve the problem] The inventors of the present invention conducted in-depth research on technical solutions to solve the problems of the conventional technology, and as a result obtained the following insights: temporarily save the image data of the current horizontal column and the previous two or more horizontal columns in the memory, and based on the stored The driving current used to drive the source driver of the current horizontal column is dynamically set according to the pattern of the image data in the memory, thereby achieving low power consumption and improved image quality of the panel system. Furthermore, the present inventors thought that the problems of the conventional technology could be solved based on the above knowledge, and completed the present invention. Hereinafter, the structure of this invention is demonstrated concretely.

A first aspect of the invention is an image data recognition circuit. The image data identification circuit of the present invention is a circuit for identifying the image data output from the image data receiving circuit to control the driving current of the source driver. The image data recognition circuit basically includes a memory, an image pattern detection circuit, and a drive current setting circuit. The memory stores the image data of the current horizontal column and the image data of n horizontal columns before the current horizontal column (n is an integer of 2 or more, the same below) among the image data output from the image data receiving circuit. That is, at least three horizontal columns of image data are temporarily stored in the memory. The image pattern detection circuit first compares the image data of the current horizontal column with the image data of the previous horizontal column and determines whether they are consistent. When the image data are consistent, the image pattern detection circuit transmits a signal indicating this to the drive current setting circuit. On the other hand, when the image data is inconsistent, the image pattern detection circuit reads the pattern of n horizontal columns of image data stored in the memory before the current horizontal column, and passes the pattern to the current setting circuit. Here, when the image data of the current horizontal column is consistent with the image data of the previous horizontal column, the driving current setting circuit may, for example, set the driving current for driving the source driver of the current horizontal column to the minimum level. . On the other hand, in the case where the image data is inconsistent, the driving current setting circuit sets the source for driving the current horizontal column based on the pattern of n horizontal columns of image data read from the memory by the image pattern detection circuit. The drive current of the pole driver. That is, the driving current setting circuit sets the driving current of the current horizontal column based not only on the relationship between the current horizontal column and the image data of the previous horizontal column, but also based on the patterns of the image data of multiple horizontal columns before the current horizontal column. The set value of the drive current determined by the drive current setting circuit is output to the source driver. In addition, the so-called "minimum level" refers to a level with a current value that is smaller than the driving current when the image data of the current horizontal column is inconsistent with the image data of the previous horizontal column and is a non-zero current value. For example, in the case where the driving current levels can be set to five levels from 1 to 5, if the image data of the current horizontal column is inconsistent with the image data of the previous horizontal column, the driving current can be set to levels 2 to 5. When the image data of the current horizontal column is consistent with the image data of the previous horizontal column, the driving current is set to one level (ie, the minimum level). The minimum value of the drive current may be, for example, a level that prevents leakage of liquid crystal. In addition, the so-called "minimum level" of the driving current here refers to the minimum level within the range controlled based on the comparison result of the current horizontal column and its previous horizontal column. In fact, there may also be source drivers that are less than The above minimum level current value is used for driving.

As described above, when the voltage levels for driving in consecutive horizontal columns are different, the driving current of the source driver of the current horizontal column is changed based on the values of the image data of the previous columns including the previous column. (Drive capability) optimization is effective in improving the image quality and reducing power consumption of the liquid crystal panel. For example, in the example of an 8-bit 256 gray scale LCD panel, the case where the image data of the current horizontal column is white level (level 255) is taken as an example for explanation. For example, in the case where the image data is continuously black level (level 0) in three horizontal columns and the current horizontal column immediately following changes to the white level (black･black･black･white case), and In the case where the image data is continuously white level in two horizontal columns and then black level only in one horizontal column, and then the current horizontal column changes to white level (white･white･black･white case) , the driving current of the source driver required to drive the current horizontal column is different. Therefore, by adjusting the driving current of the source driver when driving the current horizontal column based on the driving patterns of the previous horizontal columns, it is effective to optimize the power consumption of the liquid crystal panel and improve the image quality.

In the image data recognition circuit of the present invention, the image pattern detection circuit can also compare the image data of a part of the current horizontal column, that is, the specific part, with the image data of the part corresponding to the specific part of the previous horizontal column and determine whether they are consistent. . Examples of "specific parts" are 50% of the left half or 50% of the right half of the LCD panel, and x% of the other left side or x% of the right side. When the image data is inconsistent, the image pattern detection circuit reads the pattern of the portion of the image data corresponding to the specific portion among n horizontal columns of image data stored before the current horizontal column in the memory. Here, when the image data of the specific part of the current horizontal column is consistent with the image data of the part corresponding to the specific part of the previous horizontal column, the driving current setting circuit will be used to drive the specific part of the current horizontal column, for example. The driving current of the source driver can be set to the minimum level. On the other hand, when the image data is inconsistent, the drive current setting circuit sets the driving current setting circuit based on the pattern of n horizontal columns of image data corresponding to the specific portion read from the memory by the image pattern detection circuit. The drive current of the source driver driving a specific portion of the current horizontal column.

Even if the image data is not completely consistent in the whole of the two horizontal columns as described above, in the case where the image data is partially consistent in the two horizontal columns, it is possible to change the source driver in the consistent part. The drive current is set to the minimum level to suppress power consumption. For example, if 50% of the source driver channels on the left half of the screen of the LCD panel do not change in the front and rear horizontal columns, or if 25% of the source driver channels on the left side of the screen do not change in the front and rear horizontal columns, as long as the local Just set the driving current of the source driver to the minimum level.

A second aspect of the invention relates to a panel system controller. The panel system controller of the present invention has an image data recognition circuit, an image data receiving circuit and a source driver. The image data receiving circuit is the aforementioned image data recognition circuit of the first aspect. The image data receiving circuit receives image data from an external processor (CPU or GPU) and outputs the image data to the image data recognition circuit. The source driver is driven by a driving current set by the image data recognition circuit, and has multiple output channels that output image data to the source lines of the display panel at a predetermined voltage level.

In the panel system controller of the present invention, preferably the image data recognition circuit and the source driver are formed into an integrated one-chip semiconductor device (system driver). In particular, from the viewpoint of reducing the number of components and power consumption, it is preferable to provide only one such one-wafer type semiconductor device for the display panel. In this one-chip type structure, as mentioned above, the load capacitance of the source line of the panel that needs to be driven becomes larger, and the source driver cannot drive the source line to the desired voltage level, which may cause problems in display quality. question concerns. In this regard, according to the present invention, the driving current output by the source driver can be dynamically controlled. Therefore, even with a single-wafer type structure, improvement in display quality can be expected. In addition, by integrating the image data recognition circuit, image data receiving circuit and source driver, the signal transmission speed between each circuit can be accelerated, so the drive current of the source driver can be flexibly controlled.

A third aspect of the present invention relates to an image data recognition circuit that is different from the first aspect. The image data recognition circuit of the third aspect recognizes the image data output from the image data receiving circuit to control the driving current of the source driver. The image data recognition circuit includes an image pattern detection circuit and a drive current setting circuit. The image pattern detection circuit compares the image data of a specific part of the current horizontal column in the image data output from the image data receiving circuit with the image data of the part corresponding to the specific part of the previous horizontal column and determines whether they are consistent. In the case where the image data of the specific part of the current horizontal column is consistent with the image data of the part corresponding to the specific part of the previous horizontal column, the driving current setting circuit will be used to drive the source driver of the specific part of the current horizontal column. The drive current is set to the minimum level and its set value is output to the source driver.

[Invention effect] According to the present invention, the driving current of the source driver can be dynamically set to an optimal value, thereby achieving low power consumption and improved image quality of the panel system.

Hereinafter, the mode for carrying out the present invention will be described using the drawings. The present invention is not limited to the forms described below, but includes appropriately modified forms from the following forms within the scope that is obvious to a person having ordinary skill in the technical field to which the invention belongs.

FIG. 12 shows a panel system controller 1 according to an embodiment of the present invention. The panel system controller 1 is an integrated circuit that can be installed in the frame area of a display panel represented by a liquid crystal panel, an organic EL panel, or the like. The panel system controller 1 mainly outputs analog image signals to a plurality of source lines constituting the panel 21 and performs control related to the image signals output to each source line. For example, in a notebook computer or a tablet computer, the panel system controller 1 optimizes the driving current of the source driver 13 according to the image data, thereby contributing to low power consumption of the panel system. Furthermore, the panel system controller 1 not only sets the driving current of the source driver 13 to the minimum value, but also stops the clock signal to the source driver 13 or stops the image data to the source driver 13, thereby also reducing the The internal operation of the source driver 13 is also deactivated, thereby reducing power consumption while keeping the source driver 13 powered on.

The panel 21 has a normal structure and mainly includes source lines, gate lines, and display pixels. A plurality of source lines are provided in parallel with each other at predetermined intervals on a panel substrate made of glass or the like. A plurality of gate lines are provided in parallel with each other at predetermined intervals along a direction orthogonal to the source lines on the same panel substrate. Display pixels are arranged at each intersection of the source line and the gate line. Each display pixel is connected to a TFT (Thin Film Transistor) as a switching element. For example, as shown in Figure 15, in the case of an FHD liquid crystal panel, the source line requires 1920×3 (RGB) lines, and the gate line requires 1080 lines. The panel system controller 1 mainly performs processing of outputting image signals to the source lines.

As shown in FIG. 12 , the panel system controller 1 of this embodiment includes an image data receiving circuit 11 , an image data identifying circuit 12 and a source driver 13 . Preferably, these circuits 11, 12, and 13 are installed on the liquid crystal glass in a so-called COG (Chip On the Glass) method.

In addition, in the panel system controller 1 of the present invention, the image data recognition circuit 12 and the source driver 13 can also be integrated into a semiconductor chip. If the image data recognition circuit 12 and the source driver 13 are composed of independent semiconductor chips, data communication is required between them. For example, when the image data identification circuit 12 is implemented with TCON (timing controller), it is required to send the driving current setting value of the source driver 13 detected with TCON during the blanking period when no image data is displayed. In addition, the driving current setting value of the source driver 13 sent during the blanking period is received by the source driver 13, and after the driving current of the source driver 13 is changed, the panel is finally driven with the changed driving current value. . In this way, the delay from when the image data is input to TCON to when the driving current of the source driver is changed becomes larger. In contrast, if the image data recognition circuit 12 (TCON) and the source driver 13 are integrated into one semiconductor chip, they become controlled within the same chip, and the delay can be reduced.

The image data receiving circuit 11 is a circuit for receiving digital image data and clock signals from the processor. The image data receiving circuit 11 transmits the received image data to the image data identifying circuit 12 . In addition, the image data receiving circuit 11 shares the received clock signal with the image data identifying circuit 12 and the source driver 13 . The image data receiving circuit 11 may be composed of a high-speed serial interface such as an eDP receiver circuit or a MIPI receiver circuit. In addition, the image data input to the image data receiving circuit 11 is processed by a processor such as a CPU (Central Processing Unit) or a GPU (Graphics Processing Unit) as shown in Figure 1. Data obtained by computational processing or graphics processing.

The source driver 13 is a circuit for driving the source lines of the panel 21 . The source driver 13 is connected to a plurality of source lines and applies a driving voltage (grayscale display voltage) to each source line. The panel system controller 1 may have a plurality of source drivers 13 for one panel 21 , but from the viewpoint of reducing the number of components and power consumption, it is preferable to have only one source driver 13 for each panel 21 . Although illustration is omitted, the panel system controller 1 may include a gate driver that drives the gate lines of the panel 21 . However, the gate driver is not an essential component of the panel system controller 1 of the present invention, and can also be arranged outside the panel system controller 1 . The gate driver sequentially applies a scan signal for turning on the TFT to each gate line. When the gate driver applies an operation signal to the gate line and the TFT turns on, when a driving voltage is applied to the source line from the source driver 13, charges are accumulated in the display elements located at these intersections. Thereby, the light transmittance of the display element changes according to the driving voltage applied to the source line, and image display via the display element is performed. In addition, the source driver 13 may have a function of over-driving each source line (see Patent Document 1).

The image data recognition circuit 12 is a circuit used to control the driving current setting of the source driver 13 . The image data identification circuit 12 can determine appropriate driving current settings for the plurality of source lines coupled to the source driver 13 respectively. The driving current setting of the source driver 13 determined by the image data recognition circuit 12 is input to the source driver 13 as a control signal. The source driver 13 controls the driving of each source line according to the control signal input here. In addition, the clock output from the image data receiving circuit 11 is input to the image data identification circuit 12 and the source driver 13, and becomes the reference clock of the respective internal circuits.

As shown in FIG. 12 , in this embodiment, the image data recognition circuit 12 is composed of a level detection circuit 121 , a memory 122 , an image pattern detection circuit 123 , a driving current setting circuit 124 and a blanking period detection circuit 125 .

The level detection circuit 121 receives the digital image data output from the image data receiving circuit 11 and detects the analog voltage level of the source driver 13 . That is, the level detection circuit 121 detects the level of the analog voltage output from the source driver 13 to each source line of the panel 21 based on the digital image data received by the image data receiving circuit 11 . The detection result of the level detection circuit 121 is output to the drive current setting circuit 124 as a control signal.

The memory 122 is a storage circuit for storing the image data output from the image data receiving circuit 11 for a predetermined period. Specifically, the memory 122 is configured to store a predetermined number of horizontal columns of image data. Since the horizontal synchronization signal used to divide the period of each horizontal column is incorporated into the image data, the memory 122 may, for example, store a predetermined number of horizontal column image data based on the horizontal synchronization signal. In addition, the length of the image data that can be stored in the memory 122 is limited by a predetermined value. The memory 122 sequentially stores the image data while sequentially deleting the same amount. In addition, the predetermined number of horizontal columns that can be stored in the memory 122 can be appropriately adjusted by register settings. That is, the predetermined number can be changed for every arbitrary number of horizontal columns. In addition, the image data stored in the memory 122 can be set to more than one horizontal row, such as one horizontal row or two horizontal rows, or can be set to less than one horizontal row, such as 1/2 horizontal row or 1/4 horizontal row. Horizontal columns. In addition, for example, in the case of an FHD panel (1920×1080), since one horizontal column has 1920 pixels, the number of output channels of the analog voltage of the source driver 13 is 1920×3 (RGB) = 5760 channels. In the case where the predetermined number of horizontal columns is less than one horizontal column, this number of output channels can also be used to specify the predetermined number. For example, in the case of an FHD panel, the 1/2 horizontal column has 2880 channels and the 1/4 horizontal column has 1440 channels.

Especially in the present invention, the image data stored in the memory 122 is set to three or more horizontal columns. Specifically, in addition to the image data of the current horizontal column, the memory 122 also stores image data of two or more horizontal columns before the current horizontal column. In addition, when the image data of the current horizontal column is newly stored in the memory 122, the image data of the oldest horizontal column stored in the memory 122 is deleted. The image data stored in the memory 122 may be four or more horizontal columns including the current horizontal column, or may be five or more horizontal columns, or may be six horizontal columns, seven horizontal columns, or more.

In addition, a typical driving method of the liquid crystal panel will be described with reference to FIG. 15 . The vertical lines are the source lines that drive image data. The FHD panel case has 5760 lines. Each of the 5760 source lines is driven by the source driver. The horizontal lines are called gate lines, and there are 1080 lines in the case of FHD panels. Connect in sequence from the first line in the upward direction to the 1080th line in the downward direction in chronological order. There is a liquid crystal element at the intersection of the source line and the gate line, where image data is stored. In terms of action timing, the first gate line is first turned on, and all source lines are turned on, and image data is written into a total of 5760 liquid crystal elements in the first column. Then, the first gate line is turned off, the second gate line is turned on, and all the source lines are turned on similarly, and the image data is written into a total of 5760 liquid crystal elements in the second column. In this way, images are written to the liquid crystal element sequentially from the first to the 1080th.

The image pattern detection circuit 123 receives the image data of the current horizontal column output from the image data receiving circuit 11 and the image data of a plurality of horizontal columns stored in the memory 122 . Then, the image pattern detection circuit 123 first compares the image data of the current horizontal column with the image data of the previous horizontal column to detect the consistency of the image pattern. At this time, the image pattern detection circuit 123 may detect that the image pattern is consistent in all channels of the current horizontal column and the previous horizontal column, or it may detect that the image pattern is only consistent between the current horizontal column and the previous horizontal column. The image pattern is consistent in 1/2 of the horizontal columns or the image pattern is consistent in only 1/4 of the horizontal columns. The image data input to the image pattern detection circuit 123 includes the following two types of data: the image data of the current horizontal column directly input from the image data receiving circuit 11; and the past data temporarily input from the image data receiving circuit 11 via the memory 122. Multiple horizontal columns of image data. Then, the image data of the current horizontal column from the image data receiving circuit 11 is input to the image pattern detection circuit 123 in real time. In addition, at this time, the image data of the current horizontal column are also input to the memory 122 at the same time. On the other hand, the memory 122 temporarily stores image data equivalent to a plurality of horizontal columns before the current horizontal column. Therefore, a plurality of horizontal columns of past image data are input from the memory 122 to the image pattern detection circuit 123 . Therefore, the image pattern detection circuit 123 receives the image data of the current horizontal column from the image data receiving circuit 11 in real time, and receives the image data of a plurality of past horizontal columns from the memory 122 . Then, the image pattern detection circuit 123 first compares the image data of the current horizontal column with the image data of the previous horizontal column to determine whether part or all of the image patterns of the two are consistent. Then, if the image patterns of the two are consistent, it can at least be known that the image data of the current horizontal column has not changed from the image data of the previous horizontal column. When the image pattern detection circuit 123 compares the current image data and the previous image data in this way and the image patterns of the two match, the result is output to the drive current setting circuit 124 as a control signal. In this case, as will be described later, the drive current setting circuit 124 sets the drive current for driving the source driver of the current horizontal column to the minimum level.

On the other hand, if the image pattern detection circuit 123 compares the image data of the current horizontal column with the image data of the previous horizontal column as described above and determines that the image patterns of the two are inconsistent, then reading Patterns of image data of a plurality of horizontal columns in the past are stored in the memory 122, and the patterns are output to the drive current setting circuit 124 as control signals. In this case, as will be described later, the drive current setting circuit 124 sets the drive current for driving the source driver of the current horizontal column based on the patterns of image data of a plurality of past horizontal columns stored in the memory 122 .

The blanking period detection circuit 125 receives the image data output from the image data receiving circuit 11 and detects the blanking period from the image data. In addition to the horizontal synchronization signal and the vertical synchronization signal, the image data also includes a signal representing the horizontal blanking period and a signal representing the vertical blanking period. When a horizontal blanking period and a vertical blanking period are detected based on such image data, the blanking period detection circuit 125 outputs the detection result as a control signal to the drive current setting circuit 124 . In addition, the object detected by the blanking period detection circuit 125 may be, for example, only the vertical blanking period.

The drive current setting circuit 124 receives various control signals output from the level detection circuit 121, the image pattern detection circuit 123, and the blanking period detection circuit 125 respectively, and sets the drive current of the source driver 13 based on these control signals.

FIG. 13 shows an example of the control logic performed by the drive current setting circuit 124. First, the drive current setting circuit 124 determines whether it is the blanking period based on the detection signal from the blanking period detection circuit 125 . If it is the blanking period, the blanking period detection circuit 125 outputs its detection signal. Therefore, when the drive current setting circuit 124 receives the detection signal, it can determine that it is the blanking period. During the blanking period, there is no need to output image data from the source driver 13 to the panel 21 . Therefore, when it is the blanking period, the drive current setting circuit 124 sets the drive current of the source driver 13 to the minimum level. Although the blanking period includes a horizontal blanking period and a vertical blanking period, the vertical blanking period is long. Therefore, it is particularly effective to set the drive current of the source driver 13 to the minimum level during the vertical blanking period. Similarly, the drive current of the source driver 13 can be set to the minimum level during the horizontal blanking period.

In addition, during the blanking period, the driving current setting circuit 124 can not only set the driving current of the source driver 13 to the minimum level, but also stop supplying the clock signal to the source driver 13 or stop supplying image data to the source driver 13 . As long as the signal lines that supply image data or clock signals to the source driver 13 are pre-set with switch circuits (not shown) that can cut off the signal lines, and the drive current setting circuit 124 is connected to these switch circuits. That’s it. Thereby, the supply of image data or clock signal to the source driver 13 can be controlled by the driving current setting circuit 124 . During the blanking period, the internal operation of the source driver 13 is also deactivated, thereby significantly reducing power consumption while keeping the source driver 13 powered on. In addition, the source driver 13 usually has an internal data latch. When the power is turned on, the image data is still stored in the internal latch even if the input of the clock signal or the input of image data is stopped. Therefore, even when the clock signal is stopped or image data is input, the image data of the internal latch continues to be output from the source driver 13, and no display problem will occur on the panel 21.

On the other hand, in the case of the non-blanking period, the drive current setting circuit 124 determines whether the image pattern of the image data of the current horizontal column and the image data of the previous horizontal column is based on the detection signal from the image pattern detection circuit 123. consistent. If the image patterns of the two are consistent, the image pattern detection circuit 123 outputs its detection signal. Therefore, when the driving current setting circuit 124 receives the detection signal, it can determine whether the current horizontal column and the previous horizontal column are The image pattern is consistent. Specifically, when the image data of the current horizontal column and the previous horizontal column are consistent, it means that the voltage level of the source driver 13 has not changed from the previous horizontal column to the current horizontal column. In this case, the drive current setting circuit 124 can set the drive current to the minimum level in all output channels of the source driver 13 .

In addition, when the detection signal from the image pattern detection circuit 123 indicates that the image pattern is consistent in the entire horizontal column, that is, when the image pattern is consistent in all output channels of the previous horizontal column and the current horizontal column. In addition to setting the driving current of the source driver 13 to the minimum value during the period when the image patterns are consistent, the driving current setting circuit 124 can also stop supplying the clock signal to the source driver 13 or stop supplying the clock signal to the source driver 13 Provide imaging data. In this way, the internal operation of the source driver 13 is disabled while the source driver 13 is powered on with a minimum driving current, thereby significantly reducing the power consumption. In addition, when the period for which the image patterns match is less than one horizontal column, if the source driver 13 is set to be disabled, different parts of the image pattern cannot be displayed. Therefore, in this case, the supply to the source driver 13 is continued. Image data or clock signal.

On the other hand, as mentioned above, in notebook computers, there are many cases where there is no difference in voltage levels between consecutive horizontal columns, and it is also important to suppress power consumption in such cases. Suppressing power consumption is also important in the following cases: For example, in addition to the case where the image pattern is consistent in the drive channels of all source drivers in the two horizontal columns, there is also the case where the image pattern is consistent in the two horizontal columns. The driving channels of some source drivers are consistent. Therefore, when the detection signal of the image pattern detection circuit 123 indicates that the image pattern is consistent only in 1/2 of the horizontal columns or the image pattern is consistent in only 1/4 of the horizontal columns, the driving current is set The circuit 124 may set the drive current to the minimum value only in the output channel corresponding to the part that matches the image pattern among all the output channels of the source driver 13 . For example, in the case of an FHD panel (1920×1080), since one horizontal column has 1920 pixels, the number of output channels of the analog voltage of the source driver 13 is 1920×3 (RGB) = 5760 channels. The 5760 channels of the source driver 13 are respectively connected to the source lines on the panel 21 . Since the image data may be different for each output channel, the source driver 13 and the drive current setting circuit 124 are configured so that the drive current can be set arbitrarily for each output channel of the source driver 13 to achieve better results. Meticulously optimize power consumption.

Next, as shown in FIG. 13 , in the non-blanking period and when the image patterns are inconsistent in the preceding and following horizontal columns, the drive current setting circuit 124 refers to the image data of a plurality of past horizontal columns stored in the memory 122 . pattern. The control here will be described with reference to FIGS. 16 and 17 .

When there is a difference in the driving voltage level between successive horizontal columns, the driving current of the source driver that drives the current horizontal column is calculated taking into account the values of the data of the previous horizontal columns including the previous horizontal column. Optimization is effective in improving the image quality of LCD panels. Here, an 8-bit 256 gray scale LCD panel is taken as an example for explanation. In the example shown in Figure 16, the image data of the current horizontal column is set to the fourth column in the figure, and is output at white level (level 255). In addition, FIG. 16 shows a case where the image data from the current horizontal column to the first three columns are at black level for three consecutive times and then immediately change to white level (current horizontal column). On the other hand, in Figure 17, the image data of the current horizontal column is also set to the fourth column in the figure, and the image data of the current horizontal column is set to white level (level 255), but it is different from that shown in Figure 16. The example shown is different in this point: the image data from the current horizontal column to the first three columns continuously changes in the form of black level (level 0), white level (level 255), and black level (level 0).

Here, in the examples shown in FIGS. 16 and 17 , four horizontal columns of image data can be recorded in the memory 122 . That is, in addition to the image data of the current horizontal column, the memory 122 also stores the image data of the first three horizontal columns in sequence. In the example shown in FIG. 16 , since the image data from the current horizontal column to the first three columns can be stored in the memory, the drive current setting circuit 124 can detect black, white, and black by referring to the memory 122 . Black, black and white pattern. In addition, similarly in the example shown in FIG. 17 , the drive current setting circuit 124 can detect patterns of black, white, black, and white by referring to the memory 122 . In this way, the pattern of image data up to the first three columns in the past can be considered in the four-column memory.

In the example shown in FIG. 16 , first, the black level image data of the first column is stored in the memory 122 . At this time, since the black level image data in the first column is the original data, it cannot be compared with the previous image data. In this case, it is sufficient to simply refer to the image data of the first column itself and set the driving current of the source driver 13 when driving the first column. Then, the black level image data of the second column is stored in the memory 122 . At this time, if the image data in the first column and the second column are compared, they both have the same black level (level 0). Therefore, in this case, it is sufficient to set the driving current of the source driver 13 to the minimum level when driving the second column as described above. Then, the black level image data of the third column is stored in the memory 122 . At this time, if the image data in the second column and the third column are compared, the black level (level 0) is consistent. Therefore, in this case, as described above, the driving current of the source driver 13 when driving the third column only needs to be set to the minimum level.

Then, the white level (level 255) image data of the fourth column is stored in the memory 122 . Thereby, four horizontal columns of image data are stored in the memory 122 . At this time, if the image data of the third column and the fourth column are compared, the third column has a black level and the fourth column has a white level, so the source driver 13 of the fourth column (current horizontal column) is driven. The drive current is not enough at the minimum level and must be set larger than this level. That is, in a liquid crystal panel, even if the same transition from black level to white level is made, it may be affected by the data of the previous column. Therefore, in the case where the current horizontal column becomes the white level (level 255) after the black level (level 0) is continuously maintained in the three horizontal columns, in order to advance the source driver 13 driving the current horizontal column to the target For the desired value voltage level, for example, it is preferable to increase the drive current of the source driver 13 to the maximum level at once, or to apply the overdrive voltage and time disclosed in Patent Document 1 (Japanese Patent Application Laid-Open No. 2018-63332) (see FIG. 18 ).

On the other hand, in the example shown in FIG. 17 , first, the black level image data of the first column is stored in the memory 122 . At this time, since the black level image data in the first column is the original data, it cannot be compared with the previous image data. In this case, it is sufficient to simply refer to the image data of the first column itself and set the driving current of the source driver 13 when driving the first column. So far it is the same as in Figure 16 . Then, the white level image data of the second column is stored in the memory 122 . At this time, if the image data in the first column and the second column are compared, they are inconsistent with each other. In addition, at this point, the memory 122 does not store the predetermined sequence amount of image data. In this case, the process shown in FIG. 13 is followed, and the driving current is adjusted according to the difference between the voltage levels of the previous horizontal column and the current horizontal column. Details of this point will be described later. Basically, due to the transition from black level to white level, the driving current of the source driver 13 needs to be set larger. Then, the black level image data of the third column is stored in the memory 122 . At this time, if the image data in the second column and the third column are compared, they are inconsistent with each other. In this case, the process shown in FIG. 13 is also followed, and the driving current is adjusted according to the difference between the voltage levels of the previous horizontal column and the current horizontal column. Basically, due to the transition from the white level to the black level, the driving current of the source driver 13 needs to be set larger.

Then, the white level (level 255) image data of the fourth column is stored in the memory 122 . Thereby, four horizontal columns of image data are stored in the memory 122 . At this time, if the image data of the third column and the fourth column are compared, the third column has a black level and the fourth column has a white level, so the source driver 13 of the fourth column (current horizontal column) is driven. The drive current must also be increased. However, when comparing the example of FIG. 16 and the example of FIG. 17, in the example of FIG. 17, since the second column is at the white level, even if the third column becomes the black level, the fourth column is raised to the white level. Normally, it will also be affected by the white level in the second column. Therefore, compared with the case where three columns continue to be black level and then become white level as shown in the example of FIG. 16 , in the example of FIG. 17 , the source for outputting the white level of the fourth column can be suppressed. drive current of driver 13. That is, in the fourth column in the example of FIG. 17 , the drive current of the source driver 13 may be set to a smaller level than in the fourth column in the example of FIG. 16 . For example, in the case where the level of the drive current is set to the maximum level (eg, five levels) in the example of FIG. 16 , in the example of FIG. 17 , the level of the drive current is set to a level smaller than the maximum level (eg, level 5). Level 4) is enough. In this way, the driving current for driving the source driver 13 of the current horizontal column can be controlled based on the patterns of the image data of multiple columns stored in the memory 122 . This is expected to reduce the power consumption of the LCD panel and improve the image quality.

To give another example, regarding the driving of the LCD panel, not only the black level (level 0) and the white level (level 255) must be considered, but also the intermediate gray level (for example, level 125). An example of such a transition of the drive current to the black level, the white level, and the intermediate gray level is shown in FIG. 19 . This intermediate gray level (125 levels) display is generally highly sensitive to the human eye. For example, assuming that the image data of the current horizontal column is a mid-gray level (level 125), and the image data from the current horizontal column to the first three horizontal columns are all black level (level 0), and When the image data from the current horizontal column to the first three horizontal columns changes in the form of black level, mid-gray level, and black level, the mid-gray level (125 levels) of the current horizontal column is driven. The required driving current of the source driver 13 is different. For example, assuming that the level of the driving current of the source driver 13 can be adjusted in five levels, it is only necessary to consider the image patterns of the past horizontal columns stored in the memory 122, and set the current horizontal column (middle grayscale level) as follows: Level) driving current is sufficient. In addition, the following setting example is just an example, and the setting of the driving current can be adjusted appropriately. [Setting example of drive current level] 1) Black → Black → Black → Medium: Level 5 (maximum) 2) White → White → White → Medium: Level 5 (maximum) 3) Medium → White → White → Medium: Level 4 4) Medium → Black → Black → Medium: Level 4 5) Medium → White → Black → Medium: Level 4 6) Medium → Black → White → Medium: Level 4 7) Black → Medium → Black → Medium: Level 3 8) Black→Medium→White→Medium: Level 3 9) White → Medium → Black → Medium: Level 3 10) White→Medium→White→Medium: Level 3 11) Medium → Medium → Black → Medium: Level 2 12) Medium → Medium → White → Medium: Level 2 13) Black → Black → Medium → Medium: Level 1 (minimum) 14) White → White → Medium → Medium: Level 1 (minimum) 15) White → Black → Medium → Medium: Level 1 (minimum) 16) Black → White → Medium → Medium: Level 1 (minimum) 17) Black→Medium→Medium→Medium: Level 1 (minimum) 18) White→Medium→Medium→Medium: Level 1 (minimum)

In addition, this control method of setting the driving current for driving the source driver 13 of the current horizontal column based on the patterns of image data of multiple horizontal columns in the past is not limited to the control of the entire horizontal column, and can also be applied to a part of the horizontal column. control.

Specifically speaking, assuming control of the entire horizontal column, the number of channels of all source drivers that drive the liquid crystal panel is, for example, 1920 × 3 (R/G/B) = 5760 channels in the case of FHD. Comparing all Whether the source driver channels are consistent in the current column and the previous column, and if all the source driver channels are consistent, the driving capability of the source driver can be reduced in all channels. It is not limited to this. As shown in Figure 20, for example, only the 50% area on the left half of the screen of the liquid crystal panel is compared to see whether the current column and the previous column are consistent. All the source driver channels in the left 50% of the screen are In the same situation, the drive current of the source driver can be reduced in only 50% of all channels on the left half of the screen. Similarly, for example, only the 50% area on the right half of the screen of the LCD panel is compared to see whether it is consistent between the current column and the previous column. If all the source driver channels in the 50% right half of the screen are consistent, it is possible to compare only the 50% area on the right half of the screen. Reduce the source driver drive current in 50% of all channels on the right half. In addition, in the example of FIG. 20 , the liquid crystal panel is divided into two areas of 50% each on the left and right sides, but the liquid crystal panel can also be divided into three areas or four or more areas to perform the same process. In this way, not only the entire screen is consistent, but also the source driver can be reduced by dividing the screen of the liquid crystal panel into multiple areas and the driving channels of all the source drivers in the two columns before and after the two columns are unchanged. The driving power of the drive. Of course, in the case where there is a change between the current column and the previous column, the driving capability of the source driver can be increased according to the amount of change.

Furthermore, in the scheme of dividing the screen of the liquid crystal panel into multiple areas and detecting changes in image data in each area, as explained with reference to FIGS. 16 and 17 , multiple levels before the current horizontal column may also be considered. The driving current of the source driver driving the current horizontal column is optimized under the influence of the image data of the column. That is, FIG. 21 shows a timing chart of the liquid crystal panel. For example, when the number of channels of the source driver is 5760 channels, the left half of the screen represents source driver channel channels 1 to 2880, and the right half of the screen represents source driver channel channels 2881 to 5760. In addition, in Figure 21, d1~d5760 are the image data of the current horizontal column, c1~c5760 are the image data of the horizontal column before the current horizontal column, and b1~b5760 are the images of the horizontal column two columns before the current horizontal column. Data, a1 ~ a5760 are the image data of the horizontal columns three columns before the current horizontal column. These four horizontal columns of image data are stored in the memory 122 . Furthermore, d1 to d2880 are the image data in the current horizontal column corresponding to the left half of the screen of the LCD panel, and c1 to c2880, b1 to b2880, and a1 to a2880 are the image data of the past horizontal columns corresponding to the left half of the screen. Image data.

In this case, when setting the driving current of the source driver that outputs the image data d1 to d2880 in the current horizontal column corresponding to the left half of the screen, it is only necessary to refer to the image of the past horizontal column corresponding to the left half of the screen. The patterns of data c1~c2880, b1~b2880 and a1~a2880 are enough. For example, assume that the image data d1 to d2880 corresponding to the left half in the fourth column are inconsistent with the image data c1 to c2880 corresponding to the left half in the third column. In this case, the current fourth column can be determined based on the patterns of the image data corresponding to the left half (c1˜c2880, b1˜b2880, a1˜a2880) stored in the first to third columns of the memory 122. The driving current of the source driver of d1~d2880 corresponding to the left half. In addition, this kind of local drive current control is not limited to the left half of the screen, but can also be performed on the right half of the screen.

Next, description returns to FIG. 13 again. As shown in FIG. 13 , in the non-blanking period, when the image patterns are inconsistent in the front and rear horizontal columns, and a predetermined number of horizontal columns of image data are not recorded in the memory 122 , the drive current setting circuit 124 sets the driving current setting circuit 124 based on the voltage. The detection value of the flat detection circuit 121 compares the voltage levels of the front and rear horizontal columns, and sets the driving current of the source driver 13 according to the difference in voltage levels. For example, in a case where the voltage level of the previous horizontal column is the maximum value and the voltage level of the current horizontal column is the minimum value, the difference in the voltage levels of the two columns is the largest. In this case, the drive current setting circuit 124 sets the drive current of the source driver 13 to the maximum value. Or, even if the voltage level of the previous horizontal column is the maximum value, in the case where the voltage level of the current horizontal column is the intermediate value, the difference in the voltage levels of the two columns is moderate. In this case, the drive current setting circuit 124 sets the drive current of the source driver 13 to a moderate value.

FIG. 14 shows an example of the driving current setting operation performed by the driving current setting circuit 124 . An example of the change in the voltage level of a certain source line is shown in FIG. 14 . The voltage level of this source line is the minimum value during the vertical blanking period. After that, the voltage level is the maximum value during the first horizontal column period. The voltage level also maintains the maximum value during the next second horizontal column period. During the three horizontal columns the voltage level is medium, during the next fourth horizontal column the voltage level is again at a minimum value, and during the next fifth horizontal column the voltage level is again at a maximum value. Observing the changes in the voltage level during each horizontal column period, the voltage level changes the largest during the first horizontal column period, the voltage level does not change during the second horizontal column period, and the voltage level changes during the third horizontal column period. The amount of change is medium, the amount of change of the voltage level is medium again during the fourth horizontal column, and the amount of change of the voltage level becomes maximum again during the fifth horizontal column.

Then, the drive current setting circuit 124 sets the drive current of the source driver 13 based on the change in the voltage level. Basically, the driving current of the source driver 13 is proportional to the change amount of the voltage level in each horizontal column period. That is, the change amount of the voltage level is the largest during the first horizontal column period, so the driving current of the source driver 13 is set to the maximum value. In addition, the voltage level does not change during the second horizontal column, so the driving current of the source driver 13 is set to the minimum value. In addition, the change amount of the voltage level during the third horizontal column period is medium, so the driving current of the source driver 13 is set to an intermediate value. In addition, the change amount of the voltage level in the fourth horizontal column period is medium again, so the driving current of the source driver 13 is set to an intermediate value. In addition, the change amount of the voltage level is the largest during the fifth horizontal column period, so the driving current of the source driver 13 is set to the maximum value. Thereby, for example, during the second horizontal column period when the voltage level does not change, the driving current of the source driver 13 can be suppressed to the minimum value, and therefore the power consumption can be suppressed. In addition, since the driving current of the source driver 13 can be set to an amount required to maintain the display quality of the panel 21, unnecessary power consumption can be suppressed. In particular, the drive current of the source driver 13 can be finely adjusted for each horizontal column, so the power consumption of the source driver 13 can be optimized.

As mentioned above, in this specification, in order to present the content of this invention, the embodiment of this invention was described with reference to the drawings. However, the present invention is not limited to the above-described embodiments, and includes modifications and improvements that are obvious to a person of ordinary skill in the technical field to which the present invention belongs based on the matters described in the specification of this application.

1: Panel system controller 11:Image data receiving circuit 12:Image data recognition circuit 121: Level detection circuit 122:Memory 123:Image pattern detection circuit 124: Drive current setting circuit 13: Source driver 21:Panel

FIG. 1 is a block diagram showing the overall structure of a display module in which a timing controller and a source driver are separated. FIG. 2 is a block diagram showing the overall structure of a display module including two system drivers integrating a timing controller and a source driver. FIG. 3 is a block diagram showing the overall structure of a display module including only one system driver that integrates a timing controller and a source driver. FIG. 4 is a diagram showing the wiring of source lines in the frame area (fan-out area) and effective area of the liquid crystal panel in a display module in which the timing controller and the source driver are separated. FIG. 5 is a diagram showing the wiring of source lines in the frame area (fan-out area) and effective area of the liquid crystal panel in a display module in which a timing controller and a source driver are integrated. FIG. 6 is a diagram illustrating the distribution of wiring resistance and wiring capacitance in wiring of source lines of the liquid crystal panel. FIG. 7 is a diagram illustrating how the voltage of the source line changes depending on the size of the wiring load of the liquid crystal panel (especially the length of the wiring length of the source line). FIG. 8 is a diagram for explaining how the voltage of the source line changes depending on the magnitude of the drive current of the source driver of the liquid crystal panel. FIG. 9 is a diagram illustrating the output voltage waveform of each source line when the voltage level of the horizontal column changes from the maximum value to the minimum value. FIG. 10 is a diagram illustrating the output voltage waveform of each source line when the voltage level of the horizontal column changes from the maximum value to the intermediate value. FIG. 11 is a diagram illustrating the output voltage waveform of each source line when the image data does not change during consecutive horizontal column periods. FIG. 12 is a block diagram schematically showing the overall structure of a panel system controller according to an embodiment of the present invention. FIG. 13 is a flowchart showing an example of the control logic of the source driver performed by the drive current setting circuit. FIG. 14 is a diagram showing the relationship between the output voltage waveform of the source driver and the drive current setting value in the present invention. FIG. 15 is a diagram showing the structure of a general liquid crystal panel. FIG. 16 is a diagram showing an example of a method of controlling the drive capability of a current horizontal column based on image patterns of a plurality of horizontal columns stored in a memory. FIG. 17 is a diagram showing another example of a method of controlling the drive capability of a current horizontal column based on image patterns of a plurality of horizontal columns stored in the memory. FIG. 18 is a diagram showing an example of overdrive control. FIG. 19 is a diagram illustrating an example in which the drive level of the liquid crystal panel transitions between black level (minimum), white level (maximum), and half-tone level. FIG. 20 is a diagram showing an example of comparing the image data of the current horizontal column and the previous horizontal column on the left half and the right half of the liquid crystal panel respectively. 21 is a diagram illustrating an example of comparing a current horizontal column with image data of a plurality of horizontal columns stored in a memory in a part of a horizontal column of a liquid crystal panel.

1: Panel system controller

11:Image data receiving circuit

12:Image data recognition circuit

121: Level detection circuit

122:Memory

123:Image pattern detection circuit

124: Drive current setting circuit

125: Blanking period detection circuit

13: Source driver

21:Panel

Claims (5)

An image data recognition circuit that recognizes image data output from an image data receiving circuit to control the driving current of a source driver, and has: A memory that stores the image data of the current horizontal column among the image data output from the image data receiving circuit and the image data of n horizontal columns before the current horizontal column, where n is 2 or more integer, the same as below; An image pattern detection circuit that compares the image data of the current horizontal column with the image data of the previous horizontal column and determines whether they are consistent, and when the image data are inconsistent, reads the image data stored in the memory. The pattern of image data n horizontal columns before the current horizontal column; and A driving current setting circuit that sets the source for driving the current horizontal column based on the pattern of the image data of the n horizontal columns read from the memory by the image pattern detection circuit. driving current of the pole driver, and outputting the set value of the driving current to the source driver. The image data recognition circuit of claim 1, wherein the image pattern detection circuit compares the image data of a part of the current horizontal column, that is, the specific part, with the part of the previous horizontal column corresponding to the specific part. image data and determine whether they are consistent, and, In the case where the image data is inconsistent, the pattern of the image data of the portion corresponding to the specific portion among the image data of n horizontal columns before the current horizontal column stored in the memory is read, The driving current setting circuit is set for driving based on the pattern of the image data of the portion corresponding to the specific portion of the n horizontal columns read from the memory by the image pattern detection circuit. The drive current of the source driver for the specific portion of the current horizontal column. A panel system controller having: The image data recognition circuit of claim 1; an image data receiving circuit that receives image data and outputs the image data to the image data recognition circuit; and A source driver drives with a driving current set by the image data recognition circuit, and has a plurality of output channels that output the image data to the source lines of the display panel at a predetermined voltage level. The panel system controller of claim 3, wherein the image data recognition circuit and the source driver are composed of an integrated semiconductor device on one chip. An image data recognition circuit that recognizes image data output from an image data receiving circuit to control the driving current of a source driver, and has: An image pattern detection circuit that compares the image data of a specific part of the current horizontal column in the image data output from the image data receiving circuit with the image of the part corresponding to the specific part of the previous horizontal column. information and determine whether it is consistent; and The driving current setting circuit is used to drive the specific part of the current horizontal column when the image data of the specific part of the current horizontal column is consistent with the image data of the part corresponding to the specific part of the previous horizontal column. The driving current of the source driver in the specific part of the current horizontal column is set to a minimum level, and the set value of the driving current is output to the source driver.

Images