TW202340938A - 用於處理排序受限制存取操作之技術 - Google Patents

用於處理排序受限制存取操作之技術 Download PDF

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Publication number
TW202340938A
TW202340938A TW112112848A TW112112848A TW202340938A TW 202340938 A TW202340938 A TW 202340938A TW 112112848 A TW112112848 A TW 112112848A TW 112112848 A TW112112848 A TW 112112848A TW 202340938 A TW202340938 A TW 202340938A
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TW
Taiwan
Prior art keywords
access
instruction
data values
operations
ordering
Prior art date
Application number
TW112112848A
Other languages
English (en)
Chinese (zh)
Inventor
西蒙約翰 克拉斯克
雅各 艾彭
Original Assignee
英商Ａｒｍ股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 英商Ａｒｍ股份有限公司 filed Critical 英商Ａｒｍ股份有限公司
Publication of TW202340938A publication Critical patent/TW202340938A/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
TW112112848A 2022-04-07 2023-04-06 用於處理排序受限制存取操作之技術 TW202340938A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2205110.6A GB2617551B (en) 2022-04-07 2022-04-07 Technique for handling ordering constrained access operations
GB2205110.6 2022-04-07

Publications (1)

Publication Number Publication Date
TW202340938A true TW202340938A (zh) 2023-10-16

Family

ID=81653133

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112112848A TW202340938A (zh) 2022-04-07 2023-04-06 用於處理排序受限制存取操作之技術

Country Status (9)

Country Link
US (1) US20250190217A1 (enExample)
EP (1) EP4505292B1 (enExample)
JP (1) JP2025511310A (enExample)
KR (1) KR20240167917A (enExample)
CN (1) CN118974699A (enExample)
GB (1) GB2617551B (enExample)
IL (1) IL315456A (enExample)
TW (1) TW202340938A (enExample)
WO (1) WO2023194702A1 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2701463A (en) * 2024-10-15 2026-04-29 Arm Ltd Masked load/store instruction for gpu

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5201039A (en) * 1987-09-30 1993-04-06 Mitsubishi Denki Kabushiki Kaisha Multiple address-space data processor with addressable register and context switching
US5887183A (en) * 1995-01-04 1999-03-23 International Business Machines Corporation Method and system in a data processing system for loading and storing vectors in a plurality of modes
US6704833B2 (en) * 2002-01-04 2004-03-09 Hewlett-Packard Development Company, L.P. Atomic transfer of a block of data
GB2549239A (en) * 2014-11-13 2017-10-18 Advanced Risc Mach Ltd Context sensitive barriers in data processing
US10379855B2 (en) * 2016-09-30 2019-08-13 Intel Corporation Processors, methods, systems, and instructions to load multiple data elements to destination storage locations other than packed data registers
US20190065199A1 (en) * 2017-08-31 2019-02-28 MIPS Tech, LLC Saving and restoring non-contiguous blocks of preserved registers

Also Published As

Publication number Publication date
US20250190217A1 (en) 2025-06-12
WO2023194702A1 (en) 2023-10-12
CN118974699A (zh) 2024-11-15
KR20240167917A (ko) 2024-11-28
GB2617551A (en) 2023-10-18
EP4505292B1 (en) 2026-04-29
GB2617551B (en) 2024-08-28
JP2025511310A (ja) 2025-04-15
IL315456A (en) 2024-11-01
EP4505292A1 (en) 2025-02-12
GB202205110D0 (en) 2022-05-25

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