TW202327237A - Dual-path active damper for a resonant network - Google Patents
Dual-path active damper for a resonant network Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/34—Snubber circuits
- H02M1/342—Active non-dissipative snubbers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/34—Snubber circuits
- H02M1/344—Active dissipative snubbers
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
Abstract
Description
本發明係有關於共振電路之阻尼,並且更特別的是,係有關於在消減漣波振盪波形之同時減少電力損失之雙路徑主動阻尼器。This invention relates to damping of resonant circuits, and more particularly to dual path active dampers that reduce power loss while damping ripple oscillation waveforms.
電力轉換電子器件含有可突然改變狀態之電路,導致電壓波形快速變化。這在運用基於MOSFET、SiC及GaN半導體之高速切換元件的現代電力轉換器中尤為普遍。高變化率電壓可激發電路元件互連中固有之共振電路,導致波形出現漣波振盪。這些漣波振盪波形可導致電路組件出現過電壓應力、過度電磁干擾(EMI)以及對電力轉換器運作至關重要之測量損毀。Power conversion electronics contain circuits that can change state abruptly, resulting in rapid changes in voltage waveforms. This is especially prevalent in modern power converters utilizing high-speed switching elements based on MOSFET, SiC and GaN semiconductors. High rate-of-change voltages can excite resonant circuits inherent in the interconnections of circuit elements, causing ripple oscillations in waveforms. These ripple oscillation waveforms can cause overvoltage stress to circuit components, excessive electromagnetic interference (EMI), and damage to measurements critical to the operation of power converters.
圖1A及1B展示一共振電路 100(例如:與寄生電容Cr串聯連接的並聯連接之寄生電感Lr及寄生電阻Rr)由帶有任意阻尼之一快速上升電壓波形(例如:強制函數Vs)驅動。當強制函數Vs 102從低轉變至高時,節點電壓Vr 104具有一產生的共振響應,其中Vr之峰值振幅係Vs之兩倍,並且具有下式之一共振頻率: (1) 1A and 1B show a resonant circuit 100 (eg, parallel-connected parasitic inductance Lr and parasitic resistance Rr connected in series with parasitic capacitance Cr) driven by a rapidly rising voltage waveform (eg, forcing function Vs) with arbitrary damping. When forcing function Vs 102 transitions from low to high, node voltage Vr 104 has a resulting resonant response where Vr has a peak amplitude twice that of Vs and has a resonant frequency of one of the following: (1)
一直流對直流切換式電力轉換器(SPC)具有一能量儲存區段、諸如一脈寬調變器(PWM)之一切換控制電路、一初級開關、以及一整流器。能量儲存區段回應於直流輸入電壓之選擇性施加以產生一電流及經調節直流輸出電壓。切換控制電路、初級開關及整流器對能量儲存區段控制直流輸入電壓之施加,用以設定經調節直流輸出電壓之值。「降壓」、「升壓」及「降壓/升壓」係基本SPC拓樸結構,可將其隔離以提供「返馳」及「順向」拓樸結構。這些可以是單端或雙端以及單或雙磁芯。A DC-DC switched power converter (SPC) has an energy storage section, a switching control circuit such as a pulse width modulator (PWM), a primary switch, and a rectifier. The energy storage section generates a current and a regulated DC output voltage in response to the selective application of the DC input voltage. The switching control circuit, primary switch and rectifier control the application of the DC input voltage to the energy storage section for setting the value of the regulated DC output voltage. "Buck", "Boost" and "Buck/Boost" are the basic SPC topologies which can be isolated to provide "Flyback" and "Forward" topologies. These can be single-ended or double-ended and single or double core.
如圖2A至2C所示,一降壓轉換器
200包括一直流電壓源
202、包括電感器L1及電容器C1之一能量儲存區段
204 、包括開關S1 及S2 之一切換電路
206以及控制該等開關之一切換控制電路(圖未示)。開關S1及S2反向切換以從直流電壓源在節點
209處產生一方波強制函數。方波係藉由元件L1及C1濾波以產生一直流輸出電壓Vout。轉換函數係有關於S1之工作週期(D)乘以來源電壓Vg,用以得出:
(2)
As shown in FIGS. 2A to 2C, a
在一實際實作態樣中,切換電路之迴路面積係非零,並且養成一寄生電感Lr。另外,寄生電容Cr由於電路元件之布局以及開關S1與S2之輸出電容(Coss)而存在。當S2斷開且S1立即閉接時,跨越Lr出現處於Vg之一電壓階躍
207,在節點
209處導致漣波振盪之一節點電壓Vr
208。一設計良好之轉換器中之漣波振盪頻率遠高於電力轉換器之操作頻率,並且等級可以是30-50MHz。
In an actual implementation, the loop area of the switching circuit is non-zero and develops a parasitic inductance Lr. In addition, a parasitic capacitance Cr exists due to the layout of the circuit elements and the output capacitance (Coss) of the switches S1 and S2. When S2 opens and S1 immediately closes, a voltage step 207 at Vg occurs across Lr, causing a node voltage Vr 208 of ripple oscillation at
節點電壓Vr漣波振盪至所施加直流輸入電壓Vg之兩倍。因此,開關S1及S1必須具有一電壓額定值(Vrated)才能可靠地耐受這種所施加之電壓應力。半導體開關一般而言,隨著更高之電壓額定值具有更高之電阻性損耗,因此希望將帶有盡可能低電壓額定值之開關用於該施加以實現最低之損耗及成本。另外,漣波振盪波形將產生非所欲高頻EMI。電力轉換器中之漣波振盪亦可中斷受控制操作。舉例而言,如果要透過一感測構件(圖未示)控制電感器電流L1,除非進行漣波振盪波形之減緩,否則在S1導通(D狀態)期間,感測將受漣波振盪負面影響。The node voltage Vr ripples to twice the applied DC input voltage Vg. Therefore, the switches S1 and S1 must have a voltage rating (Vrated) in order to reliably withstand the applied voltage stress. Semiconductor switches generally have higher resistive losses with higher voltage ratings, so it is desirable to use switches with as low a voltage rating as possible for the application to achieve the lowest losses and costs. In addition, the ripple oscillator waveform will generate unwanted high frequency EMI. Ripple oscillations in power converters can also disrupt controlled operation. For example, if the inductor current L1 is to be controlled through a sensing component (not shown), the sensing will be negatively affected by the ripple oscillation during S1 conduction (D state) unless the ripple oscillation waveform is mitigated. .
可引進一緩衝元件以減緩一共振電路。緩衝元件以將共振元件中儲存之能量轉換成熱之一方式來插入一損耗元件。如圖3所示,圖2所示類型之一降壓轉換器
300係設置有由通常稱為一「RC緩衝器」之電阻器Rsnub及電容器Csnub所構成之一簡易緩衝元件
302。Csnub交流耦接電阻器Rsnub,與共振電壓節點並聯,以防止直流損耗。實際上,Csnub將遠大於Cr (大致為2至10倍),且Rsnub通常係設定為等於共振電路之特性阻抗:
(3)
A snubber element can be introduced to dampen a resonant circuit. The buffer element inserts a loss element in such a way that the energy stored in the resonant element is converted into heat. As shown in FIG. 3, a
RC緩衝器之操作迫使電容器Csnub在各切換循環充電及放電,從而此該電路中緩衝電阻器之一階電力損失單純如下式: (4) The operation of the RC snubber forces the capacitor Csnub to charge and discharge at each switching cycle, so that the first order power loss of the snubber resistor in this circuit is simply: (4)
儘管有效緩衝共振電路中節點
306處節點電壓Vr
304之漣波振盪,簡易RC緩衝器仍提供有限之設計修改選項,並且可導致顯著損耗,因為損耗方程式係基於所施加電壓Vg之平方。
Although effectively snubbing the ripple oscillations of the node voltage Vr 304 at
主動緩衝器技巧可藉由引進一主動開關來抵消簡易RC緩衝之一些限制,該主動開關之時序使得RC緩衝器係採用一受控制方式應用於共振電路。如圖4A至4C所示,類似於圖2之一降壓轉換器
400係設置有一主動緩衝器
402。主動緩衝器
402包括採用與RC緩衝器
406串聯之方式插入之一主動開關S3
404(例如串聯連接之Rsnub與Csnub)以形成一主動箝位功能。開關S3係在S1閉接之後立即閉接,在節點
410處產生節點電壓Vr
408,並且S3係在S1斷開之前之某時間斷開。該切換型態防止Csnub完全放電,且從而緩衝器中之能量降低至緩衝電容器之差量電壓(例如:Vr – Vg)。由於損耗係有關於電壓之平方,主動緩衝器中之損耗可顯著降低,與簡易RC緩衝器形成對照。
The active snubber technique can overcome some of the limitations of simple RC snubbers by introducing an active switch whose timing is such that the RC snubber is applied to the resonant circuit in a controlled manner. As shown in FIGS. 4A to 4C , a
以下係本發明之一彙總,以便提供對本發明一些態樣之一基本理解。此彙總用意不在於識別本發明之關鍵或重要元件或描繪本發明之範疇。其唯一目的是用來以一簡化形式介紹本發明之一些概念,作為稍後所介紹更詳細說明及定義申請專利範圍之一序言。The following is a summary of the present invention in order to provide a basic understanding of some aspects of the present invention. This summary is not intended to identify key or critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later and to define the claims.
本發明提供一種雙路徑主動阻尼器,其使電力損失減少,同時消減共振電路中之漣波振盪波形。一條路徑將一節點電壓之峰值箝位在低於一受保護裝置之一額定電壓處,同時允許該節點電壓自然漣波振盪及衰減。另一路徑在峰值受到箝位之後等待某週期,直到閉接主動開關以經過一RC緩衝器汲取一重設電流,用以主動減緩節點電壓之漣波振盪。設定主動開關之延遲及導通時間以使電力損失減少或甚至達到最小,以供在一指定週期內消減漣波振盪波形。The present invention provides a dual-path active damper, which reduces power loss and at the same time reduces the ripple oscillation waveform in the resonant circuit. A path clamps the peak value of a node voltage below the rated voltage of a protected device while allowing the node voltage to naturally ripple and decay. Another path waits a certain period after the peak is clamped until the active switch is closed to draw a reset current through an RC snubber to actively slow down the ripple oscillation of the node voltage. Set the delay and on-time of the active switching to reduce or even minimize the power loss for reducing the ripple oscillation waveform within a specified period.
在一實施例中,一雙路徑主動阻尼器包括耦接至節點之一公用緩衝電容器Csnub、包括Csnub、一二極體及一箝位電壓之一箝位路徑以及包括串聯連接之Csnub及一緩衝電阻器Rsnub與一主動開關的一阻尼路徑。在施加至共振網路的一強制函數之各正狀態變化處,一節點電壓Vr從一穩態值Vss增加直到超過Vr+Vclamp為止,於此時點,箝位路徑中之二極體傳導Iclamp以將節點電壓Vr之峰值電壓箝位於Vss + Vclamp (<Vrated)。 在起於各正狀態變化之一延遲之後,主動開關閉接,使得阻尼路徑經過一RC緩衝器傳導一重設電流Ireset以減緩節點電壓Vr之漣波振盪。主動開關之延遲及閉接發生在節點電壓之峰值之箝位之後,並且於至少RC緩衝器之一最小重設週期維持閉接。In one embodiment, a dual-path active damper includes a common snubber capacitor Csnub coupled to a node, a clamping path including Csnub, a diode, and a clamping voltage, and a series connection of Csnub and a snubber Resistor Rsnub and a damped path of an active switch. At each positive state change of a forcing function applied to the resonant network, a node voltage Vr increases from a steady state value Vss until it exceeds Vr+Vclamp, at which point the diode in the clamp path conducts Iclamp with Clamp the peak voltage of the node voltage Vr at Vss + Vclamp (<Vrated). After a delay from each positive state change, the active switch is closed so that the damping path conducts a reset current Ireset through an RC snubber to slow down the ripple oscillation of the node voltage Vr. The delay and closure of the active switch occurs after the clamping of the peak value of the node voltage and remains closed for at least a minimum reset period of the RC snubber.
在不同實施例中,主動開關在閉接之前斷開或維持閉接以重疊強制函數之下一個負狀態變化。In various embodiments, the active switch opens or remains closed before closing to overlap a negative state change under the forcing function.
在不同實施例中,主動開關之「導通時間」(閉接週期)可屬於固定或可變。如果可變,則導通時間可對強制函數中之變化作出回應。In different embodiments, the "on time" (off period) of the active switch can be fixed or variable. If variable, the on-time can respond to changes in the forcing function.
在一實施例中,阻尼路徑更包括一二極體。阻尼路徑僅在二極體出現負偏移時經過串聯連接之RC緩衝器與二極體傳導重設電流。In one embodiment, the damping path further includes a diode. The damping path conducts reset current through the series connected RC snubber and diode only when the diode is negatively offset.
在一實施例中,一切換式電力供應器(SPC)供應強制函數並定義共振網路。受保護裝置通常係位在SPC中之一開關。In one embodiment, a switched power supply (SPC) supplies the forcing function and defines the resonant network. The protected device is usually located in one of the switches in the SPC.
在一實施例中,一系統包括多個不同共振網路或節點,必須在此處減緩一波形以保護不同裝置。In one embodiment, a system includes multiple different resonant networks or nodes where a waveform must be slowed to protect different devices.
連同附圖,從以下對較佳實施例之詳細說明,本發明之這些及其他特徵及優點對所屬技術領域中具有通常知識者將顯而易見,其中:These and other features and advantages of the present invention will become apparent to those of ordinary skill in the art from the following detailed description of preferred embodiments, taken together with the accompanying drawings, in which:
儘管主動緩衝器相較於被動RC緩衝器在損耗方面提供改善,其仍無法在提供峰值電壓箝位能力之同時使損耗最佳化。特別的是,期望具有一主動阻尼功能,只要峰值電壓受箝位至一特定位準便允許節點電壓Vr於一設定間隔漣波振盪,用以在消減節點電壓Vr之前使轉換器之效能最佳化。然而,鑑於主動緩衝器之開關控制及拓撲結構,緩衝器中之損耗與Vr之電壓偏移的對照關係無法獨立受控制。開關S3可斷開或閉接。因此,緩衝器組態中之損耗必須以控制Vr之峰值電壓為代價。Although active snubbers provide improvements in losses over passive RC snubbers, they still cannot optimize losses while providing peak voltage clamping capability. In particular, it is desirable to have an active damping function that allows the node voltage Vr to ripple at a set interval as long as the peak voltage is clamped to a specific level to optimize the performance of the converter before damping the node voltage Vr change. However, due to the switching control and topology of the active snubber, the loss in the snubber versus the voltage offset of Vr cannot be independently controlled. Switch S3 can be opened or closed. Therefore, losses in the snubber configuration must come at the expense of controlling the peak voltage of Vr.
如圖5所示,使主動緩衝器中之主動開關S3在閉接S1之後立即閉接會產生快速減緩之節點電壓Vr 500。如果主動開關S3延遲閉接,則允許節點電壓Vr 502漣波振盪,使損耗達到最小。然而,節點電壓Vr之峰值攀移至所施加直流輸入電壓之兩倍。一主動緩衝器有需要隨著共振電路之峰值電壓之獨立控制提供受控制消減作用。 As shown in FIG. 5 , closing active switch S3 in the active snubber immediately after closing S1 results in a rapidly slowing node voltage Vr 500 . If the active switch S3 is delayed in closing, the node voltage Vr 502 is allowed to ripple and oscillate, minimizing losses. However, the peak value of the node voltage Vr climbs to twice the applied DC input voltage. An active snubber is required to provide controlled damping along with independent control of the peak voltage of the resonant circuit.
根據本發明,一種雙路徑主動阻尼器使電力損失減少,同時消減共振電路中之漣波振盪波形。一條路徑將一節點電壓之峰值箝位在低於一受保護裝置之一額定電壓處,同時允許該節點電壓自然漣波振盪及衰減。另一路徑在峰值受到箝位之後等待某延遲,直到閉接主動開關以經過一RC緩衝器汲取一重設電流,用以主動減緩節點電壓之漣波振盪。將不同電壓用於箝位及消減會在緩衝器電力損失方面允許一顯著降低。設定主動開關之延遲及導通時間以使電力損失減少或甚至達到最小,以供在一指定週期內消減漣波振盪波形。According to the present invention, a dual-path active damper reduces power loss while attenuating ripple oscillation waveforms in a resonant circuit. A path clamps the peak value of a node voltage below the rated voltage of a protected device while allowing the node voltage to naturally ripple and decay. The other path waits for some delay after the peak is clamped until closing the active switch to sink a reset current through an RC snubber to actively slow down the ripple oscillation of the node voltage. Using different voltages for clamping and clipping allows a significant reduction in snubber power losses. Set the delay and on-time of the active switching to reduce or even minimize the power loss for reducing the ripple oscillation waveform within a specified period.
如圖6A及6B所示,一阻尼共振電路
600包括一強制函數Vs
602之一來源、一共振電路
604以及耦接至共振電路
604之一節點
608的一雙路徑主動阻尼器
606。來源
602可以是突然改變狀態導致電壓波形快速變化之任何來源。可使用任何一種SPC拓撲結構。共振電路
604可以是一分立電路或該來源內之一電路及節點,例如任何類型之SPC。可有波形漣波振盪且必須予以減緩之多個節點。一種選項是要策略性地使雙路徑主動阻尼器
606減緩一節點,並且藉此減緩其他下游節點。替代地,多個雙路徑主動阻尼器
606可耦接至不同節點及共振電路。
As shown in FIGS. 6A and 6B , a damped
在大部分共振電路中,僅強制函數之一正狀態變化(例如從低電壓至高電壓)才產生必須減緩之一漣波振盪波形。通常,一負狀態變化係將節點切換至一負軌條,諸如使其受箝位於0伏特之接地電位或0伏特。In most resonant circuits, only forcing a positive state change of the function (such as from low voltage to high voltage) produces a ripple oscillation waveform that must be slowed down. Typically, a negative state change switches the node to a negative rail, such as ground or zero volts clamping it to zero volts.
雙路徑主動阻尼器
606包括耦接至節點
608之一公用緩衝電容器Csnub
610、一箝位路徑
612及一阻尼路徑
614,這兩者都包括公用緩衝電容器Csnub
610。箝位路徑
612包括串聯之Csnub
610、一緩衝器二極體Dsnub
616及一箝位電壓Vclamp
618。Csnub約略係寄生電容之10倍,但經調整大小以維持峰值電壓並使電力消散達到最小。Vclamp可以是一特定所選電壓、或設計中之一方便電壓。舉例而言,Vclamp可以是電力轉換器之輸出電壓或一內部或外部偏置軌條。阻尼路徑
614包括形成一RC緩衝器的串聯之Csnub
610與Rsnub
620、以及一主動開關S1
622。Rsnub係適當地設定為等於共振網路之特性阻抗,使得RC緩衝器之時間常數可能是共振網路之週期之5至10倍,並且漣波振盪係於1至2個循環內完全消減。任選地,阻尼路徑
614可包括一二極體,藉此僅節點電壓Vr相對於穩態值之負偏移才發生消減。消減需要更長時間,但損耗會減少。
Dual-path
在強制函數Vs之各正狀態變化處,節點電壓Vr
624從一穩態值Vss (例如:Vs之切換式直流值)增加,直到其超過Vr + Vclamp為止,於此時點,二極體
616順偏,並且傳導一箝位電流Iclamp將節點電壓Vr之峰值電壓
625箝位於Vss + Vclamp。取決於Vr在漣波振盪時之自然減緩性質,峰值可能僅受箝位一次或多次,直到其衰減至小於Vss + Vclamp為止,於此時點,箝位路徑自行阻斷。對於受保護裝置,Vss + Vclamp < Vrated。降低Vclamp會允許更低電壓額定值之使用,且裝置從而損耗更小。Vclamp之選擇係保護裝置與使損耗達到最小之間的一取捨。
At each positive state change of the forcing function Vs, the node voltage Vr 624 increases from a steady state value Vss (e.g., the switched DC value of Vs) until it exceeds Vr + Vclamp, at which point the
在起於各正狀態變化之一時間延遲
626之後,主動開關S1
622閉接以傳導一重設電流Ireset使節點電壓Vr
624之漣波振盪減緩。時間延遲係至少通過峰值
625或共振電路之大約¼循環。舉例而言,時間延遲可以是共振電路之二至四個循環。延遲可屬於「固定」或「可變」,基於強制函數之變化使損耗達到最小。強制函數之變化舉例而言,可由一負載之變化驅動。主動開關S1之延遲及「導通時間」(閉接週期)
628係設定為使受限於節點電壓Vr從各正狀態變化在一指定週期
630內達到穩態值Vss之電力損耗減小,且較佳為達到最小。一般而言,延遲在消減之前盡可能長以使損耗達到最小。導通時間至少係RC緩衝器之一最小重設週期。通常,指定週期結束,並且主動開關S1在強制函數之下一個負狀態變化之前斷開。然而,在某些狀況中,導通時間會延長,並且重疊下一個負狀態變化,致使Csnub放電。這可發生在輸入電壓異常高時,以便將Csnub完全或部分放電,從而降低受保護裝置上之有效峰值節點電壓,因為Cnsub各循環都必須充電。這將使損耗增加,但異常狀況通常罕見且短暫,因此其可以是保護裝置直到輸入電壓回到其正常值為止之一良好取捨。
After a time delay 626 from each positive state change, the
如圖7A及7B所示,降壓轉換器
700係設置有一雙路徑主動阻尼器
702。降壓轉換器
700包括供應電壓Vg之一直流電壓源
704、包括電感器L1及電容器C1之一能量儲存區段
706、包括開關S1及S2之一切換電路
708以及控制該等開關之一切換控制電路(圖未示)。開關S1及S2反向切換以從直流電壓源在節點
710處產生一方波強制函數。方波係藉由元件L1及C1濾波以產生一直流輸出電壓Vout。降壓轉換器之一寄生電感Lr及一寄生電容Cr定義一共振網路
712。當S2斷開並且S1立即閉接時,產生一電壓階躍,該電壓階躍在節點
710處產生一節點電壓Vr
714。如果保持不受控制,則節點電壓Vr將漣波振盪至所施加直流輸入電壓Vg之兩倍。因此,開關S2將需要一額定電壓Vrated > 2*Vg,這一般而言非所欲。
As shown in FIGS. 7A and 7B , the
反而,雙路徑主動阻尼器
702將Vr之峰值箝位至Vg + Vout (其中在這項實施例中,Vclamp係Vout),限制Vr之峰值偏移,以及允許Vr漣波振盪並自然衰減強制函數之約3個循環。主動開關S3受延遲以實現最低損耗消減。因此,雙路徑主動阻尼器允許獨立控制消減及峰值電壓控制,使損耗達到最小並保護裝置(在這種狀況中為開關S2)。
Instead, the dual-path
如圖7B所示,節點電壓Vr 714受箝位於一指定峰值,允許漣波振盪,然後在一指定週期內減緩至穩態值Vss = Vg。對於圖3A至3B中所示類型之一被動RC緩衝器,一節點電壓Vr 720增加至一更高峰值,然後快速減緩至穩態值。對於圖4A至4C所示類型之一主動Rc緩衝器,一節點電壓Vr 722係快速減緩至穩態值。主動開關S3在開關S1之正狀態變化 726之後立即閉接 724。節點電壓Vr 714之箝位峰值實際上遠高於被動或主動緩衝器擇一之峰值,這進一步降低雙路徑主動緩衝器中之損耗。主動開關S3在起於正狀態變化 726之指定延遲 730之後閉接 728。雙路徑主動緩衝器允許節點電壓Vr上升至一更高值,並且漣波振盪(同時箝位峰值電壓 < Vrated)一段時間。雙路徑主動緩衝器用之差量V小於已知主動緩衝器用之差量V。結果是,減緩Vr所需之總電力損失遠低於被動或主動RC緩衝器擇一。對於一給定狀況,相對電力損失強烈取決於電路拓樸結構、共振網路、負載及強制函數。也就是說,可能預期雙路徑主動緩衝器之電力損失為主動緩衝器之電力損失的四分之一至三分之一。 As shown in FIG. 7B , the node voltage Vr 714 is clamped at a specified peak value, allowing the ripple to oscillate and then slow down to a steady state value of Vss = Vg for a specified period. For a passive RC snubber of the type shown in Figures 3A-3B, a node voltage Vr 720 increases to a higher peak value and then slows down rapidly to a steady state value. For an active Rc snubber of the type shown in Figures 4A to 4C, a node voltage Vr 722 is quickly ramped down to a steady state value. Active switch S3 closes 724 immediately after the positive state change 726 of switch S1. The clamped peak of node voltage Vr 714 is actually much higher than the peak of either the passive or active buffer, which further reduces losses in the dual path active buffer. Active switch S3 closes 728 after a specified delay 730 from positive state change 726 . The dual-path active buffer allows the node voltage Vr to rise to a higher value and ripple (while clamping the peak voltage < Vrated) for a period of time. The delta V used by the dual-path active buffer is smaller than the delta V used by the known active buffer. As a result, the total power loss required to damp Vr is much lower than either passive or active RC snubbers. For a given situation, the relative power loss depends strongly on the circuit topology, resonant network, load and forcing function. That is, one-fourth to one-third the power loss of a dual-path active buffer may be expected to be that of an active buffer.
為了實例目的,讓我們走查強制函數之一循環及雙路徑主動緩衝器之響應。假設電路處於一負狀態(S1斷開、S2閉接、S3斷開),並且已達到穩態狀態,其中節點電壓Vr處於0伏特接地電位。電壓VCsnub係處於Vg。Csnub、Rsnub與Dsnub之結合處之電壓係–Vg。For example purposes, let's walk through one of the force functions' loops and the response of the dual-path active buffer. Assume that the circuit is in a negative state (S1 open, S2 closed, S3 open) and has reached a steady-state state where the node voltage Vr is at 0 volts to ground. Voltage VCsnub is at Vg. The voltage at the junction of Csnub, Rsnub and Dsnub is -Vg.
斷開S2、閉接S1以在強制函數中產生一正狀態變化。Lr及Cr之共振電路開始共振,並且Vr於0 V處開始,然後朝向2*Vg共振,當二極體Dsnub順偏時促動箝位路徑。Vr之第一峰值(假設其 > Vg + Vout)受箝位。取決於強制函數、Vclamp及節點電壓Vr之自然減緩,附加峰值可以或可不受箝位。Open S2, close S1 to produce a positive state change in the forcing function. The resonant circuit of Lr and Cr starts to resonate and Vr starts at 0 V and then resonates towards 2*Vg, actuating the clamping path when the diode Dsnub is forward biased. The first peak of Vr (assuming it > Vg + Vout) is clamped. Depending on the forcing function, Vclamp and the natural slowdown of the node voltage Vr, the additional peak may or may not be clamped.
在一延遲之後,閉接S3促動阻尼路徑經過Csnub及Rsnub汲取重設電流以將節點電壓Vr減緩至等於Vg。阻尼路徑汲取藉由箝位路徑放在Csnub上之所有附加電荷,並且使其消散在Rsnub中。VRsnub係Vr (現為Vg)與VCsnub之間的差異,其在穩態時為零。彼「差量」對於已知主動緩衝器小於一對應差量,並且代表電力損失。在穩定階段,Vr = Vg、VCsnub = Vg、VRsnub = 0以及重設電流為零,並且S3斷開。After a delay, closing S3 actuates the damping path to sink reset current through Csnub and Rsnub to slow node voltage Vr to equal Vg. The damping path picks up any additional charge placed on Csnub by the clamping path and dissipates it in Rsnub. VRsnub is the difference between Vr (now Vg) and VCsnub, which is zero at steady state. That "difference" is less than a corresponding delta for known active snubbers and represents power loss. In the stable phase, Vr = Vg, VCsnub = Vg, VRsnub = 0 and the reset current is zero, and S3 is open.
於強制函數之下一個負狀態變化,閉接S2及斷開S1 (S3維持斷開)將Vr驅動至0電壓之接地電位。VCsnub在+Vg處維持充電。於下一個正狀態變化,重複該過程。A negative state change under the forcing function, closing S2 and opening S1 (S3 remains open) drives Vr to ground potential of zero voltage. VCsnub maintains charge at +Vg. On the next positive state change, the process is repeated.
現請參照圖8A及8B,一開關控制器
800之一實施例包括接收一正狀態變化命令
803之一延遲
802、一計時器
804以及一開關驅動器
806,其產生一命令
806以驅動雙路徑主動緩衝器中之主動開關。基於強制函數(例如:SPC)之一正狀態變化,正狀態變化命令
803對於開關控制器係主動輸入。該命令可以是驅動強制函數之一時脈信號或節點電壓Vr之升緣的一函數。
Referring now to Figures 8A and 8B, an embodiment of a
T1等於命令信號之時間。T1 is equal to the time of the command signal.
T_delay係偏離命令信號之時間,並且係延遲調整之一函數。T_delay is the time to deviate from the command signal and is a function of the delay adjustment.
延遲調整控制延遲量,可以是轉換器之操作點(即輸入電壓、輸出電壓、輸出功率)之一函數。The delay adjustment controls the amount of delay, which may be a function of the converter's operating point (ie, input voltage, output voltage, output power).
T_timer係主動開關受命導通之時間,並且係計時器調整之一函數。T_timer is the time during which the active switch is commanded to conduct and is a function of the timer adjustment.
計時器調整控制主動開關之導通時間,並且可以是轉換器之操作點(即輸入電壓、輸出電壓、輸出功率)之一函數。The timer adjustment controls the on-time of the active switch and may be a function of the converter's operating point (ie, input voltage, output voltage, output power).
基於轉換器之操作點(即輸入電壓、輸出電壓、輸出功率),T_timer可小於T1或大於T1。Based on the operating point of the converter (ie input voltage, output voltage, output power), T_timer can be smaller than T1 or larger than T1.
無論是固定或可變,T_delay及T_timer係設定為使電力損失降低或最小化至減緩。Whether fixed or variable, T_delay and T_timer are set to reduce or minimize power loss to slow down.
雙路徑主動阻尼器可在重設或箝位路徑中實施有主動開關,並且實施有諸如MOSFET或GaN FET等具有本質反並聯傳導元件之非理想開關。如圖9所示,在一阻尼降壓轉換器 900中,雙路徑主動阻尼器之主動開關S3係實施有一N通道MOSFET或GaN開關 902,其位在箝位及阻尼路徑兩者中,並且利用N通道MOSFET之反並聯本質內接二極體、或GaN FET之逆向通道傳導模式在S3斷開時提供箝位路徑連接能力。阻尼路徑需要一阻絕二極體D2 904以防止箝位電流在箝位間隔期間流經Rsnub。二極體D2將消減限制為節點電壓Vr之負偏移。如圖10所示,在一阻尼降壓轉換器 1000中,主動開關S3係實施有僅置放在阻尼路徑中之一P通道MOSFET 1002。反並聯內接二極體致使P通道裝置D2 1004之極性防止箝位電流於箝位間隔期間在Rsnub中流動。D2係箝位路徑妥善運作所需,並且亦將消減限制為節點電壓Vr低於Vg之負偏移。這使減緩Vr所需之導通時間量增加,但使損耗減少。 Dual-path active dampers can be implemented with active switches in the reset or clamp paths, and with non-ideal switches such as MOSFETs or GaN FETs with intrinsically anti-parallel conducting elements. As shown in FIG. 9, in a damped buck converter 900 , the active switch S3 of the dual-path active damper is implemented with an N-channel MOSFET or GaN switch 902 in both the clamping and damping paths, and utilizes The anti-parallel intrinsic diode of the N-channel MOSFET, or the reverse-channel conduction mode of the GaN FET provides clamping path connection capability when S3 is open. The damping path requires a blocking diode D2 904 to prevent clamping current from flowing through Rsnub during the clamping interval. Diode D2 limits the droop to negative excursions of node voltage Vr. As shown in FIG. 10, in a damped buck converter 1000 , the active switch S3 is implemented with only one P-channel MOSFET 1002 placed in the damped path. The anti-parallel internal diodes cause the polarity of the P-channel device D2 1004 to prevent clamping current from flowing in Rsnub during the clamping interval. D2 is required for proper operation of the clamp path and also limits the clipping to negative excursions of node voltage Vr below Vg. This increases the amount of on-time required to slow Vr, but reduces losses.
在兩實施例中,可選擇一MOSFET或一GaN開關,其具有當作Rsnub之一導通狀態電阻(Rds_on)。因此,將Rsnub併入主動開關裡。更一般而言,Rsnub可以是一離散電阻性元件或主動開關之一導通電阻。In both embodiments, a MOSFET or a GaN switch can be chosen, which has an on-state resistance (Rds_on) as Rsnub. Therefore, Rsnub is incorporated into the active switch. More generally, Rsnub can be a discrete resistive element or an on-resistance of an active switch.
雙路徑主動阻尼器係舉一實例在一降壓轉換器上例示,並且為了比較,係在已知之被動及主動緩衝器中例示。可將其應用於箝位及消減任何共振網路。Dual-path active dampers are illustrated as an example on a buck converter and, for comparison, on known passive and active snubbers. It can be used to clamp and cancel any resonant network.
如圖11A所示,返馳轉換器
1100在初級開關S1頂部之節點處
1106、及輸出整流器D1頂部之節點
1108處,如圖10中所實施,係設置有一對雙路徑主動阻尼器
1102及
1104。替代地,可僅在初級上或僅在次級上提供消減。返馳轉換器
1100包括一直流電壓源
1110、一變換器T1、初級開關S1、整流器D1及輸出電容器C1。一初級共振網路包括變換器T1之漏電感Lk及開關S1之輸出電容(Coss)。一次級共振網路包括漏電感Lk (透過變換器T1反射)及整流器寄生電容CD1。
As shown in FIG. 11A,
對於初級,雙路徑主動阻尼器
1102包括一公用緩衝電容器Csnub2、包括Csnub2、一二極體Dsnub2及示為Vg之一箝位電壓(可以是任何其他電壓,但Vg具便利性,並且其使能量再循環回到Vg)之一箝位路徑、以及包括Csnub2、Rsnub2、主動開關S4 (P通道MOSFET)及一二極體D3之一阻尼路徑,需要二極體D3用於妥善操作帶有P通道MOSFET之箝位路徑,並且使消減限制於節點
1106處Vr2之負偏移。一返馳之初級上之箝位對於憑藉一被動整流器(或模擬一二極體之一主動整流器)運作之返馳轉換器尤其受關注,因為其提供一主動箝位功能,允許變換器之磁化電流停留在第一象限。這對於藉由將轉換器保持在一強制不連續模式來降低電力具有效益,先前技術之主動箝位不可能具有此效益。
For the primary, the dual-path
對於次級,雙路徑主動阻尼器
1104包括一公用緩衝電容器Csnub1、包括Csnub1、一二極體Dsnub1及示為Vout之一箝位電壓(可以是任何其他電壓,但再次地,其具便利性)之一箝位路徑、以及包括Csnub1、Rsnub1、主動開關S3 (P通道MOSFET)及一二極體D2之一阻尼路徑,需要二極體D2用於妥善操作帶有P通道MOSFET之箝位路徑,並且使消減限制於節點
1108處Vr1之負偏移。
For the secondary, the dual-path
在返馳轉換器中,當開關S1閉接時,變換器T1作用就像一耦接之電感器,用以跨越整流器D1施加電壓Vg + Vout (假設跨越T1之匝數比為一)。這將能量儲存在變換器T1之氣隙及磁化電感中。Vout係由輸出電容器C1上之電壓提供支援。當開關S1斷開時,整流器二極體D1傳導電流,轉移儲存在變換器T1中之能量並遞送電流至輸出電容器C1,用來支援Vout,並用來還原之前半循環中用以支援Vout之電荷。In a flyback converter, when switch S1 is closed, converter T1 acts like a coupled inductor to apply the voltage Vg + Vout across rectifier D1 (assuming a turns ratio across T1 of one). This stores energy in the air gap and magnetizing inductance of transformer T1. Vout is supported by the voltage on the output capacitor C1. When switch S1 is open, rectifier diode D1 conducts current, transfers the energy stored in converter T1 and delivers current to output capacitor C1 to support Vout and restore the charge that was used to support Vout in the previous half cycle .
如圖11B所示,當S1切換為處於高位準(導通或閉接)為變換器T1充電時,跨越變換器T1施加電壓Vg,致使Lk與CD1之次級共振電路共振且節點電壓Vr1漣波振盪。雙路徑主動阻尼器
1104箝位Vr1,並且在一延遲之後,將S3切換為處於高位準以減緩Vr1。當S1切換為處於低位準(阻斷或斷開)以使T1放電時,Lk及Coss之初級共振網路共振且節點電壓Vr2漣波振盪。雙路徑主動阻尼器
1102箝位Vr2,並且在一延遲之後,將S4切換為處於高位準以減緩Vr2。
As shown in Figure 11B, when S1 is switched to be at a high level (on or off) to charge converter T1, a voltage Vg is applied across converter T1, causing the secondary resonant circuit of Lk and CD1 to resonate and the node voltage Vr1 to ripple oscillation. The dual path
儘管已經展示及說明本發明之數項說明性實施例,所屬技術領域中具有通常知識者仍將想到眾多變例及替代實施例。得以思忖並且施作此類變例及替代實施例而不脫離如隨附申請專利範圍所定義之本發明之精神及範疇。While a few illustrative embodiments of the invention have been shown and described, numerous modifications and alternative embodiments will occur to those skilled in the art. Such modifications and alternative embodiments can be contemplated and made without departing from the spirit and scope of the invention as defined by the appended claims.
100,604:共振電路 102,602,Vs:強制函數 104,208,304,408,500,502,624,714,720,722:節點電壓 200,300,400,700:降壓轉換器 202,704:直流電壓源 204,706:能量儲存區段 206,708:切換電路 207:電壓階躍 209,306,410,608,710,1106,1108:節點 302:簡易緩衝元件 402:主動緩衝器 404,622,S1,S2,S3,S4:開關,主動開關 406:RC緩衝器 600:阻尼共振電路 606,702,1102,1104:雙路徑主動阻尼器 610,Csnub,Csnub1,Csnub2:公用緩衝電容器 612:箝位路徑 614:阻尼路徑 616,Dsnub:緩衝器二極體 618,Vclamp:嵌位電壓 620,Rsnub,Rsnub1,Rsnub2:電阻器,緩衝電阻器 625:峰值 626:時間延遲 628:延遲及「導通時間」(閉接週期) 630:指定週期 712:共振網路 724,728:主動開關S3閉接 726:正狀態變化 730:指定延遲 800:開關控制器 802:延遲 803:正狀態變化命令 804:計時器 806:開關驅動器 900,1000:阻尼降壓轉換器 902:N通道MOSFET或GaN開關 904:阻絕二極體 1002:P通道MOSFET 1004:P通道裝置 1100,1110:返馳轉換器 C1:電容器 Coss:輸出電容 CD1,Cr:寄生電容 D1:整流器 D2,D3,Dsnub1,Dsnub2:二極體 Iclamp:箝位電流 Ireset:重設電流 L1:電感器 Lk:漏電感 Lr:寄生電感 Rr:寄生電阻 T1:變換器 T1,T_delay,T_timer:時間 VCsnub,Vg:電壓 Vout:直流輸出電壓 Vr,Vr1,Vr2:節點電壓 100,604: resonant circuit 102,602,Vs: mandatory function 104,208,304,408,500,502,624,714,720,722: node voltage 200, 300, 400, 700: buck converter 202,704: DC voltage source 204,706: energy storage section 206,708: switching circuits 207: Voltage step 209,306,410,608,710,1106,1108: nodes 302: Simple cushioning element 402: Active Buffer 404,622,S1,S2,S3,S4: switch, active switch 406: RC buffer 600: Damping resonance circuit 606, 702, 1102, 1104: Dual Path Active Dampers 610, Csnub, Csnub1, Csnub2: Common snubber capacitors 612: clamp path 614: Damping path 616, Dsnub: snubber diode 618, Vclamp: clamping voltage 620, Rsnub, Rsnub1, Rsnub2: resistors, snubber resistors 625:Peak 626: time delay 628: Delay and "on time" (close cycle) 630: specify cycle 712: Resonant Network 724,728: Active switch S3 closed 726: Positive state change 730: specify delay 800: switch controller 802: delay 803: Positive state change command 804: timer 806: switch driver 900, 1000: Damped Buck Converter 902: N-channel MOSFET or GaN switch 904: blocking diode 1002: P channel MOSFET 1004: P channel device 1100, 1110: flyback converter C1: Capacitor Coss: output capacitance CD1, Cr: parasitic capacitance D1: rectifier D2, D3, Dsnub1, Dsnub2: Diodes Iclamp: clamping current Ireset: reset current L1: Inductor Lk: leakage inductance Lr: Parasitic inductance Rr: parasitic resistance T1: Transformer T1, T_delay, T_timer: time VCsnub, Vg: Voltage Vout: DC output voltage Vr, Vr1, Vr2: node voltage
圖1A及1B如上述,繪示一基本共振電路,其受制於隨著任意阻尼產生一快速上升電壓之一強制函數; 圖2A至2C如上述,繪示使用一降壓轉換器來提供強制函數及漣波振盪並自然減緩之節點電壓; 圖3A及3B如上述,繪示帶有一被動RC緩衝器及經減緩節點電壓之一降壓轉換器; 圖4A至4C如上述,繪示帶有一主動RC緩衝器及經減緩節點電壓之一降壓轉換器; 圖5繪示用於一主動RC緩衝器之一對切換型態,其中在一種狀況中,主動開關立即閉接以減緩節點電壓,而在另一種狀況中,主動開關受延遲以允許節點電壓在減緩之前漣波振盪以減少電力損失; 圖6A及6B繪示帶有一雙路徑主動阻尼器之一共振電路之一實施例,其立即箝位峰值節點電壓,並且允許節點電壓在促動RC緩衝器之前漣波振盪以使電力損失達到最小; 圖7A及7B繪示帶有一雙路徑主動阻尼器之一降壓轉換器之一實施例,其立即箝位峰值節點電壓,並且允許節點電壓在消減之前漣波振盪以使電力損失達到最小; 圖8A及8B係用以對主動開關之延遲及導通時間進行控制之一開關控制器的方塊圖及時序圖; 圖9及10係帶有一雙路徑主動阻尼器之降壓轉換器之實施例,其繪示主動開關之不同實作態樣;以及 圖11A及11B繪示帶有一雙路徑主動阻尼器之一返馳轉換器之一實施例,其立即箝位峰值節點電壓,並且允許節點電壓在消減之前漣波振盪以使電力損失達到最小。 Figures 1A and 1B, as above, illustrate a basic resonant circuit subject to a forcing function that produces a rapidly rising voltage with arbitrary damping; Figures 2A to 2C, as above, illustrate the use of a buck converter to provide forcing functions and ripple oscillations with naturally slowing node voltages; Figures 3A and 3B, as above, show a buck converter with a passive RC snubber and moderated node voltage; Figures 4A to 4C, as above, illustrate a buck converter with an active RC snubber and moderated node voltages; Figure 5 shows a pair of switching patterns for an active RC snubber, where in one condition the active switch is closed immediately to slow the node voltage, and in the other condition the active switch is delayed to allow the node voltage to Slow down the previous ripple oscillation to reduce power loss; Figures 6A and 6B illustrate one embodiment of a resonant circuit with a dual-path active damper that immediately clamps the peak node voltage and allows the node voltage to ripple before activating the RC snubber to minimize power loss ; 7A and 7B illustrate an embodiment of a buck converter with a dual-path active damper that immediately clamps the peak node voltage and allows the node voltage to ripple before damping to minimize power loss; 8A and 8B are block and timing diagrams of a switch controller for controlling the delay and on-time of active switches; Figures 9 and 10 are embodiments of a buck converter with a dual-path active damper showing different implementations of the active switch; and 11A and 11B illustrate an embodiment of a flyback converter with a dual-path active damper that immediately clamps the peak node voltage and allows the node voltage to ripple before damping to minimize power loss.
600:阻尼共振電路 600: Damping resonance circuit
602,Vs:強制函數 602,Vs: Mandatory function
604:共振電路 604: Resonant circuit
606:雙路徑主動阻尼器 606: Dual Path Active Damper
608:節點 608: node
610,Csnub:電容器:公用緩衝電容器 610, Csnub: capacitor: public snubber capacitor
612:箝位路徑 612: clamp path
614:阻尼路徑 614: Damping path
616,Dsnub:緩衝器二極體 616, Dsnub: snubber diode
618,Vclamp:嵌位電壓 618, Vclamp: clamping voltage
620,Rsnub:電阻器,緩衝電阻器 620, Rsnub: resistor, buffer resistor
622,S1:開關,主動開關 622, S1: switch, active switch
Cr:寄生電容 Cr: parasitic capacitance
Iclamp:箝位電流 Iclamp: clamping current
Ireset:重設電流 Ireset: reset current
Lr:寄生電感 Lr: Parasitic inductance
Rr:寄生電阻 Rr: parasitic resistance
VCsnub:電壓 VCsnub: Voltage
Vr:節點電壓 Vr: node voltage
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US17/572,607 US20230188029A1 (en) | 2021-12-15 | 2022-01-10 | Dual-path active damper for a resonant network |
US17/572,607 | 2022-01-10 |
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