TW202320534A - Detection device - Google Patents

Abstract

A detection device including a substrate, a switch element, a photoelectric element, and a scintillator is provided. The switch element is disposed on the substrate. The photoelectric element is disposed on the substrate and is coupled to the switch element. The photoelectric element includes a semiconductor, and the semiconductor includes a monocrystalline material or a polycrystalline material. The scintillator overlaps at least a portion of the photoelectric element in a top view direction of the detection device.

Description

detection device

The invention relates to a detection device.

The detection layer of the detection device generally includes amorphous silicon material; however, the amorphous silicon material has a large number of defects due to its crystal phase structure and the process of forming the process, and the defects will limit the load generated by the detection layer. The movement of the carrier, and the restricted carrier will be released when the detection device is operated subsequently, which will cause the detected image to be delayed or have the problem of image sticking.

The invention provides a detection device, which can reduce the delay or image sticking of detected images, and improve the detection performance.

According to an embodiment of the present disclosure, the detection device includes a substrate, a switch element, a photoelectric element, and a scintillator. The switch element is arranged on the substrate. The photoelectric element is disposed on the substrate and coupled to the switch element. The photoelectric element includes a semiconductor, and the semiconductor includes a single crystal material or a polycrystalline material. The scintillator, wherein the scintillator overlaps with the photoelectric element at least partially in the direction of the detection device.

In order to make the above-mentioned features and advantages of the present disclosure more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

The present disclosure can be understood by referring to the following detailed description and combined with the accompanying drawings. It should be noted that, in order to make the readers easy to understand and the drawings are concise, several drawings in the present disclosure only depict a part of the electronic device, and Certain elements in the drawings are not drawn to actual scale. In addition, the number and size of each component in the figure are only for illustration, and are not intended to limit the scope of the present disclosure.

Certain terms are used throughout this disclosure and in the appended claims to refer to particular elements. Those skilled in the art should understand that electronic device manufacturers may refer to the same component by different names. This document does not intend to distinguish between those elements that have the same function but have different names. In the following specification and patent application scope, words such as "comprising", "containing", and "having" are open-ended words, so they should be interpreted as meaning "including but not limited to...". Therefore, when the terms "comprising", "comprising" and/or "having" are used in the description of the present disclosure, it specifies the existence of corresponding features, regions, steps, operations and/or components, but does not exclude one or more The existence of a corresponding feature, region, step, operation and/or component.

The directional terms mentioned in this document, such as "upper", "lower", "front", "rear", "left", "right", etc., are only referring to the directions of the drawings. Accordingly, the directional terms used are for illustration, not for limitation of the present disclosure. In the drawings, each figure illustrates the general characteristics of methods, structures and/or materials used in particular embodiments. However, these drawings should not be interpreted as defining or limiting the scope or nature encompassed by these embodiments. For example, the relative sizes, thicknesses and positions of layers, regions and/or structures may be reduced or exaggerated for clarity.

When a corresponding element (eg, a film or region) is referred to as being "on" another element, it can be directly on the other element or there may be other elements interposed therebetween. On the other hand, when a component is referred to as being "directly on" another component, then there is no component in between. In addition, when a component is referred to as "on another component", the two have a vertical relationship in the plan view direction, and the component can be above or below the other component, and this vertical relationship depends on the orientation of the device ( orientation).

The terms "about", "equal", "equal" or "same", "substantially" or "substantially" are generally interpreted as being within 20% of a given value or range, or as being within 20% of a given value or range Within 10%, 5%, 3%, 2%, 1%, or 0.5% of a value or range.

The ordinal numbers used in the specification and claims, such as "first", "second", etc., are used to modify elements, which do not imply and represent that the (or these) elements have any previous ordinal numbers, nor The use of these ordinal numbers is only used to clearly distinguish an element with a certain designation from another element with the same designation. The same wording may not be used in the scope of the patent application and the specification. Accordingly, the first component in the specification may be the second component in the scope of the patent application.

It should be noted that in the following embodiments, without departing from the spirit of the present disclosure, features in several different embodiments may be replaced, reorganized, and mixed to complete other embodiments. As long as the features of the various embodiments do not violate the spirit of the invention or conflict, they can be mixed and matched arbitrarily.

The electrical connection or coupling described in this disclosure can refer to direct connection or indirect connection. In the case of , there are switches, diodes, capacitors, inductors, other suitable components, or a combination of the above components between the terminals of the components on the two circuits, but not limited thereto.

In this disclosure, the thickness, length and width can be measured by optical microscope, and the thickness can be measured by cross-sectional image in electron microscope, but not limited thereto. In addition, any two values or directions used for comparison may have certain errors. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the difference between the first direction and the second direction The angle between them may be between 80° and 100°; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0° and 10°.

The electronic device of the present disclosure may include a detection device, a display device, an antenna device (such as a liquid crystal antenna), a light-emitting touch device, a splicing device, a device with other suitable functions, or a combination of devices with the above functions, but not hereby limit. Electronic devices include, but are not limited to, rollable or flexible electronic devices. The electronic device may, for example, include liquid crystal (liquid crystal), light emitting diode (light emitting diode, LED), quantum dot (quantum dot, QD), fluorescence (fluorescence), phosphorescence (phosphor), other suitable materials or the above-mentioned combination. The light emitting diodes may for example comprise organic light emitting diodes (organic light emitting diodes, OLEDs), miniature light emitting diodes (micro-LEDs, mini-LEDs) or quantum dot light emitting diodes (QLEDs, QDLEDs), but not This is the limit. Electronic devices may include electronic components. Electronic components may include passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, and the like. The diodes may include light emitting diodes or photodiodes. The light emitting diode may, for example, include organic light emitting diode (organic light emitting diode, OLED), submillimeter light emitting diode (mini LED), micro light emitting diode (micro LED) or quantum dot light emitting diode (quantum dot, QD, which may be, for example, QLED, QDLED ) or other suitable materials or any permutation and combination of the above materials, but not limited thereto. It should be noted that, the electronic device can be any permutation and combination mentioned above, but not limited thereto. In addition, the shape of the electronic device can be rectangular, circular, polygonal, with curved edges, or other suitable shapes. The electronic device may have peripheral systems such as a driving system, a control system, a light source system, a shelf system, etc. to support a display device or a splicing device. It should be noted that, the electronic device can be any permutation and combination mentioned above, but not limited thereto. An electronic device may include multiple components, at least two of which may be assembled to form a composite. Hereinafter, the detection device will be used as an electronic device to illustrate the present disclosure, but the present disclosure is not limited thereto.

Exemplary embodiments of the present disclosure are illustrated below, and the same reference numerals are used in the drawings and descriptions to denote the same or similar parts.

FIG. 1 is a schematic partial cross-sectional view of a detection device according to an embodiment of the present disclosure.

Referring to FIG. 1 , the detection device 10 of this embodiment includes a substrate 100 , a switch element 200 , a photoelectric element 300 and a scintillator 400 .

The material of the substrate 100 may include hard material, soft material or a combination thereof. For example, the material of the substrate 100 may include quartz, sapphire (sapphire), polymethyl methacrylate (polymethyl methacrylate, PMMA), polycarbonate (polycarbonate, PC), polyimide (polyimide, PI), poly The present disclosure is not limited to polyethylene terephthalate (polyethylene terephthalate, PET) or other suitable materials or a combination of the above materials.

The switch element 200 is, for example, disposed on the substrate 100 . In some embodiments, the switch element 200 includes a gate G and a semiconductor layer SE, but the disclosure is not limited thereto. The gate G is, for example, disposed on the substrate 100 . The material of the gate G can include, for example, molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), hafnium (Hf), nickel (Ni), chromium (Cr), cobalt (Co), zirconium ( Zr), tungsten (W), aluminum (Al), copper (Cu), silver (Ag), other suitable metals, or alloys or combinations of the above materials, the present disclosure is not limited thereto. The semiconductor layer SE is disposed on the gate G, for example. In some embodiments, a gate insulating layer GI may be disposed between the semiconductor layer SE and the gate G. In detail, the gate insulating layer GI may cover the gate G in the top view direction n of the substrate 100 , and the semiconductor layer SE at least partially overlaps the gate G in the top view direction n of the substrate 100 . In some embodiments, the material of the semiconductor layer SE may include silicon, such as low temperature polysilicon (LTPS) or amorphous silicon (a-Si), but the disclosure is not limited thereto. For example, the material of the semiconductor layer SE may include but not limited to amorphous silicon, polysilicon, germanium, compound semiconductors (such as gallium nitride, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and/or or indium antimonide), alloy semiconductors (such as SiGe alloys, GaAsP alloys, AlInAs alloys, AlGaAs alloys, GaInAs alloys, GaInP alloys, GaInAsP alloys), or combinations of the foregoing. The material of the semiconductor layer SE may also include but not limited to metal oxides, such as indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZTO), or polycyclic aromatic compounds Organic semiconductors, or a combination of the foregoing. In one embodiment, the detection device 10 may include a plurality of switching elements 200, and different switching elements 200 may include semiconductor layers SE of the same material, or semiconductor layers SE of different materials, but the present disclosure is not limited thereto. . In some embodiments, the switching element 200 may include a source S and a drain D. The source S and the drain D are, for example, disposed on the semiconductor layer SE and separated from each other. They are in direct contact with and coupled to the semiconductor layer SE, but This disclosure is not limited thereto. In other embodiments, an insulating layer is provided between the semiconductor layer SE and the source S and the drain D, wherein the insulating layer has a through hole, and the source S and the drain D can communicate with the semiconductor layer SE through the through hole. coupling. It should be noted that although the present embodiment shows that the switch element 200 is a bottom-gate structure, such as a bottom-gate thin film transistor, the present disclosure is not limited thereto. In other embodiments, the switching element 200 can be a top-gate structure or other suitable thin film transistors known to those skilled in the art.

The photoelectric element 300 is, for example, disposed on the substrate 100 and coupled to the switching element 200 . In this embodiment, the photoelectric element 300 includes a semiconductor, wherein the semiconductor includes a single crystal material or a polycrystalline material. For example, the semiconductor material of the photoelectric element 300 may include germanium (Ge), indium phosphide (InP), gallium arsenide (GaAs), cadmium telluride (CdTe), aluminum gallium indium phosphide (AlGaInP), arsenic Indium gallium chloride (InGaAs), cadmium sulfide (CdS), monocrystalline silicon (mono-Si), polycrystalline silicon (poly-Si), or combinations thereof. In some embodiments, the photoelectric element 300 is coupled to the switching element 200 . In some embodiments, the photoelectric element 300 can be coupled to the switch element 200 through the drain D. In detail, the semiconductor of the photoelectric element 300 can receive light P and generate carriers C (such as electrons and/or holes), and the carriers C are stored in the photoelectric element 300 when the switching element 200 is not turned on. When the switch element 200 is turned on, the carriers C stored in the photoelectric element 300 can be transmitted to the processing circuit, for example, through the readout line coupled to the switch element 200 , so as to realize the function of photodetection. In some embodiments, the read line can be the data line DL described later, but the present disclosure is not limited thereto. Since the semiconductor of the photoelectric element 300 includes the above-mentioned materials, the situation of restricting the movement of the carriers C can be reduced, thereby improving the detection performance of the detection device 10 . It is worth noting that the structure of the photoelectric element 300 will be described in detail in subsequent embodiments.

The scintillator 400 is, for example, disposed on the substrate 100 . In some embodiments, the scintillators 400 are arranged corresponding to the photoelectric elements 300 . In detail, the scintillator 400 and the photoelectric element 300 overlap at least partially in the top view direction of the detection device 10 (for example, the top view direction n of the substrate 100 ). The scintillator 400 can receive electromagnetic waves L and generate light P, for example. For example, the electromagnetic wave L can be non-visible light, and the scintillator 400 can convert the received non-visible light (such as X-ray) into visible light. Therefore, in some embodiments, the detection device 10 may be an X-ray detection device, but the present disclosure is not limited thereto. Materials of the scintillator 400 may include Lu ₂ S ₃ :Ce ³⁺ , LaBr ₃ :PR ³⁺ , CsI:TI, Y ₃ Al ₅ O ₁₂ :Ce, Lu ₃ Al ₅ O ₁₂ :Ce, Bi ₄ Ge ₃ O ₁₂ . PbWO ₄ , Gd ₂ SiO ₅ :Ce or combinations thereof. In addition, although the present embodiment shows that the photoelectric element 300 is located between the scintillator 400 and the substrate 100 , the present disclosure is not limited thereto. In other embodiments, the scintillator 400 may be located between the photoelectric element 300 and the substrate 100 .

FIG. 2A is a schematic partial top view of a detection device according to an embodiment of the present disclosure, and FIG. 2B is a schematic cross-sectional view along line A-A' of FIG. 2A . It should be noted that, the embodiment in FIG. 2A and FIG. 2B can continue to use the component numbers and part of the content of the embodiment in FIG. 1 , where the same or similar numbers are used to indicate the same or similar components, and the description of the same technical content is omitted.

The detection device 10 a of this embodiment includes, for example, the aforementioned substrate 100 , switching element 200 , photoelectric element 300 and scintillator 400 . In some embodiments, the detection device 10a further includes scan lines SL, voltage lines BL and data lines DL. The material of the scan line SL, the voltage line BL and the data line DL can refer to the material of the gate G, which will not be repeated here. The scan line SL is, for example, disposed on the substrate 100 and coupled to the gate G of the switch element 200 , wherein the scan line SL can be used, for example, to provide a scan signal to the corresponding switch element 200 to turn on. In some embodiments, the scan line SL extends toward the first direction d1. The voltage line BL is, for example, disposed on the substrate 100 and coupled to the photoelectric element 300 , wherein the voltage line BL can be used to apply a voltage level to the photoelectric element 300 , for example. In some embodiments, the voltage line BL extends toward the second direction d2, wherein the first direction d1 is different from the second direction d2. In this embodiment, the first direction d1 is orthogonal to the second direction d2, but the disclosure is not limited thereto. The data line DL is, for example, disposed on the substrate 100 and coupled to the source S of the switching element 200, wherein the signal (carrier) generated by the photoelectric element 300 can be transmitted to the data line DL through the source S, and the data line DL can transfer The signals (carriers) are transmitted to processing circuitry (not shown). In some embodiments, the data line DL also extends toward the second direction d2. In this embodiment, the voltage line BL and the data line DL belong to the same layer, therefore, the voltage line BL and the switch element 200 can be disposed on the same side of the photoelectric element 300 adjacent to the substrate 100 , but the disclosure is not limited thereto. In this embodiment, the width BW of the voltage line BL is greater than the distance GD between the source S and the drain D. For example, in any cross-sectional view of the detection device 10a, such as a cross-sectional view parallel to the extending direction of the scanning line SL (ie, the first direction d1), the width BW of the voltage line BL is greater than that of the source S and the drain. The distance GD between D.

In addition, in the detection device 10a of this embodiment, the photoelectric element 300 may include a chip, which may include a bare die or a bare die packaged in a package. In detail, the photoelectric element 300 of this embodiment includes a semiconductor 300D, an electrode E1 and an electrode E2. The semiconductor 300D includes, for example, a first layer 310 , an intrinsic layer 320 and a second layer 330 , and the first layer 310 , the intrinsic layer 320 and the second layer 330 are stacked in this order along the plan view direction n of the substrate 100 . In some embodiments, the semiconductor 300D may be directly formed on the substrate 100 by an epitaxial process or disposed on the substrate 100 by transferring a wafer and bonding, and the present disclosure is not limited thereto. The electrode E1 and the electrode E2 are respectively coupled to the second layer 330 and the first layer 310 , for example. The semiconductor 300D may include the aforementioned single crystal material or polycrystalline material, which will not be repeated here. In this embodiment, the first layer 310 includes N-type GaAs semiconductor, the intrinsic layer 320 includes GaAs multiple quantum well semiconductor, and the second layer 330 includes P-type GaAs semiconductor, but this disclosure does not limit. In other embodiments, the first layer 310 includes a P-type GaAs semiconductor, the intrinsic layer 320 includes a GaAs multiple quantum well semiconductor, and the second layer 330 includes an N-type GaAs semiconductor. In some embodiments, the electrodes E1 and E2 include transparent conductive materials, which may be indium tin oxide, but the present disclosure is not limited thereto. In addition, the electrode E2 is coupled to the voltage line BL, for example. The electrode E1 is coupled to the switching element 200 through the drain D, so that the carriers generated in the intrinsic layer 320 can be transmitted to the drain D through the electrode E2, and then can be transmitted to the data line through the switching element 200 and through the source S. DL. In the detection device 10a of some embodiments, the semiconductor 300D of the photoelectric element 300 can be formed through a thin film process, and the semiconductor 300D, the electrode E1 and the electrode E2 of the photoelectric element 300 can also be formed through a thin film process.

In addition, the detecting device 10 a of this embodiment further includes an insulating layer IL1 , an insulating layer IL2 , an insulating layer IL3 , a pad PAD, an insulating layer IL4 and an insulating layer IL5 .

The insulating layer IL1 is, for example, disposed on the gate insulating layer GI. In this embodiment, the insulating layer IL1 partially covers the semiconductor layer SE. In detail, the insulating layer IL1 has a through hole IL1_OP1 and a through hole IL1_OP2 exposing part of the semiconductor layer SE, wherein the source S and the drain D are disposed on the insulating layer IL1 and respectively pass through the through hole IL1_OP1 and the through hole IL1_OP2 to communicate with the switch. The semiconductor layer SE of the device 200 is coupled, but the disclosure is not limited thereto. The material of the insulating layer IL1 may, for example, include inorganic materials (for example: silicon oxide, silicon nitride, silicon oxynitride or a stacked layer of at least two of the above materials), organic materials (for example: polyimide resin, epoxy resin or acrylic resin) or a combination of the above, but the disclosure is not limited thereto.

The insulating layer IL2 is, for example, disposed on the insulating layer IL1. In this embodiment, the insulating layer IL2 partially covers the source S and the drain D. In detail, the insulating layer IL2 has the through hole IL2_OP1 exposing part of the source S and the through hole IL2_OP2 exposing part of the drain D, but the present disclosure is not limited thereto. The material of the insulating layer IL2 can refer to the material of the insulating layer IL1 , which will not be repeated here. In some embodiments, the material of the insulating layer IL2 may be the same as that of the insulating layer IL1 , and in other embodiments, the material of the insulating layer IL2 may be different from that of the insulating layer IL1 .

The insulating layer IL3 is, for example, disposed on the insulating layer IL2. In this embodiment, the insulating layer IL3 also has the through hole IL3_OP1 exposing part of the source S and the through hole IL3_OP2 exposing part of the drain D. In detail, the through hole IL3_OP1 and the through hole IL3_OP2 of the insulating layer IL3 are set corresponding to the through hole IL2_OP1 and the through hole IL2_OP2 of the insulating layer IL2, so that the insulating layer IL3 and the insulating layer IL2 can expose part of the source S and drain D. The material of the insulating layer IL3 can be, for example, an organic material, such as: polyimide resin, epoxy resin or acrylic resin or a combination of the above, and can, for example, make the subsequent film layer formed thereon have better properties. flatness. In this embodiment, the data line DL is disposed on the insulating layer IL3 and coupled to the source S through the through hole IL2_OP1 and the through hole IL3_OP1, and the voltage line BL is also disposed on the insulating layer IL3 because it belongs to the same layer as the data line DL. .

The pads PAD are, for example, disposed on the insulating layer IL3. In this embodiment, the pads PAD, the voltage lines BL and the data lines DL belong to the same layer. The pad PAD can be used, for example, to couple the electrode E1 to the switch element 200 . In detail, the pad PAD can be coupled to the drain D through the through hole IL2_OP2 of the insulating layer IL2 and the through hole IL3_OP2 of the insulating layer IL3, and the electrode E1 is coupled to the pad PAD, and the drain D is then coupled to the switching element 200. catch.

The insulating layer IL4 is, for example, disposed on the insulating layer IL3. In this embodiment, the insulating layer IL4 partially covers the pad PAD and the voltage line BL. In detail, the insulating layer IL4 has a through hole IL4_OP1 exposing a part of the pad PAD and a through hole IL4_OP2 exposing a part of the voltage line BL, wherein the electrode E1 is coupled to the pad PAD through the through hole IL4_OP1, and the electrode E2 is connected to the pad PAD through the through hole IL4_OP1. The through hole IL4_OP2 is coupled to the voltage line BL, but the disclosure is not limited thereto. The material of the insulating layer IL4 can refer to the material of the insulating layer IL1 , which will not be repeated here.

The insulating layer IL5 is, for example, provided on the insulating layer IL4. In this embodiment, the insulating layer IL5 can cover the semiconductor 300D, and can be used to protect the semiconductor 300D. In addition, the scintillator 400 is provided, for example, on the insulating layer IL5. The material of the insulating layer IL5 can refer to the material of the insulating layer IL1 , which will not be repeated here.

FIG. 3A is a schematic partial top view of a detection device according to another embodiment of the present disclosure, and FIG. 3B is a schematic cross-sectional view along line B-B' of FIG. 3A . It should be noted that, the embodiment of FIG. 3A and FIG. 3B can respectively use the component numbers and part of the content of the embodiment of FIG. 2A and FIG. A description of the content.

Please refer to FIG. 3A and FIG. 3B at the same time. The main difference between the detecting device 10b of this embodiment and the aforementioned detecting device 10a is that the switching element 200 included in the detecting device 10b is a top-gate thin film transistor. In detail, the gate G is, for example, disposed on the gate insulating layer GI and located above the semiconductor layer SE. The semiconductor layer SE is, for example, partially covered by the gate insulating layer GI. That is, the gate insulating layer GI has the through hole GI_OP1 and the through hole GI_OP2 exposing part of the semiconductor layer SE, and the through hole IL1_OP1 and the through hole IL1_OP2 of the insulating layer IL1 are respectively connected with the through hole GI_OP1 and the through hole of the gate insulating layer GI. GI_OP2 is connected, so that the insulating layer IL1 and the gate insulating layer GI can expose part of the semiconductor layer SE. The source S may be coupled to the semiconductor layer SE through the vias GI_OP1 and IL1_OP1 , and the drain D may be coupled to the semiconductor layer SE through the vias GI_OP2 and IL1_OP2 . In detail, the semiconductor layer SE has, for example, a channel region CH and a source region SR and a drain region DR located on opposite sides of the channel region CH, wherein the channel region CH and the gate G overlap in the plan view direction n of the substrate 100, and the source The pole S and the drain D are respectively coupled to the source region SR and the drain region DR of the semiconductor layer SE through via holes penetrating through the gate insulating layer GI and the insulating layer IL1. In this embodiment, the width BW of the voltage line BL is greater than the width GW of the gate G. For example, in any cross-sectional view of the detection device 10b, such as a cross-sectional view parallel to the extending direction of the scanning line SL (ie, the first direction d1), the width BW of the voltage line BL is greater than the width GW of the gate G .

FIG. 4A is a schematic partial top view of a detection device according to another embodiment of the present disclosure, and FIG. 4B is a schematic cross-sectional view along line C-C' of FIG. 4A . It should be noted that, the embodiments of FIG. 4A and FIG. 4B can respectively use the component numbers and part of the content of the embodiment of FIG. 2A and FIG. A description of the content.

Please refer to FIG. 4A and FIG. 4B at the same time. The main difference between the detecting device 10 c of this embodiment and the aforementioned detecting device 10 a is that the voltage line BL and the switch element 200 are disposed on opposite sides of the photoelectric element 300 .

In detail, for example, the voltage line BL is disposed on the insulating layer IL5, and the insulating layer IL5 has a through hole IL5_OP to expose part of the second layer 330 of the photoelectric element 300, wherein the voltage line BL can pass through the through hole IL5_OP disposed in the through hole IL5_OP. The electrode E2 is coupled to the second layer 330 of the photoelectric element 300 . In addition, the first layer 310 of the photoelectric element 300 is coupled to the electrode E1, and the electrode E1 is coupled to the pad PAD through the through hole IL4_OP of the insulating layer IL4, and the pad PAD is coupled to the drain D, and the drain D is then coupled to the switch. The element 200 is coupled such that the switching element 200 is coupled to the first layer 310 of the optoelectronic element 300 .

In addition, in this embodiment, no insulating layer IL1 is provided between the source S and the drain D and the semiconductor layer SE. Therefore, the source S and the drain D are in direct contact with and coupled to the semiconductor layer SE, but the disclosure is not limited thereto.

In this embodiment, the detection device 10c further includes a voltage line BL. The voltage line BL is provided on the switching element 200, for example. In some embodiments, in the top view direction of the detection device 10c (eg, the top view direction n of the substrate 100 ), the voltage line BL at least partially overlaps with the switch element 200 . In detail, the voltage line BL can be disposed on the insulating layer IL5 , and at least partially overlaps with the semiconductor layer SE in the switching element 200 in the plan view direction n of the substrate 100 . Since the material of the voltage line BL may include a conductor with low light transmittance, when the voltage line BL at least partially overlaps with the semiconductor layer SE in the switching element 200 in the plan view direction n of the substrate 100, the performance of the semiconductor layer SE may be improved. The electrical properties of the switch element 200 are affected by the external ambient light. In this embodiment, the width BW of the voltage line BL is greater than the distance GD between the source S and the drain D. For example, in any cross-sectional view of the detection device 10c, such as a cross-sectional view parallel to the extending direction of the scanning line SL (ie, the first direction d1), the width BW of the voltage line BL is greater than that of the source S and the drain. The distance GD between D.

In this embodiment, the detecting device 10c further includes an insulating layer IL6. The insulating layer IL6 is, for example, disposed on the insulating layer IL5 and covers the voltage line BL, wherein the scintillator 400 is disposed on the insulating layer IL6. The material of the insulating layer IL6 can refer to the material of the insulating layer IL1 , which will not be repeated here.

According to the above, the photoelectric element in the detection device of the embodiment of the disclosure includes single crystal material or polycrystalline material, so the situation of capturing the carriers generated in the photoelectric element can be reduced, so that the detection device of the embodiment of the disclosure Performance can be improved.

Although the present disclosure has been disclosed above with embodiments, it is not intended to limit the present disclosure. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present disclosure. The scope of protection of this disclosure should be defined by the scope of the appended patent application.

10, 10a, 10b, 10c: detection device 100: Substrate 200: switch element 300: photoelectric components 300D: Semiconductor 310: first floor 320: Intrinsic layer 330: second floor 400: scintillator A-A', B-B', C-C': broken line BL: voltage line BW, GW: Width C: carrier CH: channel area D: drain d1: the first direction d2: second direction DL: data line DR: drain region E1, E2: electrodes G: Gate GD: spacing GI: gate insulation layer GI_OP1, GI_OP2, IL1_OP1, IL1_OP2, IL2_OP1, IL2_OP2, IL3_OP1, IL3_OP2, IL4_OP, IL4_OP1, IL4_OP2, IL5_OP: through holes IL1, IL2, IL3, IL4, IL5, IL6: insulating layer L: Electromagnetic waves n: look down direction P: Photon PAD: Pad S: source SE: semiconductor layer SL: scan line SR: source region

FIG. 1 is a schematic partial cross-sectional view of a detection device according to an embodiment of the present disclosure. FIG. 2A is a schematic partial top view of a detection device according to an embodiment of the present disclosure. FIG. 2B is a schematic cross-sectional view cut along the line A-A' of FIG. 2A . FIG. 3A is a schematic partial top view of a detection device according to another embodiment of the present disclosure. Fig. 3B is a schematic cross-sectional view cut along the section line B-B' in Fig. 3A. FIG. 4A is a schematic partial top view of a detection device according to another embodiment of the present disclosure. FIG. 4B is a schematic cross-sectional view cut along line C-C' in FIG. 4A .

100: Substrate

200: switch element

300: photoelectric components

300D: Semiconductor

310: first floor

320: Intrinsic layer

330: second floor

400: scintillator

A-A': section line

BL: voltage line

BW: Width

D: drain

d1: the first direction

d2: second direction

DL: data line

E1, E2: electrodes

G: Gate

GD: spacing

GI: gate insulation layer

IL1, IL2, IL3, IL4, IL5: insulating layer

IL1_OP1, IL1_OP2, IL2_OP1, IL2_OP2, IL3_OP1, IL3_OP2, IL4_OP1, IL4_OP2: Through holes

n: look down direction

PAD: Pad

S: source

SE: semiconductor layer

Claims (10)

A detection device comprising: Substrate; a switching element arranged on the substrate; an optoelectronic element, disposed on the substrate and coupled to the switching element, the optoelectronic element includes a semiconductor, and the semiconductor includes a single crystal material or a polycrystalline material; and A scintillator, in a plan view direction of the detection device, the scintillator at least partially overlaps with the photoelectric element. The detection device as claimed in claim 1, wherein the semiconductor of the photoelectric element comprises gallium arsenide. The detection device as claimed in claim 1, wherein the photoelectric element comprises a wafer. The detecting device according to claim 1, further comprising a voltage line disposed on the substrate and coupled to the photoelectric element. The detection device according to claim 4, wherein the voltage line and the switching element are located on the same side of the photoelectric element. The detection device according to claim 4, wherein the photoelectric element includes a first electrode and a second electrode, the first electrode is coupled to the switching element, and the second electrode is coupled to the voltage line. The detection device according to claim 4, wherein in the plan view direction of the detection device, the voltage line at least partially overlaps with the switch element. The detection device as claimed in claim 4, wherein the voltage line and the switching element are respectively located on opposite sides of the photoelectric element. The detection device according to claim 4, further comprising a source and a drain, the source and the drain are respectively coupled to the switching element, wherein the switching element is a bottom gate structure, and In the cross-sectional view of the detection device, the width of the voltage line is greater than the distance between the source and the drain. The detection device according to claim 1 further includes a scan line and a data line, wherein the scan line and the data line are respectively coupled to the switch element.

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