CN117693250A - Electronic device and method for manufacturing electronic device - Google Patents

Abstract

The disclosure provides an electronic device, which comprises a substrate, a first electrode layer, a photodiode, an insulating layer, a second electrode layer and a first transparent conductive layer. The first electrode layer is disposed on the substrate. The photodiode is arranged on the first electrode layer and is electrically connected with the first electrode layer. The insulating layer is disposed on the photodiode. The second electrode layer is arranged on the insulating layer and is electrically connected with the photodiode. The first transparent conductive layer is arranged on the insulating layer and contacts the second electrode layer. The disclosure further provides a method for manufacturing the electronic device. The manufacturing cost of the electronic device can be reduced.

Description

Electronic device and method for manufacturing electronic device

Technical Field

The present invention relates to an electronic device and a method for manufacturing the same.

Background

The layers used in the electronic device are formed using the corresponding masks and the corresponding processes, and the manufacturing cost of the electronic device increases as the number of layers to be formed increases.

Disclosure of Invention

The present disclosure provides an electronic device and a method for manufacturing the same, which can reduce the manufacturing cost of the electronic device.

According to an embodiment of the disclosure, an electronic device includes a substrate, a first electrode layer, a photodiode, an insulating layer, a second electrode layer, and a first transparent conductive layer. The first electrode layer is disposed on the substrate. The photodiode is arranged on the first electrode layer and is electrically connected with the first electrode layer. The insulating layer is disposed on the photodiode. The second electrode layer is arranged on the insulating layer and is electrically connected with the photodiode. The first transparent conductive layer is arranged on the insulating layer and contacts the second electrode layer.

According to an embodiment of the disclosure, a method for manufacturing an electronic device includes the following steps. A substrate is provided. A first electrode layer is formed on a substrate. A photodiode is formed on the first electrode layer. A second electrode material layer is formed on the photodiode. A first transparent conductive material layer is formed on the photodiode, wherein the first transparent conductive material layer is in contact with the second electrode material layer. The second electrode material layer and the first transparent conductive material layer are patterned using a mask.

In order to make the above features and advantages of the present disclosure more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

FIG. 1 is a schematic partial cross-sectional view of an electronic device according to an embodiment of the disclosure;

FIG. 2 is a schematic top view of a portion of an electrode layer and a transparent conductive layer in an electronic device according to an embodiment of the disclosure;

FIG. 3 is a schematic partial cross-sectional view of an electronic device according to another embodiment of the disclosure;

FIG. 4 is a schematic top view of a portion of an electrode layer and a transparent conductive layer in an electronic device according to another embodiment of the disclosure;

FIG. 5 is a flow chart of a partial manufacturing process of an electronic device according to an embodiment of the disclosure;

FIG. 6 is a flow chart of a partial manufacturing process of an electrode layer and a transparent conductive layer according to an embodiment of the disclosure;

FIG. 7 is a schematic cross-sectional view illustrating a partial process flow of fabricating an electrode layer and a transparent conductive layer according to an embodiment of the disclosure;

FIG. 8 is a flow chart of a partial manufacturing process of an electronic device according to another embodiment of the disclosure;

FIG. 9 is a flow chart of a partial manufacturing process of an electrode layer and a transparent conductive layer according to another embodiment of the disclosure;

fig. 10 is a schematic cross-sectional view illustrating a partial manufacturing process of an electrode layer and a transparent conductive layer according to another embodiment of the disclosure.

Detailed Description

The present disclosure may be understood by referring to the following detailed description in conjunction with the accompanying drawings, it being noted that, in order to facilitate the understanding of the reader and the brevity of the drawings, the various drawings in the present disclosure depict only a portion of the electronic device and the specific elements of the drawings are not necessarily drawn to scale. Furthermore, the number and size of the elements in the drawings are illustrative only and are not intended to limit the scope of the present disclosure.

Certain terms are used throughout the description and following claims to refer to particular components. Those skilled in the art will appreciate that electronic device manufacturers may refer to a component by different names. It is not intended to distinguish between components that differ in function but not name. In the following description and claims, the terms "include," have, "and the like are open-ended terms, and thus should be interpreted to mean" include, but not limited to …. Thus, the terms "comprises," "comprising," "includes," and/or "including," when used in the description of the present disclosure, specify the presence of stated features, regions, steps, operations, and/or components, but do not preclude the presence or addition of one or more other features, regions, steps, operations, and/or components.

Directional terms mentioned herein, such as: "upper", "lower", "front", "rear", "left", "right", etc., are merely directions with reference to the drawings. Thus, the directional terminology is used for purposes of illustration and is not intended to be limiting of the disclosure. In the drawings, the various figures illustrate the general features of methods, structures and/or materials used in certain embodiments. However, these drawings should not be construed as defining or limiting the scope or nature of what is covered by these embodiments. For example, the relative dimensions, thicknesses, and locations of various layers, regions, and/or structures may be reduced or exaggerated for clarity.

When a corresponding element (e.g., a film layer or region) is referred to as being "on" another element, it can be directly on the other element or other elements can be present therebetween. On the other hand, when an element is referred to as being "directly on" another element, there are no elements therebetween. In addition, when a member is referred to as being "on" another member, the two members have an up-and-down relationship in a top view, and the member may be above or below the other member, and the up-and-down relationship depends on the orientation of the device.

The terms "about," "equal," or "identical," "substantially," or "substantially" are generally interpreted as being within 20% of a given value or range, or as being within 10%, 5%, 3%, 2%, 1%, or 0.5% of the given value or range.

The use of ordinal numbers such as "first," "second," and the like in the description and in the claims is used for modifying an element, and is not by itself intended to exclude the presence of any preceding ordinal number(s) or order(s) of a certain element or another element or order(s) of manufacture, and the use of such ordinal numbers merely serves to distinguish one element having a certain name from another element having a same name. The same words may not be used in the claims and the specification, whereby a first element in the description may be a second element in the claims.

It is to be understood that the following exemplary embodiments may be substituted, rearranged, and mixed for the features of several different embodiments without departing from the spirit of the disclosure to accomplish other embodiments. Features of the embodiments can be mixed and matched at will without departing from the spirit of the invention or conflicting.

The electrical connection or coupling described in this disclosure may refer to a direct connection or an indirect connection, in which case the terminals of the elements of the two circuits are directly connected or connected with each other by a conductor segment, and in which case the terminals of the elements of the two circuits have switches, diodes, capacitors, inductors, other suitable elements, or a combination thereof, but not limited thereto.

In the present disclosure, the thickness, length and width may be measured by an optical microscope, and the thickness may be measured by a cross-sectional image in an electron microscope, but is not limited thereto. In addition, any two values or directions used for comparison may have some error. If the first value is equal to the second value, it implies that there may be about a 10% error between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction may be between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may be between 0 degrees and 10 degrees.

The electronic device of the present disclosure may include, but is not limited to, detection, display, antenna (e.g., liquid crystal antenna), light-emitting touch, stitching, other suitable functions, or a combination thereof. The electronic device includes a flexible electronic device, but is not limited to the above. The electronic device may include, for example, liquid crystals (LEDs), light emitting diodes (light emitting diode), quantum Dots (QDs), fluorescence (fluorescence), phosphorescence (phosphorescence), other suitable materials, or combinations thereof. The light emitting diode may include, for example, but not limited to, an organic light emitting diode (organic light emitting diode, OLED), a micro-light emitting diode (micro-LED, mini-LED), or a quantum dot light emitting diode (QLED, QDLED).

The following examples of exemplary embodiments of the present disclosure, the same reference numerals are used in the figures and description to designate the same or similar parts.

Fig. 1 is a schematic partial cross-sectional view of an electronic device according to an embodiment of the disclosure, and fig. 2 is a schematic partial top view of an electrode layer and a transparent conductive layer in the electronic device according to an embodiment of the disclosure.

Referring to fig. 1, an electronic device 10a of the present embodiment includes a substrate SB, an electrode layer E, a photodiode PD, an electrode layer BL, an insulating layer IL2, and a transparent conductive layer TC2.

The substrate SB may be, for example, a rigid substrate or a flexible substrate, wherein the material of the substrate SB may be, for example, glass, plastic, or a combination thereof. For example, the material of the substrate SB may include quartz, sapphire (sapphire), polymethyl methacrylate (polymethyl methacrylate, PMMA), polycarbonate (PC), polyimide (PI), polyethylene terephthalate (polyethylene terephthalate, PET), or other suitable materials or combinations thereof, which are not limited to this disclosure. In addition, the light transmittance of the substrate SB is not limited in this embodiment, i.e., the substrate SB may be, for example, a light-transmitting substrate, a semi-transmitting substrate, or a light-impermeable substrate.

In some embodiments, the electronic device 10a further includes an active element TFT. The active element TFT is disposed on the substrate SB, for example. In some embodiments, the active device TFT includes a gate G, a source S, a drain D, and a semiconductor layer SE, but the disclosure is not limited thereto. The material of the gate electrode G may include, for example, molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), hafnium (Hf), nickel (Ni), chromium (Cr), cobalt (Co), zirconium (Zr), tungsten (W), aluminum (Al), copper (Cu), silver (Ag), other suitable metals, or alloys or combinations thereof, which are not limited in this disclosure. The semiconductor layer SE is provided on the gate electrode G, for example, and a gate insulating layer GI is provided between the semiconductor layer SE and the gate electrode G. In detail, the gate insulating layer GI may cover the gate electrode G, for example, in the normal direction n of the substrate SB, and the semiconductor layer SE may overlap the gate electrode G, for example, at least partially, in the normal direction n of the substrate SB. In some embodiments, the material of the semiconductor layer SE may include low temperature polysilicon (low temperature polysilicon, LTPS), low temperature poly oxide (low temperature polysilicon oxide, LTPO) or amorphous silicon (amorphous silicon, a-Si), but the disclosure is not limited thereto. For example, the material of the semiconductor layer SE may include, but is not limited to, amorphous silicon, polycrystalline silicon, germanium, compound semiconductors (e.g., gallium nitride, silicon carbide, gallium arsenide, gallium phosphide, indium arsenide, and/or indium antimonide), alloy semiconductors (e.g., siGe alloys, gaAsP alloys, alInAs alloys, alGaAs alloys, gaInAs alloys, gaInP alloys, gaInAsP alloys), or combinations of the foregoing. The material of the semiconductor layer SE may also include, but is not limited to, metal oxides such as Indium Gallium Zinc Oxide (IGZO), indium Zinc Oxide (IZO), indium gallium zinc oxide (IGZTO), or organic semiconductors including polycyclic aromatic compounds, or combinations of the foregoing. The source S and the drain D are disposed on the semiconductor layer SE and separated from each other, and are in direct contact with the semiconductor layer SE and electrically connected thereto, but the disclosure is not limited thereto. It should be noted that, although the active device TFT is shown as a bottom gate thin film transistor in this embodiment, the disclosure is not limited thereto. In other embodiments, the active element TFT may be a top gate thin film transistor as known to those skilled in the art.

The electrode layer E is provided on the substrate SB, for example. In some embodiments, the electrode layer E is electrically connected to the active device TFT. In detail, the electronic device 10a of the present embodiment further includes an insulating layer IL1, wherein the electrode layer E is disposed on the insulating layer IL 1. In the present embodiment, the insulating layer IL1 is disposed on the gate insulating layer GI and partially covers the drain electrode D of the active device TFT, i.e., the insulating layer IL1 has an opening il1_op exposing a portion of the drain electrode D. Therefore, the electrode layer E can be electrically connected to the drain D of the active device TFT through the opening il1_op, but the disclosure is not limited thereto. In other embodiments, the electrode layer E is the same layer as the source S and the drain D of the active device TFT, so that the electrode layer E can be in direct contact with the drain D to achieve the function of electrical connection. The material of the electrode layer E may for example comprise a metal, an alloy, a metal oxide or a combination thereof. In some embodiments, the material of the electrode layer E may be indium tin oxide, but the disclosure is not limited thereto. In other embodiments, the material of the electrode layer E may be selected to have a high reflectivity, which may reflect ambient light incident to the electronic device 10a from the outside, thereby increasing the amount of photons received by the photodiode PD. The material of the insulating layer IL1 may include, for example, an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack layer of at least two of the above materials), an organic material (e.g., polyimide resin, epoxy resin, or acryl resin), or a combination thereof, but the disclosure is not limited thereto.

The photodiode PD is disposed on the electrode layer E and electrically connected to the electrode layer E. In some embodiments, the photodiode PD may be electrically connected to the drain D of the active element TFT through the electrode layer E, so that the active element TFT may be used to drive the photodiode PD. In detail, the photodiode PD may convert received photons into carriers (e.g., electrons and/or holes), which are stored in the photodiode PD when the active element TFT is not turned on. After the active element TFT is turned on, the carrier stored in the photodiode PD can be read, for example, via a read line (not shown) electrically connected to the active element TFT, thereby realizing the function of light detection. In some embodiments, the material of the photodiode PD comprises a semiconductor. For example, the photodiode PD material may include silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium gallium arsenide (InGaAs), cadmium telluride (CdTe), cadmium sulfide (CdS) or combinations thereof or other suitable semiconductors, but the disclosure is not limited thereto. In some embodiments, the photodiode PD may include a stack structure of an intrinsic semiconductor layer and an extrinsic semiconductor layer. For example, the photodiode PD may include a p-type semiconductor layer, an intrinsic semiconductor layer, and an n-type semiconductor layer sequentially stacked in this order in a normal direction n of the substrate SB, but the disclosure is not limited thereto. In other embodiments, the photodiode PD may include an n-type semiconductor layer, an intrinsic semiconductor layer, and a p-type semiconductor layer sequentially stacked in this order in the normal direction n of the substrate SB.

The insulating layer IL2 is provided on the photodiode PD, for example. In the present embodiment, the insulating layer IL2 is disposed on the insulating layer IL1 and the photodiode PD, and partially covers the photodiode PD. That is, the insulating layer IL2 has an opening il2_op exposing a portion of the photodiode PD. The material of the insulating layer IL2 may include, for example, an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack layer of at least two of the above materials), an organic material (e.g., polyimide resin, epoxy resin, or acryl resin), or a combination thereof, but the disclosure is not limited thereto.

In some embodiments, the electronic device 10a further includes a transparent conductive layer TC1. The transparent conductive layer TC1 is disposed between the insulating layer IL2 and the photodiode PD, for example, and is electrically connected to the photodiode PD. The material of the transparent conductive layer TC1 may be, for example, a metal oxide. In some embodiments, the material of the transparent conductive layer TC1 is indium tin oxide, so that ambient light incident to the electronic device 10a from the outside can penetrate the transparent conductive layer TC1, thereby increasing the amount of photons received by the photodiode PD.

The electrode layer BL is disposed on the insulating layer IL2 and electrically connected to the photodiode PD. That is, the electrode layer BL is electrically connected to the photodiode PD through the opening il2_op provided in the insulating layer IL 2. In the present embodiment, the electrode layer BL is used as a voltage line, which can be used to apply a voltage to the photodiode PD to separate hole electron pairs in the photodiode PD to generate carriers.

In some embodiments, the electronic device 10a may further include scan lines (not shown) and read lines (not shown). The scan lines are disposed on the substrate SB and electrically connected to the gates G of the active device TFTs, wherein the scan lines can be used to provide scan signals to the corresponding active device TFTs to turn on. The read line is disposed on the substrate SB and electrically connected to the source S of the active device TFT, for example, wherein a signal (carrier) generated by the photodiode PD can be transmitted to the read line via the source S, and the read line can transmit the signal (carrier) to an external circuit (not shown).

In this embodiment, the electrode layer E, the photodiode PD and the transparent conductive layer TC1 can form the photo element PE, wherein the electrode layer E and the transparent conductive layer TC1 can be used as the cathode and the anode of the photo element PE, respectively, and the photodiode PD is used for generating carriers. The electrode layer E is electrically connected to the drain D of the active device TFT, for example, so that the carriers generated by the photodiode PD can be transferred to the drain D of the active device TFT through the electrode layer E and then can be transferred to the read line through the source S of the active device TFT. The transparent conductive layer TC1 is electrically connected to the electrode layer BL, for example, so that the photodiode PD can receive a voltage applied from the electrode layer BL to generate carriers.

The transparent conductive layer TC2 is disposed on the insulating layer IL2, for example, and contacts the electrode layer BL. In the present embodiment, the transparent conductive layer TC2 is disposed on the electrode layer BL, that is, the electrode layer BL is located between the transparent conductive layer TC2 and the photocell PE in the normal direction n of the substrate SB. The electrode layer BL has a side edge BLE, for example, and the transparent conductive layer TC2 also has a side edge TC2E, for example. In this embodiment, the side edge TC2E of the transparent conductive layer TC2 is retracted from the side edge BLE of the electrode layer BL. In some embodiments, a side edge TC2E of the transparent conductive layer TC2 is aligned with a side edge BLE of the electrode layer BL. For example, the distance W and the distance W1 between the side edge BLE of the electrode layer BL and the side edge TC2E of the transparent conductive layer TC2 in the first direction d1 may be, for example, 0-0.5 μm (0 μm. Ltoreq.W. Ltoreq.0.5 μm). The first direction d1 is, for example, an extending direction of the substrate SB, and is perpendicular to a normal direction n of the substrate SB, but the disclosure is not limited thereto. In detail, in the present embodiment, the distance W from the top end point ble_t of the side edge BLE to the bottom end point tc2e_b of the side edge TC2E in the first direction d1 and the distance W1 from the bottom end point tc2e_b1 of the side edge TC2E to the top end point ble_t1 of the side edge BLE in the first direction d1 may be, for example, 0-0.5 μm (0 μm+.w+.0.5 μm), as shown in fig. 2. In some embodiments, the distance W may be different from the distance W1, but the disclosure is not limited thereto. It should be noted that, although the electrode layer BL is shown between the transparent conductive layer TC2 and the optoelectronic element PE in the normal direction n of the substrate SB in the present embodiment, the disclosure is not limited thereto. In other embodiments, the electrode layer BL may be located on a surface of the transparent conductive layer TC2 remote from the photocell PE, i.e., the transparent conductive layer TC2 may be located between the electrode layer BL and the photocell PE in the normal direction n of the substrate SB.

In some embodiments, the electronic device 10a further includes an insulating layer IL3, an insulating layer IL4, or further includes an insulating layer IL5.

The insulating layer IL3 is disposed on the insulating layer IL2, for example, and has an opening il3_op exposing a portion of the photodiode PD. In detail, the opening il3_op of the insulating layer IL3 of the present embodiment communicates with the opening il2_op of the insulating layer IL2 to form an opening OP to expose a portion of the photodiode PD together. In addition, the insulating layer IL3 has a planarized surface, for example, away from the insulating layer IL2, thereby facilitating the subsequent formation of a film. The material of the insulating layer IL3 may include an organic material (for example, polyimide resin, epoxy resin or acryl resin), but the disclosure is not limited thereto.

The insulating layer IL4 is disposed on the insulating layer IL3, and covers the photodiode PD, the electrode layer BL, and the transparent conductive layer TC2, for example, for protection purposes. The material of the insulating layer IL4 may include, for example, an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, or a stack layer of at least two of the above materials), an organic material (e.g., polyimide-based resin, epoxy-based resin, or acryl-based resin), or a combination thereof, but the disclosure is not limited thereto.

The insulating layer IL5 is provided on the insulating layer IL4, for example. In some embodiments, the insulating layer IL5 may be disposed corresponding to the photocell PE. In detail, the insulating layer IL5 at least partially overlaps the photovoltaic element PE in the normal direction n of the substrate 100. The insulating layer IL5 has, for example, a planarized surface facing away from the insulating layer IL4, thereby facilitating the subsequent formation of a film. The material of the insulating layer IL5 may include an organic material (for example, polyimide resin, epoxy resin or acryl resin), but the disclosure is not limited thereto. It should be noted that, in other embodiments, the insulating layer IL5 may not be provided.

In some embodiments, the substrate SB includes an active area AA and a peripheral area PA, wherein the peripheral area PA is disposed on at least one side of the active area AA. For example, the peripheral area PA may surround the active area AA, but the disclosure is not limited thereto. In the present embodiment, the photodiode PD and the active device TFT are disposed in the active area AA, for example, wherein the metal layer M1 disposed in the peripheral area PA and the gate G of the active device TFT may be formed in the same process and belong to the same layer, which is not limited in this disclosure.

In the present embodiment, the contact PAD is disposed in the peripheral area PA. Since the insulating layer IL3 is not disposed in the peripheral area PA, the contact PAD is disposed on the insulating layer IL 2. The contact PAD may be coupled to an external circuit such as a gate driving circuit (not shown), a source driving circuit (not shown), a flexible circuit board (not shown), or a chip (not shown), for example, to control an active device TFT disposed in the active area AA, but the disclosure is not limited thereto. The material of the contact PAD may include, for example, a metal, an alloy, a metal oxide, or a combination thereof, which is not limited in this disclosure. In this embodiment, the contact PAD includes a stacked structure of a transparent conductive layer PADT (including a metal oxide, such as indium tin oxide) and a metal layer PADM (including a metal), wherein the transparent conductive layer PADT is disposed on the metal layer PADM, for example, to reduce the corrosion of the metal layer PADM caused by oxidation, but the disclosure is not limited thereto. In this embodiment, the transparent conductive layer PADT and the transparent conductive layer TC2 in the contact PAD belong to the same layer, and the metal layer PADM and the electrode layer BL in the contact PAD belong to the same layer.

Fig. 3 is a schematic partial cross-sectional view of an electronic device according to another embodiment of the disclosure, and fig. 4 is a schematic partial top view of an electrode layer and a transparent conductive layer in the electronic device according to an embodiment of the disclosure. It should be noted that, the embodiments of fig. 3 and fig. 4 may respectively use the element numbers and part of the content of the embodiments of fig. 1 and fig. 2, where the same or similar numbers are used to denote the same or similar elements, and descriptions of the same technical content are omitted.

Referring to fig. 3 and fig. 4, the main differences between the electronic device 10b of the present embodiment and the aforementioned electronic device 10a are as follows: the transparent conductive layer TC2 of the electronic device 10b is disposed between the photodiode PD and the electrode layer BL.

In this embodiment, the side edge TC2E of the transparent conductive layer TC2 is retracted from the side edge BLE of the electrode layer BL. In some embodiments, a side edge TC2E of the transparent conductive layer TC2 is aligned with a side edge BLE of the electrode layer BL. For example, the distance W ' and the distance W1' between the side edge TC2E of the transparent conductive layer TC2 and the side edge BLE of the electrode layer BL in the first direction d1 may be, for example, 0-0.5 μm (0 μm+.w ' +.0.5 μm). In detail, in the present embodiment, the distance W 'from the top end point tc2e_t of the side edge TC2E to the bottom end point ble_b of the side edge BLE in the first direction d1 and the distance W1' from the bottom end point ble_b1 of the side edge BLE to the top end point tc2e_t1 of the side edge TC2E in the first direction d1 may be, for example, 0-0.5 μm (0 μm+.w+.ltoreq.0.5 μm), as shown in fig. 4. In some embodiments, the distance W 'may be different from the distance W1', but the disclosure is not limited thereto. It should be noted that, although the transparent conductive layer TC2 is located between the photodiode PD and the electrode layer BL in the normal direction n of the substrate SB in the present embodiment, the disclosure is not limited thereto. In other embodiments, the transparent conductive layer TC2 may be located on a surface of the electrode layer BL remote from the photocell PE, i.e., the electrode layer BL may be located between the transparent conductive layer TC2 and the photocell PE in the normal direction n of the substrate SB.

The electronic device 10b of the present embodiment further includes the following differences from the electronic device 10a described above.

In the present embodiment, the electrode layer E is disposed between the insulating layer IL1 and the gate insulating layer GI, and is formed in the same process as the source S and the drain D of the active device TFT and belongs to the same layer. Therefore, the electrode layer E may be in direct contact with the drain electrode D, for example, to achieve the function of electrical connection therewith. In addition, the metal layer M2 disposed in the peripheral area PA may be formed in the same process as the source S and the drain D of the active device TFT and belong to the same layer.

In addition, in the present embodiment, the contact PAD has a single-layer structure, and the material of the contact PAD is a metal oxide, but the disclosure is not limited thereto.

In addition, in the present embodiment, the electronic device 10b does not include the insulating layer IL3 and the insulating layer IL5.

Fig. 5 is a flowchart of a partial manufacturing process of an electronic device, such as the partial manufacturing process of the electronic device 10a, according to an embodiment of the disclosure. It should be noted that the flowchart shown in fig. 5 is only an example, and is not intended to limit the manufacturing steps of the electronic device 10 a. Fig. 6 is a flow chart of a partial manufacturing process of an electrode layer and a transparent conductive layer according to an embodiment of the disclosure, and fig. 7 is a schematic cross-sectional view of a partial manufacturing process of an electrode layer and a transparent conductive layer according to an embodiment of the disclosure.

In step S10, a substrate SB is provided. The substrate SB includes an active area AA and a peripheral area PA. The substrate SB may include materials according to the foregoing embodiments, and will not be described herein.

In step S20, an electrode layer E is formed on the substrate SB. The electrode layer E may be formed on the substrate SB by, for example, physical vapor deposition or metal chemical vapor deposition or other suitable processes, which is not limited in this disclosure. The electrode layer E may include materials according to the foregoing embodiments, and will not be described herein. For example, the process of forming the electrode layer E may be performed, for example, after forming the source S and the drain D of the active device TFT, and then the material of the electrode layer E may include a metal oxide or a metal. Alternatively, the electrode layer E may be formed in the same process as the source S and drain D of the active device TFT, for example, and the material of the electrode layer E may include metal.

In step S30, the photodiode PD is formed on the electrode layer E. The formation method of the photodiode PD may be, for example, chemical vapor deposition or other suitable processes, and the disclosure is not limited thereto. The photodiode PD includes materials that are described in the foregoing embodiments, and are not described in detail herein.

In step S40, an electrode material layer BL' is formed on the photodiode PD. The electrode material layer BL' may be formed on the photodiode PD by physical vapor deposition, metal chemical vapor deposition, or other suitable processes, for example, but the disclosure is not limited thereto. The electrode material layer BL 'is used to form the electrode layer BL including the embodiments described above, and thus, the materials included in the electrode material layer BL' can refer to the embodiments described above and are not described herein.

In step S50, a transparent conductive material layer TC2' is formed on the photodiode PD, wherein the transparent conductive material layer TC2' is in contact with the electrode material layer BL '. The transparent conductive material layer TC2' may be formed on the photodiode PD by physical vapor deposition, metal chemical vapor deposition, or other suitable processes, for example, but the disclosure is not limited thereto. The transparent conductive material layer TC2 'is used to form the transparent conductive layer TC2 according to the above embodiment, and therefore, the material included in the transparent conductive material layer TC2' can refer to the above embodiment and will not be described herein. In the present embodiment, the electrode material layer BL 'is formed before the transparent conductive material layer TC2' is formed, and therefore, the electrode material layer BL 'is located between the transparent conductive material layer TC2' and the photodiode PD in the normal direction n of the substrate SB, but the disclosure is not limited thereto.

In some embodiments, the method for manufacturing the electronic device 10a further includes performing step S35 after step S30 and before step S40. In step S35, after the formation of the photodiode PD, the insulating layers IL2 and IL3 are formed, wherein the insulating layers IL2 and IL3 are formed with the openings OP in communication, and the portions of the electrode material layer BL 'and the transparent conductive material layer TC2' are filled in the openings OP, as shown in fig. 1. The insulating layer IL2 and the insulating layer IL3 may be formed on the photodiode PD by, for example, chemical vapor deposition or other suitable processes, and the communicating openings OP formed in the insulating layer IL2 and the insulating layer IL3 may be formed by patterning, which is not limited in this disclosure. The insulating layer IL2 and the insulating layer IL3 may include materials according to the foregoing embodiments, which are not described herein. Based on this, after step S35 is performed, the electrode material layer BL 'formed in step S40 and the transparent conductive material layer TC2' formed in step S50 may be disposed on the insulating layer IL3 and electrically connected to the photodiode PD through the opening OP.

In step S60, the electrode material layer BL 'and the transparent conductive material layer TC2' are patterned using a mask to form the electrode layer BL and the transparent conductive layer TC2. Specifically, a photoresist pattern PR is formed by applying a photoresist on the electrode material layer BL 'and the transparent conductive material layer TC2', and then performing an exposure, a development, and the like using the same mask. Referring to fig. 6 and 7, further patterning the electrode material layer BL 'and the transparent conductive material layer TC2' using the photoresist pattern PR may include performing the following steps. In the following steps, patterning the electrode material layer BL 'and the transparent conductive material layer TC2' includes performing at least a first etching step and a second etching step, each of which causes one of the electrode material layer BL 'and the transparent conductive material layer TC2' to be patterned and the other of the electrode material layer BL 'and the transparent conductive material layer TC2' to be patterned.

In step S600, a photoresist pattern PR is formed on the transparent conductive material layer TC2'. The photoresist pattern PR has a plurality of photoresist patterns, for example, to expose a portion of the transparent conductive material layer TC2' to be removed.

In step S610, a portion of the transparent conductive material layer TC2' is removed by using the photoresist pattern PR. The method of removing a portion of the transparent conductive material layer TC2' may be, for example, using an etching process (first etching step). In the present embodiment, a part of the transparent conductive material layer TC2' is removed by a wet etching process, wherein the etching solution used includes oxalic acid, but the disclosure is not limited thereto. After removing a portion of the transparent conductive material layer TC2', a transparent conductive material layer TC2″ is formed, and a portion of the electrode material layer BL' is exposed.

In step S620, a portion of the electrode material layer BL' is removed using the photoresist pattern PR to form an electrode layer BL. A method of removing a portion of the electrode material layer BL' may be, for example, using an etching process (second etching step). In the present embodiment, a portion of the electrode material layer BL' is removed by a wet etching process, wherein the etching solution used includes an aluminate, but the disclosure is not limited thereto.

In step S630, a portion of the transparent conductive material layer TC2″ is removed again using the photoresist pattern PR to form a transparent conductive layer TC. A method of removing a portion of the transparent conductive material layer TC2″ may be, for example, using an etching process (third etching step). In the present embodiment, a part of the transparent conductive material layer TC2″ is removed by a wet etching process, wherein the etching solution used includes oxalic acid, but the disclosure is not limited thereto. After step S620, a third etching step is performed after the second etching step, so that a portion of the transparent conductive material layer TC2″ is removed. Since the side edge TC2"E of the transparent conductive material layer TC2" is liable to be chamfered beyond the side edge BLE of the formed electrode layer BL after the step S620 is performed, the side edge TC2E of the formed transparent conductive layer TC2 may be cut or further retracted into the side edge BLE of the electrode layer BL after the step S630 is performed to remove a portion of the transparent conductive material layer TC2", thereby reducing the occurrence of chamfering. For example, the distance W from the top end point BLE_T of the side edge BLE to the bottom end point TC2E_B of the side edge TC2E in the first direction d1 may be, for example, 0-0.5 μm (0 μm+.W+. 0.5 μm), but is not limited thereto.

In step S640, the photoresist pattern PR is removed. After the photoresist pattern PR is removed, the transparent conductive layer TC2 is exposed, and the subsequent process may be continued. For example, the insulating layer IL4 may be formed on the transparent conductive layer TC2. It should be noted that the electrode material layer BL 'and the transparent conductive material layer TC2' disposed in the peripheral area PA are also formed with the metal layer PADM and the transparent conductive layer PADT respectively through the foregoing steps, so as to serve as the contact PAD, wherein the transparent conductive layer PADT is disposed on the metal layer PADM for reducing the corrosion of the metal layer PADM caused by oxidation, as shown in fig. 1, but the disclosure is not limited thereto.

Thus, the manufacturing process of the electronic device 10a is completed. It should be noted that, although the method of manufacturing the electronic device 10a of the present embodiment is described by taking the above method as an example, the method of manufacturing the electronic device 10a of the present disclosure is not limited thereto, and the steps of deleting the above portions or adding other steps may be performed according to the requirement. In addition, the sequence of the steps can be adjusted according to the requirement.

Fig. 8 is a flowchart of a partial manufacturing process of an electronic device, such as the partial manufacturing process of the electronic device 10b, according to an embodiment of the disclosure. It should be noted that, the embodiment of fig. 8 may use the element numbers and part of the content of the embodiment of fig. 5, where the same or similar numbers are used to denote the same or similar elements, and descriptions of the same technical content are omitted. It should be noted that the flowchart shown in fig. 8 is only an example, and is not intended to limit the manufacturing steps of the electronic device 10 b. Fig. 9 is a flow chart of a partial manufacturing process of an electrode layer and a transparent conductive layer according to another embodiment of the disclosure, and fig. 10 is a schematic cross-sectional view of a partial manufacturing process of an electrode layer and a transparent conductive layer according to another embodiment of the disclosure.

The biggest difference between the manufacturing method of the electronic device 10b shown in fig. 8 and the manufacturing method of the electronic device 10a is that: the electrode material layer BL 'is formed after the transparent conductive material layer TC2' is formed.

The steps S10 to S30 can refer to the foregoing embodiments, and are not described herein. It should be noted that, in step S20, the electrode layer E of the electronic device 10b is formed in the same process as the source S and the drain D of the active device TFT.

In step S40', a transparent conductive material layer TC2' is formed on the photodiode PD. The method for forming the transparent conductive material layer TC2' can refer to the foregoing embodiments, and is not repeated herein.

In step S50', an electrode material layer BL' is formed on the photodiode PD, wherein the electrode material layer BL 'is in contact with the transparent conductive material layer TC2'. The method for forming the electrode material layer BL' can refer to the foregoing embodiments, and will not be described herein. In the present embodiment, the electrode material layer BL 'is formed after the transparent conductive material layer TC2' is formed, and therefore, the transparent conductive material layer TC2 'is located between the electrode material layer BL' and the photodiode PD in the normal direction n of the substrate SB, but the disclosure is not limited thereto.

In some embodiments, the method of manufacturing the electronic device 10b further includes performing step S35 after step S30 and before step S40'. In step S35, after the formation of the photodiode PD, the insulating layer IL2 is formed, wherein the opening il2_op is formed in the insulating layer IL2, and the transparent conductive material layer TC2 'and the electrode material layer BL' are filled in the opening il2_op, as shown in fig. 3. The method for forming the insulating layer IL2 and the opening il2_op thereof can refer to the foregoing embodiments, and will not be described herein again. Based on this, after step S35 is performed, the transparent conductive material layer TC2 'formed in step S40' and the electrode material layer BL 'formed in step S50' may be disposed on the insulating layer IL2 and electrically connected to the photodiode PD through the opening il2_op.

In step S60', the transparent conductive material layer TC2' and the electrode material layer BL ' are patterned using a mask to form the transparent conductive layer TC2 and the electrode layer BL. Specifically, a photoresist pattern PR is formed by applying a photoresist on the electrode material layer BL 'and the transparent conductive material layer TC2', and then performing an exposure, a development, and the like using the same mask. Referring to fig. 9 and 10, further patterning the transparent conductive material layer TC2 'and the electrode material layer BL' using the photoresist pattern PR may include performing the following steps. In the following steps, patterning the transparent conductive material layer TC2 'and the electrode material layer BL' also includes performing at least a first etching step and a second etching step, each of which causes one of the transparent conductive material layer TC2 'and the electrode material layer BL' to be patterned and the other of the transparent conductive material layer TC2 'and the electrode material layer BL' to be patterned.

In step S600', a photoresist pattern PR is formed on the electrode material layer BL'. The photoresist pattern PR has a plurality of photoresist patterns, for example, to expose a portion of the electrode material layer BL' to be removed.

In step S610', a portion of the electrode material layer BL' is removed using the photoresist pattern PR. A method of removing a portion of the electrode material layer BL' may be, for example, using an etching process (first etching step). In the present embodiment, a portion of the electrode material layer BL' is removed by a wet etching process, wherein the etching solution used includes an aluminate, but the disclosure is not limited thereto. After removing a portion of the electrode material layer BL ', the electrode layer BL is formed, and a portion of the transparent conductive material layer TC2' is exposed.

In step S620', a portion of the transparent conductive material layer TC2' is removed by using the photoresist pattern PR to form a transparent conductive layer TC2. The method of removing a portion of the transparent conductive material layer TC2' may be, for example, using an etching process (second etching step). In the present embodiment, a part of the transparent conductive material layer TC2' is removed by a wet etching process, wherein the etching solution used includes oxalic acid, but the disclosure is not limited thereto.

In step S630', the photoresist pattern PR is removed. After the photoresist pattern PR is removed, the electrode layer BL is exposed, and the subsequent process may be continued. For example, the subsequent step S640' or the formation of the insulating layer IL4 may be performed. It should be noted that, in the present embodiment, the electrode material layer BL 'and the transparent conductive material layer TC2' disposed in the peripheral area PA are also formed into the metal layer PADM and the transparent conductive layer PADT through the foregoing steps, wherein the metal layer PADM is disposed on the transparent conductive layer PADT.

In step S640', the metal layer PADM located in the peripheral region is removed. Since the metal layer PADM is exposed and is not protected and is easily oxidized and corroded, the metal layer PADM on the transparent conductive layer PADT is removed in this embodiment, so that the exposed transparent conductive layer PADT is used as a contact PAD for electrical connection with an external circuit.

Thus, the manufacturing process of the electronic device 10b is completed. It should be noted that, although the method of manufacturing the electronic device 10b of the present embodiment is described by taking the above method as an example, the method of manufacturing the electronic device 10b of the present disclosure is not limited thereto, and the steps of deleting the above portions or adding other steps may be performed according to the requirement. In addition, the sequence of the steps can be adjusted according to the requirement.

According to the above, the electrode layer and the transparent conductive layer included in the electronic device according to the embodiment of the disclosure are formed by using the same mask, so that the amount of the mask and the number of processes can be reduced, and the manufacturing cost of the electronic device according to the embodiment of the disclosure can be reduced.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.

Claims (13)

1. An electronic device, comprising:

a substrate;

a first electrode layer disposed on the substrate;

the photodiode is arranged on the first electrode layer and is electrically connected with the first electrode layer;

an insulating layer disposed on the photodiode;

the second electrode layer is arranged on the insulating layer and is electrically connected with the photodiode; and

the first transparent conducting layer is arranged on the insulating layer and is contacted with the second electrode layer.

2. The electronic device of claim 1, wherein the first transparent conductive layer is disposed on the second electrode layer.

3. The electronic device of claim 1, wherein the first transparent conductive layer is disposed between the photodiode and the second electrode layer.

4. The electronic device of claim 1, further comprising a second transparent conductive layer disposed between the insulating layer and the photodiode.

5. The electronic device of claim 1, wherein the second electrode layer has a first side edge, the first transparent conductive layer has a second side edge, the first side edge is adjacent to the second side edge, and the first side edge is spaced from the second side edge in a first direction by a distance of 0-0.5 μιη.

6. A method of manufacturing an electronic device, comprising:

providing a substrate;

forming a first electrode layer on the substrate;

forming a photodiode on the first electrode layer;

forming a second electrode material layer on the photodiode;

forming a first transparent conductive material layer on the photodiode, wherein the first transparent conductive material layer is in contact with the second electrode material layer; and

the second electrode material layer and the first transparent conductive material layer are patterned using a mask.

7. The method of manufacturing an electronic device according to claim 6, wherein forming the second electrode material layer is performed before forming the first transparent conductive material layer.

8. The method of manufacturing an electronic device according to claim 6, wherein forming the second electrode material layer is performed after forming the first transparent conductive material layer.

9. The method of claim 6, further comprising forming an insulating layer after forming the photodiode.

10. The method of claim 9, wherein an opening is formed in the insulating layer, and the second electrode material layer and the first transparent conductive material layer are filled in the opening.

11. The method of claim 6, wherein patterning the second electrode material layer and the first transparent conductive material layer comprises performing a first etching step such that one of the second electrode material layer and the first transparent conductive material layer is patterned.

12. The method of claim 11, further comprising performing a second etching step after the first etching step such that the other of the second electrode material layer and the first transparent conductive material layer is patterned.

13. The method of claim 12, further comprising performing a third etching step after the second etching step such that a portion of the first transparent conductive material layer is removed.