TW202302270A - Silicon wafer processing method and silicon wafer - Google Patents

Abstract

The embodiment of the invention discloses a silicon wafer processing method. The silicon wafer processing method comprises the following steps: carrying out coating processing on a silicon wafer subjected to first chamfering processing and grinding processing; carrying out double-sided polishing processing on the silicon wafer after film coating processing; and carrying out second-time chamfering processing on the silicon wafer after double-sided polishing processing. The embodiment of the invention provides a silicon wafer processing method. According to the silicon wafer processing method, the problem of edge collapse of the silicon wafer is solved through two aspects: on one hand, the silicon wafer processing method comprises the step of carrying out film coating processing on the silicon wafer, so that a layer of oxidation film can be deposited on the surface and the edge of the silicon wafer, and the oxidation film can play a role in protecting the silicon wafer, especially the edge part of the silicon wafer; and on the other hand, according to the silicon wafer processing method, the silicon wafer is subjected to double-sided polishing processing and then is subjected to chamfering processing for the second time, so that the edge collapse part of the silicon wafer caused in the double-sided polishing processing process of the previous procedure can be removed through the chamfering process, and the problem of edge collapse of the silicon wafer is solved.

Description

Silicon wafer processing method and silicon wafer

The invention belongs to the technical field of semiconductor production, in particular to a silicon chip processing method and a silicon chip.

Silicon wafer is the material used for the manufacture of semiconductor components. Generally, after polysilicon is remelted and pulled, sliced, chamfered, ground, polished, and cleaned, a wafer-level silicon wafer with a smooth surface and neat edges can be obtained. As the diameter of silicon wafers becomes larger and the feature size of integrated circuits becomes smaller, higher requirements are placed on the flatness of the wafer surface and the degree of cleanliness and damage of the surface. In semiconductor process technology, surface planarization is an important technology for high-density lithography, because there is no flat surface with ups and downs to avoid scattering during exposure.

However, during the processing of silicon wafers, edge sagging may occur on the peripheral edge of the ground and polished silicon wafers, especially in the double-sided polishing process, under the mechanical action of the polishing pad and the chemical action of the polishing liquid. , will cause the outer peripheral edge of the silicon wafer to be ground more, and eventually cause the outer peripheral edge of the silicon wafer to sag.

In order to solve the above technical problems, the embodiments of the present invention expect to provide a silicon wafer processing method and a silicon wafer, which can improve the edge sag phenomenon of the silicon wafer during the processing process, thereby improving the quality of the silicon wafer planarization.

Technical scheme of the present invention is realized like this: In the first aspect, the embodiment of the present invention provides a silicon wafer processing method, the silicon wafer processing method includes: performing coating processing on the silicon wafer after the first chamfering process and grinding process; Double-sided polishing process; the second chamfering process is performed on the silicon wafer after double-sided polishing.

In a second aspect, an embodiment of the present invention provides a silicon wafer, which is obtained by using the silicon wafer processing method according to the first aspect.

Embodiments of the present invention provide a silicon wafer processing method and a silicon wafer; the silicon wafer processing method improves the problem of silicon wafer sagging in two aspects: on the one hand, the silicon wafer processing method includes performing coating processing on the silicon wafer, by This can deposit a layer of oxide film on the surface and edge of the silicon wafer, and the oxide film will protect the silicon wafer, especially the edge part of the silicon wafer; After the polishing process, the second chamfering process is performed, so that the edge collapse of the silicon wafer caused by the double-side polishing process in the previous step can be removed through the chamfering process, thereby solving the problem of the silicon wafer edge collapse.

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, but not to limit the present invention.

It should be noted that when an element is referred to as being “fixed” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

It is to be understood that the terms "length", "width", "top", "bottom", "front", "rear", "left", "right", "vertical", "horizontal", "top" , "bottom", "inner", "outer" and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying No device or element must have a specific orientation, be constructed, and operate in a specific orientation and therefore should not be construed as limiting the invention.

In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of said features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined.

In the present invention, unless otherwise clearly specified and limited, terms such as "installation", "connection", "connection" and "fixation" should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection , or integrated; it can be mechanically connected or electrically connected; it can be directly connected or indirectly connected through an intermediary, and it can be the internal communication of two components or the interaction relationship between two components. Those with ordinary knowledge in the art can understand the specific meanings of the above terms in the present invention according to specific situations.

In the conventional silicon wafer processing process, the silicon rod is first cut into silicon wafers of a certain thickness by wire cutting. Specifically, the wire cutting process is used to cut the silicon rod into silicon wafers of a certain thickness. Wire cutting means winding the cutting wire. On the guide wheel, use the guide wheel to drive the cutting wire to move. While cutting, spray mortar to the cutting wire. The cutting wire is pressed tightly against the silicon rod with the mortar, and performs unidirectional or reciprocating cutting motion relative to the silicon rod. This completes abrasive cutting, cutting the silicon rod into pieces. However, the surface roughness of silicon wafers obtained by wire cutting is relatively large, and there are common problems such as bending and warping, and the thickness of different silicon wafers often varies greatly, and the thickness consistency is poor. Based on the above problems, the silicon wafers need to be processed in multiple steps in order to improve the quality of the silicon wafers.

However, in the subsequent processing, if the process sequence is improperly arranged, the flatness of the further processed silicon wafer, especially the flatness of the edge of the silicon wafer may be reduced, and may even cause the outer circumference of the silicon wafer to sag.

As shown in Figure 1, taking three silicon wafers processed by the current processing method as an example, select sampling points within the range from the surface of the silicon wafer to the outer circumference of the silicon wafer at a distance of 100mm from the center of the circle, and measure the The thickness of the silicon wafer was finally drawn according to the measurement results. From Figure 1, we can see the change trend of the thickness of the silicon wafer, and it can be seen that there is an obvious sag on the outer peripheral edge of the silicon wafer, which means Means that the flatness of the edge of the silicon wafer is not good. Fig. 2 shows the schematic diagram of the graph used to evaluate the calculation method of the edge roll-off (Edge Roll-Off, ERO) amount of the edge of the silicon wafer, wherein the abscissa of the graph is the distance between the sampling point and the edge of the silicon wafer , and the ordinate is the displacement from the sampling point to the reference plane.

In order to solve the problem of poor flatness of the edge of the silicon wafer, especially the problem of sagging, referring to FIG. 3 , an embodiment of the present invention provides a silicon wafer processing method, which may include: S101: Coating the silicon wafer after the first chamfering and grinding; S102: Perform double-sided polishing on the coated silicon wafer; S103: performing a second chamfering process on the double-sided polished silicon wafer.

According to the silicon wafer processing method provided by the embodiment of the present invention, the silicon wafer cut from the silicon rod is firstly subjected to the first chamfering process, which specifically refers to the use of the relative rotational movement of the grinding wheel and the silicon wafer to perform grinding processing on the silicon wafer. The edges are preliminarily treated to prevent edge breakage or chipping during the rough grinding step. After the first chamfering process, the silicon wafer is then subjected to a rough grinding process and a fine grinding process, wherein the rough grinding process and the fine grinding process can eliminate the thickness difference of the silicon wafer. A heavy etching process is performed on the wafer and a light etching process is additionally performed on the silicon wafer after the fine grinding process, wherein the heavy etching process and the light etching process can remove the processing caused by the above-mentioned first chamfering process and grinding deformation or contamination.

In order to protect the surface and edge of the silicon wafer so that the silicon wafer can continue to undergo subsequent processing, the silicon wafer that has undergone grinding and etching processes is subjected to coating processing, that is, the silicon wafer is formed on the surface and edge of the silicon wafer by deposition. Oxide film.

The coated silicon wafer is then polished on both sides to make the surface of the silicon wafer a mirror surface. Specifically, by supporting the silicon wafer in the double-sided polishing device, attaching the polishing cloth to the upper and lower fixed plates of the double-sided polishing device, sandwiching the silicon wafer, and then supplying the polishing liquid to the polishing surface. At the same time, the upper and lower surfaces of the silicon wafer are mirror-polished by rotating the fixed disk. Since the two surfaces of the silicon wafer are polished at the same time, the working efficiency is significantly improved compared with single-side polishing.

However, the above-mentioned double-sided polishing process will cause the edge of the silicon wafer to sag, because the polishing pad and the polishing liquid will have mechanical friction and chemical effects on the edge of the silicon wafer. Specifically, the polishing pad is made of flexible materials. Yes, it may cover the edge of the silicon wafer after receiving pressure, and it is also easy to collect abrasive fluid at the edge of the silicon wafer, which leads to more edge grinding.

In order to remove the sag, the embodiment of the present invention proposes to perform the second chamfering process after the first chamfering, grinding, coating and double-sided polishing process. Since the removal amount of the second chamfering process is large, the diameter The impact is relatively large, so a certain width of the outer circumference of the silicon wafer can be removed by means of the second chamfering process to remove the sagging part, thereby improving the sagging situation.

According to an embodiment of the present invention, after the second chamfering process of the silicon wafer, its edge can be in two forms, please refer to FIG. 4 and FIG. 5 for details, wherein the silicon wafer 10 shown in FIG. 4 has R T-shaped chamfer. The silicon wafer 20 shown in FIG. 5 has a T-shaped chamfer, which can be selected according to customer requirements in actual operation.

To sum up, the embodiment of the present invention provides a silicon wafer processing method; the silicon wafer processing method improves the problem of silicon wafer sagging in two aspects: on the one hand, the silicon wafer processing method includes coating the silicon wafer, thereby An oxide film can be deposited on the surface and edge of the silicon wafer, and the oxide film will protect the silicon wafer, especially the edge of the silicon wafer; on the other hand, according to the silicon wafer processing method, the silicon wafer is polished on both sides After the processing, the second chamfering process is performed, so that the edge collapse of the silicon wafer caused by the double-side polishing process in the previous step can be removed through the chamfering process, thereby solving the problem of the silicon wafer edge collapse.

Referring to FIG. 6 , in order to clean up the impurities and processing traces formed on the edge of the silicon wafer during the second chamfering process and make the chamfered part form a mirror surface, according to an optional embodiment of the present invention, the silicon wafer processing method further includes: S104: Perform edge polishing on the silicon wafer after the second chamfering process.

If the silicon wafer undergoing the above processing still does not meet the requirements due to flatness and roughness, optionally, referring to FIG. 6, the silicon wafer processing method also includes: S105: Perform final surface polishing on the edge polished silicon wafer.

According to an optional embodiment of the present invention, the coating process on the silicon wafer after the first chamfering and grinding process includes: forming 900 angstroms to 1000 angstroms of silicon oxide on the surface and edge of the silicon wafer.

Optionally, the coating process on the silicon wafer after the first chamfering process and grinding process is to form 1000 angstroms of silicon oxide on the surface of the silicon wafer.

According to the silicon wafer processing method provided by the embodiment of the present invention, the edge sagging phenomenon of the silicon wafer during processing is mainly removed by the second chamfering process, therefore, the removal amount of the second chamfering process should be set reasonably.

Based on this, optionally, the second chamfering process on the double-sided polished silicon wafer includes: removing 0.5mm˜1mm of the peripheral edge of the silicon wafer along the radial direction.

Optionally, performing the second chamfering process on the double-sided polished silicon wafer refers to removing 1 mm of the peripheral edge of the silicon wafer along the radial direction.

According to an optional embodiment of the present invention, the edge polishing of the silicon wafer after the second chamfering process includes: removing 5 um-10 um of the peripheral edge of the silicon wafer along the radial direction.

The embodiment of the present invention also provides a silicon wafer, which is obtained by using the above silicon wafer processing method.

It should be noted that: the technical solutions described in the embodiments of the present invention can be combined arbitrarily if there is no conflict.

Embodiments of the present invention have been described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementations, and the above-mentioned specific implementations are only illustrative, rather than restrictive, and those with ordinary knowledge in the art Under the enlightenment of the present invention, without departing from the gist of the present invention and the protection scope of the claims, many forms can also be made, all of which belong to the protection of the present invention.

S101-S105: Steps 10: Silicon wafer 20: Wafer

Fig. 1 shows the graph of the thickness change of the silicon wafer that uses conventional silicon wafer processing method to process; Figure 2 shows a schematic diagram of an index used to evaluate the amount of edge roll-off (Edge Roll-Off, ERO) at the edge of a silicon wafer; FIG. 3 shows a flow chart of a silicon wafer processing method provided by an embodiment of the present invention; Fig. 4 shows a schematic diagram of a chamfering shape of a silicon wafer that has undergone a second chamfering process; FIG. 5 shows a schematic diagram of another chamfering shape of a silicon wafer that has undergone a second chamfering process; FIG. 6 shows a flowchart of a silicon wafer processing method provided by another embodiment of the present invention.

S101-S103: Steps

Claims (7)

A silicon wafer processing method, the silicon wafer processing method comprising: Coating the silicon wafer after the first chamfering and grinding; Carrying out double-sided polishing on the coated silicon wafer; A second chamfering process is performed on the silicon wafer after the double-side polishing process. According to the silicon wafer processing method described in claim 1, the silicon wafer processing method further includes: performing edge polishing on the silicon wafer after the second chamfering process. According to the silicon wafer processing method described in Claim 2, the silicon wafer processing method further includes: performing final surface polishing on the edge polished silicon wafer. The silicon wafer processing method according to any one of claims 1 to 3, wherein, performing the coating process on the silicon wafer after the first chamfering process and grinding process includes: on the surface of the silicon wafer and 900 angstroms to 1000 angstroms of silicon oxide is formed on the edge. The silicon wafer processing method according to any one of claims 1 to 3, wherein the second chamfering of the double-sided polished silicon wafer includes: removing 0.5 of the peripheral edge of the silicon wafer along the radial direction. mm ~ 1mm. The silicon wafer processing method as described in Claim 2, wherein the edge polishing of the silicon wafer after the second chamfering process includes: removing the peripheral edge of the silicon wafer by 5 um ~ 10 um along the radial direction. A silicon wafer obtained by using the silicon wafer processing method described in any one of Claims 1 to 6.

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