TW202234962A - Manufacturing circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof - Google Patents
Manufacturing circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof Download PDFInfo
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- TW202234962A TW202234962A TW110106816A TW110106816A TW202234962A TW 202234962 A TW202234962 A TW 202234962A TW 110106816 A TW110106816 A TW 110106816A TW 110106816 A TW110106816 A TW 110106816A TW 202234962 A TW202234962 A TW 202234962A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
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- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
一種具導通孔之電路板製造方法,特別是電路板線路結構的製作方法及所製成的具導通孔之電路板線路結構。A method for manufacturing a circuit board with via holes, in particular a method for fabricating a circuit board structure and the manufactured circuit board structure with via holes.
傳統選鍍的做法,在鑽孔、清孔後進行金屬化,再搭配使用乾膜遮蔽、利用曝光、顯影將已完成金屬化的孔露出,再進行電鍍,因鑽孔製程與曝光製程均存在製程公差的問題,故在乾膜開孔製程上必須依照鑽孔的位置進行開孔,須採用具有自動對位的設備(CCD曝光機或數位直接描繪曝光機),且因公差累進問題在開孔尺寸上必須將開孔放大,於電鍍後在洞口的周圍形成凸出部。在線路製作時,為了有效覆蓋凸出部,光阻選擇厚度無法薄化,導致解析度及蝕刻成型受到了限制,影響了電路板線路結構的細線路製作。The traditional method of plating selection is to perform metallization after drilling and hole cleaning, and then use dry film masking, exposure and development to expose the metallized holes, and then perform electroplating. Because both the drilling process and the exposure process exist The problem of process tolerance, so in the dry film opening process, the hole must be drilled according to the position of the drill hole, and a device with automatic alignment (CCD exposure machine or digital direct drawing exposure machine) must be used, and due to the progressive tolerance problem. The size of the hole must be enlarged, and a protrusion is formed around the hole after electroplating. During circuit fabrication, in order to effectively cover the protruding portion, the selected thickness of the photoresist cannot be thinned, which results in limited resolution and etching molding, and affects the fabrication of thin circuits in the circuit structure of the circuit board.
有鑑於此,依據一實施例提供一種具導通孔之電路板線路結構製作方法包括提供基板,基板包括基材層及銅層,基材層具有相對之第一表面及第二表面,各銅層形成於基材層之第一表面及第二表面;覆蓋二第一光阻層於二銅層之表面,並透過全面曝光,使各第一光阻層具有抗化性;自位於第一表面之一側的第一光阻層之表面進行鑽孔,形成孔洞,孔洞導通至基材層之第二表面;透過化學方式形成金屬化層,金屬化層覆蓋於孔洞之表面及位於第一表面之一側的第一光阻層之表面;透過電鍍形成覆銅層,覆銅層覆蓋於孔洞之表面及延伸至位於第一表面之一側的第一光阻層之表面;透過化學咬蝕去除部分超過銅層之高度的覆銅層;去除二第一光阻層;覆蓋二第二光阻層於二銅層之表面,並透過曝光及顯影,使二第二光阻層形成線路圖案結構;進行蝕刻製程以去除未被各第二光阻層所覆蓋之各銅層之表面;以及去除二第二光阻層。In view of this, according to an embodiment, a method for fabricating a circuit board circuit structure with a via hole is provided, which includes providing a substrate, the substrate includes a base material layer and a copper layer, the base material layer has opposite first and second surfaces, and each copper layer forming on the first surface and the second surface of the base material layer; covering the two first photoresist layers on the surfaces of the two copper layers, and making each first photoresist layer have chemical resistance through full exposure; The surface of the first photoresist layer on one side is drilled to form holes, and the holes are connected to the second surface of the substrate layer; a metallization layer is formed by chemical means, and the metallization layer covers the surface of the holes and is located on the first surface. The surface of the first photoresist layer on one side; a copper clad layer is formed by electroplating, and the copper clad layer covers the surface of the hole and extends to the surface of the first photoresist layer on one side of the first surface; through chemical etching removing part of the copper clad layer exceeding the height of the copper layer; removing two first photoresist layers; covering two second photoresist layers on the surfaces of the two copper layers, and exposing and developing the two second photoresist layers to form circuit patterns structure; performing an etching process to remove the surface of each copper layer not covered by each second photoresist layer; and removing two second photoresist layers.
在一些實施例中,至少一孔洞貫穿基板。In some embodiments, at least one hole penetrates the substrate.
在一些實施例中,光阻層為乾膜光阻。In some embodiments, the photoresist layer is a dry film photoresist.
在一些實施例中,孔洞係利用雷射鑽孔方式形成。In some embodiments, the holes are formed by laser drilling.
在一些實施例中,金屬化層係透過中性或弱酸性之金屬化系統形成。In some embodiments, the metallization layer is formed through a neutral or weakly acidic metallization system.
在一些實施例中,二第一光阻層包括薄膜,於二第一光阻層全面曝光後,去除薄膜。In some embodiments, the two first photoresist layers include thin films, and the thin films are removed after the two first photoresist layers are fully exposed.
在一些實施例中,二第一光阻層包括薄膜,於第一表面之一側的第一光阻層之表面鑽孔後,去除薄膜。In some embodiments, the two first photoresist layers comprise thin films, and the thin films are removed after drilling holes on the surface of the first photoresist layers on one side of the first surface.
在一些實施例中,孔洞具有凹部,凹部圍繞於孔洞之洞口周圍。In some embodiments, the hole has a recess surrounding the opening of the hole.
在一些實施例中,覆銅層沿著凹部延伸覆蓋至位於第一表面之一側之銅層外露之表面。In some embodiments, the copper clad layer extends along the recess to cover the exposed surface of the copper layer on one side of the first surface.
另外,依據一實施例中提供一種具導通孔之電路板線路結構,係由如上述各實施例之製造方法所製成的電路板線路結構。In addition, according to an embodiment, a circuit board circuit structure with via holes is provided, which is a circuit board circuit structure manufactured by the manufacturing methods of the above-mentioned embodiments.
綜上所述,藉由第一光阻層將金屬化及電鍍範圍增大,當在電鍍的過程時,覆銅層延伸至第一光阻層之表面,接著一併去除超過第一光阻層之高度範圍的覆銅層以及去除第一光阻層,使得電鍍層與銅層高度大致一致,避免了電鍍孔洞時,電鍍層溢出孔洞,在孔洞周圍形成凸出部的問題。In summary, the metallization and electroplating range is increased by the first photoresist layer. During the electroplating process, the copper clad layer extends to the surface of the first photoresist layer, and then the excess of the first photoresist layer is removed together. The copper clad layer within the height range of the layer and the removal of the first photoresist layer make the height of the electroplating layer and the copper layer roughly the same, which avoids the problem that the electroplating layer overflows the hole and forms a protrusion around the hole when the hole is electroplated.
請先參閱圖1至圖7b及圖12,圖1至圖7b為本發明所述一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)至(九),圖12為本發明所述一實施例的具導通孔之電路板線路結構製作方法之流程圖(一)。如圖1及圖12所示,本實施例之具導通孔之電路板線路結構100的製造方法包括提供基板10(步驟S10),基板10包括基材層11及二銅層12,基材層11具有相對之第一表面111及第二表面112,二銅層12分別形成於基材層11之第一表面111及第二表面112。也就是說,可以利用基材層11的第一表面111及第二表面112同時製作相同或不同規格的電路板線路結構100,或是僅利用單一側表面來製作電路板線路結構100。在此實施例中,以單一側表面製作電路板線路結構100作為示例,但不以此為限。Please refer to FIGS. 1 to 7b and 12 first. FIGS. 1 to 7b are schematic structural diagrams (1) to (9) of a method for fabricating a circuit board circuit structure with vias according to an embodiment of the present invention, and FIG. 12 is a A flowchart (1) of a method for fabricating a circuit board circuit structure with vias according to an embodiment of the present invention. As shown in FIG. 1 and FIG. 12 , the manufacturing method of the circuit
如圖2及圖12所示,覆蓋二第一光阻層13於二銅層12之表面,並透過全面曝光,使各第一光阻層13具有抗化性(步驟S11);其中,覆蓋第一光阻層13並透過全面曝光係利用現有之製程,例如應用於電路板光刻工藝,通過貼合乾膜光阻形成光阻層或透過塗布濕膜光阻形成光阻層。在此實施例中,以乾膜光阻為示例,採用全面曝光之方式將光阻形成具抗化性的狀態。As shown in FIG. 2 and FIG. 12 , the surfaces of the two first
如圖3及圖12所示,為方便後續說明,將成位於第一表面111側的第一光阻層以第一光阻層13a示意,位於第二表面112側的第一光阻層以第一光阻層13b示意。而成位於第一表面111側的銅層以銅層12a示意,位於第二表面112側的銅層以銅層12b示意。自位於第一表面111之一側的第一光阻層13a之表面進行鑽孔(步驟S12),形成孔洞20,孔洞20導通至基材層11之第二表面112。在此實施例中,藉由雷射鑽孔的方式形成孔洞20。在此孔洞20以兩個為示例,但不以此為限。孔洞20從第一表面111之一側的第一光阻層13a至第二表面112之一側的銅層12b,依序經過第一光阻層13a、銅層12a及基材層11並形成導孔。孔洞20包括孔壁21及孔底22,孔壁21包括鑽孔而外露之第一光阻層13a、銅層12a及基材層11的側表面。孔底22包括與第二表面112接合之銅層12b的表面。As shown in FIG. 3 and FIG. 12 , for the convenience of the subsequent description, the first photoresist layer on the side of the
如圖4及圖12所示,透過化學方式形成金屬化層14(步驟S13),金屬化層14覆蓋於孔洞20之表面及二第一光阻層13之表面。在此實施例中,光阻層為利用乾膜光阻形成,傳統乾膜光阻如接觸鹼性之金屬化系統,將導致乾膜光阻結構被破壞甚至產生脫落的現象,故在此實施例中,金屬化層14係透過中性或弱酸性之金屬化系統形成。在此實施例中,透過化學方式的中性或弱酸性之金屬化系統形成並覆蓋孔洞20之表面及二第一光阻層13之表面。也就是說金屬化層14覆蓋了第一表面111之一側的第一光阻層13a之表面及第二表面112之一側的第一光阻層13b之表面。一般來說,金屬化層14之覆蓋範圍不包括金屬材之部份,例如因鑽孔外露之銅層12a的側表面及因鑽孔外露之銅層12b的表面。As shown in FIG. 4 and FIG. 12 , the
如圖5及圖12所示,形成金屬化層14後,透過電鍍形成覆銅層15(步驟S14),覆銅層15覆蓋孔洞20之表面及延伸至位於第一表面111之一側的第一光阻層13a之表面。在此實施例中,透過電鍍方式形成並覆蓋孔洞20之表面,即因鑽孔而外露之第一光阻層13a、銅層12a及基材層11的側表面。另外,在此實施例中,因為第二表面112一側的銅層12b,覆銅層15得以延伸至位於第一表面111之一側的第一光阻層13a之表面。As shown in FIG. 5 and FIG. 12 , after the
如圖6及圖12所示,完成電鍍後,透過化學咬蝕去除部分超過位於第一表面111之一側的銅層12a之高度的覆銅層15(步驟S15)。舉例來說,在此實施例中,為了使覆銅層15與銅層12a之高度大致切齊,透過化學咬蝕去除部分超過位於第一表面111之一側銅層12a的覆銅層15,使覆銅層15的高度高於銅層12a而低於第一光阻層13a之高度。如圖7及圖12所示,完成化學咬蝕後,去除二第一光阻層13(步驟S16),並繼續製作後續各線路的圖案。如圖7a、圖7b及圖12,覆蓋二第二光阻層16於二銅層12之表面,並透過曝光及顯影,使二第二光阻層16形成線路圖案結構161(步驟S17)。進行蝕刻製程以去除未被各第二光阻層16所覆蓋之各銅層12之表面(步驟S18)。接著去除二第二光阻層16(步驟S19),便完成電路板線路結構100。As shown in FIG. 6 and FIG. 12 , after the electroplating is completed, the copper
具體來說,藉由二第一光阻層13將金屬化及電鍍範圍增大,當在電鍍的過程時,覆銅層15延伸至第一光阻層13a之表面,接著一併去除超過第一光阻層13a之高度範圍的覆銅層15以及去除二第一光阻層13,使得覆銅層15與銅層12a高度大致一致,避免了電鍍孔洞時,電鍍層溢出孔洞,在孔洞周圍形成凸出部的問題。Specifically, the metallization and electroplating range is increased by the two first
另外,請參閱圖2a、圖12a及圖12b。圖2a為一實施例的具導通孔之電路板線路結構之薄膜示意圖。圖12a為一實施例的具導通孔之電路板線路結構製作方法之流程圖(二)。圖12b為一實施例的具導通孔之電路板線路結構製作方法之流程圖(三)。一般來說,乾膜表面存在著一層光學級的聚對苯二甲酸乙二酯(Polyethylene terephthalate, PET)膜,可以保護乾膜避免接觸空氣而產生反應,在一般的製程中,進行顯影前便會將PET膜去除。如圖12a,在本實施例中,基板10經過全面曝光而未經過顯影,故基板10是在覆蓋二第一光阻層13於二銅層12之表面,並透過全面曝光,使各第一光阻層13具有抗化性後(步驟S11),去除聚對苯二甲酸乙二酯薄膜131(步驟S11’),接著便自位於第一表面111之一側的第一光阻層13a之表面進行鑽孔(步驟S12),但不以此為限。如圖12b,在另一實施態樣中,基板10是在覆蓋二第一光阻層13於二銅層12之表面,並透過全面曝光,使各第一光阻層13具有抗化性後(步驟S11)後,自位於第一表面111之一側的第一光阻層13a之表面的聚對苯二甲酸乙二酯薄膜131進行鑽孔(步驟S12a),接著去除聚對苯二甲酸乙二酯薄膜131(步驟S12a’)。在又一實施態樣中,以濕膜光阻為示例,濕膜光阻因為並未存在有PET膜,故不需要去除PET膜之動作。In addition, please refer to Fig. 2a, Fig. 12a and Fig. 12b. FIG. 2a is a schematic diagram of a thin film of a circuit board circuit structure with via holes according to an embodiment. FIG. 12a is a flowchart (2) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. FIG. 12b is a flowchart (3) of a method for fabricating a circuit board structure with vias according to an embodiment. Generally speaking, there is a layer of optical grade polyethylene terephthalate (PET) film on the surface of the dry film, which can protect the dry film from contact with air and react. The PET film will be removed. As shown in FIG. 12a, in this embodiment, the
此外,在本實施例中,電路板線路結構100適用例如於雙面板或多層板初始之內板,在此利用一層基材層11及二層銅層12的雙面板製作為示例。具體來說,本實施例係利用中性或弱酸性之金屬化系統進行金屬化,如進行中性或弱酸性之金屬化,其基板的底層需要全面的導電,然而多層板的製作是以逐層疊加。製作多層板之外板時,內板因為已完成製作,其底層無法全面的導電,故本實施例的電路板線路結構100適用例如於雙面板或多層板之內板。在本實施例中,基材層11可以為任意的純金屬材料或複合金屬材料。In addition, in this embodiment, the
請參閱圖8。圖8為另一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。在另一實施例中,孔洞20具有凹部201,凹部201圍繞於孔洞20之洞口周圍。舉例來說,在雷射加工過程時,可能會因為雷射加工熱效應的特性而導致第一光阻層13a內縮,或刻意將第一光阻層13a孔徑大於孔洞20之孔徑,此時銅層12a與第一光阻層13a之間會形成階梯結構。請參閱圖9。圖9為另一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。在形成金屬化層14後,透過電鍍形成覆銅層15(步驟S14),覆銅層15覆蓋孔洞20之表面及延伸至位於第一表面111之一側的第一光阻層13a之表面。覆銅層15覆蓋孔洞20之表面,即因鑽孔而外露之第一光阻層13a、銅層12a及基材層11的側表面,另外也覆蓋了因為雷射加工第一光阻層13a內縮而外露之銅層12a之表面。完成電鍍後,透過化學咬蝕去除超過位於第一表面111之一側銅層12a的覆銅層15,使覆銅層15之高度高於銅層12a而低於第一光阻層13a之高度(步驟S15)。如圖9所示,覆銅層15形成耳部環繞於孔洞20之洞口周圍,增加了覆銅層15與銅層12a之接觸面積,強化了信賴性的表現。See Figure 8. FIG. 8 is a schematic structural diagram (1) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. In another embodiment, the
請參閱圖10、圖10a及圖11。圖10為又一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。圖10a為又一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。圖11為又一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(三)。在又一實施例中,至少一孔洞30係貫穿基板10而形成貫通孔。部分與上述實施例中相同之部分將不再贅述,僅描述部分不同之處。如圖10,藉由雷射鑽孔形成孔洞30,孔洞30從第一表面111之一側的第一光阻層13a至第二表面112之一側的第一光阻層13b,依序經過了第一光阻層13a、銅層12a、基材層11、銅層12b、及第一光阻層13b。孔洞30包括孔壁31,孔壁31包括鑽孔而外露之第一光阻層13a、銅層12a、基材層11、銅層12b及第一光阻層13b的側表面。金屬化層14覆蓋孔洞30之表面、位於第一表面111之一側的第一光阻層13a之表面及位於第二表面112之一側的第一光阻層13b之表面。一般來說,金屬化層14之覆蓋範圍不包括金屬材之部份,例如因鑽孔外露之銅層12a的側表面及因鑽孔外露之銅層12b的側表面。如圖10a,在電鍍的階段時,覆銅層15覆蓋孔洞30之表面及延伸至位於第一表面111之一側的第一光阻層13a之表面及第二表面112之一側的第一光阻層13b之表面。如圖11,接著透過化學咬蝕去除部分超過位於第一表面111之一側的銅層12a之高度的覆銅層15及部分超過位於第二表面112之一側的銅層12b之高度的覆銅層15。再去除第一光阻層13後,便完成如圖11所示具有貫通孔的基板10。Please refer to FIG. 10 , FIG. 10 a and FIG. 11 . FIG. 10 is a schematic structural diagram (1) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. FIG. 10a is a schematic structural diagram (2) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. FIG. 11 is a schematic structural diagram (3) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. In yet another embodiment, at least one
綜上所述,依據一實施例的一種具導通孔之電路板線路結構的製作方法藉由二第一光阻層13將金屬化及電鍍範圍增大,當在電鍍的過程時,覆銅層15延伸至第一光阻層13a之表面,接著一併去除超過第一光阻層13a之高度範圍的覆銅層15以及去除二第一光阻層13,使得覆銅層15與銅層12a高度大致一致,避免了電鍍孔洞時,電鍍層溢出孔洞,在孔洞周圍形成凸出部,而影響了電路板線路結構100的製作。藉由本案一實施例之方法完成之具導通孔之電路板線路結構100,包括基材層11、二銅層12及覆銅層15,覆銅層15覆蓋孔洞20,且在孔洞20的洞口周遭皆具有較平整的覆銅層15,使得基板10整體表面更為平整。另外,藉由本案另一實施例之方法完成之具導通孔之電路板線路結構100,包括基材層11、二銅層12及覆銅層15,覆銅層15覆蓋孔洞20,覆銅層15延伸至孔洞20之洞口,並於孔洞20之洞口周圍形成耳部,孔洞20的凹部201,增加覆銅層15與銅層12a之接觸面積,強化了信賴性的表現。To sum up, according to an embodiment of a method for fabricating a circuit board structure with via holes, the metallization and electroplating range is increased by the two first photoresist layers 13. During the electroplating process, the copper clad layer is 15 extends to the surface of the
雖然本案的技術內容已經以較佳實施例揭露如上,然其並非用以限定本案,任何熟習此技藝者,在不脫離本案之精神所作些許之更動與潤飾,皆應涵蓋於本案的範疇內,因此本案之保護範圍當視後附之申請專利範圍所界定者為準。Although the technical content of this case has been disclosed above with preferred embodiments, it is not intended to limit this case. Anyone who is familiar with this technique, any changes and modifications made without departing from the spirit of this case should be covered within the scope of this case. Therefore, the scope of protection in this case should be determined by the scope of the appended patent application.
100:電路板線路結構 10:基板 11:基材層 111:第一表面 112:第二表面 12:銅層 12a:銅層 12b:銅層 13:第一光阻層 13a:第一光阻層 13b:第一光阻層 131:聚對苯二甲酸乙二酯薄膜 14:金屬化層 15:覆銅層 16:第二光阻層 161:線路圖案結構 20:孔洞 201:凹部 21:孔壁 22:孔底 30:孔洞 31:孔壁 步驟S10:提供基板 步驟S11:覆蓋二第一光阻層於二銅層之表面,並透過全面曝光,使各第一光阻層具有抗化性 步驟S11’:去除聚對苯二甲酸乙二酯薄膜 步驟S12:自位於第一表面之一側的第一光阻層之表面進行鑽孔 步驟S12a:自位於第一表面之一側的第一光阻層之表面的聚對苯二甲酸乙二酯薄膜進行鑽孔 步驟S12a’:去除聚對苯二甲酸乙二酯薄膜 步驟S13:透過化學方式形成金屬化層 步驟S14:透過電鍍形成覆銅層 步驟S15:透過化學咬蝕去除部分超過位於第一表面之一側的銅層之高度的覆銅層 步驟S16:去除二第一光阻層 步驟S17:覆蓋二第二光阻層於二銅層之表面,並透過曝光及顯影,使二第二光阻層形成線路圖案結構 步驟S18:進行蝕刻製程以去除未被各第二光阻層所覆蓋之各銅層之表面 步驟S19:去除二第二光阻層 100: Circuit board structure 10: Substrate 11: Substrate layer 111: First surface 112: Second Surface 12: Copper layer 12a: Copper layer 12b: Copper layer 13: The first photoresist layer 13a: first photoresist layer 13b: first photoresist layer 131: polyethylene terephthalate film 14: Metallization layer 15: Copper Clad Layer 16: Second photoresist layer 161: Circuit pattern structure 20: Holes 201: Recess 21: Hole Wall 22: Bottom of the hole 30: Holes 31: Hole Wall Step S10: providing a substrate Step S11: Covering the surfaces of the two first photoresist layers on the two copper layers, and exposing the entire surface to make the first photoresist layers have chemical resistance Step S11': remove polyethylene terephthalate film Step S12: Drill holes from the surface of the first photoresist layer on one side of the first surface Step S12a: Drill holes from the polyethylene terephthalate film on the surface of the first photoresist layer on one side of the first surface Step S12a': remove polyethylene terephthalate film Step S13: chemically forming a metallization layer Step S14: forming a copper clad layer through electroplating Step S15: removing part of the copper clad layer that exceeds the height of the copper layer on one side of the first surface by chemical etching Step S16: removing two first photoresist layers Step S17: Covering the surfaces of the two second photoresist layers on the two copper layers, and exposing and developing the two second photoresist layers to form a circuit pattern structure Step S18: performing an etching process to remove the surfaces of the copper layers not covered by the second photoresist layers Step S19: removing two second photoresist layers
[圖1] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。 [圖2] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。 [圖2a] 為一實施例的具導通孔之電路板線路結構之薄膜示意圖。 [圖3] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(三)。 [圖4] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(四)。 [圖5] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(五)。 [圖6] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(六)。 [圖7] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(七)。 [圖7a] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(八)。 [圖7b] 為一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(九)。 [圖8] 為另一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。 [圖9] 為另一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。 [圖10] 為又一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(一)。 [圖10a] 為又一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(二)。 [圖11] 為又一實施例的具導通孔之電路板線路結構製作方法之結構示意圖(三)。 [圖12] 為一實施例的具導通孔之電路板線路結構製作方法之流程圖(一)。 [圖12a] 為一實施例的具導通孔之電路板線路結構製作方法之流程圖(二)。 [圖12b] 為一實施例的具導通孔之電路板線路結構製作方法之流程圖(三)。 [FIG. 1] is a schematic structural diagram (1) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. FIG. 2 is a schematic structural diagram (2) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. [ FIG. 2 a ] is a schematic diagram of a thin film of a circuit board circuit structure with via holes according to an embodiment. [FIG. 3] is a schematic structural diagram (3) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. FIG. 4 is a schematic structural diagram (4) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. FIG. 5 is a schematic structural diagram (5) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. FIG. 6 is a schematic structural diagram (6) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. FIG. 7 is a schematic structural diagram (7) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. 7a is a schematic structural diagram (8) of a method for fabricating a circuit board circuit structure with via holes according to an embodiment. [FIG. 7b] is a schematic structural diagram (9) of a method for fabricating a circuit board circuit structure with vias according to an embodiment. 8 is a schematic structural diagram (1) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. FIG. 9 is a schematic structural diagram (2) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. FIG. 10 is a schematic structural diagram (1) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. [FIG. 10a] is a schematic structural diagram (2) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. FIG. 11 is a schematic structural diagram (3) of a method for fabricating a circuit board circuit structure with via holes according to another embodiment. FIG. 12 is a flowchart (1) of a method for fabricating a circuit board structure with vias according to an embodiment. [ FIG. 12 a ] is a flowchart (2) of a method for fabricating a circuit board circuit structure with vias according to an embodiment. [FIG. 12b] is a flowchart (3) of a method for fabricating a circuit board circuit structure with vias according to an embodiment.
步驟S10:提供基板 Step S10: providing a substrate
步驟S11:覆蓋二第一光阻層於二銅層之表面,並透過全面曝光,使各第一光阻層具有抗化性 Step S11: Covering the surfaces of the two first photoresist layers on the two copper layers, and exposing the entire surface to make the first photoresist layers have chemical resistance
步驟S12:自位於第一表面之一側的第一光阻層之表面進行鑽孔 Step S12: Drill holes from the surface of the first photoresist layer on one side of the first surface
步驟S13:透過化學方式形成金屬化層 Step S13: chemically forming a metallization layer
步驟S14:透過電鍍形成覆銅層 Step S14: forming a copper clad layer through electroplating
步驟S15:透過化學咬蝕去除部分超過位於第一表面之一側的銅層之高度的覆銅層 Step S15: removing part of the copper clad layer that exceeds the height of the copper layer on one side of the first surface by chemical etching
步驟S16:去除二第一光阻層 Step S16: removing two first photoresist layers
步驟S17:覆蓋二第二光阻層於二銅層之表面,並透過曝光及顯影,使二第二光阻層形成線路圖案結構 Step S17: Covering the surfaces of the two second photoresist layers on the two copper layers, and exposing and developing the two second photoresist layers to form a circuit pattern structure
步驟S18:進行蝕刻製程以去除未被各第二光阻層所覆蓋之各銅層之表面 Step S18: performing an etching process to remove the surfaces of the copper layers not covered by the second photoresist layers
步驟S19:去除二第二光阻層 Step S19: removing two second photoresist layers
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CN114980567B (en) | 2024-03-19 |
TWI747751B (en) | 2021-11-21 |
CN114980567A (en) | 2022-08-30 |
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