CN114980567B - Manufacturing method of circuit board line structure with through holes and manufactured circuit board line structure with through holes - Google Patents
Manufacturing method of circuit board line structure with through holes and manufactured circuit board line structure with through holes Download PDFInfo
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- CN114980567B CN114980567B CN202110193632.4A CN202110193632A CN114980567B CN 114980567 B CN114980567 B CN 114980567B CN 202110193632 A CN202110193632 A CN 202110193632A CN 114980567 B CN114980567 B CN 114980567B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 38
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 120
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 69
- 229910052802 copper Inorganic materials 0.000 claims abstract description 69
- 239000010949 copper Substances 0.000 claims abstract description 69
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 238000001465 metallisation Methods 0.000 claims abstract description 30
- 238000009713 electroplating Methods 0.000 claims abstract description 19
- 238000005553 drilling Methods 0.000 claims abstract description 18
- 238000003486 chemical etching Methods 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 29
- 230000002378 acidificating effect Effects 0.000 claims description 6
- 230000007935 neutral effect Effects 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 5
- 239000000126 substance Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 22
- 239000010408 film Substances 0.000 description 22
- 229920000139 polyethylene terephthalate Polymers 0.000 description 10
- 239000005020 polyethylene terephthalate Substances 0.000 description 10
- -1 polyethylene terephthalate Polymers 0.000 description 9
- 239000000463 material Substances 0.000 description 4
- 239000007769 metal material Substances 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 229920002799 BoPET Polymers 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002905 metal composite material Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The manufacturing method of the circuit board line structure with the through holes comprises the steps of providing a substrate, wherein the substrate comprises a substrate layer and copper layers, the substrate layer is provided with a first surface and a second surface which are opposite, and each copper layer is formed on the first surface and the second surface of the substrate layer; covering the two photoresist layers on the surfaces of the two copper layers, and making the two photoresist layers resistant through comprehensive exposure; drilling holes from the surface of the photoresist layer at one side of the first surface, wherein the holes are communicated to the second surface of the substrate layer; forming a metallization layer, wherein the metallization layer covers the surfaces of the holes and the surfaces of the two photoresist layers; forming a copper-clad layer through electroplating, wherein the copper-clad layer covers the surface of the hole and extends to the surface of the photoresist layer positioned on one side of the first surface; removing the copper-clad layer by chemical etching to a height exceeding the copper layer; and removing the two photoresist layers to complete the subsequent circuit patterns.
Description
Technical Field
A method for manufacturing a circuit board with a via hole, in particular to a method for manufacturing a circuit board circuit structure and the manufactured circuit board circuit structure with the via hole.
Background
In the conventional method, the hole is drilled, cleaned, metallized, shielded by a dry film, exposed by exposure and development, and electroplated, so that the hole is drilled according to the drilling position in the dry film drilling process and the exposure process, an automatic alignment device (CCD exposure machine or digital direct drawing exposure machine) is adopted, the hole size is enlarged due to the progressive problem, and a convex part is formed around the hole after electroplating. In the circuit fabrication, in order to effectively cover the protruding portion, the photoresist selection thickness cannot be thinned, which results in limitation of resolution and etching molding, and influences the fabrication of fine circuit of the circuit board circuit structure.
Disclosure of Invention
In view of the above, according to one embodiment, a method for fabricating a circuit board circuit structure with a via hole includes providing a substrate, the substrate including a substrate layer and a copper layer, the substrate layer having a first surface and a second surface opposite to each other, each copper layer being formed on the first surface and the second surface of the substrate layer; covering the surfaces of the two first photoresist layers on the two copper layers, and enabling each first photoresist layer to have chemical resistance through comprehensive exposure; drilling holes from the surface of the first photoresist layer at one side of the first surface to form holes, wherein the holes are communicated to the second surface of the substrate layer; forming a metallization layer in a chemical mode, wherein the metallization layer covers the surface of the hole and the surface of the first photoresist layer positioned on one side of the first surface; forming a copper-clad layer through electroplating, wherein the copper-clad layer covers the surface of the hole and extends to the surface of the first photoresist layer positioned on one side of the first surface; removing a portion of the copper-clad layer exceeding the height of the copper layer by chemical etching; removing the two first photoresist layers; covering the two second photoresist layers on the surfaces of the two copper layers, and exposing and developing the two second photoresist layers to form a circuit pattern structure; performing an etching process to remove the surface of each copper layer uncovered by each second photoresist layer; and removing the two second photoresist layers.
In some embodiments, at least one hole extends through the substrate.
In some embodiments, the photoresist layer is a dry film photoresist.
In some embodiments, the holes are formed using laser drilling.
In some embodiments, the metallization layer is formed through a neutral or weakly acidic metallization system.
In some embodiments, the two first photoresist layers include a thin film, and the thin film is removed after blanket exposing the two first photoresist layers.
In some embodiments, the two first photoresist layers include a thin film, and the thin film is removed after drilling a hole in the surface of the first photoresist layer on one side of the first surface.
In some embodiments, the hole has a recess surrounding the opening of the hole.
In some embodiments, the copper-clad layer extends along the recess to cover an exposed surface of the copper layer on one side of the first surface.
In addition, according to one embodiment, a circuit board circuit structure with a via hole is provided, which is manufactured by the manufacturing method of the above embodiments.
In summary, the metallization and electroplating range is increased by the first photoresist layer, and when the electroplating process is performed, the copper-clad layer extends to the surface of the first photoresist layer, and then the copper-clad layer exceeding the height range of the first photoresist layer is removed and the first photoresist layer is removed, so that the heights of the electroplated layer and the copper layer are approximately consistent, and the problem that the electroplated layer overflows the hole and forms the protruding part around the hole when the hole is electroplated is avoided.
Drawings
FIG. 1 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment (one);
FIG. 2 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment (II);
FIG. 2a is a schematic diagram of a circuit board with via holes according to an embodiment;
FIG. 3 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment;
FIG. 4 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment;
FIG. 5 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment;
FIG. 6 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment;
FIG. 7 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment;
FIG. 7a is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to an embodiment;
fig. 7b is a schematic structural diagram (ninth) of a circuit board circuit structure manufacturing method with a via hole according to an embodiment;
FIG. 8 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to another embodiment (I);
FIG. 9 is a schematic diagram of a circuit board circuit structure manufacturing method with via holes according to another embodiment (II);
fig. 10 is a schematic structural diagram (a) of a circuit board circuit structure manufacturing method with a via hole according to another embodiment;
fig. 10a is a schematic structural diagram (two) of a circuit board circuit structure manufacturing method with a via hole according to another embodiment;
fig. 11 is a schematic structural diagram (iii) of a circuit board circuit structure manufacturing method with a via hole according to another embodiment;
FIG. 12 is a flowchart of a method for fabricating a circuit structure of a circuit board with a via hole according to an embodiment (I);
FIG. 12a is a flowchart of a method for fabricating a circuit structure of a circuit board with a via hole according to an embodiment (II);
fig. 12b is a flowchart of a circuit board circuit structure manufacturing method with a via hole according to an embodiment (iii).
[ symbolic description ]
100 circuit board line structure
10 substrate
11 substrate layer
111 first surface
112 second surface
12 copper layer
12a copper layer
12b copper layer
13 first photoresist layer
13a first photoresist layer
13b first photoresist layer
131 polyethylene terephthalate film
14 metallization layer
15 copper-clad layer
16 second photoresist layer
161 line pattern structure
20 holes
201 concave portion
21 pore wall
22 bottom of hole
30 holes
31 pore wall
Step S10 providing a substrate
Step S11, covering the surfaces of the two first photoresist layers on the two copper layers, and making each first photoresist layer have resistance to chemical conversion by overall exposure
Step S11' removing polyethylene terephthalate film
Step S12, drilling holes from the surface of the first photoresist layer at one side of the first surface
Step S12a of drilling a hole from the polyethylene terephthalate film on the surface of the first photoresist layer on one side of the first surface
Step S12a' removing polyethylene terephthalate film
Step S13, forming a metallization layer by chemical means
Step S14, forming a copper-clad layer by electroplating
Step S15 of removing the copper-clad layer partially exceeding the height of the copper layer on the side of the first surface by chemical etching
Step S16, removing the two first photoresist layers
Step S17, covering the surfaces of the two copper layers with two second photoresist layers, exposing and developing to form a circuit pattern structure
Step S18, performing an etching process to remove the surface of each copper layer not covered by each second photoresist layer
Step S19, removing the two second photoresist layers
Detailed Description
Referring to fig. 1 to fig. 7b and fig. 12, fig. 1 to fig. 7b are schematic structural diagrams (a) to (nine) of a circuit board circuit structure manufacturing method with a via hole according to an embodiment of the invention, and fig. 12 is a flowchart (a) of a circuit board circuit structure manufacturing method with a via hole according to an embodiment of the invention. As shown in fig. 1 and 12, the method for manufacturing the circuit board circuit structure 100 with via holes of the present embodiment includes providing a substrate 10 (step S10), wherein the substrate 10 includes a substrate layer 11 and two copper layers 12, the substrate layer 11 has a first surface 111 and a second surface 112 opposite to each other, and the two copper layers 12 are respectively formed on the first surface 111 and the second surface 112 of the substrate layer 11. That is, the first surface 111 and the second surface 112 of the substrate layer 11 can be used to manufacture the circuit board circuit structures 100 with the same or different specifications, or only a single side surface can be used to manufacture the circuit board circuit structures 100. In this embodiment, the circuit board circuit structure 100 is manufactured by using a single side surface as an example, but not limited thereto.
As shown in fig. 2 and 12, two first photoresist layers 13 are covered on the surfaces of the two copper layers 12, and each first photoresist layer 13 is made resistant by blanket exposure (step S11); the first photoresist layer 13 is covered and is subjected to blanket exposure by using a conventional process, such as a circuit board photolithography process, by attaching a dry film photoresist or by applying a wet film photoresist. In this embodiment, taking dry film photoresist as an example, the photoresist is formed into a resist state by blanket exposure.
As shown in fig. 3 and 12, for convenience of description, the first photoresist layer on the first surface 111 side is illustrated as a first photoresist layer 13a, and the first photoresist layer on the second surface 112 side is illustrated as a first photoresist layer 13b. While the copper layer on the first surface 111 side is illustrated by copper layer 12a and the copper layer on the second surface 112 side is illustrated by copper layer 12b. Holes 20 are formed by drilling holes 20 from the surface of the first photoresist layer 13a on one side of the first surface 111 (step S12), and the holes 20 are connected to the second surface 112 of the substrate layer 11. In this embodiment, the holes 20 are formed by means of laser drilling. Here, two holes 20 are taken as an example, but not limited thereto. The via 20 sequentially passes through the first photoresist layer 13a, the copper layer 12a and the substrate layer 11 from the first photoresist layer 13a on one side of the first surface 111 to the copper layer 12b on one side of the second surface 112, and forms a via. The hole 20 includes a hole wall 21 and a hole bottom 22, wherein the hole wall 21 includes a first photoresist layer 13a, a copper layer 12a and a side surface of the substrate layer 11 exposed by drilling. The hole bottom 22 includes a surface of the copper layer 12b bonded to the second surface 112.
As shown in fig. 4 and 12, the metallization layer 14 is formed chemically (step S13), and the metallization layer 14 covers the surface of the hole 20 and the surfaces of the two first photoresist layers 13. In this embodiment, the photoresist layer is formed by using a dry film photoresist, and a conventional dry film photoresist such as a contact alkaline metallization system will cause the damage or even the falling off of the dry film photoresist structure, so that in this embodiment, the metallization layer 14 is formed by a neutral or slightly acidic metallization system. In this embodiment, a chemically neutral or weakly acidic metallization system is formed and covers the surface of the hole 20 and the surfaces of the two first photoresist layers 13. That is, the metallization layer 14 covers the surface of the first photoresist layer 13a on one side of the first surface 111 and the surface of the first photoresist layer 13b on one side of the second surface 112. Generally, the coverage of the metallization layer 14 does not include portions of the metal material, such as the side surfaces of the copper layer 12a exposed by the drill holes and the surface of the copper layer 12b exposed by the drill holes.
As shown in fig. 5 and 12, after forming the metallization layer 14, a copper-clad layer 15 is formed by electroplating (step S14), and the copper-clad layer 15 covers the surface of the hole 20 and the surface of the first photoresist layer 13a extending to the side of the first surface 111. In this embodiment, the surface of the hole 20, i.e., the side surfaces of the first photoresist layer 13a, the copper layer 12a and the substrate layer 11 exposed by drilling, is formed and covered by electroplating. In addition, in this embodiment, because of the copper layer 12b on the side of the second surface 112, the copper-clad layer 15 is extended to the surface of the first photoresist layer 13a on the side of the first surface 111.
As shown in fig. 6 and 12, after the plating is completed, the copper-clad layer 15 is removed by chemical etching to a level exceeding the level of the copper layer 12a on the first surface 111 side (step S15). For example, in this embodiment, in order to make the heights of the copper-clad layer 15 and the copper layer 12a substantially level, the copper-clad layer 15 is made to have a height higher than the copper layer 12a and lower than the first photoresist layer 13a by removing the copper-clad layer 15 partially beyond the copper layer 12a located on one side of the first surface 111 through chemical etching. As shown in fig. 7 and 12, after the chemical etching is completed, the two first photoresist layers 13 are removed (step S16), and the patterning of the subsequent circuits is continued. As shown in fig. 7a, 7b and 12, the two second photoresist layers 16 are covered on the surfaces of the two copper layers 12, and the two second photoresist layers 16 are exposed and developed to form a circuit pattern structure 161 (step S17). An etching process is performed to remove the surface of each copper layer 12 not covered by each second photoresist layer 16 (step S18). Then, the two second photoresist layers 16 are removed (step S19), thereby completing the circuit board circuit structure 100.
Specifically, the metallization and electroplating range is increased by the two first photoresist layers 13, and when electroplating, the copper-clad layer 15 extends to the surface of the first photoresist layer 13a, then the copper-clad layer 15 exceeding the height range of the first photoresist layer 13a is removed together with the two first photoresist layers 13, so that the heights of the copper-clad layer 15 and the copper layer 12a are approximately consistent, and the problems that the electroplated layer overflows the holes and the convex parts are formed around the holes during electroplating are avoided.
In addition, please refer to fig. 2a, 12a and 12b. Fig. 2a is a schematic film diagram of a circuit structure of a circuit board with a via hole according to an embodiment. Fig. 12a is a flowchart (second) of a circuit board circuit structure manufacturing method with a via hole according to an embodiment. Fig. 12b is a flowchart of a circuit board circuit structure manufacturing method with a via hole according to an embodiment (iii). Generally, an optical grade polyethylene terephthalate (Polyethylene terephthalate, PET) film is present on the surface of the dry film to protect the dry film from air exposure and reaction, and the PET film is removed before development in a typical process. As shown in fig. 12a, in the present embodiment, the substrate 10 is subjected to the blanket exposure without developing, so that the substrate 10 is covered on the surfaces of the two copper layers 12 with the two first photoresist layers 13, and after each first photoresist layer 13 is made resistant by the blanket exposure (step S11), the polyethylene terephthalate film 131 is removed (step S11'), and then the surface of the first photoresist layer 13a located at one side of the first surface 111 is drilled (step S12), but not limited thereto. In another embodiment, as shown in fig. 12b, the substrate 10 is formed by covering the surfaces of the two copper layers 12 with two first photoresist layers 13, performing a blanket exposure to make each of the first photoresist layers 13 resistant (step S11), then drilling holes from the polyethylene terephthalate film 131 on the surface of the first photoresist layer 13a located on one side of the first surface 111 (step S12 a), and then removing the polyethylene terephthalate film 131 (step S12 a'). In still another embodiment, a wet film resist is taken as an example, and the wet film resist does not require an action of removing the PET film because the PET film is not present.
In addition, in the present embodiment, the circuit board wiring structure 100 is applicable to, for example, a double-sided board or a multi-layer board, and is herein exemplified by a double-sided board made of one substrate layer 11 and two copper layers 12. Specifically, the embodiment uses a neutral or weak acidic metallization system to perform metallization, for example, neutral or weak acidic metallization, and the bottom layer of the substrate needs to be fully conductive, however, the multilayer board is manufactured by stacking layers. When the outer board of the multi-layer board is manufactured, the bottom layer of the inner board cannot be fully conductive, so the circuit board line structure 100 of the present embodiment is suitable for the inner board of the double-sided board or the multi-layer board. In the present embodiment, the base material layer 11 may be any pure metal material or composite metal material.
Please refer to fig. 8. Fig. 8 is a schematic structural diagram (one) of a circuit board circuit structure manufacturing method with a via hole according to another embodiment. In another embodiment, the hole 20 has a recess 201, the recess 201 surrounding the opening of the hole 20. For example, during the laser processing, the first photoresist layer 13a may shrink due to the thermal effect of the laser processing, or the first photoresist layer 13a may be intentionally larger than the hole 20, such that a step structure is formed between the copper layer 12a and the first photoresist layer 13 a. Please refer to fig. 9. Fig. 9 is a schematic diagram of a circuit board circuit structure manufacturing method with a via hole according to another embodiment (ii). After forming the metallization layer 14, a copper-clad layer 15 is formed by electroplating (step S14), and the copper-clad layer 15 covers the surface of the hole 20 and the surface of the first photoresist layer 13a extending to the side of the first surface 111. The copper-clad layer 15 covers the surfaces of the hole 20, i.e., the side surfaces of the first photoresist layer 13a, the copper layer 12a and the base material layer 11 exposed by drilling, and also covers the surface of the copper layer 12a exposed by the laser processing of the first photoresist layer 13 a. After the electroplating is completed, the copper-clad layer 15 exceeding the copper layer 12a on one side of the first surface 111 is removed by chemical etching, so that the height of the copper-clad layer 15 is higher than the copper layer 12a and lower than the first photoresist layer 13a (step S15). As shown in fig. 9, the ear portion of the copper-clad layer 15 is formed around the hole 20, so that the contact area between the copper-clad layer 15 and the copper layer 12a is increased, and the reliability is enhanced.
Please refer to fig. 10, 10a and 11. Fig. 10 is a schematic diagram (one) of a circuit board circuit structure manufacturing method with a via hole according to another embodiment. Fig. 10a is a schematic diagram of a circuit board circuit structure manufacturing method with a via hole according to another embodiment (ii). Fig. 11 is a schematic structural diagram (iii) of a circuit board circuit structure manufacturing method with a via hole according to another embodiment. In yet another embodiment, at least one hole 30 is formed through the substrate 10. Portions that are the same as those in the above embodiments will not be described in detail, and only portions that are different will be described. As shown in fig. 10, the hole 30 is formed by laser drilling, and the hole 30 sequentially passes through the first photoresist layer 13a, the copper layer 12a, the base material layer 11, the copper layer 12b, and the first photoresist layer 13b from the first photoresist layer 13a on the side of the first surface 111 to the first photoresist layer 13b on the side of the second surface 112. The hole 30 includes a hole wall 31, and the hole wall 31 includes a first photoresist layer 13a, a copper layer 12a, a base material layer 11, a copper layer 12b and side surfaces of the first photoresist layer 13b exposed by drilling. The metallization layer 14 covers the surface of the hole 30, the surface of the first photoresist layer 13a located at one side of the first surface 111, and the surface of the first photoresist layer 13b located at one side of the second surface 112. Generally, the coverage of the metallization layer 14 does not include portions of the metal material, such as the side surfaces of the copper layer 12a exposed by the drill holes and the side surfaces of the copper layer 12b exposed by the drill holes. As shown in fig. 10a, during the electroplating stage, the copper-clad layer 15 covers the surface of the hole 30 and the surface of the first photoresist layer 13a extending to the side of the first surface 111 and the surface of the first photoresist layer 13b extending to the side of the second surface 112. As shown in fig. 11, the copper-clad layer 15 partially exceeding the height of the copper layer 12a on the side of the first surface 111 and the copper-clad layer 15 partially exceeding the height of the copper layer 12b on the side of the second surface 112 are then removed by chemical etching. After removing the first photoresist layer 13, the substrate 10 having the through holes as shown in fig. 11 is completed.
In summary, according to the method for fabricating a circuit board circuit structure with via holes of an embodiment, the metallization and electroplating range is increased by the two first photoresist layers 13, and when electroplating, the copper-clad layer 15 extends to the surface of the first photoresist layer 13a, and then the copper-clad layer 15 exceeding the height range of the first photoresist layer 13a is removed and the two first photoresist layers 13 are removed, so that the heights of the copper-clad layer 15 and the copper layer 12a are substantially the same, and the overflow of the electroplating layer and the formation of protrusions around the holes during the electroplating of the holes are avoided, thereby affecting the fabrication of the circuit board circuit structure 100. The circuit board circuit structure 100 with via hole, which is completed by the method of the embodiment, comprises a substrate layer 11, two copper layers 12 and a copper-clad layer 15, wherein the copper-clad layer 15 covers the hole 20, and the periphery of the opening of the hole 20 is provided with a relatively flat copper-clad layer 15, so that the whole surface of the substrate 10 is relatively flat. In addition, the circuit board line structure 100 with a via hole, which is completed by the method according to another embodiment of the present disclosure, includes the substrate layer 11, the two copper layers 12 and the copper-clad layer 15, the copper-clad layer 15 covers the hole 20, the copper-clad layer 15 extends to the opening of the hole 20, and the ear portion is formed around the opening of the hole 20, the recess 201 of the hole 20 increases the contact area between the copper-clad layer 15 and the copper layer 12a, so as to enhance the reliability performance.
Although the present disclosure has been described with reference to the preferred embodiments, it should be understood that the scope of the disclosure is not limited thereto, but rather by the appended claims.
Claims (10)
1. A method for manufacturing a circuit board line structure with a via hole is characterized by comprising the following steps:
providing a substrate, wherein the substrate comprises a substrate layer and two copper layers, the substrate layer is provided with a first surface and a second surface which are opposite, and each copper layer is formed on the first surface and the second surface of the substrate layer;
covering two first photoresist layers on the surfaces of the two copper layers, and enabling each first photoresist layer to have resistance through comprehensive exposure;
drilling from the surface of the first photoresist layer at one side of the first surface to form at least one hole, wherein the at least one hole is communicated with the second surface of the substrate layer;
forming a metallization layer through a chemical mode, wherein the metallization layer covers the surface of the at least one hole and the surfaces of the two first photoresist layers;
forming a copper-clad layer through electroplating, wherein the copper-clad layer covers the surface of the at least one hole and extends to the surface of the first photoresist layer positioned on one side of the first surface;
removing the copper-clad layer partially exceeding the height of the copper layer by chemical etching;
removing the two first photoresist layers;
covering the two second photoresist layers on the surfaces of the two copper layers, and exposing and developing the two second photoresist layers to form a circuit pattern structure;
performing an etching process to remove the surface of each copper layer uncovered by each second photoresist layer; and
removing the two second photoresist layers.
2. The method of claim 1, wherein the at least one hole penetrates the substrate.
3. The method of claim 1, wherein the first photoresist layer and the second photoresist layer are dry film photoresist.
4. The method of claim 1, wherein the at least one hole is formed by laser drilling.
5. The method of claim 1, wherein the metallization layer is formed by a neutral or weakly acidic metallization system.
6. The method of claim 3, wherein the two first photoresist layers comprise a film, and the film is removed after the two first photoresist layers are blanket exposed.
7. The method of claim 3, wherein the two first photoresist layers comprise a film, and the film is removed after the surface of the first photoresist layer on one side of the first surface is drilled.
8. The method of claim 1, wherein the at least one hole has a recess surrounding a periphery of the opening of the at least one hole.
9. The method of claim 8, wherein the copper-clad layer extends along the recess to cover an exposed surface of the copper layer on one side of the first surface direction.
10. A circuit board wiring structure manufactured by the method for manufacturing a circuit board wiring structure with a via hole according to any one of claims 1 to 9.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110193632.4A CN114980567B (en) | 2021-02-20 | 2021-02-20 | Manufacturing method of circuit board line structure with through holes and manufactured circuit board line structure with through holes |
| TW110106816A TWI747751B (en) | 2021-02-20 | 2021-02-25 | Manufacturing circuit board circuit structure with through hole and circuit board circuit structure with through hole manufactured thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110193632.4A CN114980567B (en) | 2021-02-20 | 2021-02-20 | Manufacturing method of circuit board line structure with through holes and manufactured circuit board line structure with through holes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114980567A CN114980567A (en) | 2022-08-30 |
| CN114980567B true CN114980567B (en) | 2024-03-19 |
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| TWI808706B (en) * | 2022-03-31 | 2023-07-11 | 嘉聯益科技股份有限公司 | Manufacturing method of circuit board structure and circuit board structure manufactured thereof |
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| TW201817297A (en) * | 2016-10-25 | 2018-05-01 | 萬億股份有限公司 | Method for forming wire and filling via of PCB |
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| TW202007725A (en) * | 2018-07-23 | 2020-02-16 | 帝利科技有限公司 | An innovative single liquuid type conductive composition and its preparation method and its some application technology in printed circuit board. |
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- 2021-02-25 TW TW110106816A patent/TWI747751B/en active
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| US5252195A (en) * | 1990-08-20 | 1993-10-12 | Mitsubishi Rayon Company Ltd. | Process for producing a printed wiring board |
| US6039889A (en) * | 1999-01-12 | 2000-03-21 | Fujitsu Limited | Process flows for formation of fine structure layer pairs on flexible films |
| TW200708216A (en) * | 2005-08-04 | 2007-02-16 | Gold Circuit Electronics Ltd | Manufacturing method for hole ring-free circuit of circuit board |
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| CN104105361A (en) * | 2014-05-07 | 2014-10-15 | 深圳市环基实业有限公司 | Method for selective plating of conductive hole of circuit board |
| TW201817297A (en) * | 2016-10-25 | 2018-05-01 | 萬億股份有限公司 | Method for forming wire and filling via of PCB |
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| Publication number | Publication date |
|---|---|
| CN114980567A (en) | 2022-08-30 |
| TWI747751B (en) | 2021-11-21 |
| TW202234962A (en) | 2022-09-01 |
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