TWI363586B - Method for fabricating fine line on printing circuit board - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a circuit board, and more particularly to a method of manufacturing a circuit board fine line. [Prior Art] According to the rapid development of the information industry, the information technology has been moving towards consumer electronics products after the 9th century (Computer,

The integration goal of Communication, Consumer Electronics, 3C), personalized electronic products continue to evolve, and the multimedia information quality communication tools that emphasize portability and convenience have driven the semiconductor industry, especially the semiconductor package type. These market demands have directly contributed to the digitalization of information electronics, which has led to the development of semiconductor packages and the development and development of Multipiii. The above evolution for the printed circuit board (PCB) itself represents the rapid improvement of the line and the speed of the board space, so the printed circuit board of high density design ( High Density Interconnection (HDI) process technology is produced in response to the demand for high density: the following four points: 1. Compressed circuit board line size; 2 reduced aperture and blind hole (Bland Via), or buried hole (BudedVia); 3 Reduce the line tolerance; 4 · Reduce the thickness of the dielectric layer. For example, the process profile of the conventional circuit board manufacturing method of the conventional circuit board is described with reference to the first A to F diagrams. First, a certain board is provided. The top surface of the substrate 100 forms a first conductive. a layer 110, a bottom surface of the substrate 100 is formed with a second conductive layer 1 2 〇, and then a first conductive layer 1 1 a is formed by exposure and development (Lithography) to form a patterned first conductive layer 1 1 0 a The patterned first conductive layer 5 1363586 1 〇a has a first conductive layer opening 112, and a laser hole is drilled at the first conductive layer opening 112. ◦ forming a blind hole 1 〇 2 ' and then removing the glue (Desmear) in the blind hole 1 〇 2 and then forming a copper layer 130, the chemical layer 13 3 〇 covering the blind hole 1 〇 2. The patterned first conductive layer 1 1 〇 "^ ° ... · 丄υ υ υ, then exposed and developed on the surface of the m copper layer 130 to form a plurality of #霞

The photoresist unit 14 0 is used to limit the electroplating zone to a semi-additive process (Sep Additive Process, SAp), a conductive blind via 1 52, and a plurality of fine line workers 54. Electric (4) In addition, the conventional method of manufacturing the circuit board (Sustractive Process, SP), using (4) α, and using the subtraction square to make a plurality of fine lines. The first-order blind holes are accurate. The above-mentioned conventional circuit board thin line method or subtractive method forms a second-order blind hole. The method uses a semi-additive to achieve the requirements of the thin circuit of the circuit board. The purpose of making these fine lines is impossible.

The above-mentioned lack of experience in this aspect, the acquisition, and improvement can be improved, and based on the application of multi-disciplinary theory, the present invention is proposed and studied. The present invention is directed to a manufacturing method for the purpose of producing a fine line. A circuit board fine line according to the above object of the present invention, '. The method for manufacturing a fine circuit includes a first conductive layer on the top surface of the lower circuit board, and a substrate provided thereon. The bottom surface of the base substrate has a second 6 1363586 layer. The conductive layer is provided with at least an opening; laser drilling is performed at the opening of the second electrical layer and penetrates the substrate to form at least one blind via; removing the patterned first conductive layer, and patterning the first And forming a copper layer on the surface of the port and the blind hole; forming a surface on the surface of the copper layer Forming a photoresist layer; performing electroplating to form a patterned third conductive 曰' for forming a plurality of fine lines; and filamentting the light on the substrate

Block.

The present invention provides another method for manufacturing a thin circuit of a circuit board, comprising: a step of providing a substrate, the top surface of the substrate has a first conductive second, and a bottom surface of the substrate has a second conductive layer; The conductive layer has at least an opening; the laser is drilled at the opening of the at least first conductive layer and penetrates the substrate to form at least one blind via; to = the patterned first conductive layer, and Graphically patterning the second conductive layer to form a conductive layer under the blind hole; forming a copper layer, ', the copper layer covers the patterned substrate and the blind hole; forming a photoresist Layered on the surface of the substrate, wherein the photoresist layer on the top surface of the substrate is patterned to form a patterned third conductive layer on the substrate, the surface, and the photoresist layer on the substrate. The invention has the following beneficial effects: a) utilizing the patterned third conductive layer to form a second conductive layer of the pattern 'The patterned third conductive layer can make a conductive blind hole, a thin line' and a conductive pad . (2) Forming the copper layer by an exposure and development process to form the photoresist layer to protect the copper layer on the bottom surface of the patterned substrate, thereby forming a thin line 1363586 and a blind hole. To make the description of the present invention more detailed and complete, many different embodiments or examples are provided, and the drawings are described and used to understand the application in various embodiments. [Embodiment] [First Embodiment]

Included = Embodiment provides a method for manufacturing a circuit board fine line. Referring to the second ASI, the substrate 3 is provided, and the substrate 3 has a first conductive layer 3 1 〇, and the substrate 300 has a bottom surface and a The second conductive layer 3 2 〇. ,

In the following invention, the steps of forming the first conductive layer 3 1 〇 and the second conductive layer 3 2 参照 with reference to the following may be performed by sputtering, evaporation, plating (£) curry. Executed by ia and chemical deposition (CVD), wherein the first conductive layer 3 and the second conductive layer 3 2 0 include tin (sn), copper (〇!), chromium (Cr), = ( One of Pd), nickel (Ni) and its alloy. In this embodiment, the step of forming the first two 310 H electric layer 320 is performed by the electric money, the first conductive layer 310 and the second conductive layer 32〇. Referring to FIG. 2B, the patterned first conductive layer 3 1 is used to form a patterned first conductive layer 3 丄〇 a, and the patterned first conductive layer 3 1 〇 a has a The first conductive layer opening 3 1 2 . In the embodiment, the step of patterning the first conductive layer 310 is performed according to a system for exposure and development, etching, and drying. And forming a first conductive layer opening 3 1 2 . 8 1363586 凊 Referring to the second C diagram 'laser drilling at the first conductive layer opening 3 1 2 and penetrating the substrate 30 〇, thereby forming a blind hole 3 〇 2, and a patterned substrate 30 〇 a. In the present embodiment, the 'laser system is used for carbon dioxide laser (C02 Laser) to drill holes in the first conductive layer opening 3 丄 2 and penetrate the substrate 3 〇0, according to the thickness of the first conductive layer opening 3 1 2 and the thickness of the substrate 3 ,, the parameters of the carbon dioxide laser can be adjusted to obtain a blind hole 3 0 2 of an appropriate size.

Referring to FIG. 2D, the patterned first conductive layer 3 is removed, and the second conductive layer 32 is patterned to form a conductive pad 2 2°. In this embodiment, the pattern is removed. Before the step of the first conductive layer 3, a desmear (Smear Rem〇val, 曰 is also called

Desmear), using chemical etching to remove the residual residue (such as epoxy resin) after laser drilling used in the above steps, and then removing the patterned first conductive layer 3 i Q a Surname

After that, the step of patterning the second conductive layer 3 2 执行 is performed by an exposure development technique to form a conductive pad 32 2 below the blind via 3 〇 2 . Referring to FIG. 2E, a copper process is used to form a copper layer 30, which covers the patterned substrate 3 〇〇a : the surface of the pad 3 2 2 and the blind via 3 〇 2. Please refer to the second? Fig.:; The surface of the copper layer 3 3 Q forms a patterned photoresist layer, and the patterned monomer 340 is disposed on the photoresist unit 340 in clear reference to the second G and the second graph. The third conductive layer is 9 1363586 to form a patterned third conductive layer 3 50 a, and the partially patterned third conductive layer 3 5 0 a is overlaid on the copper layer 3 3 0 for forming a plurality of thin lines 3 5 4 are formed, and another portion of the patterned third conductive layer 3 5 a covers both the conductive germanium 3 2 2 and the copper layer 3 3 〇 ′ to form a further conductive pad 3 5 6 The remaining patterned third conductive layer 3 5 0 a covers the blind via 3 0 2 to form a conductive blind via 3 5 2 . Among them, the thin line 3 5 4 is by a semi-additive method (Semi

Additive Process, SAP) is placed on the copper layer 3 3 〇, thin line

The circuit 3 5 4 is separated from each other by the patterned photoresist unit 3 4 ,, and the conductive 塾 32 2 is electrically connected to the conductive blind hole 3 5 2 . Furthermore, another conductive pad 356 generates a step phenomenon by covering the conductive pad 32 2 , which can improve the collapse of the conventional conductive pad due to the opening at the bottom of the conductive blind hole 3 5 2 . . </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;

Referring to FIG. 3A, a substrate is provided, and the top surface of the Han substrate 500 has a first conductive layer 5 i J υ 有一 and a second conductive layer 520. In the present embodiment, the bottom mask of the earth 0 is formed by forming a first conductive chemical deposition, and the step of the first conductive screen θ is performed by the step of the conductive layer 520. Layer 5 2 0 is copper. The second conductive conductive layer 5 1 Q is used for a 'patterning first guide 1: 7 5 1 2. Please refer to the third map, graphical first Forming a patterned first conductive layer 5, the power layer 5 1 〇a has a first conductive layer

Claims (1)

1363586 _ _ ] November 2001] 6曰Revision and replacement page X. Patent application scope: 1. A method for manufacturing a circuit board fine circuit, comprising the following steps: providing a substrate, the top mask of the substrate has a first conductive layer The bottom surface of the substrate has a second conductive layer; the first conductive layer is patterned to have at least one opening; the bottom hole of the at least one first conductive layer is laser drilled and penetrates the substrate to form at least a blind hole; completely removing the patterned first conductive layer, and patterning the second conductive layer to form at least one conductive pad under the blind hole; forming a copper layer by a copper process, the copper layer covering Forming the substrate, the surface of the conductive pad, and the blind via; forming a patterned photoresist layer on the surface of the copper layer; performing electroplating to form a patterned third conductive layer for forming a plurality of thin lines And another conductive pad; and removing the photoresist layer on the substrate. 2. The method of manufacturing a thin circuit of a circuit board according to claim 1, wherein the step of forming the first conductive layer is by sputtering, evaporation, electroplating, and chemical deposition. (CVD) is performed by one of them. 3. The method of manufacturing a thin circuit of a circuit board according to claim 2, wherein the first conductive layer comprises tin (Sn), copper (Cu), chromium (Cr), palladium (Pd), nickel ( Ni) and one of its alloys. 4. The method of manufacturing a thin circuit of a circuit board according to claim 1, wherein the step of forming the second conductive layer is performed by one of sputtering, vapor deposition, electroplating, and chemical deposition. 14 1363586 *------------ --I · 夕 / b. If the patent application scope 4 manufacturing method, A, 斤, jin, the fine lines of the road board and its alloy: : "Electrical layer system includes tin, copper, chromium, exemption, ^ such as the patented scope of the project field manufacturing method, in which the servant indium and tantalum, the power of the thin line of the copper layer is carried out _ exposure copper The step of the layer further includes an exposure development process (Lith0graphy). The additive process of the thin circuit of the circuit board described in Item 1 of the 迕1, the SAPk system is set by the Feng (30) SAP method. The second layer of the blind hole is used to form at least one conductive blind hole, and the remaining one of the patterned first guide holes is used to form at least one conductive blind hole. The second circuit of the thin circuit of the circuit board described in the eighth aspect of the patent scope of the second application of the second aspect of the patent, wherein the patterned substrate is mutually connected, and the conductive pad is electrically connected to the at least one conductive blind hole.攸 "2:?: manufacturing method of fine circuit of road board" includes the following steps: ki, - substrate, the top surface of the substrate has - the bottom surface of the L-th substrate has a second conductive layer; s ° hai graphically the first - The conductive layer has at least one opening; the opening penetrates the substrate in the child-to-the first conductive layer, thereby forming at least one blind hole; and the field-drilling hole completely removes the patterned 箆-邋 厗 厗 conductive a layer, and patterning the second layer to form at least a conductive pad under the blind via; forming: a copper layer forming a copper layer, the copper layer covering the patterned substrate, the surface of the conductive pad, and The blind hole; - 15 Ϊ 363586 month i6 modified replacement page formation - the photoresist layer on the substrate and the conductive handle &amp;&amp; v, Zhan 'and the copper surface on the surface of the guide (four) = copper to the substrate The photoresist on the upper copper layer is a recessed portion, and the photoresist of the surface is overlaid on the surface of the copper layer to form a broken portion; the top surface of the copper layer of the concave portion is shaped:- Forming a third conductive layer on the substrate n for forming a plurality of fine lines; And the earthworm removes the photoresist layer on the side substrate. The circuit board described in the side of the road \ item thin line money, steam one:: r two; ^ step system - 1 2 'If the patent application scope of the road manufacturing method, 苴The circuit board of the middle and the jin, the fine wire of the circuit board, the alloy and the alloy of the alloy, including the tin, copper, chromium, and the road (4) 1 ◦ 之 :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: :: Execution of fine forging industrial mine 4 and chemical deposition. 1 4. As for the manufacturing method of the patent application scope, the thin circuit of the circuit board described in m中今 m H 3, recorded and alloyed 4^— (4) (4) Included in tin, copper, collateral, and 1 5 · If the manufacturing method of the patent application scope is the same, more than one of the thin circuit boards escaped from the blind hole is used to form the cover to the second third conductive layer. For example, the manufacturing method of the patent model m flute road, wherein the thin circuit board of the circuit board described in the section of the annual guide is electrically connected to the at least one electric conduction.) 6 1363586 _ ]00 years] Replacement page I_363586 Corrected replacement page on November 16, 100 Third F map