TW202225970A - Slot connectivity test device and test method thereof - Google Patents

Abstract

The present invention provides a slot connectivity test device and a test method thereof. The device includes a circuit board, a Retimer chip, a connection terminal and a loopback module; the connection terminal is used for being inserted into a slot of the motherboard to be tested; a signal sending terminal and a signal receiving terminal of the Retimer chip are respectively electrically connected to the connecting terminal, the signal receiving terminal receives the output signal sent by the motherboard to be tested, the signal sending terminal sends a test signal to the motherboard to be tested via the Retimer chip and the connecting terminal; the loopback module is used for the output signal is looped back received by the signal receiving terminal to the signal sending terminal, so that the signal sending terminal sends the test signal to the motherboardto be tested. According to the present invention, a signal received by the signal receiving terminal of the Retimer chip is looped back to the signal sending terminal of the Retimer chip through an external link or inside the chip, thereby realizing the connectivity test of the slot on the motherboard, and greatly reducing the production test cost of the motherboard.

Description

Slot connectivity test device and test method thereof

The present invention relates to the technical field of information security, in particular to a socket connectivity testing device and a testing method thereof.

There are many PCIe slots on the motherboard manufacturer's motherboard. For newly produced motherboards, the external device interconnect bus slot may be soldered when soldering. Carry out the connectivity test of the physical connection, and test the connectivity of the external device interconnection bus bar slot network to ensure the production quality of the motherboard.

At present, when testing the network connectivity of the motherboard, it is necessary to add some complex special test equipment to the motherboard, such as network cards, GPU cards, etc., which are inserted into the external equipment interconnection busbar slots for test verification. Due to the special test equipment The high price leads to high testing costs, and the entire testing process using special testing equipment is more complicated, time-consuming, and testing efficiency is low.

In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a socket connectivity test device and a test method thereof, which are used to solve the problem of testing the connectivity of the bus bar sockets used for the interconnection of external devices on the motherboard in the prior art. The problem of high test cost and low test efficiency during sex.

In order to achieve the above object and other related objects, the present invention provides a socket connectivity test device, the socket connectivity test device includes a circuit board, a Retimer chip, a connection end and a return module; the connection The terminal is installed on one side of the circuit board, and is used to insert the slot of the motherboard under test; the Retimer chip is installed on the circuit board, and the signal sending terminal and the signal receiving terminal of the Retimer chip are respectively connected with The connecting end is electrically connected, the signal receiving terminal receives the output signal sent by the motherboard to be tested, and the signal sending terminal sends a test signal to the motherboard to be tested via the Retimer chip and the connecting terminal; the return transmission The module is used to transmit the output signal received by the signal receiving terminal back to the signal transmitting terminal of the Retimer chip, so that the signal transmitting terminal can send the signal to the motherboard under test via the Retimer chip and the connecting terminal. Send a test signal.

In an embodiment of the present invention, the connecting end is a gold finger component.

In an embodiment of the present invention, the number of golden fingers included in the golden finger assembly matches the number of terminals of the socket of the motherboard to be tested.

In an embodiment of the present invention, the return module is a return circuit mounted on the circuit board and connected to the signal receiving terminal and the signal transmitting terminal of the Retimer chip, respectively.

In an embodiment of the present invention, the return transmission module includes a control board connected to the circuit board, and a signal receiving terminal and the signal transmitting terminal respectively connected to the Retimer chip mounted on the control board. connected return circuit.

In an embodiment of the present invention, the return circuit includes a return resistance module whose one end is connected to the signal receiving terminal of the Retimer chip and the other end is connected to the signal transmitting terminal of the Retimer chip.

In an embodiment of the present invention, the return module is located in the Retimer chip and transmits the output signal received by the signal receiving terminal back to the Retimer chip through a serializer/deserializer in the Retimer chip. The signal sending terminal of the Retimer chip.

In order to achieve the above object and other related objects, the present invention also provides a slot connectivity testing method, which is applied to a slot connectivity testing device; the slot connectivity testing device includes a circuit board , a Retimer chip, a connecting end and a return module, the Retimer chip has a signal receiving terminal and a signal transmitting terminal; the slot connectivity test method comprises the following steps: inserting the motherboard under test at the connecting end When the socket is installed, the output signal is received from the motherboard to be tested through the signal receiving terminal of the Retimer chip; based on the return module, the output signal received by the signal receiving terminal is sent back to the signal transmission of the Retimer chip terminal; the signal sending terminal sends a test signal to the motherboard to be tested via the Retimer chip and the connection terminal.

In an embodiment of the present invention, the connecting end is a gold finger component.

In an embodiment of the present invention, the number of golden fingers included in the golden finger assembly matches the number of terminals of the socket of the motherboard to be tested.

In an embodiment of the present invention, the return module is a return circuit mounted on the circuit board and connected to the signal receiving terminal and the signal transmitting terminal of the Retimer chip, respectively.

In an embodiment of the present invention, the return transmission module includes a control board connected to the circuit board, and a signal receiving terminal and the signal transmitting terminal respectively connected to the Retimer chip mounted on the control board. connected return circuit.

In an embodiment of the present invention, the return circuit includes a return resistance module whose one end is connected to the signal receiving terminal of the Retimer chip and the other end is connected to the signal transmitting terminal of the Retimer chip.

In an embodiment of the present invention, the return module is located in the Retimer chip and transmits the output signal received by the signal receiving terminal back to the Retimer chip through a serializer/deserializer in the Retimer chip. The signal sending terminal of the Retimer chip.

As shown above, a socket connectivity testing device and testing method of the present invention transmits the signal received by the signal receiving terminal of the low-cost Retimer chip to the signal sending terminal of the Retimer chip through an external link or inside the chip, The connectivity test of the socket on the motherboard can be realized without special test equipment, which greatly reduces the production test cost of the motherboard.

The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments may be combined with each other under the condition of no conflict.

It should be noted that the drawings provided in the following embodiments are only used to illustrate the basic concept of the present invention in a schematic way, so the drawings only show the components related to the present invention rather than the number, shape and number of components in actual implementation. For dimension drawing, the type, quantity and ratio of each element can be arbitrarily changed in actual implementation, and the layout of the element may also be more complicated.

The purpose of this embodiment is to provide a socket connectivity test device 100 and a test method thereof, which are used to solve the problems of high test cost and high test cost when testing the connectivity of busbar sockets used for interconnecting external devices on a motherboard in the prior art. problem of inefficiency.

The principle and implementation of the socket connectivity testing apparatus 100 and the testing method thereof in this embodiment will be described in detail below, so that those skilled in the art can understand the socket connectivity testing apparatus 100 and its testing of the present invention without creative work. method.

Example 1

As shown in FIG. 1 , the present embodiment provides a socket connectivity testing apparatus 100 . The socket connectivity testing apparatus 100 includes a circuit board 110 , a retimer chip 130 , a connection end 120 and a return module 140 .

In this embodiment, the connection end 120 is installed on one side of the circuit board 110 and is used for being inserted into the slot 210 of the motherboard under test.

Specifically, in this embodiment, the connecting end 120 is a gold finger assembly.

The number of gold fingers included in the gold finger assembly matches the number of terminals of the slot 210 of the motherboard to be tested, that is, the number of conductive terminals of the slot 210 of the motherboard to be tested is determined. The number of gold fingers of the connection end 120 in the socket connectivity testing device 100 .

In this embodiment, the slot 210 of the motherboard to be tested is preferably but not limited to a PCIe slot.

Each gold finger of the gold finger assembly is defined according to the output signal of the slot 210 of the motherboard to be tested. For example, the output signals output by the motherboard to be tested through the slot include PCIe signals, reclocking signals and I2C signals, and the corresponding golden finger component defines the corresponding golden finger to receive PCIe signals from the slot 210 of the motherboard to be tested and reclocking signals and I2C signals.

In this embodiment, the Retimer chip 130 is mounted on the circuit board 110 , the signal transmitting terminal and the signal receiving terminal of the Retimer chip 130 are respectively electrically connected to the connecting terminal 120 , and the signal receiving terminal receives The output signal sent by the host board to be tested, the signal sending terminal sends a test signal to the host board to be tested via the Retimer chip and the connection terminal.

Among them, the Retimer chip 130 uses signal conditioning technology to improve signal integrity and increase the effective transmission distance of high-speed signals. Retimer chip 130 adopts mainstream packaging in the industry, and its key performance indicators such as power consumption and transmission delay lead other test chips, and Retimer chip 130 supports applications such as SRIS (separate reference clock with independent spread spectrum clock architecture) and Retimer cascade. The Retimer chip 130 can communicate with a PCIe slot, for example, the Retimer chip 130 conforms to the PCIe 4.0 specification, the PCIe 5.0 specification, or the future PCIe standard specification. Compared with the special test equipment network card, GPU card, etc. in the prior art, the Retimer chip 130 has the advantage of low price. Therefore, by performing the connectivity test on the socket 210 of the motherboard to be tested by the Retimer chip 130 of this embodiment, the production and testing cost of the motherboard can be greatly reduced.

When the golden finger assembly is inserted into the slot 210 of the motherboard to be tested, output signals such as PCIe signals, reclocking signals and I2C signals are received from the slot 210 of the motherboard to be tested, and then transmitted to the Retimer chip 130 in. The signal receiving terminal of the Retimer chip 130 receives the output signal sent by the motherboard to be tested, and after passing through the return module 140, the signal transmitting terminal of the Retimer chip 130 sends a test signal to the motherboard to be tested. When the central processing unit (CPU) of the motherboard to be tested detects the test signal sent by the Retimer chip 130, the connectivity of the socket of the motherboard to be tested is realized.

In this embodiment, the return module 140 is used to return the output signal received by the signal receiving terminal to the signal transmitting terminal of the Retimer chip, so that the signal transmitting terminal passes through the Retimer chip 130 . And the connection terminal 120 sends a test signal to the motherboard to be tested.

In this embodiment, preferably, the return module 140 loops back the signal of the Retimer chip 130 through an external link.

FIG. 1 is a schematic diagram of a structure of the return module 140 looping back the signal of the Retimer chip 130 through an external link. Specifically, in this embodiment, as shown in FIG. 1 , the return module 140 is disposed outside the circuit board 110 , and includes a control board 141 connected to the circuit board 110 and a control board 141 installed on the control board 110 . The return circuits 142 on the board 141 are respectively connected to the signal receiving terminal and the signal transmitting terminal of the Retimer chip 130 . The control board 141 is used to carry the return circuit 142 , and controls and implements the signal connection between the return circuit 142 and the circuit board 110 .

That is, the return module 140 is located outside the Retimer chip 130 and is independent of the control board 141 and the return circuit 142 of the Retimer chip 130 to return the output signal received by the signal receiving terminal to the The signal sending terminal of the Retimer chip, so that the signal sending terminal sends a test signal to the motherboard to be tested via the Retimer chip and the connecting end. When the central processing unit 220 (CPU) of the motherboard to be tested detects the test signal sent by the Retimer chip 130, the connectivity of the socket of the motherboard to be tested is realized.

In this embodiment, the return circuit includes, for example, a return resistance module. One end of the return resistance module is connected to the signal receiving terminal of the Retimer chip 130 , and the other end is connected to the Retimer chip 130 . connected to the signal sending terminal. Wherein, the return resistance module includes one or more resistances.

FIG. 2 is a schematic diagram showing another structure of the return module 140 looping back the signal of the Retimer chip 130 through an external link. As shown in FIG. 2 , in this embodiment, the return transmission module 140 is installed on the circuit board 110 , and the return transmission module 140 includes a return transmission circuit installed on the circuit board 110 . , the return circuit is respectively connected with the signal receiving terminal and the signal transmitting terminal of the Retimer chip 130 , and the return circuit realizes the signal connection with the Retimer chip 130 through the circuit board 110 .

In this embodiment, the return circuit includes, for example, a return resistance module. One end of the return resistance module is connected to the signal receiving terminal of the Retimer chip 130 , and the other end is connected to the Retimer chip 130 . connected to the signal sending terminal. Wherein, the return resistance module includes one or more resistances.

That is, in this embodiment, the return transmission module 140 and the retimer chip 130 are integrated on a circuit board 110 , and the return transmission module 140 is located outside the retimer chip 130 and is independent of the retimer chip 130 , the return module 140 transmits the output signal received by the signal receiving terminal back to the signal transmitting terminal of the Retimer chip, so that the signal transmitting terminal passes through the Retimer chip 130 and the connecting terminal 120 to the signal transmission terminal to be tested. The motherboard sends a test signal. When the central processing unit (CPU) of the motherboard to be tested detects the test signal sent by the Retimer chip 130, the connectivity of the socket of the motherboard to be tested is realized.

In addition, the return module 140 can also loop back the signal of the Retimer chip 130 through the internal link of the Retimer chip 130 .

FIG. 3 is a schematic diagram showing a structure of the return module 140 looping back the signal of the Retimer chip 130 through the internal link of the Retimer chip 130 . As shown in FIG. 3 , the return module 140 is located in the Retimer chip 130 and receives the signal from the signal receiving terminal through a serializer/deserializer (SERializer/DESerializer) in the Retimer chip 130 . The output signal is sent back to the signal transmitting terminal of the Retimer chip.

Among them, the SERDES multi-channel low-speed parallel signals are converted into high-speed serial signals at the transmitting end, and then pass through the transmission medium (optical cable or copper wire), and finally the high-speed serial signals are re-converted into low-speed parallel signals at the receiving end.

The Retimer chip 130 has a serializer/deserializer inside, and the return module 140 of the present embodiment uses the serializer/deserializer inside the Retimer chip to convert signals to receive signals from the Retimer chip 130 The output signal received by the terminal is processed by the serializer/deserializer inside the Retimer chip, and then sent back to the signal transmission terminal of the Retimer chip, so that the signal transmission terminal is sent to the motherboard to be tested through the connection terminal 120. Send a test signal. When the central processing unit 220 (CPU) of the motherboard to be tested detects the test signal sent by the Retimer chip 130, the connectivity of the socket of the motherboard to be tested is realized.

In order for those skilled in the art to further understand the socket connectivity testing apparatus 100 of the present embodiment, the following describes the use process of the socket connectivity testing apparatus 100 of the present embodiment.

As shown in FIG. 4 , the motherboard 200 has multiple slots: slot 1...slot N; the slot connectivity testing device 100 of this embodiment tests the connectivity of one slot at a time. For simultaneous testing, one slot connectivity testing device 100 of this embodiment can be plugged into each slot.

When the golden finger assembly of the slot connectivity test device 100 is inserted into the slot, the golden finger assembly receives output signals such as PCIe signals, clock reset signals and I2C signals from the slot of the motherboard 200, and then transmits the Insert the Retimer chip into the socket connectivity test device 100 . The signal receiving terminal of the Retimer chip receives the output signal sent by the motherboard 200 , and after passing through the return module, the signal sending terminal of the Retimer chip sends a test signal to the motherboard 200 . When the central processing unit 220 (CPU) of the motherboard 200 detects the test signal sent by the Retimer chip, the connectivity of the socket of the motherboard 200 is tested.

Therefore, the socket connectivity test device 100 of this embodiment uses a low-cost Retimer chip, and transmits the signal received by the signal receiving terminal of the Retimer chip to the signal sending terminal of the Retimer chip through an external link or inside the chip, so as to realize the detection of the host computer. The connectivity test of the slot on the board 200 effectively reduces the production test cost of the motherboard 200 .

Example 2

This embodiment provides a socket connectivity test method, which is applied to the socket connectivity test device of the present application; the socket connectivity test device includes a circuit board, a Retimer chip, a connection end and For the return module, the Retimer chip has a signal receiving terminal and a signal transmitting terminal; as shown in Figure 5, the slot connectivity test method includes the following steps:

Step S100, when the connection end is inserted into the slot of the motherboard to be tested, receive an output signal from the motherboard to be tested through a signal receiving terminal of the Retimer chip;

Step S200, based on the return module, return the output signal received by the signal receiving terminal to the signal sending terminal of the Retimer chip;

Step S300, the signal sending terminal sends a test signal to the motherboard to be tested via the Retimer chip and the connection terminal.

In this embodiment, the connecting end is a gold finger assembly.

The number of gold fingers included in the gold finger assembly matches the number of terminals in the slot of the motherboard to be tested, that is, the slot is determined according to the number of conductive terminals of the slot of the motherboard to be tested. The number of gold fingers on the connection end in the connectivity test device.

Each gold finger of the gold finger assembly is defined according to the output signal of the slot of the motherboard to be tested. For example, the output signals output by the motherboard to be tested through the slot include PCIe signals, reclocking signals and I2C signals, and the corresponding golden finger component defines the corresponding golden finger to receive PCIe signals and Reclock signal and I2C signal.

In this embodiment, the return module is a return circuit mounted on the circuit board and connected to the signal receiving terminal and the signal transmitting terminal of the Retimer chip, respectively.

In this embodiment, the return module includes a control board connected to the circuit board, and a control board mounted on the control board and connected to the signal receiving terminal and the signal transmitting terminal of the Retimer chip, respectively. return circuit.

In this embodiment, the return circuit includes a return resistance module whose one end is connected to the signal receiving terminal of the Retimer chip, and the other end is connected to the signal transmitting terminal of the Retimer chip.

In this embodiment, the return module is located in the Retimer chip and transmits the output signal received by the signal receiving terminal back to the Retimer chip through a serializer/deserializer in the Retimer chip. The signal transmission terminal of the Retimer chip.

The structure and function of the return module in this embodiment are the same as those of the return module 140 in Embodiment 1, and the structure and function of the Retimer chip are the same as those of the Retimer chip 130 in Embodiment 1. The same, the same parts among the embodiments will not be repeated.

To sum up, a socket connectivity test device and a test method of the present invention transmits the signal received by the signal receiving terminal of the low-cost Retimer chip to the signal transmitting terminal of the Retimer chip through the external link or the inside of the chip. In this way, the connectivity test of the slot on the motherboard can be realized without special test equipment, which greatly reduces the production test cost of the motherboard. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.

100: Slot Continuity Test Set 110: circuit board 120: Connection end 130:Retimer Chip 140: Return Module 141: Control panel 142: Return circuit 200: Motherboard 210: Slot of the motherboard to be tested 220: CPU S100~S300: Steps

1 shows a schematic structural diagram of the slot connectivity test device of the present invention when backhauling is performed through an external link;

FIG. 2 shows another structural schematic diagram of the slot connectivity test device of the present invention when backhauling is performed through an external link;

3 is a schematic structural diagram of the slot connectivity test device of the present invention when backhauling is performed through an internal link;

4 is a schematic diagram illustrating the application of the slot connectivity testing device of the present invention to slot testing of a motherboard;

FIG. 5 is a flowchart of the method for testing socket connectivity according to an embodiment of the present invention.

100: Slot Continuity Test Set

110: circuit board

120: Connection end

130:Retimer Chip

140: Return Module

141: Control panel

142: Return circuit

210: Slot of the motherboard to be tested

Claims (14)

A socket connectivity test device, wherein the socket connectivity test device includes a circuit board, a Retimer chip, a connection end and a return module; The connecting end is installed on one side of the circuit board, and is used for inserting the slot of the motherboard under test; The Retimer chip is mounted on the circuit board, and the signal transmitting terminal and the signal receiving terminal of the Retimer chip are respectively electrically connected to the connecting terminal, and the signal receiving terminal receives the output signal sent by the motherboard to be tested, so the The signal sending terminal sends a test signal to the motherboard to be tested; The return module is used to return the output signal received by the signal receiving terminal to the signal sending terminal of the Retimer chip, so that the signal sending terminal is sent to the signal sending terminal via the Retimer chip and the connecting terminal. The motherboard to be tested sends a test signal. The socket connectivity testing device according to claim 1, wherein: the connection end is a golden finger assembly. The socket connectivity testing device of claim 2, wherein: the number of golden fingers included in the golden finger assembly matches the number of terminals of the socket of the motherboard to be tested. The socket connectivity testing device of claim 1, wherein: the return module is a return module mounted on the circuit board and connected to the signal receiving terminal and the signal sending terminal of the Retimer chip respectively. transmission circuit. The socket connectivity test device of claim 1, wherein: the return module is arranged outside the circuit board, and includes a control board connected to the circuit board and a control board installed on the control board with A return circuit in which the signal receiving terminal of the Retimer chip is connected to the signal transmitting terminal. The socket connectivity testing device according to claim 4 or 5, wherein: the return circuit includes a return resistor whose one end is connected to the signal receiving terminal of the Retimer chip and the other end is connected to the signal sending terminal of the Retimer chip module. The socket connectivity testing device of claim 1, wherein: the return module is located in the Retimer chip and transmits the signal received by the signal receiving terminal through the serializer/deserializer in the Retimer chip. The output signal is sent back to the signal sending terminal of the Retimer chip. A slot connectivity testing method, wherein: the slot connectivity testing method is applied to a slot connectivity testing device; the slot connectivity testing device comprises a circuit board, a Retimer chip, a connection end and a return module, The Retimer chip has a signal receiving terminal and a signal transmitting terminal; the slot connectivity test method includes the following steps: When the connection end is inserted into the slot of the motherboard to be tested, the output signal is received from the motherboard to be tested through the signal receiving terminal of the Retimer chip; Based on the return module, return the output signal received by the signal receiving terminal to the signal sending terminal of the Retimer chip; The signal sending terminal sends a test signal to the motherboard to be tested via the Retimer chip and the connection terminal. The socket connectivity testing method according to claim 8, wherein: the connection end is a golden finger component. The socket connectivity test method of claim 9, wherein: the number of golden fingers included in the golden finger assembly matches the number of terminals of the socket of the motherboard to be tested. The socket connectivity test method of claim 8, wherein: the return module is a return module mounted on the circuit board and connected to the signal receiving terminal and the signal transmitting terminal of the Retimer chip respectively. transmission circuit. The slot connectivity test method of claim 8, wherein: the return module comprises a control board connected to the circuit board and signal receiving terminals mounted on the control board and respectively connected to the Retimer chip A return circuit connected to the signal transmission terminal. The socket connectivity test method according to claim 11 or 12, wherein: the return circuit includes a return resistor whose one end is connected to the signal receiving terminal of the Retimer chip and the other end is connected to the signal sending terminal of the Retimer chip module. The socket connectivity test method of claim 8, wherein: the return module is located in the Retimer chip and transmits the signal received by the signal receiving terminal through the serializer/deserializer in the Retimer chip. The output signal is sent back to the signal sending terminal of the Retimer chip.

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