TW202127047A - Semiconductor device and detecting method of needle mark offset - Google Patents

Abstract

A semiconductor device includes a first test pad and a plurality of second test pads. The first test pad includes a central portion and a plurality of peripheral portions. The plurality of peripheral portions is disposed near the edge of the central portion. Each of the peripheral portions does not contact with each other and does not contact with the central portion. The first test pad includes a plurality of detection orientations, and at least one peripheral portion is provided in each detection orientation. Each of the second test pads is electrically connected to one of the peripheral portions through a first connection trace.

Description

Semiconductor device and needle mark deviation detection method

The present invention relates to detection technology, in particular to a semiconductor device and a needle mark deviation detection method that can monitor whether the probe set is shifted in real time.

Conventionally, a large number of integrated circuit chips can be manufactured on a single wafer, and these integrated circuit chips can be separated from the wafer through a singulation process for subsequent packaging and use. Generally speaking, during the period from the completion of all semiconductor manufacturing processes on the wafer to the time it leaves the factory, the wafer is subjected to a Wafer Acceptable Test (WAT) to understand the electrical characteristics of the wafer. In order to grasp whether the wafer has defects in the manufacturing process. In this way, it is possible to ensure the quality and stability of the wafer to a certain extent.

In wafer acceptance testing, a probe set (may be called a probe card) containing multiple probes is usually used to contact test pads on the wafer to feed test signals to understand the electrical properties of the wafer. characteristic. However, the probe set may slip when it is in contact with the test pad. Whether the tip of the probe set shifts out of the test pad or scratches out of the test pad, it is an undesirable test situation. Therefore, there is a great need for a related mechanism that can monitor the position of the needle under the probe set in real time to reduce the test risk. In addition, due to the limited available area on the wafer, it is also hoped to save the occupied area required for testing as much as possible.

An embodiment of the present invention discloses a semiconductor device. The semiconductor device includes a first test pad and a plurality of second test pads. The first test pad includes a central part and a plurality of peripheral parts. The plurality of peripheral parts are arranged adjacent to the edge of the central part. The plural peripheral parts are not in contact with each other and are not in contact with the central part. The first test pad has a plurality of detection orientations, and each detection orientation is provided with at least one peripheral part. Each second test pad is electrically connected to one of the plurality of peripheral parts through the first connecting wire.

An embodiment of the present invention discloses a needle mark offset detection method. The needle mark offset detection method includes: using a probe set to contact a semiconductor device, wherein the semiconductor device includes a first test pad and a plurality of second test pads, the first test pad includes a central part and a plurality of peripheral parts, and the plurality of peripheral parts are adjacent to the central part The plurality of peripheral parts do not touch each other and do not touch the central part. The central part has a plurality of detection orientations. Each detection orientation is provided with at least one peripheral part. Each second test pad is connected to each other through the first connection line. One of the plurality of peripheral parts is electrically connected, wherein the probe set includes a first probe and a plurality of second probes, the first probe is used to contact the first test pad, and the plurality of second probes are used to contact the plurality of second probes. Two test pads; output a test signal through the first probe; use a plurality of second probes to individually detect whether the test signal is received to obtain a plurality of detection states; and determine the needle position of the probe group according to the plurality of detection states.

In order to make the above-mentioned objects, features and advantages of the embodiments of the present invention more obvious and understandable, the following detailed descriptions will be made in conjunction with the accompanying drawings.

Please refer to FIG. 1 and FIG. 2. The semiconductor device 100 includes a test pad set. The test pad group may include a plurality of test pads, and the plurality of test pads may be divided into a first test pad 110 and a plurality of second test pads. Hereinafter, eight test pads are taken as an example for description. One of the test pads can be the first test pad 110, and the seven test pads are the second test pads 121-127. However, the number of test pads is not limited to this. In one embodiment, the required number of the second test pads 121 to 127 may be determined by the number of peripheral parts of the first test pad 110. In another embodiment, the number of second test pads 121 to 127 may be more than the number of peripheral parts of the first test pad 110. In some embodiments, the semiconductor device 100 may be a wafer including a plurality of integrated circuit chips, and the first test pad 110 and the plurality of second test pads 121 to 127 may be disposed in the dicing lane of the wafer, but the present invention is not Limited by this.

The inspection system 200 can be used to perform electrical inspections on the semiconductor device 100, for example, to perform a wafer acceptance test (Wafer Acceptable Test, WAT). The inspection system 200 may include a probe set 210, and the inspection system 200 may contact the semiconductor device 100 through the probe set 210 to perform electrical inspection. In one embodiment, the probe set 210 includes a first probe 211 and a plurality of second probes. Hereinafter, corresponding to the number of the second test pads 121 to 127, the same description is given by taking the seven second probes 2121 to 2127 as an example, but the number is not limited to this.

The first probe 211 is used to contact the first test pad 110, and each of the second probes 2121 to 2127 is used to contact one of the second test pads 121 to 127. In addition, the first probe 211 and the second probes 2121-2127 of the probe set 210 move together, so that when the first probe 211 contacts the first test pad 110, the second probes 2121-2127 will also Contact with the second test pads 121~127. Here, the inspection system 200 can move the probe group 210 vertically downward or the semiconductor device 100 vertically to make the probe group 210 contact the semiconductor device 100.

It is worth noting that, in order to clearly illustrate the present invention, Figures 1 and 2 only show elements related to the present invention. It should be understood that the inspection system 200 and the semiconductor device 100 may also include other components to provide specific functions.

The first test pad 110 includes a central portion 111 and a plurality of peripheral portions 1121 to 1127. Hereinafter, the description will be mainly given by taking the seven peripheral parts 1121 to 1127 as an example. When viewing the contact surface of the first test pad 110 from a plan view, the central portion 111 is approximately located at the center of the contact surface, and the central portion 111 has a certain area, so that the first probe 211 is stuck in the center of the central portion 111. When in position, the needle mark of the first probe 211 can be covered in the central portion 111. In some embodiments, when the tip of the first probe 211 is about 15 microns (μm), the trace of the first probe 211 may be about 15 to 20 microns, and the length of the central portion 111 And/or the width can be between 20 μm and 30 μm, respectively, but the present invention is not limited to this.

The plurality of peripheral parts 1121 to 1127 are arranged adjacent to the edge of the central part 111 to collectively surround the central part 111. Here, the plurality of peripheral portions 1121 to 1127 are spaced apart from each other so as not to directly contact each other, and are electrically independent of each other. In addition, the respective peripheral portions 1121 to 1127 are also spaced apart from the central portion 111 and do not directly contact the central portion 111.

Please refer to FIGS. 2 and 3, the first test pad 110 may have a plurality of different detection orientations. In some embodiments, the number of detection directions may correspond to the number of sides of the central portion 111 of the first test pad 110. For example, in one embodiment, the central portion 111 of the first test pad 110 may be rectangular with four sides, and the first test pad 110 may have four detection orientations V1 to V4, respectively, substantially corresponding to the center. The location of the four sides of section 111. In another embodiment, the central portion 111 of the first test pad 110 may also be octagonal, and the first test pad 110 may have eight detection orientations V1 to V8, respectively, substantially corresponding to the eight central portions 111 The location of the edge, as shown in Figure 3. However, the present invention is not limited to this, and the number of detection orientations may not correspond to the number of sides of the central portion 111 of the first test pad 110. In addition, the shape of the central portion 111 is not limited to this, and the central portion 111 can take any suitable shape.

In the following, the eight detection directions V1~V8 are taken as an example for description. Here, the detection orientations V1~V8 are parallel to the horizontal orientation of the contact surface. In addition, the first test pad 110 is provided with at least one peripheral portion in each detection position V1 to V8, so that the detection system 200 can determine according to which direction the peripheral portion of the received signal is in the detection described later. The needle position of the probe set 210.

The second test pads 121 to 127 are arranged adjacent to the first test pad 110. In addition, the semiconductor device 100 may further include a plurality of first connection traces. Hereinafter, corresponding to the number of the second test pads 121 to 127, the seven first connecting wires 131 to 137 are also taken as an example for description. Each of the second test pads 121~127 can be indirectly connected to one of the peripheral parts 1121~1127 through the corresponding first connection traces 131~137, respectively, so that each of the second test pads 121~127 can be electrically connected to the corresponding The peripheral parts 1121 to 1127 are as shown in Figure 2.

In some embodiments, the size of the first test pad 110 (that is, the entire outermost range of the central portion 111 and the peripheral portions 1121 to 1127, that is, the area occupied by the contact surface) may be substantially equal to each second test pad The range of the contact surface from 121 to 127 is occupied, but the present invention is not limited to this.

The detection system 200 can output a test signal through the first probe 211, and detect whether the test signal can be received through the second probes 2121~2127, and then can determine the probe set according to the plural detection states of the plural second probes 2121~2127 210's lower needle position. Therefore, when the probe set 210 is in contact with the semiconductor device 100, if the first probe 211 is not completely stuck in the central portion 111 of the first test pad 110 due to the sliding of the probe set 210, for example, the first probe When the needle tip of 211 touches at least one peripheral part, the detection system 200 can receive the test signal through the corresponding at least one second probe, and then can determine that the lower needle position of the probe set 210 is offset. Conversely, if the first probe 211 is completely stuck on the central part 111 of the first test pad 110, the inspection system 200 can determine that the probe set 210 is not biased because none of the second probes 2121-2127 receives the test signal. shift.

Please refer to FIG. 4 to FIG. 6. In some embodiments, the semiconductor device 100 may further include a second connection trace 141. The second connecting wire 141 is connected between the central portion 111 of the first test pad 110 and one of the plurality of peripheral portions 1121 to 1127, so that the central portion 111 can be electrically connected to the corresponding one through the second connecting wire 141 Peripheries. For example, as shown in FIG. 4, the second connecting wire 141 may be connected between the peripheral portion 1124 and the central portion 111. In this way, when the probe set 210 is in contact with the semiconductor device 100, if the first probe 211 is completely stuck on the central portion 111 of the first test pad 110, the inspection system 200 will only receive the second probe 2112. According to the test signal, it can be more sure that the probe set 210 does not deviate, and it is not that the probe set 210 does not touch the first test pad 110 and the second test pads 121 to 127 at all. Hereinafter, the description is mainly based on the first connection pad 110 provided with the second connection trace 141.

In some embodiments, the first test pad 110 (that is, the central portion 111 and the peripheral portions 1121 to 1127), the second test pads 121 to 127, the first connection traces 131 to 137, and the second connection trace 141 can pass through the same The metal layers (such as the M0 layer, the TV layer, etc.) are fabricated together using wafer manufacturing processes, such as yellow light, etching, and other processes. Therefore, the semiconductor device 100 of any embodiment of the present invention is simpler in fabrication than the traditional one. And convenience.

The first test pads 110 and the second test pads 121 to 127 of the semiconductor device 100 can be arranged at intervals along the same arrangement direction D1 and are arranged substantially in the same linear direction. In some embodiments, the first test pad 110 may be located between the second test pads 121 to 127 to facilitate the arrangement of the peripheral portion and/or save the area of the connection traces connected to the peripheral portion. For example, the first test pad 110 may be substantially located in the middle of the second test pads 121-127. However, the present invention is not limited to this. In other embodiments, the first test pad 110 and the second test pad 121 to 127 can also be arranged in any order, as long as the first connecting wires 131 to 137 can be connected to the first test pad. The peripheral parts 1121 to 1127 of 110 and the second test pads 121 to 127 are sufficient. In addition, the first probes 211 and the second probes 2121 to 2127 of the probe group 210 may also be arranged at intervals along the setting direction D1 and arranged on the same straight line.

In some embodiments, the peripheral portions 1121 to 1127 of the first test pad 110 may extend along the edge of the central portion 111 to cover at least two detection directions. For example, as shown in FIG. 4, the peripheral portion 1121 may cover the detection directions V1 and V2, the peripheral portion 1122 may cover the detection directions V2, V3, and so on.

In other embodiments, as shown in FIG. 5, each peripheral portion of the first test pad 110 may further cover at least two detection directions in a sequential manner. Here, the first test pad 110 can be configured with eight peripheral portions 1121 to 1128, and the semiconductor device 100 can also be configured with eight second test pads 121 to 128 correspondingly. As shown in the figure, the peripheral part 1121 may cover the detection directions V1 and V2, the peripheral part 1122 may cover the detection directions V2, V3, and in this order, the peripheral part 1128 may cover the detection directions V8 and V1.

In another embodiment where the peripheral parts 1121 to 1128 sequentially cover three detection directions, as shown in Figure 6, the peripheral part 1121 can cover the detection directions V8, V1, V2, and the peripheral part 1122 can cover the detection directions. V1~V3, and so on.

It should be noted that regardless of whether each peripheral part 1121~1128 sequentially covers two or three detection directions, or even when it covers eight detection positions in sequence, the first test pad 110 still only needs to be divided into eight The peripheral portions 1121 to 1128, and the semiconductor device 100 still only needs to be equipped with eight second test pads 121 to 128. Therefore, the layout area required for offset detection can be greatly reduced.

In some embodiments, referring to FIG. 6, each of the peripheral portions 1121 to 1128 covering at least two detection directions may include the first configuration section. The first arrangement sections A1~A8 of the peripheral parts 1121~1128 are respectively arranged on one of the detection directions V1~V8, and there is no other peripheral part between each first arrangement section A1~A8 and the central part 111. In this way, the peripheral portions 1121 to 1128 can surround the central portion 111 in a staggered manner.

In some embodiments, the multiple detection positions V1 to V8 of the first test pad 110 can be divided into high-probability detection positions and low-probability detection positions. Among them, the high-probability detection orientation refers to the orientation that the probe set 210 often shifts when sliding. In addition, the first test pad 110 can be configured with at least two peripheral parts in the high-probability detection orientation, so that the detection system 200 can further subdivide the deviation degree of the probe set 210 in the high-probability detection orientation.

Please refer to Fig. 3, for example, since the probe set 210 is less shifted in the downward direction (such as the detection position V5 in Fig. 3) when the needle is lowered, therefore, in some embodiments, the detection position V4 , V5 can be provided with only one peripheral part 1123, 1124 respectively, and two peripheral parts are provided in other detection directions.

The detection system 200 can execute the needle mark offset detection method of any embodiment of the present invention to monitor the needle position of the probe set 210 on the semiconductor device 100 in real time.

Fig. 7 is a flowchart of a needle mark offset detection method according to an embodiment of the present invention. Referring to FIG. 7, in an embodiment of the needle mark offset detection method, the detection system 200 may first use the probe set 210 to contact the first test pad 110 and the second test pad 121`127 of the semiconductor device 100 (step S10). Then, the detection system 200 outputs a test signal through the first probe 211 in the probe set 210 (step S20), and uses the second probes 2121~2127 in the probe set 210 to perform detection to obtain the second probe 2121 ~2127 complex detection state (step S30). After that, the detection system 200 can quickly determine the lower needle position of the probe group 210 according to the plurality of detection states obtained in step S30 (step S40). Among them, the lower needle position includes the lower needle direction (also referred to as the offset direction) and/or the offset.

In an embodiment of step S40, the detection system 200 may determine the lower needle position of the probe set 210 according to at least one detection state indicating that the test signal is received.

Hereinafter, several examples are used to illustrate how the detection system 200 makes a judgment. In an example, when the first probe 211 contacts the central portion 111 and the peripheral portion 1121 shown in FIG. 4, the second probe 2122 that contacts the second test pad 122 and the second test pad 125 The second probe 2125 will receive the test signal. Therefore, the detection system 200 can determine that the probe set 210 is offset to the detection position V1. Moreover, since the second probe 2126 contacting the second test pad 126 does not receive the test signal, it indicates that although the probe set 210 has deviated to the detection position V1 but has not yet exceeded the contact surface of the first test pad 110, the detection Based on this, the system 200 can determine that the probe set 210 is only slightly deviated from the detection position V1. In addition, the detection system 200 can even calculate the offset of the probe set 210 based on the known distance (for example, the distance between the peripheral portion 1121 and the central portion 111) and the width of the peripheral portion 1121, and correspondingly Make corrections accordingly. For example, the offset calculated by moving the probe group 210 to the detection position V5 opposite to the detection position V1.

In an example, when the first probe 211 contacts the central portion 111, the peripheral portion 1121, and the peripheral portion 1127 shown in Figure 4, the second probe 2122 contacting the second test pad 122 contacts the first probe. The second probe 2125 of the second test pad 125 and the second probe 2126 contacting the second test pad 126 will receive the test signal. Therefore, the detection system 200 can determine that the probe set 210 is offset to the detection position V1. Moreover, since the second probes 2125, 2126 coupled to the peripheral portion 1121, 1127 and the second probe 2122 coupled to the central portion 111 in the detection position V1 can receive the test signal, it means that the probe The group 210 deviates from the detection position V1 to the edge of the test pads (that is, the first test pad 110 and the second test pad 121~127), so the detection system 200 can determine that the probe group 210 deviates from the detection position V1. Move to the edge of the test pad. Similarly, the detection system 200 can determine the distance between the peripheral portion 1121 and the peripheral portion 1127 based on a known distance (for example, the distance between the peripheral portion 1121 and the central portion 111 and the distance between the peripheral portion 1121 and the peripheral portion 1127). Calculate the offset of the probe group 210 and correct it accordingly.

In an example, when the first probe 211 contacts the peripheral portion 1121 and the peripheral portion 1127 shown in FIG. 4, the second probe 2125 contacting the second test pad 125 and the second test pad 126 The second probe 2126 will receive the test signal. Therefore, the detection system 200 can determine that the probe set 210 is offset to the detection position V1. Moreover, since the second probe 2122 coupled to the central portion 111 does not receive the test signal, it means that the probe set 210 is seriously deviated from the detection position V1 (or when there is only the second probe coupled to the second test pad 126). When the second probe 2126 tests the signal, it also means that the probe set 210 is seriously deviated from the detection position V1), so the detection system 200 can determine that the probe set 210 is deviated from the detection position V1 based on this, and the entire test is quickly stamped out. Outside the pad. Similarly, the detection system 200 can calculate the offset of the probe set 210 and correct it accordingly.

Since the detection system 200 uses the same method of judging the deviation in other detection positions V2~V8 as the judgment method of the deviation in the detection position V1, those skilled in the art should be able to understand and know how Make corresponding changes, so I won't repeat them here.

FIG. 8 is a schematic diagram of the schematic relationship between the detection state and the judgment result of a plurality of second probes in an example. Please refer to FIG. 2 and FIG. 8. After the inspection system 200 inspects the semiconductor device 100 of the embodiment shown in FIG. 2, an example of the possible multiple inspection states and the corresponding determination results can be as shown in FIG. 8. The graph is shown in the diagram. Among them, the symbol ◎ indicates that the detection state of the second probe is that a test signal is received.

In summary, the embodiments of the present invention provide a semiconductor device and a needle mark offset detection method, in which the central part divided by the first test pad and the plural peripheral parts staggered around the central part can be used for detection. The first probe outputs a test signal and quickly detects the lower needle position of the probe group according to the combined result of the plurality of detection states of the plurality of second probes. Furthermore, the semiconductor device and needle mark offset detection method of an embodiment of the present invention can be monitored online in real time, so the measurement quality can be more ensured and the retest rate can be reduced. In addition, the semiconductor device and the needle mark offset detection method of an embodiment of the present invention can greatly reduce the number and occupied area of the second test pads required to be pulled, and at the same time simplify the process complexity.

The embodiments of the present invention are disclosed as above, but they are not intended to limit the scope of the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, the protection scope of the present invention shall be subject to those defined by the attached patent application scope.

100: Semiconductor device 110: The first test pad 111: Central 1121~1128: Peripheral part 121~128: The second test pad 131~137: The first connection line 141: The second connection line 200: detection system 210: Probe Set 211: First Probe 2121~2127: second probe A1~A8: The first configuration section D1: Set direction V1~V8: Detection direction S10~S40: steps

FIG. 1 is a schematic diagram of a detection system and a semiconductor device according to an embodiment of the invention. FIG. 2 is a schematic diagram of a semiconductor device and a probe set according to an embodiment of the present invention. FIG. 3 is a schematic diagram of an embodiment of the first test pad and the detection position. FIG. 4 is a schematic diagram of a semiconductor device according to an embodiment of the present invention. FIG. 5 is a schematic diagram of a semiconductor device according to an embodiment of the present invention. FIG. 6 is a schematic diagram of a first test pad according to an embodiment of the present invention. Fig. 7 is a flowchart of a needle mark offset detection method according to an embodiment of the present invention. FIG. 8 is a schematic diagram of the schematic relationship between the detection state and the judgment result of a plurality of second probes in an example.

none

100: Semiconductor device

111: Central

1121~1127: Peripheral part

121~127: The second test pad

132~137: The first connection line

141: The second connection line

D1: Set direction

Claims (10)

A semiconductor device including: A first test pad includes a central portion and a plurality of peripheral portions, the peripheral portions are arranged adjacent to the edge of the central portion, and the peripheral portions are not in contact with each other, wherein the first test pad has a plurality of detection orientations, and At least one peripheral part is provided on each detection position; and A plurality of second test pads, each of the second test pads is electrically connected to one of the peripheral parts through a first connection trace, wherein the first test pad and the second test pads are arranged along a set direction . According to the semiconductor device described in claim 1, wherein each of the peripheral portions extends along the edge of the central portion to cover at least two of the detection directions. The semiconductor device described in claim 2, wherein each of the peripheral portions includes a first configuration section, the first configuration section of each of the peripheral portions is located on one of the detection positions, and each of the peripheral portions There is no other peripheral part between the first arrangement section of the part and the central part. In the semiconductor device described in claim 1, wherein the detection positions include a plurality of high-probability detection positions, and at least two of the peripheral portions are provided in each of the high-probability detection positions. The semiconductor device according to claim 1, wherein the central portion is further electrically connected to one of the peripheral portions through a second connecting wire, so as to be electrically connected to the second test pads One of them. The semiconductor device according to the first item of the scope of patent application, wherein the area occupied by the contact surface of the first test pad is the same as the area occupied by the contact surface of each second test pad. According to the semiconductor device described in claim 1, wherein the first test pad, the second test pads, and the first connection traces are made through the same metal layer. A needle mark offset detection method, including: A probe set is used to contact a semiconductor device, wherein the semiconductor device includes a first test pad and a plurality of second test pads, wherein the first test pad includes a central portion and a plurality of peripheral portions, and the peripheral portions are adjacent to the center The peripheral portions are not in contact with each other, the first test pad has a plurality of detection orientations, and at least one peripheral portion is provided on each detection location, wherein each of the second test pads passes through a first A connection trace is electrically connected to one of the peripheral parts, wherein the probe set includes a first probe and a plurality of second probes, the first probe is used for contacting the first test pad, the The second probe is used for contacting the second test pads; Output a test signal through the first probe; Use the second probes to perform detection to obtain a plurality of detection states; and The lower needle position of the probe group is determined according to the detection states. The needle mark offset detection method described in item 8 of the scope of patent application, wherein the step of judging the needle position of the probe set is to determine the probe based on at least one of the detection states indicating that the test signal is received The needle position of the group. According to the needle mark offset detection method described in item 8 of the scope of patent application, each of the peripheral portions extends along the edge of the central portion to cover at least two of the detection directions.

Images