TW202114188A - Image sensor - Google Patents

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TW202114188A
TW202114188A TW108133704A TW108133704A TW202114188A TW 202114188 A TW202114188 A TW 202114188A TW 108133704 A TW108133704 A TW 108133704A TW 108133704 A TW108133704 A TW 108133704A TW 202114188 A TW202114188 A TW 202114188A
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substrate
image sensor
gate
reflective layer
layer
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TW108133704A
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TWI714266B (en
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鍾志平
何明祐
嘉慧 畢
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力晶積成電子製造股份有限公司
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Priority to CN201911042630.4A priority patent/CN112530983B/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14629—Reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14623—Optical shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H01L27/14645—Colour imagers

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

An image sensor including a substrate, a first gate, a light sensing device, a storage node, at least one first light reflecting layer, a second light reflecting layer, and a third light reflecting layer is provided. The substrate has a first side and a second side opposite to each other. The first gate is disposed on the substrate of the first side. The light sensing device is located in the substrate on one side of the first gate. The storage node is located in the substrate on the other side of the first gate. The first light reflecting layer is disposed in the substrate and is located around the storage node. The second light reflecting layer shields the storage node on the first side and is electrically connected to the first light reflecting layer. The third light reflecting layer shields the storage node on the second side and is electrically connected to the first light reflecting layer.

Description

影像感測器Image sensor

本發明是有關於一種半導體元件，且特別是有關於一種影像感測器。The present invention relates to a semiconductor device, and particularly relates to an image sensor.

目前有些種類的影像感測器(如，全域快門影像感測器(global shutter image sensor))具有位在基底中且用以儲存訊號的儲存節點(storage node)。然而，雜散光(stray light)對儲存在儲存節點中的訊號所造成的干擾(crosstalk)以及由介面缺陷所產生暗電流(dark current)，會造成影像品質不佳。因此，如何有效地防止雜散光干擾與降低暗電流為目前持續努力發展的目標。Currently, some types of image sensors (eg, global shutter image sensors) have storage nodes located in the substrate and used to store signals. However, the crosstalk caused by stray light on the signal stored in the storage node and the dark current generated by the interface defect will cause poor image quality. Therefore, how to effectively prevent stray light interference and reduce dark current is the goal of continuous efforts.

本發明提供一種影像感測器，其可有效地防止雜散光干擾與降低暗電流。The present invention provides an image sensor, which can effectively prevent stray light interference and reduce dark current.

本發明提出一種影像感測器，包括基底、第一閘極、感光元件、儲存節點、至少一個第一反光層、第二反光層與第三反光層。基底具有相對的第一面與第二面。第一閘極設置在第一面的基底上。感光元件位在第一閘極的一側的基底中。儲存節點位在第一閘極的另一側的基底中。第一反光層設置在基底中，且位在儲存節點的周圍。第二反光層在第一面遮蔽儲存節點，且電性連接至第一反光層。第三反光層在第二面遮蔽儲存節點，且電性連接第一反光層。The present invention provides an image sensor including a substrate, a first gate electrode, a photosensitive element, a storage node, at least one first reflective layer, a second reflective layer, and a third reflective layer. The substrate has a first surface and a second surface opposite to each other. The first gate is arranged on the substrate on the first surface. The photosensitive element is located in the substrate on one side of the first gate. The storage node is located in the substrate on the other side of the first gate. The first reflective layer is arranged in the substrate and located around the storage node. The second reflective layer shields the storage node on the first surface and is electrically connected to the first reflective layer. The third reflective layer shields the storage node on the second surface and is electrically connected to the first reflective layer.

依照本發明的一實施例所述，在上述影像感測器中，第一反光層可從第一面延伸至第二面。According to an embodiment of the present invention, in the above-mentioned image sensor, the first reflective layer may extend from the first surface to the second surface.

依照本發明的一實施例所述，在上述影像感測器中，第二反光層可共形地設置在第一面。According to an embodiment of the present invention, in the above-mentioned image sensor, the second reflective layer may be conformally disposed on the first surface.

依照本發明的一實施例所述，在上述影像感測器中，第一反光層的材料例如是摻雜多晶矽或金屬。第二反光層的材料例如是金屬或摻雜多晶矽。第三反光層的材料例如是摻雜多晶矽或金屬。According to an embodiment of the present invention, in the above-mentioned image sensor, the material of the first reflective layer is, for example, doped polysilicon or metal. The material of the second light reflecting layer is, for example, metal or doped polysilicon. The material of the third light reflecting layer is, for example, doped polysilicon or metal.

依照本發明的一實施例所述，在上述影像感測器中，影像感測器例如是背照式影像感測器(backside illuminated image sensor，BSI image sensor)。第二反光層在第一面更可遮蔽感光元件。第三反光層可具有暴露出感光元件的開口。According to an embodiment of the present invention, in the above-mentioned image sensor, the image sensor is, for example, a backside illuminated image sensor (BSI image sensor). The second reflective layer can further shield the photosensitive element on the first surface. The third light reflecting layer may have an opening exposing the photosensitive element.

依照本發明的一實施例所述，在上述影像感測器中，更可包括至少一個第四反光層。第四反光層設置在基底中，且位在感光元件的周圍。According to an embodiment of the present invention, the above-mentioned image sensor may further include at least one fourth reflective layer. The fourth light-reflecting layer is arranged in the substrate and is located around the photosensitive element.

依照本發明的一實施例所述，在上述影像感測器中，更可包括第一介電層、第二介電層、第三介電層與第四介電層。第一介電層位在第一反光層與基底之間。第二介電層位在第二反光層與基底之間。第三介電層位在第三反光層與基底之間。第四介電層位在第四反光層與基底之間。According to an embodiment of the present invention, the above-mentioned image sensor may further include a first dielectric layer, a second dielectric layer, a third dielectric layer, and a fourth dielectric layer. The first dielectric layer is located between the first reflective layer and the substrate. The second dielectric layer is located between the second reflective layer and the substrate. The third dielectric layer is located between the third light-reflecting layer and the substrate. The fourth dielectric layer is located between the fourth light reflecting layer and the substrate.

依照本發明的一實施例所述，在上述影像感測器中，更可包括第五反光層。第五反光層設置在第三反光層上。According to an embodiment of the present invention, the above-mentioned image sensor may further include a fifth reflective layer. The fifth light reflecting layer is disposed on the third light reflecting layer.

依照本發明的一實施例所述，在上述影像感測器中，更可包括隔離結構。隔離結構設置在基底中，且圍繞部分第一反光層。According to an embodiment of the present invention, the above-mentioned image sensor may further include an isolation structure. The isolation structure is arranged in the substrate and surrounds a part of the first light reflecting layer.

依照本發明的一實施例所述，在上述影像感測器中，更可包括第二閘極、第三閘極、第一閘介電層、第二閘介電層與第三閘介電層。第二閘極設置在第一面的基底上，且位在儲存節點的遠離第一閘極的一側。第三閘極設置在第一面的基底上，且位在第二閘極的遠離儲存節點的一側。第一閘介電層位在第一閘極與基底之間。第二閘介電層位在第二閘極與基底之間。第三閘介電層位在第三閘極與基底之間。According to an embodiment of the present invention, the above-mentioned image sensor may further include a second gate, a third gate, a first gate dielectric layer, a second gate dielectric layer, and a third gate dielectric Floor. The second gate is arranged on the substrate on the first surface and is located on the side of the storage node away from the first gate. The third gate is arranged on the substrate on the first surface and is located on the side of the second gate away from the storage node. The first gate dielectric layer is located between the first gate and the substrate. The second gate dielectric layer is located between the second gate and the substrate. The third gate dielectric layer is located between the third gate and the substrate.

基於上述，在本發明所提出的影像感測器中，第一反光層設置在基底中，且位在儲存節點的周圍，第二反光層在第一面遮蔽儲存節點，且第三反光層在第二面遮蔽儲存節點。如此一來，第一反光層、第二反光層與第三反光層可充分地圍繞儲存節點，因此可有效地防止雜散光干擾。此外，第一反光層、第二反光層與第三反光層彼此電性連接，當施加偏壓至第一反光層、第二反光層與第三反光層時，可形成鈍化介面(passivated interface)，藉此可有效地降低暗電流。另外，由於本發明所提出的影像感測器可有效地防止雜散光干擾與降低暗電流，因此影像感測器可具有較佳的影像品質。Based on the above, in the image sensor proposed by the present invention, the first reflective layer is disposed in the substrate and is located around the storage node, the second reflective layer shields the storage node on the first side, and the third reflective layer is on the The second side shields the storage node. In this way, the first light reflecting layer, the second light reflecting layer, and the third light reflecting layer can fully surround the storage node, so that the interference of stray light can be effectively prevented. In addition, the first reflective layer, the second reflective layer, and the third reflective layer are electrically connected to each other. When a bias voltage is applied to the first reflective layer, the second reflective layer, and the third reflective layer, a passivated interface can be formed. , Which can effectively reduce the dark current. In addition, since the image sensor proposed in the present invention can effectively prevent stray light interference and reduce dark current, the image sensor can have better image quality.

為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

圖1為本發明一實施例的影像感測器的上視圖。圖2為沿著圖1中的I-I’剖面線與II-II’剖面線的剖面圖。在圖1中省略圖2中的部分構件，以清楚繪示出圖1中各構件之間的配置關係。FIG. 1 is a top view of an image sensor according to an embodiment of the invention. Fig. 2 is a cross-sectional view taken along the section line I-I' and the section line II-II' in Fig. 1. In FIG. 1, part of the components in FIG. 2 are omitted to clearly illustrate the configuration relationship between the components in FIG. 1.

請參照圖1與圖2，影像感測器10，包括基底100、閘極102、感光元件104、儲存節點106、至少一個反光層108、反光層110與反光層112。在本實施例中，影像感測器10是以背照式影像感測器為例，但本發明並不以此為限。1 and FIG. 2, the image sensor 10 includes a substrate 100, a gate 102, a photosensitive element 104, a storage node 106, at least one reflective layer 108, a reflective layer 110 and a reflective layer 112. In this embodiment, the image sensor 10 is a back-illuminated image sensor as an example, but the invention is not limited to this.

基底100具有相對的第一面S1與第二面S2。基底100的材料例如是半導體材料，如磊晶矽，但本發明並不以此為限。基底100可具有第一導電型。以下，所記載的第一導電型與第二導電型可分別為P型導電型與N型導電型中的一者與另一者。在本實施例中，第一導電型是以P型導電型為例，且第二導電型是以N型導電型為例，但本發明並不以此為限。The substrate 100 has a first surface S1 and a second surface S2 opposite to each other. The material of the substrate 100 is, for example, a semiconductor material, such as epitaxial silicon, but the invention is not limited to this. The substrate 100 may have a first conductivity type. Hereinafter, the first conductivity type and the second conductivity type described may be one and the other of the P-type conductivity type and the N-type conductivity type, respectively. In this embodiment, the first conductivity type is an example of a P-type conductivity type, and the second conductivity type is an example of an N-type conductivity type, but the invention is not limited to this.

閘極102設置在第一面S1的基底100上。閘極102可用以作為轉移閘極(transfer gate)。閘極102的材料例如是摻雜多晶矽。The gate 102 is disposed on the substrate 100 on the first surface S1. The gate 102 can be used as a transfer gate. The material of the gate 102 is, for example, doped polysilicon.

感光元件104位在閘極102的一側的基底100中。感光元件104例如是光二極體(photodiode)。The photosensitive element 104 is located in the substrate 100 on the side of the gate 102. The photosensitive element 104 is, for example, a photodiode.

儲存節點106位在閘極102的另一側的基底100中。儲存節點106可由PN二極體電容所形成，且PN二極體電容可為包含N型區與P型區的空乏區電容。The storage node 106 is located in the substrate 100 on the other side of the gate 102. The storage node 106 may be formed by a PN diode capacitor, and the PN diode capacitor may be a depletion region capacitor including an N-type region and a P-type region.

反光層108設置在基底100中，且位在儲存節點106的周圍。反光層108可防止雜散光照射到儲存節點106。此外，當施加偏壓至反光層108時，可形成鈍化介面，藉此可有效地降低暗電流。反光層108可從第一面S1延伸至第二面S2，但本發明並不以此為限。反光層108的材料例如是導體材料，如摻雜多晶矽或金屬。在圖1與圖2中，反光層108的數量是以多個為例，但本發明的反光層108的數量並不限於圖1與圖2中的數量，只要反光層108的數量為至少一個即屬於本發明所保護的範圍。The reflective layer 108 is disposed in the substrate 100 and is located around the storage node 106. The reflective layer 108 can prevent stray light from irradiating the storage node 106. In addition, when a bias voltage is applied to the reflective layer 108, a passivation interface can be formed, thereby effectively reducing the dark current. The reflective layer 108 may extend from the first surface S1 to the second surface S2, but the invention is not limited to this. The material of the reflective layer 108 is, for example, a conductive material, such as doped polysilicon or metal. In FIGS. 1 and 2, the number of reflective layers 108 is taken as an example. However, the number of reflective layers 108 of the present invention is not limited to the number shown in FIGS. 1 and 2, as long as the number of reflective layers 108 is at least one. That belongs to the protection scope of the present invention.

反光層110在第一面S1遮蔽儲存節點106，且電性連接至反光層108。反光層110可防止雜散光照射到儲存節點106。此外，當施加偏壓至反光層110時，可形成鈍化介面，藉此可有效地降低暗電流。此外，反光層110的一部分可作為用於電性連接至反光層108的接觸窗，但本發明並不以此為限。在其他實施例中，更可另外形成電性連接於反光層110與反光層108之間的接觸窗(未示出)。在影像感測器10為背照式影像感測器的情況下，反光層110在第一面S1更可遮蔽感光元件104。反光層110的材料例如是導體材料，如金屬或摻雜多晶矽。在本實施例中，所指的「遮蔽」可為「完全遮蔽」或「部分遮蔽」。The reflective layer 110 shields the storage node 106 on the first surface S1 and is electrically connected to the reflective layer 108. The reflective layer 110 can prevent stray light from irradiating the storage node 106. In addition, when a bias voltage is applied to the reflective layer 110, a passivation interface can be formed, thereby effectively reducing the dark current. In addition, a part of the light-reflecting layer 110 can be used as a contact window for electrically connecting to the light-reflecting layer 108, but the present invention is not limited thereto. In other embodiments, a contact window (not shown) electrically connected between the reflective layer 110 and the reflective layer 108 may be additionally formed. When the image sensor 10 is a back-illuminated image sensor, the reflective layer 110 can further shield the photosensitive element 104 on the first surface S1. The material of the reflective layer 110 is, for example, a conductive material, such as metal or doped polysilicon. In this embodiment, the "masking" referred to can be "completely masking" or "partially masking".

反光層112在第二面S2遮蔽儲存節點106，且電性連接反光層108。反光層112可防止雜散光照射到儲存節點106。此外，當施加偏壓至反光層112時，可形成鈍化介面，藉此可有效地降低暗電流。此外，反光層112的一部分可作為用於電性連接至反光層108的接觸窗，但本發明並不以此為限。在其他實施例中，更可另外形成電性連接於反光層112與反光層108之間的接觸窗(未示出)。在影像感測器10為背照式影像感測器的情況下，反光層112可具有暴露出感光元件104的開口113。反光層112的材料例如是導體材料，如摻雜多晶矽或金屬。在本實施例中，反光層112的材料是以摻雜多晶矽為例。The reflective layer 112 shields the storage node 106 on the second surface S2 and is electrically connected to the reflective layer 108. The reflective layer 112 can prevent stray light from irradiating the storage node 106. In addition, when a bias voltage is applied to the reflective layer 112, a passivation interface can be formed, thereby effectively reducing the dark current. In addition, a part of the light-reflecting layer 112 can be used as a contact window for electrically connecting to the light-reflecting layer 108, but the invention is not limited to this. In other embodiments, a contact window (not shown) electrically connected between the reflective layer 112 and the reflective layer 108 may be additionally formed. When the image sensor 10 is a back-illuminated image sensor, the reflective layer 112 may have an opening 113 exposing the photosensitive element 104. The material of the reflective layer 112 is, for example, a conductive material, such as doped polysilicon or metal. In this embodiment, the material of the reflective layer 112 is doped polysilicon as an example.

此外，影像感測器10中，影像感測器10，更包括隔離結構114、至少一個反光層116、介電層118、介電層120、介電層122、介電層124、反光層126、釘紮層(pinning layer)128、閘極130、閘極132、閘介電層134、閘介電層136、閘介電層138、摻雜區140、摻雜區142、井區144、間隙壁146、間隙壁148、間隙壁150、介電層152、內連線結構154、介電層156、彩色濾光層158與微透鏡160中的至少一者。In addition, in the image sensor 10, the image sensor 10 further includes an isolation structure 114, at least one reflective layer 116, a dielectric layer 118, a dielectric layer 120, a dielectric layer 122, a dielectric layer 124, and a reflective layer 126 , Pinning layer 128, gate 130, gate 132, gate dielectric layer 134, gate dielectric layer 136, gate dielectric layer 138, doped region 140, doped region 142, well region 144, At least one of the spacer 146, the spacer 148, the spacer 150, the dielectric layer 152, the interconnect structure 154, the dielectric layer 156, the color filter layer 158, and the micro lens 160.

隔離結構114(圖1)設置在基底100中。隔離結構114例如是淺溝渠隔離結構。隔離結構114的材料例如是氧化矽。The isolation structure 114 (FIG. 1) is provided in the substrate 100. The isolation structure 114 is, for example, a shallow trench isolation structure. The material of the isolation structure 114 is silicon oxide, for example.

反光層116設置在基底100中，且位在感光元件104的周圍。反光層116可反射大角度的入射光使其入射到感光元件104內以增加光吸收效率，並可阻擋雜散光對感光元件104造成訊號干擾。反光層110可電性連接至反光層116。此外，當施加偏壓至反光層116時，可形成鈍化介面，藉此可有效地降低暗電流。反光層116可從第一面S1延伸至第二面S2，但本發明並不以此為限。反光層116的材料例如是導體材料，如摻雜多晶矽或金屬。在圖1與圖2中，反光層116的數量是以一個為例，但本發明並不以此為限。在其他實施例中，反光層116的數量可為多個。只要反光層116的數量為至少一個即屬於本發明所保護的範圍。另外，反光層108與反光層116可藉由相同製程同時形成。The reflective layer 116 is disposed in the substrate 100 and is located around the photosensitive element 104. The light-reflecting layer 116 can reflect incident light at a large angle to make it incident into the photosensitive element 104 to increase the light absorption efficiency, and can block stray light from causing signal interference to the photosensitive element 104. The reflective layer 110 may be electrically connected to the reflective layer 116. In addition, when a bias voltage is applied to the reflective layer 116, a passivation interface can be formed, thereby effectively reducing the dark current. The reflective layer 116 may extend from the first surface S1 to the second surface S2, but the invention is not limited to this. The material of the reflective layer 116 is, for example, a conductive material, such as doped polysilicon or metal. In FIGS. 1 and 2, the number of the reflective layer 116 is one as an example, but the present invention is not limited to this. In other embodiments, the number of the reflective layer 116 may be multiple. As long as the number of the reflective layer 116 is at least one, it belongs to the protection scope of the present invention. In addition, the light-reflecting layer 108 and the light-reflecting layer 116 can be formed simultaneously by the same process.

介電層118位在反光層108與基底100之間。介電層120位在反光層110與基底100之間。介電層122位在反光層112與基底100之間。介電層124位在反光層116與基底100之間。介電層118、介電層120、介電層122與介電層124的材料例如是氧化矽。此外，介電層118與介電層124可藉由相同製程同時形成。The dielectric layer 118 is located between the reflective layer 108 and the substrate 100. The dielectric layer 120 is located between the reflective layer 110 and the substrate 100. The dielectric layer 122 is located between the reflective layer 112 and the substrate 100. The dielectric layer 124 is located between the reflective layer 116 and the substrate 100. The dielectric layer 118, the dielectric layer 120, the dielectric layer 122, and the dielectric layer 124 are made of silicon oxide, for example. In addition, the dielectric layer 118 and the dielectric layer 124 can be formed simultaneously by the same process.

反光層126設置在反光層112上。反光層126可在第二面S2遮蔽儲存節點106，且可經由反光層112而電性連接反光層108。反光層126可用以防止雜散光的干擾。此外，當施加偏壓至反光層126時，可形成鈍化介面，藉此可有效地降低暗電流。在影像感測器10為背照式影像感測器的情況下，開口113更可位在反光層126中，而暴露出感光元件104。反光層126的材料例如是導體材料，如摻雜多晶矽或金屬。在本實施例中，反光層126的材料是以金屬為例。The light-reflecting layer 126 is disposed on the light-reflecting layer 112. The reflective layer 126 can shield the storage node 106 on the second surface S2 and can be electrically connected to the reflective layer 108 via the reflective layer 112. The reflective layer 126 can be used to prevent interference from stray light. In addition, when a bias voltage is applied to the reflective layer 126, a passivation interface can be formed, thereby effectively reducing the dark current. In the case where the image sensor 10 is a back-illuminated image sensor, the opening 113 may be located in the reflective layer 126 to expose the photosensitive element 104. The material of the reflective layer 126 is, for example, a conductive material, such as doped polysilicon or metal. In this embodiment, the material of the reflective layer 126 is metal as an example.

釘紮層128可位在感光元件104的表面。釘紮層128可用以降低暗電流。釘紮層128可為第一導電型(如，P型)的重摻雜區。The pinning layer 128 may be located on the surface of the photosensitive element 104. The pinning layer 128 can be used to reduce dark current. The pinning layer 128 may be a heavily doped region of the first conductivity type (eg, P type).

閘極130設置在第一面S1的基底100上，且位在儲存節點106的遠離閘極102的一側。閘極130可用以作為轉移閘極。閘極130的材料例如是摻雜多晶矽。The gate 130 is disposed on the substrate 100 on the first surface S1 and is located on the side of the storage node 106 away from the gate 102. The gate 130 can be used as a transfer gate. The material of the gate 130 is, for example, doped polysilicon.

閘極132設置在第一面S1的基底100上，且位在閘極130的遠離儲存節點106的一側。閘極132可用以作為重置閘極(reset gate)。閘極132的材料例如是摻雜多晶矽。The gate 132 is disposed on the substrate 100 on the first surface S1 and is located on the side of the gate 130 away from the storage node 106. The gate 132 can be used as a reset gate. The material of the gate electrode 132 is, for example, doped polysilicon.

閘介電層134位在閘極102與基底100之間。閘介電層136位在閘極130與基底100之間。閘介電層138位在閘極132與基底100之間。閘介電層134、閘介電層136與閘介電層138的材料例如是氧化矽。The gate dielectric layer 134 is located between the gate electrode 102 and the substrate 100. The gate dielectric layer 136 is located between the gate 130 and the substrate 100. The gate dielectric layer 138 is located between the gate electrode 132 and the substrate 100. The materials of the gate dielectric layer 134, the gate dielectric layer 136, and the gate dielectric layer 138 are, for example, silicon oxide.

摻雜區140與摻雜區142分別為在閘極132的一側與另一側的基底100中，且摻雜區140位在閘極132與閘極130之間。摻雜區140與摻雜區142分別可具有第二導電型(如，N型)。The doped region 140 and the doped region 142 are respectively in the substrate 100 on one side and the other side of the gate 132, and the doped region 140 is located between the gate 132 and the gate 130. The doped region 140 and the doped region 142 may each have a second conductivity type (eg, N-type).

井區144位在基底100中。儲存節點106、摻雜區140與摻雜區142位在井區144中。井區144可具有第一導電型(如，P型)。The well area 144 is located in the base 100. The storage node 106, the doped region 140 and the doped region 142 are located in the well region 144. The well region 144 may have a first conductivity type (eg, P type).

間隙壁146設置在閘極102的側壁上。間隙壁148設置在閘極130的側壁上。間隙壁150設置在閘極132的側壁上。間隙壁146、間隙壁148、間隙壁150分別可為單層結構或多層結構。間隙壁146、間隙壁148、間隙壁150的材料例如是氧化矽、氮化矽或其組合。The spacer 146 is provided on the side wall of the gate electrode 102. The spacer 148 is provided on the side wall of the gate 130. The spacer 150 is provided on the side wall of the gate electrode 132. The gap wall 146, the gap wall 148, and the gap wall 150 may each have a single-layer structure or a multi-layer structure. The material of the spacer 146, the spacer 148, and the spacer 150 is, for example, silicon oxide, silicon nitride, or a combination thereof.

介電層152設置在介電層120上。反光層110位在介電層152中。介電層152可為單層結構或多層結構。介電層152的材料例如是氧化矽、氮化矽或其組合。The dielectric layer 152 is disposed on the dielectric layer 120. The reflective layer 110 is located in the dielectric layer 152. The dielectric layer 152 may be a single-layer structure or a multi-layer structure. The material of the dielectric layer 152 is, for example, silicon oxide, silicon nitride, or a combination thereof.

內連線結構154設置在介電層152中。內連線結構154可包括導線、接觸窗(contact)、介層窗(via)或其組合。內連線結構154的材料例如是鎢、鋁、銅或其組合。The interconnect structure 154 is disposed in the dielectric layer 152. The interconnect structure 154 may include wires, contacts, vias, or a combination thereof. The material of the interconnect structure 154 is, for example, tungsten, aluminum, copper, or a combination thereof.

介電層156填入開口113中，且覆蓋介電層122與反光層126。介電層156的材料例如是氧化矽。彩色濾光層158設置在介電層156上。彩色濾光層158的材料例如是光阻材料。微透鏡160設置在彩色濾光層158上。微透鏡160的材料例如是光阻材料。The dielectric layer 156 fills the opening 113 and covers the dielectric layer 122 and the reflective layer 126. The material of the dielectric layer 156 is silicon oxide, for example. The color filter layer 158 is provided on the dielectric layer 156. The material of the color filter layer 158 is, for example, a photoresist material. The micro lens 160 is disposed on the color filter layer 158. The material of the microlens 160 is, for example, a photoresist material.

基於上述實施例可知，在影像感測器10中，反光層108設置在基底100中，且位在儲存節點106的周圍，反光層110在第一面S1遮蔽儲存節點106，且反光層112在第二面S2遮蔽儲存節點106。如此一來，反光層108、反光層110與反光層112可充分地圍繞儲存節點106，因此可有效地防止雜散光干擾。此外，反光層108、反光層110與反光層112彼此電性連接，當施加偏壓至反光層108、反光層110與反光層112時，可形成鈍化介面，藉此可有效地降低暗電流。另外，由於影像感測器10可有效地防止雜散光干擾與降低暗電流，因此影像感測器10可具有較佳的影像品質。Based on the above embodiment, in the image sensor 10, the reflective layer 108 is disposed in the substrate 100 and is located around the storage node 106, the reflective layer 110 shields the storage node 106 on the first surface S1, and the reflective layer 112 is located on the The second surface S2 shields the storage node 106. In this way, the reflective layer 108, the reflective layer 110, and the reflective layer 112 can fully surround the storage node 106, and thus can effectively prevent the interference of stray light. In addition, the reflective layer 108, the reflective layer 110, and the reflective layer 112 are electrically connected to each other. When a bias voltage is applied to the reflective layer 108, the reflective layer 110, and the reflective layer 112, a passivation interface can be formed, thereby effectively reducing the dark current. In addition, since the image sensor 10 can effectively prevent stray light interference and reduce dark current, the image sensor 10 can have better image quality.

圖3為本發明另一實施例沿著圖1中的I-I’剖面線與II-II’剖面線的剖面圖。3 is a cross-sectional view of another embodiment of the present invention along the I-I' section line and the II-II' section line in FIG. 1.

請參照圖2與圖3，影像感測器20與影像感測器10的差異如下。在圖3中，影像感測器20不包括圖2中的反光層126。此外，在影像感測器20與影像感測器10中，相同的構件以相同的符號表示，並省略其說明。2 and 3, the difference between the image sensor 20 and the image sensor 10 is as follows. In FIG. 3, the image sensor 20 does not include the reflective layer 126 in FIG. In addition, in the image sensor 20 and the image sensor 10, the same components are denoted by the same symbols, and the description thereof is omitted.

圖4為本發明另一實施例沿著圖1中的I-I’剖面線與II-II’剖面線的剖面圖。4 is a cross-sectional view of another embodiment of the present invention along the I-I' section line and the II-II' section line in FIG. 1.

請參照圖2與圖4，影像感測器30與影像感測器10的差異如下。在圖4的影像感測器30中，反光層110可共形地設置在第一面S1。舉例來說，反光層110可共形地設置在介電層120上。此外，在影像感測器30與影像感測器10中，相同的構件以相同的符號表示，並省略其說明。2 and 4, the difference between the image sensor 30 and the image sensor 10 is as follows. In the image sensor 30 of FIG. 4, the reflective layer 110 may be conformally disposed on the first surface S1. For example, the reflective layer 110 may be conformally disposed on the dielectric layer 120. In addition, in the image sensor 30 and the image sensor 10, the same components are denoted by the same symbols, and the description thereof is omitted.

圖5為本發明另一實施例的影像感測器的上視圖。圖6為沿著圖5中的I-I’剖面線與II-II’剖面線的剖面圖。FIG. 5 is a top view of an image sensor according to another embodiment of the invention. Fig. 6 is a cross-sectional view taken along the section line I-I' and the section line II-II' in Fig. 5.

請參照圖1、圖2、圖5與圖6，影像感測器40與影像感測器10的差異在於隔離結構114的設置方式不同。在圖5與圖6的影像感測器40中，隔離結構114圍繞部分反光層108且更可圍繞部分反光層116。此外，在影像感測器40與影像感測器10中，相同的構件以相同的符號表示，並省略其說明。Please refer to FIGS. 1, 2, 5 and 6, the difference between the image sensor 40 and the image sensor 10 lies in the arrangement of the isolation structure 114. In the image sensor 40 of FIGS. 5 and 6, the isolation structure 114 surrounds a part of the reflective layer 108 and can further surround a part of the reflective layer 116. In addition, in the image sensor 40 and the image sensor 10, the same components are denoted by the same symbols, and the description thereof is omitted.

綜上所述，在上述實施例的影像感測器中，反光層可充分地圍繞儲存節點，因此可有效地防止雜散光干擾。此外，當施加偏壓至反光層時，可形成鈍化介面，藉此可有效地降低暗電流。另外，由於上述實施例的影像感測器可有效地防止雜散光干擾與降低暗電流，因此影像感測器可具有較佳的影像品質。In summary, in the image sensor of the above embodiment, the reflective layer can fully surround the storage node, and therefore can effectively prevent the interference of stray light. In addition, when a bias voltage is applied to the reflective layer, a passivation interface can be formed, thereby effectively reducing the dark current. In addition, since the image sensor of the above embodiment can effectively prevent stray light interference and reduce dark current, the image sensor can have better image quality.

雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.

10、20、30、40:影像感測器 100:基底 102、130、132:閘極 104:感光元件 106:儲存節點 108、110、112、116、126:反光層 113:開口 114:隔離結構 118、120、122、124、152、156:介電層 128:釘紮層 134、136、138:閘介電層 140、142:摻雜區 144:井區 146、148、150:間隙壁 154:內連線結構 158:彩色濾光層 160:微透鏡 S1:第一面 S2:第二面10, 20, 30, 40: image sensor 100: base 102, 130, 132: gate 104: photosensitive element 106: storage node 108, 110, 112, 116, 126: reflective layer 113: opening 114: Isolation structure 118, 120, 122, 124, 152, 156: Dielectric layer 128: pinned layer 134, 136, 138: gate dielectric layer 140, 142: doped area 144: Well Area 146, 148, 150: interstitial wall 154: Internal connection structure 158: Color filter layer 160: Micro lens S1: First side S2: Second side

圖1為本發明一實施例的影像感測器的上視圖。 圖2為沿著圖1中的I-I’剖面線與II-II’剖面線的剖面圖。 圖3為本發明另一實施例沿著圖1中的I-I’剖面線與II-II’剖面線的剖面圖。 圖4為本發明另一實施例沿著圖1中的I-I’剖面線與II-II’剖面線的剖面圖。 圖5為本發明另一實施例的影像感測器的上視圖。 圖6為沿著圖5中的I-I’剖面線與II-II’剖面線的剖面圖。FIG. 1 is a top view of an image sensor according to an embodiment of the invention. Fig. 2 is a cross-sectional view taken along the section line I-I' and the section line II-II' in Fig. 1. 3 is a cross-sectional view of another embodiment of the present invention along the I-I' section line and the II-II' section line in FIG. 1. 4 is a cross-sectional view of another embodiment of the present invention along the I-I' section line and the II-II' section line in FIG. 1. FIG. 5 is a top view of an image sensor according to another embodiment of the invention. Fig. 6 is a cross-sectional view taken along the section line I-I' and the section line II-II' in Fig. 5.

10:影像感測器10: Image sensor

100:基底100: base

102、130、132:閘極102, 130, 132: gate

104:感光元件104: photosensitive element

106:儲存節點106: storage node

108、110、112、116、126:反光層108, 110, 112, 116, 126: reflective layer

113:開口113: opening

118、120、122、124、152、156:介電層118, 120, 122, 124, 152, 156: Dielectric layer

128:釘紮層128: pinned layer

134、136、138:閘介電層134, 136, 138: gate dielectric layer

140、142:摻雜區140, 142: doped area

144:井區144: Well Area

146、148、150:間隙壁146, 148, 150: interstitial wall

154:內連線結構154: Internal connection structure

158:彩色濾光層158: Color filter layer

160:微透鏡160: Micro lens

S1:第一面S1: First side

S2:第二面S2: Second side

Claims (10)

一種影像感測器，包括： 基底，具有相對的第一面與第二面； 第一閘極，設置在所述第一面的所述基底上； 感光元件，位在所述第一閘極的一側的所述基底中； 儲存節點，位在所述第一閘極的另一側的所述基底中； 至少一個第一反光層，設置在所述基底中，且位在所述儲存節點的周圍； 第二反光層，在所述第一面遮蔽所述儲存節點，且電性連接至所述至少一個第一反光層；以及 第三反光層，在所述第二面遮蔽所述儲存節點，且電性連接至所述至少一個第一反光層。An image sensor, including: The substrate has a first surface and a second surface opposite to each other; The first gate is arranged on the substrate on the first surface; The photosensitive element is located in the substrate on one side of the first gate; A storage node located in the substrate on the other side of the first gate; At least one first reflective layer is disposed in the substrate and located around the storage node; A second reflective layer, shielding the storage node on the first surface, and electrically connected to the at least one first reflective layer; and The third light-reflecting layer shields the storage node on the second surface and is electrically connected to the at least one first light-reflecting layer. 如申請專利範圍第1項所述的影像感測器，其中所述至少一個第一反光層從所述第一面延伸至所述第二面。The image sensor according to claim 1, wherein the at least one first reflective layer extends from the first surface to the second surface. 如申請專利範圍第1項所述的影像感測器，其中所述第二反光層共形地設置在所述第一面。The image sensor according to claim 1, wherein the second reflective layer is conformally disposed on the first surface. 如申請專利範圍第1項所述的影像感測器，其中所述至少一個第一反光層的材料包括摻雜多晶矽或金屬，所述第二反光層的材料包括金屬或摻雜多晶矽，且所述第三反光層的材料包括摻雜多晶矽或金屬。The image sensor according to claim 1, wherein the material of the at least one first reflective layer includes doped polysilicon or metal, and the material of the second reflective layer includes metal or doped polysilicon, and The material of the third light reflecting layer includes doped polysilicon or metal. 如申請專利範圍第1項所述的影像感測器，其中所述影像感測器為背照式影像感測器，所述第二反光層在所述第一面更遮蔽所述感光元件，且所述第三反光層具有暴露出所述感光元件的開口。The image sensor according to claim 1, wherein the image sensor is a back-illuminated image sensor, and the second reflective layer further shields the photosensitive element on the first surface, And the third light-reflecting layer has an opening exposing the photosensitive element. 如申請專利範圍第1項所述的影像感測器，更包括： 至少一個第四反光層，設置在所述基底中，且位在所述感光元件的周圍。The image sensor described in item 1 of the scope of patent application further includes: At least one fourth light reflecting layer is arranged in the substrate and located around the photosensitive element. 如申請專利範圍第6項所述的影像感測器，更包括： 第一介電層，位在所述至少一個第一反光層與所述基底之間； 第二介電層，位在所述第二反光層與所述基底之間； 第三介電層，位在所述第三反光層與所述基底之間；以及 第四介電層，位在所述第四反光層與所述基底之間。The image sensor described in item 6 of the scope of patent application further includes: The first dielectric layer is located between the at least one first reflective layer and the substrate; The second dielectric layer is located between the second light-reflecting layer and the substrate; The third dielectric layer is located between the third light-reflecting layer and the substrate; and The fourth dielectric layer is located between the fourth light reflecting layer and the substrate. 如申請專利範圍第1項所述的影像感測器，更包括： 第五反光層，設置在所述第三反光層上。The image sensor described in item 1 of the scope of patent application further includes: The fifth light reflecting layer is arranged on the third light reflecting layer. 如申請專利範圍第1項所述的影像感測器，更包括： 隔離結構，設置在所述基底中，且圍繞部分所述至少一個第一反光層。The image sensor described in item 1 of the scope of patent application further includes: The isolation structure is arranged in the substrate and surrounds a part of the at least one first reflective layer. 如申請專利範圍第1項所述的影像感測器，更包括： 第二閘極，設置在所述第一面的所述基底上，且位在所述儲存節點的遠離所述第一閘極的一側； 第三閘極，設置在所述第一面的所述基底上，且位在所述第二閘極的遠離所述儲存節點的一側； 第一閘介電層，位在所述第一閘極與所述基底之間； 第二閘介電層，位在所述第二閘極與所述基底之間；以及 第三閘介電層，位在所述第三閘極與所述基底之間。The image sensor described in item 1 of the scope of patent application further includes: The second gate is arranged on the substrate on the first surface and is located on the side of the storage node away from the first gate; The third gate is arranged on the substrate on the first surface and is located on the side of the second gate away from the storage node; The first gate dielectric layer is located between the first gate and the substrate; The second gate dielectric layer is located between the second gate and the substrate; and The third gate dielectric layer is located between the third gate electrode and the substrate.
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