JP2010045083A - Solid-state imaging element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging element in which cross talk is reduced and further, which can be easily manufactured. <P>SOLUTION: A plurality of photodiodes 16 are arranged over a predetermined area. A plurality of metal wiring layers 50 to 52 are formed entirely or partially in an area of the predetermined area other than effective light reception areas of the plurality of photodiodes 16. A light shield film 30 is formed entirely or partially in the area of the predetermined area other than the effective light reception areas of the plurality of photodiodes 16. The light shield film 30 is positioned below the lowermost metal wiring layer 50 among the plurality of metal wiring layers 50 to 52 and above surfaces of the plurality of photodiodes 16. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device.

  In a solid-state imaging device, it is ideal that light incident on the photoelectric conversion unit of one pixel is photoelectrically converted only in that pixel, and the electric charge generated thereby is accumulated only in that pixel. However, in reality, a part of the light incident on one pixel enters another pixel by reflection or refraction, or the charge generated by photoelectric conversion in one pixel diffuses in the semiconductor substrate and another pixel May be mixed in. In this way, mixing an output signal of a pixel with a signal component of another pixel is called crosstalk. Since the crosstalk lowers the resolution of the output image or causes the color balance to be lost, it is desirable that the crosstalk be as small as possible.

In the solid-state imaging device disclosed in Patent Document 1 below, in order to reduce crosstalk due to incident light obliquely incident on the pixel, the light-shielding metal film faces the light transmission layer formed above the photodiode. It is formed on the side wall of the light transmission layer so as to surround from the side. The lower end of the light shielding metal film is disposed at a position lower than the upper surface of the lowermost metal wiring layer. On the other hand, the upper end of the light-shielding metal film is disposed at the same height as the uppermost metal wiring layer.
JP 2007-129192 A

  The solid-state imaging device disclosed in Patent Document 1 forms a recess by etching away the insulating layer on the photodiode, and then deposits a light-shielding metal film on the sidewall of the recess, and further fills the recess with a light transmission layer It is manufactured in the process of doing.

  For example, when a solid-state imaging device having a photodiode size of 3 μm × 3 μm is considered and the solid-state imaging device uses three layers of metal wiring, the thickness of the insulating film on the photodiode is about 5 μm. . Therefore, the concave portion has an opening area of 3 μm × 3 μm and a depth of 5 μm. The manufacturing process of etching the insulating film, depositing the light-shielding metal film on the side wall, and filling the light transmitting layer with respect to the concave portion having such a shape is very difficult. Therefore, the manufacturing cost of the solid-state image sensor increases. Furthermore, there are hundreds to tens of millions of photodiodes in the solid-state imaging device. Since it is extremely difficult to perform the above-described advanced processing on all photodiodes, the yield decreases. In addition, with the progress of miniaturization and the increase in the number of pixels, the above processing becomes increasingly difficult.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a solid-state imaging device that can reduce crosstalk and can be easily manufactured.

  The following aspects are presented as means for solving the problems. The solid-state imaging device according to the first aspect includes a plurality of photoelectric conversion units arranged over a predetermined region, and a plurality of layers formed in a region other than the effective light receiving region of the plurality of photoelectric conversion units in the predetermined region. A metal wiring layer and a light shielding film formed in the region other than the effective light receiving region, and disposed between the lowermost metal wiring layer of the plurality of metal wiring layers and the surface of the photoelectric conversion unit; It is equipped with.

  In the solid-state imaging device according to the second aspect, in the first aspect, the light shielding film is formed in a region where crosstalk is reduced as compared with a case where the light shielding film is not formed.

  In the solid-state imaging device according to the third aspect, in the first or second aspect, the light shielding film is formed in a region along at least a part of the outer periphery of each effective light receiving region.

  In the solid-state imaging device according to the fourth aspect, in any one of the first to third aspects, a fixed potential is applied to the light shielding film.

  A solid-state imaging device according to a fifth aspect includes, in any one of the first to fourth aspects, a plurality of transistors arranged over the predetermined region, and the light shielding film is a gate electrode of the plurality of transistors. It is formed in a region overlapping with.

  A solid-state imaging device according to a sixth aspect includes, in any one of the first to fourth aspects, a plurality of transistors arranged over the predetermined region, and the light-shielding film includes gate electrodes of the plurality of transistors. The light shielding film is made of the same material, and is formed in a region that does not overlap the gate electrodes of the plurality of transistors.

  In any one of the first to sixth aspects, a solid-state imaging device according to a seventh aspect is formed in a first conductivity type well in which the plurality of photoelectric conversion units are disposed, and in the first conductivity type well. A first conductivity type diffusion region for supplying a fixed potential to the first conductivity type well, and the light shielding film is formed around the first conductivity type diffusion region.

  According to the present invention, it is possible to provide a solid-state imaging device that can reduce crosstalk and can be easily manufactured.

  Hereinafter, a solid-state imaging device according to the present invention will be described with reference to the drawings.

  [First Embodiment]

  FIG. 1 is a schematic configuration diagram showing a solid-state imaging device 1 according to the first embodiment of the present invention. The solid-state image sensor 1 is configured as a CMOS solid-state image sensor.

  A solid-state imaging device 1 according to the present embodiment, like a general CMOS solid-state imaging device, has a plurality of pixels 2 arranged in a two-dimensional manner, a vertical scanning circuit 3, a horizontal scanning circuit 4, and a known A read circuit 5 including a CDS circuit and the like, and an output amplifier 6 are provided. An electrical signal output from a photodiode 16 (not shown in FIG. 1; see FIG. 2 described later) of each pixel 2 is taken out by the vertical scanning circuit 3 to the readout circuit 5 via the vertical signal line 14 in units of rows, and is horizontally The scanning circuit 4 sequentially outputs image signals to the output terminal 7 via the output amplifier 6 in units of columns. A region where the pixels 2 are two-dimensionally arranged is a pixel region 100. In other words, a plurality of pixels 2 (and thus a plurality of photodiodes 16) are arranged over the pixel region 100.

  FIG. 2 is a circuit diagram showing the pixel 2 in FIG. As shown in FIG. 2, each pixel 2 includes a photodiode 16 as a photoelectric conversion unit, a transfer transistor 17, a floating diffusion 18, a reset transistor 19, and an amplification transistor 20 that outputs a signal corresponding to the gate potential. And a selection transistor 21.

  As shown in FIGS. 1 and 2, the gate of the selection transistor 21 of each pixel 2 is commonly connected to the selection line 13 (φSEL) for each row. The gate of the reset transistor 19 of each pixel 2 is commonly connected to the reset line 11 (φRST) for each row. The gate of the transfer transistor 17 of each pixel 2 is commonly connected to the transfer line 12 (φTX) for each row. The source of the selection transistor 21 of each pixel 2 is commonly connected to the vertical signal line 14 for each column. The selection line 13, the reset line 11, and the transfer line 12 are connected to the vertical scanning circuit 3, and the vertical signal line 14 is connected to the readout circuit 5. Each pixel 2 is connected to a VDD power wiring 10 and a VSS power wiring 15 for supplying power applied to the terminals 8 and 9.

  FIG. 3 is a schematic plan view schematically showing 2 × 2 pixels 2 of the solid-state imaging device 1 shown in FIG. FIG. 4 is a schematic plan view showing the light-shielding film 30 removed from FIG. FIG. 5 is a schematic plan view showing the light shielding film 30 and the photodiode 16 in FIG. FIG. 6 is a schematic cross-sectional view along the line A-A ′ in FIG. 3. FIG. 7 is a schematic cross-sectional view along the line B-B ′ in FIG. 3. For ease of understanding, FIG. 4 also includes the A-A ′ line and the B-B ′ line as in FIG. 3. In practice, a color filter and a microlens are disposed above the photodiode 16 above the insulating layer 47, but are omitted here.

  3 and 4, reference numerals 61 to 65 denote N-type impurity diffusion regions formed in the P-type well 42 (see FIGS. 6 and 7) formed on the N-type silicon substrate 41. The diffusion region 65 is a power supply diffusion portion to which the power supply voltage VDD is applied by the power supply wiring 10. The diffusion regions 61 and 62 are connected by a wiring 66 and constitute the floating diffusion 18 as a whole. Reference numerals 17G, 19G, 20G, and 21G denote gate electrodes of the transistors 17, 19 to 21 that are formed of a polycrystalline silicon film.

  As shown in FIGS. 6 and 7, the photodiode 16 is embedded with an N-type charge storage layer 32 formed in the P-type well 42 and a P-type depletion prevention layer 33 disposed on the surface side thereof. Type photodiode. However, the photodiode 16 may be a photodiode without the depletion prevention layer 33. Each photodiode 16 is separated by a thick silicon oxide film 43 formed by LOCOS and a P-type isolation diffusion 67 disposed therebelow.

  The photodiode 16 photoelectrically converts incident light and accumulates the generated charge in the charge accumulation layer 32. The charges accumulated in the charge accumulation layer 32 of the photodiode 16 are transferred to the floating diffusion 18 (diffusion regions 61 and 62) when the transfer transistor 17 is turned on.

  The transfer transistor 17 is a MOS transistor having the charge storage layer 32 of the photodiode 16 as a source and the diffusion region 61 of the floating diffusion 18 as a drain. The transfer transistor 17 is driven by a drive signal φTX applied to the gate electrode 17G.

  The floating diffusion 18 (diffusion regions 61 and 62) is electrically connected to the gate electrode 20G of the amplification transistor 20 by a wiring 66.

  The amplification transistor 20 is a MOS transistor having the power supply diffusion portion 65 as a drain and the diffusion region 64 as a source. As described above, the gate electrode 20G of the amplification transistor 20 is connected to the floating diffusion 18 (diffusion regions 61 and 62). The amplification transistor 20 outputs an electrical signal corresponding to the voltage of the gate electrode 20G. Therefore, the amplification transistor 20 outputs an electrical signal corresponding to the amount of charge generated and accumulated by the photodiode 16.

  The selection transistor 21 is a MOS transistor having the diffusion region 64 as a drain and the diffusion region 63 as a source. When the selection transistor 21 is turned on, the output of the amplification transistor 20 is output to the vertical signal line 14. That is, the amplification by the amplification transistor 20 and the selection transistor 21 enables reading by the source follower.

  The reset transistor 19 is a MOS transistor having the power source diffusion portion 65 as a drain and the diffusion region 62 of the floating diffusion 18 as a source. The reset transistor 19 resets the electric charge accumulated in the floating diffusion 18 by being turned on.

  A P-type diffusion region 31 for fixing the potential of the P-type well 42 to the predetermined potential VSS is formed in the P-type well 42. The P type diffusion region 31 is connected to the VSS power supply wiring 15.

  The vertical signal line 14, the VSS power supply wiring 15, and the wiring 66 are formed by the first metal wiring layer 50. The selection line 13, the reset line 11, and the transfer line 12 are formed of a second metal wiring layer 51. The third metal wiring layer 52 forms the VDD power supply wiring 10 and also has a role of defining an opening for incident light that enters the pixel 2 perpendicularly. That is, the third metal wiring layer 52 (VDD power supply wiring 10) is formed in the entire region other than the effective light receiving region of the photodiode 16 in the pixel region 100, and also functions as a light shielding film. The first metal wiring layer 50 and the second metal wiring layer 51 are partially formed in the pixel region 100 other than the effective light receiving region of the photodiode 16. Each metal wiring layer 50-52 is electrically insulated by interlayer insulation layers 44-47.

  In the present embodiment, as shown in FIGS. 3 and 5, the light shielding film 30 is entirely formed in a region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100. . Specifically, the light shielding film 30 is a contact hole for electrically connecting predetermined regions above and below the light shielding film 30 in regions other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100. It is formed in all regions except the region in the vicinity of. Here, the contact hole is formed between the first metal wiring layer 50 and a gate electrode or a diffusion region provided in a region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100. This is a contact hole for electrical connection. As can be seen from the above description, in the present embodiment, the light shielding film 30 is formed in a region including a region along the entire outer periphery of the effective light receiving region of each photodiode 16.

  As shown in FIGS. 6 and 7, the light shielding film 30 is lower than the first metal wiring layer 50, which is the lowest layer among the metal wiring layers 50 to 52, and is lower than the surface of each photodiode 16. It is placed at a high position. In order to increase the crosstalk reduction effect, it is desirable to dispose the lower surface of the light shielding film 30 as low as possible.

  As the light-shielding film 30, for example, a reflective metal film such as aluminum, titanium, or chromium may be used, or a light-absorbing metal that absorbs light of 50% or more such as titanium nitride or tungsten may be used. Other light absorbing films such as a polycrystalline silicon film may be used. Titanium nitride exhibits an absorptance of 50 to 75% in the wavelength range of 400 to 500 nm, and exhibits light absorptivity on the short wavelength side. Tungsten is a light-absorbing metal that exhibits an absorptance of 50% or more in almost the entire visible light region other than the wavelength region near 650 nm. An alloy of these metals or a laminated film may be used.

  In the present embodiment, the light shielding film 30 is made of a conductive material such as metal, and the light shielding film 30 is also formed in a region overlapping the gate electrodes 17G, 19G, 20G, and 21G. Therefore, in order to insulate the light shielding film 30, an insulating film 35 is formed below the light shielding film 30. As the insulating film 35, for example, a silicon oxide film or a silicon nitride film is used. In manufacturing, the gate electrodes 17G, 19G, 20G, and 21G are formed, the insulating film 35 is subsequently formed, and then the light shielding film 30 is formed.

  In the present embodiment, the light shielding film 30 is connected to the VSS power supply wiring 15 as a portion to which a fixed potential is applied by the contact hole 70. Therefore, it is desirable because unnecessary stray capacitance is not formed by the light shielding film 30. However, in the present invention, the light shielding film 30 may be electrically floated without being connected to a portion to which a fixed potential is applied.

  According to the present embodiment, since incident light incident obliquely is shielded by the light shielding film 30, crosstalk is reduced as compared with the case where the light shielding film 30 is not provided. For example, as shown in FIGS. 6 and 7, the incident light 48 incident obliquely is shielded by the light shielding film 30 and does not enter the P-type well 42, so that no charge causing crosstalk is generated. .

  FIG. 8 is a schematic plan view schematically showing 2 × 2 pixels 2 of the solid-state imaging device according to the comparative example compared with the solid-state imaging device 1 according to the present embodiment, and corresponds to FIG. 3. FIG. 9 is a schematic cross-sectional view taken along line C-C ′ in FIG. 8 and corresponds to FIG. 6. FIG. 10 is a schematic cross-sectional view taken along line D-D ′ in FIG. 8 and corresponds to FIG. 7. 8 to 10, elements that are the same as or correspond to those in FIGS. 3 to 7 are given the same reference numerals, and redundant descriptions thereof are omitted.

  This comparative example is different from the present embodiment only in that the light shielding film 30, the insulating film 35, and the contact hole 70 are not formed. In this comparative example, since the light shielding film 30 is not formed, crosstalk increases. For example, as shown in FIG. 9, incident light 48 obliquely incident on the left pixel 2 in FIG. 9 is not shielded by the first to third metal wiring layers 50 to 52, and is a P-type well 42. It is photoelectrically converted to produce charge 34. The generated charge 34 moves in the P-type well 42 and is captured by the charge storage layer 32 of the photodiode 16 of the right pixel 2 and is mixed into the signal of the right pixel 2 to form crosstalk.

  On the other hand, in the present embodiment, as described above, as shown in FIGS. 6 and 7, the incident light 48 incident obliquely is shielded by the light shielding film 30, so that crosstalk is reduced. .

  And according to this Embodiment, unlike the conventional solid-state image sensor mentioned above, the light shielding film 30 is not formed in the side wall of a deep recessed part, but can be formed by normal film-forming. . Therefore, the solid-state imaging device 1 according to the present embodiment can be easily manufactured as compared with the above-described conventional solid-state imaging device, and the manufacturing cost can be reduced.

  In the present embodiment, the light shielding film 30 is entirely formed in a region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100 as described above. Therefore, this embodiment is desirable because the light shielding property against oblique incident light is enhanced and the crosstalk reduction effect is enhanced. However, it may be formed only partially in a region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100. Even if the light shielding film 30 is only partially formed, the crosstalk reduction effect can be obtained to some extent if the light shielding film 30 is formed at a location where the crosstalk is reduced as compared with the case where the light shielding film 30 is not provided. . Even when the light shielding film 30 is partially formed, if the light shielding film 30 is formed in a region including at least a part of the outer periphery of the effective light receiving region of each photodiode 16, an effect of reducing crosstalk can be obtained. Can do.

  In the region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100, when the light shielding film 30 is formed only in a part of the region, if the light shielding film 30 is not provided, the crosstalk is particularly large. It is preferable to form the light shielding film 30 in such a region. As an example of such a region, a region where the light shielding film 36 is formed in the second embodiment described below can be cited.

  In the present embodiment, since the light shielding film 30 is also formed in the region overlapping with the gate electrodes 17G, 19G, 20G, and 21G, the light shielding film 30 is formed only in the region not overlapping with the gate electrodes 17G, 19G, 20G, and 21G. As compared with the case of forming, the light shielding property against oblique incident light is enhanced, and the effect of reducing crosstalk is obtained.

  [Second Embodiment]

  FIG. 11 is a schematic plan view schematically showing 2 × 2 pixels 2 of the solid-state imaging device according to the second embodiment of the present invention, and corresponds to FIG. FIG. 12 is a schematic cross-sectional view taken along line E-E ′ in FIG. 11 and corresponds to FIG. 6. FIG. 13 is a schematic cross-sectional view along the line F-F ′ in FIG. 11. 11 to 13, the same or corresponding elements as those in FIGS. 3 to 7 are denoted by the same reference numerals, and redundant description thereof is omitted.

  The present embodiment is different from the first embodiment only in that the light shielding film 30 and the insulating film 35 are removed and a light shielding film 36 is formed instead. .

  In the present embodiment, as shown in FIG. 11, the light shielding film 36 is partially formed in a region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100. Specifically, the light shielding film 36 is not formed in the region between the pixels 2 arranged in the vertical direction in FIG. 11, and is a P-type diffusion region for fixing the potential of the P-type well 42 to the predetermined potential VSS. It is formed in a region surrounding 31. Thus, in the present embodiment, the light shielding film 36 is formed in a region that does not overlap with the gate electrodes 17G, 19G, 20G, and 21G. In the present embodiment, the light shielding film 36 is made of polycrystalline silicon that is the same material as the gate electrodes 17G, 19G, 20G, and 21G. Further, in the present embodiment, by being formed in the same layer as the gate electrodes 17G, 19G, 20G, and 21G, it is more than the first metal wiring layer 50 that is the lowest layer among the metal wiring layers 50 to 52. It is arranged at a low position and higher than the surface of each photodiode 16.

  In the present embodiment, as described above, the light shielding film 36 is made of polycrystalline silicon, which is the same material as the gate electrodes 17G, 19G, 20G, and 21G, and is in a region that does not overlap with the gate electrodes 17G, 19G, 20G, and 21G. Is formed. Therefore, the light shielding film 36 can be formed simultaneously with the gate electrodes 17G, 19G, 20G, and 21G. For this reason, according to the present embodiment, a special process for forming the light shielding film 36 is not required as compared with the first embodiment. In this embodiment, since the insulating film 35 is not provided, a process for forming the insulating film 35 is not necessary. Therefore, the solid-state imaging device according to the present embodiment can be manufactured more easily than the solid-state imaging device 1 according to the first embodiment, and the manufacturing cost can be further reduced.

  In the present embodiment, the light shielding film 36 is connected to the VSS power supply wiring 15 as a portion to which a fixed potential is applied, through the contact hole 70, similarly to the light shielding film 30 in the first embodiment. Therefore, it is desirable because unnecessary stray capacitance is not formed by the light shielding film 36. However, in the present invention, the light shielding film 36 may be electrically floated without being connected to a portion to which a fixed potential is applied.

  As described above, the P-type diffusion region 31 is for fixing the potential of the P-type well 42, and is fixed at a predetermined potential VSS, usually a low potential such as a ground potential. Therefore, as shown in FIG. 9 showing the comparative example described above, if charges (electrons) are generated in the vicinity of the P-type diffusion region 31, the charges are not captured in the P-type diffusion region 31, and the adjacent pixel photo It is captured by the charge storage layer 32 of the diode 16 and crosstalk occurs. Thus, if there is no light shielding film 36, crosstalk is likely to occur near the P-type diffusion region 31.

  However, in the present embodiment, as described above, the light shielding film 36 is formed in a region surrounding the P-type diffusion region 31. Therefore, according to the present embodiment, the incident light 48 for generating electric charges in the vicinity of the P-type diffusion region 31 is shielded by the light-shielding film 36 as shown in FIG. Therefore, the light does not enter the P-type well 42. Therefore, according to the present embodiment, electric charges that are likely to cause crosstalk are not generated, and an effect of reducing crosstalk can be obtained.

  On the other hand, in the present embodiment, the light shielding film 36 is not formed in the region between the pixels 2 arranged in the vertical direction in FIG. However, in this region, a high-potential power supply diffusion 65 serving as the drains of the N-type MOS transistors 19 and 20 is disposed. Therefore, as shown in FIG. 13, even if the charge 34 is generated in the vicinity by the incident light 48 incident obliquely, the charge 34 is captured by the power source diffusion portion 65, so that crosstalk hardly occurs. For this reason, even if the light shielding film 36 is not formed in the region between the pixels 2 arranged in the vertical direction in FIG. 11, the effect of reducing the crosstalk is not greatly impaired.

  Therefore, according to the present embodiment, the light shielding film 36 is partially formed in a region other than the effective light receiving region of the photodiode 16 of each pixel 2 in the pixel region 100, but the first A large crosstalk reduction effect can be obtained without much different from the case of the embodiment.

  Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments.

  For example, it goes without saying that the P-type and the N-type may be reversed with respect to the conductivity type of each part described above. The present invention can also be applied to various solid-state image sensors other than CMOS solid-state image sensors.

1 is a schematic configuration diagram illustrating a solid-state imaging device according to a first embodiment of the present invention. It is a circuit diagram which shows the pixel in FIG. FIG. 2 is a schematic plan view schematically showing 2 × 2 pixels of the solid-state imaging device shown in FIG. 1. It is a schematic plan view which shows what remove | excluded the light shielding film from FIG. It is a schematic plan view which shows the light shielding film and photodiode in FIG. FIG. 4 is a schematic cross-sectional view along the line A-A ′ in FIG. 3. FIG. 4 is a schematic sectional view taken along line B-B ′ in FIG. 3. It is a schematic plan view which shows typically 2 * 2 pixels of the solid-state image sensor by a comparative example. FIG. 9 is a schematic cross-sectional view taken along line C-C ′ in FIG. 8. It is a schematic sectional drawing in alignment with the D-D 'line in FIG. It is a schematic plan view which shows typically 2 * 2 pixels of the solid-state image sensor by the 2nd Embodiment of this invention. It is a schematic sectional drawing in alignment with the E-E 'line in FIG. It is a schematic sectional drawing in alignment with the F-F 'line | wire in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Solid-state image sensor 2 Pixel 16 Photodiode 17, 19, 20, 21 Transistor 17G, 19G, 20G, 21G Gate electrode 30, 36 Light shielding film 50 1st metal wiring layer 51 2nd metal wiring layer 52 3 layers Eye metal wiring layer

Claims (7)

A plurality of photoelectric conversion units arranged over a predetermined area;
A plurality of metal wiring layers formed in a region other than the effective light receiving region of the plurality of photoelectric conversion units in the predetermined region;
A light-shielding film formed in the region other than the effective light-receiving region, and disposed between the lowermost metal wiring layer of the plurality of metal wiring layers and the surface of the photoelectric conversion unit;
A solid-state imaging device comprising:   The solid-state imaging device according to claim 1, wherein the light shielding film is formed in a region where crosstalk is reduced as compared with a case where the light shielding film is not formed.   The solid-state imaging device according to claim 1, wherein the light shielding film is formed in a region along at least a part of an outer periphery of each effective light receiving region.   The solid-state imaging device according to claim 1, wherein a fixed potential is applied to the light shielding film. Comprising a plurality of transistors arranged over the predetermined region;
5. The solid-state imaging device according to claim 1, wherein the light shielding film is formed in a region overlapping with gate electrodes of the plurality of transistors. Comprising a plurality of transistors arranged over the predetermined region;
The light shielding film is made of the same material as the gate electrodes of the plurality of transistors,
5. The solid-state imaging device according to claim 1, wherein the light shielding film is formed in a region that does not overlap the gate electrodes of the plurality of transistors. A first conductivity type well in which the plurality of photoelectric conversion units are disposed;
A first conductivity type diffusion region formed in the first conductivity type well for supplying a fixed potential to the first conductivity type well;
With
The solid-state imaging device according to claim 1, wherein the light shielding film is formed around the first conductivity type diffusion region.

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