TW202111787A - Method for provisionally bonding semiconductor substrate - Google Patents

Abstract

The present invention provides a method for temporarily and provisionally bonding a semiconductor substrate to a provisional support substrate, the method comprising a step in which a surface of the semiconductor substrate, which is to be mounted on a mounting substrate, on the opposite side to the side which is mounted on the mounting substrate is provisionally bonded to the provisional support substrate. The method for provisionally bonding the semiconductor substrate is characterized in that in the provisional bonding step, the semiconductor substrate and the provisional support substrate are bonded together by thermal compressive bonding, with a dielectric layer disposed therebetween. Thus, a method for provisionally bonding a semiconductor substrate is provided, the method making it possible to: invert and bond a semiconductor substrate, which may have an epitaxial structure or the like and is to be mounted on a mounting substrate, to a provisional support substrate; perform flip-mounting after a device structure is formed; and then peel off the provisional support substrate.

Description

Temporary bonding method of semiconductor substrate

The present invention relates to a temporary bonding method for temporarily bonding a semiconductor substrate mounted on a mounting substrate to a temporary support substrate.

We propose to mount the micro LED (Light-emitting diode; light-emitting diode) to the display device of the drive substrate. Generally, the size (longitudinal length) of the micro LED is 20-30μm or less, and the target size is about 10μm. When the thickness of the micro LED is greater than the vertical and horizontal length, the chip will tip over during installation, and the installation yield will decrease. Therefore, the thickness of the micro LED chip must be smaller than the vertical and horizontal length.

However, because the chip of this size is very small, it cannot be mounted with the suction arm as in the past, and a wafer to wafer (per wafer) step must be used. Therefore, fabricating a micro LED structure on a wafer and mounting it on the drive substrate with flip-chip is the best method to improve the mounting yield.

In the case of using the red LED to apply the above steps, if a structure that can be applied to the step of forming electrodes in the wafer state is to be fabricated, only a structure with reduced lifetime characteristics can be used. In the case of AlGaInP (aluminum indium gallium phosphide) LED structure, using GaP (gallium phosphide) layer as the epitaxial termination structure, the lifetime characteristics and light-emitting characteristics are good, but GaP and AlGaInP (epitaxial structure) In the lattice mismatch system, the GaP layer cannot be placed in the lower layer of the epitaxial structure. Therefore, GaP is provided on the epitaxial upper layer, but when the electrode is formed in the wafer state, the electrode is provided on the GaP surface side, so the AlGaInP surface becomes the light extraction surface during mounting. When AlGaInP becomes the light extraction surface, the lifetime characteristics and light extraction characteristics are inferior to GaP.

Accordingly, in order to realize a micro LED display with good characteristics, it is necessary to realize a device that uses the GaP surface as the light extraction surface. To this end, the epitaxial structure is flipped once to form a structure with electrodes, and then mounted, the best device structure can be formed. In addition, in order to reverse the epitaxial structure, a step of transferring to a temporary support substrate is required. Furthermore, to realize the transfer bonding, it is preferable to be a bonding that can be easily peeled off after forming the device structure, that is, temporary bonding.

Regarding the temporary bonding method, we have disclosed a method of bonding through an adhesive material such as silicone resin or resin (refer to Patent Documents 1 and 2). However, in the case of temporary bonding through these substances, it cannot withstand the heat treatment required for the formation of ohmic contacts after electrode formation.

We disclosed that there are technologies such as direct bonding, metal bonding, and adhesive bonding under the condition of selecting the bonding that can withstand the heat treatment required for the formation of the ohmic contact after the formation of the electrode, but these are the bonding methods that become permanent bonding, and it is not easy After forming the device structure and performing flip chip mounting, the temporary support substrate is peeled off.

Accordingly, we pursue the following technology: flip a semiconductor substrate with an epitaxial structure, etc., and join it to a temporary support substrate, and form a device structure, then perform flip-chip mounting, and after mounting, peel off the temporary support substrate Construction/joining method, etc. [Prior Technical Literature] [Patent Literature]

Patent Document 1: Japanese Patent Application Publication No. 2006-328104 Patent Document 2: Specification of US Patent No. 7541264

[The problem to be solved by the invention]

The present invention is made in view of the above problems, and its object is to provide a temporary bonding method for semiconductor substrates, in which a semiconductor substrate having an epitaxial structure or the like mounted on a mounting substrate is turned over and bonded to a temporary support substrate to form a device structure. Flip-chip mounting is performed, and after mounting, the temporary support substrate can be peeled off. [The way to solve the problem]

In order to solve the above object, the present invention provides a temporary bonding method of a semiconductor substrate, which is a method of temporarily bonding a semiconductor substrate to a temporary support substrate, at least having: a step of temporary bonding, mounting on the mounting substrate The surface of the semiconductor substrate opposite to the mounting side of the aforementioned mounting substrate is temporarily bonded to the temporary support substrate; and the temporary bonding method of this semiconductor substrate is characterized by: In the temporary bonding step, the semiconductor substrate and the temporary support substrate are thermocompression bonded via a dielectric layer.

If it is such a temporary bonding method, the defective bonding area can be greatly reduced, and the peeling can be easily and surely performed by etching, thereby improving the peeling yield. In addition, the dielectric layer is inserted between the functional layer and the bonding layer, so that when the functional layer is peeled from the support substrate, the bonding layer does not need to be etched or peeled off, so the bonding method and bonding material can be freely selected. Furthermore, since the freedom of choice of the bonding material is increased, the bonding method and bonding material suitable for low-temperature bonding can be selected. Therefore, the influence of the heat applied to the drive substrate along with the bonding can be minimized to be ignored degree.

At this time, it is advisable to have a BCB (Benzocyclobutene) bonding layer forming step before the temporary bonding step, forming the dielectric layer on the temporary bonding surface of the semiconductor substrate, and further after the formation A BCB bonding layer is formed on the dielectric layer; then, it is advisable to temporarily bond the semiconductor substrate to the temporary support substrate.

If this method is adopted, the temporary joining can be performed more reliably.

In addition, before the temporary bonding step, it is preferable to have: a first dielectric layer forming step, forming a first dielectric layer on the temporarily bonded surface of the semiconductor substrate; and a second dielectric layer step, after the temporary bonding A second dielectric layer is formed on the side of the support substrate; then, the first and second dielectric layers are preferably bonded to each other by thermocompression, so as to temporarily bond the semiconductor substrate to the temporary support substrate.

If this method is used, temporary bonding can be performed more reliably.

In this case, it is advisable to have a first metal layer forming step before the temporary bonding step, forming the dielectric layer on the temporarily bonded surface of the semiconductor substrate, and further on the formed dielectric layer Forming a first metal layer; and a second metal layer forming step, forming a second metal layer on the side of the temporary support substrate: then, the first and second metal layers are preferably thermocompression bonded to each other, so as to bond the semiconductor The substrate is temporarily bonded to the temporary support substrate via the dielectric layer.

If this method is adopted, temporary bonding can be performed more reliably.

In addition, it is preferable to set the dielectric layer to be a silicon oxide film, and to set the temporary support substrate to be a silicon substrate.

If the dielectric system silicon oxide film is used, the dielectric can be formed more easily, and the silicon substrate can be conveniently used as a temporary support substrate. [Effects of Invention]

According to the temporary bonding method of the present invention, the defective bonding area can be greatly reduced, and the peeling can be performed more easily and surely by etching, thereby improving the peeling yield. In addition, since the dielectric layer is inserted between the functional layer and the bonding layer, it is not necessary to etch or even peel the bonding layer when the functional layer is peeled from the support substrate. Therefore, the bonding method and bonding material can be freely selected. Furthermore, since the freedom of choice of the bonding material increases, the bonding method and bonding material suitable for low-temperature bonding can be selected, so the influence of the heat applied to the drive substrate along with the bonding can be minimized to be ignored degree.

[Preferable form for implementing the invention]

As mentioned above, we pursue the following technology: flip a semiconductor substrate with an epitaxial structure, etc. and join it to a temporary support substrate, form a device structure, then perform flip-chip mounting, and after mounting, the temporary support substrate can be peeled off. /Joining method, etc. After intensively studying the method of temporarily bonding a semiconductor substrate to a temporary support substrate, the inventor found that the semiconductor substrate and the temporary support substrate can be bonded by thermocompression via a dielectric, thereby reducing bonding failures and also It is easy to peel, improves the peel yield, and completes the present invention.

That is, the present invention is a method for temporarily bonding semiconductor substrates. The semiconductor substrate is temporarily bonded to a temporary support substrate, at least having: a temporary bonding step, and the semiconductor substrate mounted on the mounting substrate and the semiconductor substrate are mounted on the mounting substrate. The mounting side of the mounting substrate is temporarily bonded to the temporary support substrate on the opposite side of the mounting side. The temporary bonding method of this semiconductor substrate is characterized in that, in the temporary bonding step, the semiconductor substrate and the temporary The sexual support substrate is thermocompression bonded via the dielectric layer.

Taking FIG. 1 as an example, it shows a schematic diagram of temporarily bonding a semiconductor substrate and a temporary support substrate via a dielectric layer in the temporary bonding method of the present invention. As described above, the temporary bonding method of the present invention has: a temporary bonding step of placing the semiconductor substrate 10 mounted on the mounting substrate on the opposite side of the mounting side of the mounting substrate, through the dielectric The bulk layer 12 is bonded to the temporary support substrate 11 by thermocompression bonding, thereby temporarily bonding.

Hereinafter, regarding the present invention, embodiments will be described in more detail with reference to the drawings, but the present invention is not limited to this.

(First Embodiment) First, the first embodiment of the temporary bonding method of the semiconductor substrate will be explained using FIGS. 2 to 8.

As shown in FIG. 2, an epitaxial wafer (EPW) 10 can be prepared as a semiconductor substrate to be mounted on a mounting substrate, and a dielectric layer 12 _{made of, for example, SiO 2 can be formed on the surface of the EPW 10 (temporary bonding surface)} Among them, the EPW 10 has a sacrificial layer 15 and an epitaxial functional layer structure 14 made of, for example, AlAs, on a starting substrate 13 made of, for example, a GaAs substrate. As far as the dielectric layer is concerned, in addition to SiO ₂ , any material can be selected as long as it is an etchable material, and does not diffuse at the semiconductor interface during electrode formation, or does not form a denatured layer. Among them, it can be defined as an oxide containing Si Compounds, Ti-containing oxides, Si-containing nitrides, Ga-containing oxides, In-containing oxides, etc. In addition, the thickness of the dielectric layer is only required to be a film thickness that can maintain the bonding, and therefore, it is only necessary to have a thickness of 0.1 μm or more. Regarding the upper limit thickness of the dielectric layer, in terms of cost control, the thickness of the dielectric layer is preferably 10 μm or less when the dielectric layer is formed by the CVD method, and 500 μm or less when the film is formed by the sol-gel method.

Next, as shown in FIG. 3, a BCB adhesive layer 16 is coated and formed on the surface of the dielectric layer 12 (BCB adhesive layer forming step), and then it can be thermocompression bonded to a temporary support substrate 11 made of a silicon substrate, for example. , Thereby temporarily bonding the semiconductor substrate and the temporary support substrate (temporary bonding step). The temporary bonding step can be performed under the condition that the BCB adhesive layer 16 and the silicon substrate 11 are permanently bonded, or can be performed under the temporary bonding condition. That is, as long as the bonding state of the semiconductor substrate and the temporary support substrate can be separated by etching the dielectric layer or the like, the bonding form of the BCB adhesive layer and the silicon substrate is not particularly limited. The bonding conditions can be, for example, a ^{pressure of 1.2 N/cm 2} or higher and 200° C. or higher. This joining condition is only an example, and as long as the joining state can be achieved, it is not limited to the aforementioned conditions.

Next, as shown in FIG. 4, after temporarily bonding to the temporary support substrate 11, for example, it can be immersed in a hydrofluoric acid solution to etch the sacrificial layer 15, and the starting substrate 13 can be peeled off.

Next, as shown in FIG. 5, after peeling off the starting substrate, a resist pattern with separation grooves can be formed, for example, by photolithography, and the openings can be etched and removed by performing chlorine-containing plasma treatment to form element separation grooves 17 .

Next, as shown in FIG. 6, after the element separation groove 17 is formed, an electrode 18 can be formed on the peeling surface of the starting substrate, and heat treatment can be performed to form an ohmic contact.

Next, as shown in FIG. 7, flip-chip mounting is possible on the drive substrate 19 (mounting substrate). Next, as shown in FIG. 8, after mounting the drive substrate 19, it can be immersed in a hydrofluoric acid solution to etch the dielectric layer 12, and the wafer can be separated from the BCB layer 16 (the epitaxial functional layer 14 mounted on the drive substrate 19), and The drive substrate 19 and the temporary support substrate 11 are separated.

(Second Embodiment) Next, using FIGS. 9 to 15, the second embodiment of the temporary bonding method of the semiconductor substrate will be described.

As shown in FIG. 9, an epitaxial wafer 20 having, for example, a sacrificial layer 25 composed of AlAs and an epitaxial functional layer structure 24 on a starting substrate 23 composed of, for example, a GaAs substrate can be prepared as a mounting substrate _{For example, a first dielectric layer 22a made of SiO 2 is} formed on the surface of the EPW 20 (temporary bonding surface) (first dielectric layer forming step).

Next, as shown in FIG. 10, on the temporary support substrate 21 made of, for example, a silicon substrate, a _{second dielectric layer 22b made of, for example, SiO 2 is} formed (second dielectric layer forming step). In addition, the first and second dielectric layers 22a, 22b may be subjected to KOH wet treatment, and then thermal compression bonding may be performed, thereby temporarily bonding the semiconductor substrate and the temporary support substrate (temporary bonding step). The thermocompression bonding conditions can be set to apply a pressure of 22N/cm ² or more and 500°C in a vacuum. This joining condition is only an example, and if the joining state can be achieved, it is not limited to the aforementioned conditions. The thermal compression bonding method using plasma treatment instead of KOH wet treatment can also be used. In this case, it is not necessary to form a dielectric layer _{such as SiO 2 film on the temporary support substrate.}

Next, as shown in FIG. 11, after the temporary support substrate 21 is temporarily joined, it can be immersed in a hydrofluoric acid solution, for example, to etch the sacrificial layer 25 and peel off the starting substrate 23.

Next, as shown in FIG. 12, after peeling off the starting substrate, a resist pattern with separation grooves can be formed, for example, by photolithography, and the openings can be etched and removed by chlorine-containing plasma treatment to form element separation grooves 27. .

Next, as shown in FIG. 13, after the element separation groove 27 is formed, an electrode 28 can be formed on the peeling surface of the starting substrate, and heat treatment can be performed to form an ohmic contact.

Next, as shown in FIG. 14, flip-chip mounting is possible on the drive substrate 29 (mounting substrate). Next, as shown in FIG. 15, after the drive substrate 29 is mounted, it can be immersed in a hydrofluoric acid solution to etch the dielectric layers 22a, 22b, _{and the wafer can be separated from the SiO 2} layer (the epitaxial functional layer 24 mounted on the drive substrate 29) , And separate the drive substrate 29 and the temporary support substrate 21.

(Third Embodiment) Next, the third embodiment of the temporary bonding method of the semiconductor substrate will be described using FIGS. 16-22.

As shown in FIG. 16, an epitaxial wafer 30 having, for example, a sacrificial layer 35 composed of AlAs and an epitaxial functional layer structure 34 on a starting substrate 33 composed of, for example, a GaAs substrate, can be prepared as a substrate for mounting For example, a dielectric layer 32 _{made of SiO 2 is} formed on the surface of EPW 30 (temporary bonding surface).

Next, as shown in FIG. 17, a first metal layer 36a containing, for example, Au as the main component can be formed on the dielectric layer 32 on the EPW 30 (first metal layer forming step), for example, a temporary support made of a silicon substrate For example, a second metal layer 36b with Au as the main component is formed on the substrate 31 (the second metal layer forming step), and the first metal layer 36a and the second metal layer 36b are thermocompression bonded to bond the semiconductor substrate with the temporary The supporting substrate is temporarily bonded via the dielectric layer (temporary bonding step). Here, the first and second metal layers are not limited to the metal layers with Au as the main component. Any material can be used as long as it is a material that can form a metal joint by thermocompression bonding, and as long as it contains Al, Ag, In, Ga and other soft metal materials can be included in the metal, you can also choose any material. Regarding the thermocompression bonding conditions, for example, a pressure of 10 N/cm ² or more and 250° C. can be applied in a vacuum. This joining condition is only an example, and as long as the joining state can be achieved, it is not limited to the aforementioned conditions.

Next, as shown in FIG. 18, after temporarily bonding to the temporary support substrate, for example, it may be immersed in a hydrofluoric acid solution to etch the sacrificial layer 35 and peel off the starting substrate 33.

Next, as shown in FIG. 19, after peeling off the starting substrate, an etching resist pattern with separation grooves can be formed, for example, by photolithography, and the openings can be etched and removed by chlorine-containing plasma treatment, and device separation grooves can be formed. 37.

Next, as shown in FIG. 20, after the element separation groove 37 is formed, an electrode 38 may be formed on the peeling surface of the starting substrate, and heat treatment may be performed to form an ohmic contact.

Next, as shown in FIG. 21, the flip chip is mounted on the driving substrate 39. Next, as shown in FIG. 22, after mounting the drive substrate 39, the dielectric layer 32 can be immersed in a hydrofluoric acid solution to etch the dielectric layer 32, and the wafer can be separated from the first and second metal layers 36a, 36b (installed on the epitaxy of the drive substrate 39). Crystalline functional layer 34), and separate the drive substrate 39 and the temporary support substrate 31.

In the above-mentioned first to third embodiments of the present invention, it is preferable to set the dielectric layer as a silicon oxide film, and it is also preferable to set the temporary support substrate as a silicon substrate. If the dielectric system silicon oxide film is used, the dielectric can be formed relatively easily, and the silicon substrate can be suitably used as a temporary support substrate.

In addition, in the first to third embodiments of the present invention, the sacrificial layer can be etched using, for example, a 0.5 to 99% hydrofluoric acid aqueous solution as the hydrofluoric acid solution, and the dielectric layer can be etched using, for example, 0.5 to 99% hydrofluoric acid. A 99% aqueous solution is used as a hydrofluoric acid solution.

According to the temporary bonding method of the present invention, the defective bonding area can be greatly reduced, and the peeling can be easily and surely performed by etching, thereby improving the peeling yield. In addition, the dielectric layer is inserted between the functional layer and the bonding layer, so that when the functional layer is peeled from the support substrate, the bonding layer does not need to be etched or peeled off, so the bonding method and bonding material can be freely selected. Furthermore, since the freedom of choice of the bonding material becomes greater, and the bonding method and bonding material suitable for low-temperature bonding can be selected, the influence of the heat applied to the drive substrate along with the bonding can be minimized to be ignored degree. [Example]

Hereinafter, examples and comparative examples are shown to describe the present invention more specifically, but the present invention is not limited to the following examples.

(Example 1) A PV-EPW (epitaxial wafer) with a PV-EP layer (epitaxial functional layer structure) on a GaAs starting substrate was prepared as a semiconductor substrate mounted on the mounting substrate. The aforementioned PV-EP layer The p-GaAs buffer layer is formed to 0.5μm, the p-AlAs sacrificial layer is formed to 0.3μm, the p-GaAs contact layer is formed to 0.3μm, the p-In _0.5 Ga _0.5 P window layer is formed to 0.2μm, and the p-GaAs emitter layer is formed to 0.5μm. , The n-GaAs base layer is formed at 3.5 μm, the n-In _0.5 Ga _0.5 PBSF layer is formed at 0.05 μm, and the n-GaAs contact layer is formed at 0.5 μm. Hereinafter, embodiments and comparative examples will be described with reference to the drawings. In the drawings describing these examples, the details of the structure of the buffer layer and the epitaxial functional layer are omitted.

Next, in accordance with the first embodiment of the present invention, as in FIG. 2, on the temporarily bonded surface of PV-EPW 10, a SiO ₂ film is formed as a dielectric layer 12 by a P-CVD method to 0.1 μm.

On the formed SiO ₂ film, the BCB layer 16 was coated to form 2.0 μm by a spin coating method, and the solvent was scattered by heat treatment at 100° C., as shown in Fig. 3, the Si substrate for temporary support ( The temporary support substrate 11 is opposed to the epitaxial wafer 10 and is temporarily bonded by thermocompression bonding to form a temporary support bonded substrate. In the thermocompression bonding conditions at this time, the bonding pressure was set to 6 N/cm ² , the temperature during bonding was set to 250° C., and the holding time was set to 1 hour.

Furthermore, after forming the temporary support bonding substrate, the back surface of the GaAs starting substrate is offset from the center at three locations near the outer periphery, using a bonding material such as wax to bond a weight with a weight of 100g or more, so that the temporary support bonding substrate is horizontal. Immerse in hydrofluoric acid solution. At this time, the jig set on the lower one is immersed in the hydrofluoric acid solution: the upper surface of the supporting substrate at the center of the GaAs starting substrate and the end on the opposite side of the weight. As shown in FIG. 4, the p-AlAs sacrificial layer 15 is selectively etched by the hydrofluoric acid solution, and the GaAs starting substrate 13 and the PV-EP layer 14 are separated.

After the starting substrate is removed, an etching resist pattern is formed by photolithography to match the size of the micro LED with a device separation groove, and the PV-EP layer exposed by the opening is treated with a chlorine-containing plasma to be etched and removed, as shown in the figure As shown in 5, the element separation groove 17 and other element parts are formed. In the chlorine-containing plasma treatment, an ICP (High Frequency Inductively Coupled Plasma) device is used, and chlorine gas is used as the chlorine. In addition, in order to stabilize the generation of plasma, not only chlorine gas but also plasma mixed with argon gas is used for treatment.

After the element separation trench 17 is formed, a partial area of the element portion is removed from the p-GaAs contact layer to the n-GaAs base layer, and the n-In _0.5 Ga _0.5 PBSF layer is exposed. The removal is performed by a wet treatment using a tartaric acid hydrogen peroxide solution, and the pattern formation uses a photolithography step.

Next, an n-type contact electrode is formed. The n-type contact electrode uses a metal containing Au as the main component and added with Ge or Si, which is an impurity for ohmic contact formation.

Secondly, a p-type contact electrode is formed. The p-type contact electrode uses a metal containing Au as the main component and added with Be or Zn, which is an impurity for ohmic contact formation.

After the contact electrode 18 is formed as shown in FIG. 6, the flip chip is mounted on the driving substrate 19 as shown in FIG. 7. Flip-chip mounting is performed by thermal compression bonding and ultrasonic application.

After being mounted on the drive substrate 19, it is immersed in a hydrofluoric acid solution to etch the SiO ₂ film. By etching the SiO ₂ film, as shown in FIG. 8, the element portion and the BCB layer 16 are separated, and the wafer remains on the drive substrate 19. Through this step, the temporary support substrate 11 and the wafer are separated.

(Example 2) A PV-EPW (epitaxial wafer) with a PV-EP layer (epitaxial functional layer structure) was prepared as a semiconductor substrate mounted on a mounting substrate. Among them, the aforementioned PV-EP layer is based on GaAs. On the starting substrate, the p-GaAs buffer layer is formed with 0.5μm, the p-AlAs sacrificial layer is formed with 0.3μm, the p-GaAs contact layer is formed with 0.3μm, the p-In _0.5 Ga _0.5 P window layer is formed with 0.2μm, p-GaAs emitter The layer was formed at 0.5 μm, the n-GaAs base layer was formed at 3.5 μm, the n-In _0.5 Ga _0.5 PBSF layer was formed at 0.05 μm, and the n-GaAs contact layer was formed at 0.5 μm.

Next, in accordance with the second embodiment of the present invention, as in FIG. 9, on the temporarily bonded surface of the PV-EPW 20, a SiO ₂ film is formed by a P-CVD method to 0.1 μm as the first dielectric layer 22a.

Next, on the Si substrate (temporary support substrate) 21 for temporary support, a SiO ₂ film was formed to 0.1 μm as the second dielectric layer 22 b. The two surfaces of the first and second dielectric layers 22a, 22b are subjected to KOH treatment, and as shown in FIG. 10, they are opposed to each other to temporarily bond the semiconductor substrate 20 and the temporary support substrate 21 by thermocompression bonding to form Temporarily support bonding substrates. The thermocompression bonding conditions at this time are a pressure of 22 N/cm ² or more in a vacuum and a heat of 500° C. for temporary bonding.

Moreover, after forming the temporary support bonding substrate, the weights with a weight of 200g or more are bonded with wax or other bonding material on the back surface of the GaAs starting substrate off the outer periphery from the center, and the temporary support bonding substrate is leveled. Immerse in hydrofluoric acid solution. At this time, the jig set on the lower one is immersed in the hydrofluoric acid solution: the upper surface of the supporting substrate at the center of the GaAs starting substrate and the end on the opposite side of the weight. As shown in FIG. 11, the p-AlAs sacrificial layer 2 is selectively etched by the hydrofluoric acid solution, and the GaAs starting substrate 23 and the PV-EP layer 24 are separated.

After removing the starting substrate, photolithography is used to form an etching resist pattern with component separation grooves that matches the size of the micro LED, and the PV-EP layer exposed by the opening is treated with a chlorine-containing plasma to be etched and removed, as shown in the figure As shown in 12, 27 element separation grooves and other element parts are formed. In the chlorine-containing plasma treatment, an ICP device is used, and chlorine gas is used as the chlorine. Moreover, in order to stabilize the generation of plasma, not only chlorine gas but also plasma mixed with argon gas is used for treatment.

After the element separation trench 27 is formed, a partial area of the element portion is removed from the p-GaAs contact layer to the n-GaAs base layer, and the n-In _0.5 Ga _0.5 PBSF layer is exposed. The removal is performed by a wet treatment using a tartaric acid hydrogen peroxide solution, and the pattern formation uses a photolithography step.

Next, an n-type contact electrode is formed. The n-type contact electrode uses a metal containing Au as the main component and added with Ge or Si, which is an impurity for ohmic contact formation.

Secondly, a p-type contact electrode is formed. The p-type contact electrode uses a metal containing Au as the main component and added with Be or Zn, which is an impurity for ohmic contact formation.

After the contact electrode 28 is formed as shown in FIG. 13, the flip chip is mounted on the driving substrate 29 as shown in FIG. 14. Flip-chip mounting is performed by thermal compression bonding and ultrasonic application.

After being mounted on the drive substrate 29, it is immersed in a hydrofluoric acid solution to etch the SiO ₂ film. By etching the SiO ₂ film, as shown in FIG. 15, the element portion and the temporary support substrate 21 are separated, and the wafer remains on the drive substrate 29. Through this step, the temporary support substrate 21 and the wafer are separated.

(Example 3) A PV-EPW (epitaxial wafer) with a PV-EP layer (epitaxial functional layer structure) was prepared as a semiconductor substrate mounted on a mounting substrate. Among them, the aforementioned PV-EP layer is based on GaAs. On the starting substrate, the p-GaAs buffer layer is formed with 0.5μm, the p-AlAs sacrificial layer is formed with 0.3μm, the p-GaAs contact layer is formed with 0.3μm, the p-In _0.5 Ga _0.5 P window layer is formed with 0.2μm, p-GaAs emitter The layer was formed at 0.5 μm, the n-GaAs base layer was formed at 3.5 μm, the n-In _0.5 Ga _0.5 PBSF layer was formed at 0.05 μm, and the n-GaAs contact layer was formed at 0.5 μm.

Next, in accordance with the third embodiment of the present invention, as in FIG. 16, the temporarily bonded surface of PV-EPW 30 is formed as a dielectric layer 32 by forming a _{SiO 2 film of 0.1 μm by the P-CVD method.}

Next, an Au film of 0.5 μm was formed as the first metal layer 36a on the SiO ₂ film, and an Au film was formed of 0.5 μm as the second metal layer 36b on the Si substrate (temporary support substrate) 31 for temporary support. Then, as shown in FIG. 17, the Au films are opposed to each other, and the semiconductor substrate 30 and the temporary support substrate 31 are temporarily bonded by thermocompression bonding to form a temporary support bonded substrate. The thermocompression bonding conditions at this time are to apply a pressure of 10 N/cm ² or more and a heat of 250° C. to perform bonding in a vacuum.

Furthermore, after forming the temporary support bonding substrate, a weight with a weight of 300g or more is bonded with a bonding material such as wax at three places near the outer periphery of the back surface of the GaAs starting substrate deviated from the center, and the bonding substrate is temporarily supported. Horizontally immersed in hydrofluoric acid solution. At this time, the jig set on the lower one is immersed in the hydrofluoric acid solution: the upper surface of the supporting substrate at the center of the GaAs starting substrate and the end on the opposite side of the weight. As shown in FIG. 18, the p-AlAs sacrificial layer 35 is selectively etched by the hydrofluoric acid solution, and the GaAs starting substrate 33 and the PV-EP layer 34 are separated. In this embodiment, the weight of the counterweight is set to 300g, but as long as the etching speed of the sacrificial layer is slow, the counterweight can be set above this, and it is not limited to the aforementioned weight.

After removing the starting substrate, use photolithography to form an etching resist pattern with component separation grooves that matches the size of the micro LED, and perform a chlorine-containing plasma treatment on the PV-EP layer exposed by the opening to be etched away, as shown in Figure 19 As shown, the element separation groove 37 and other element parts are formed. In the chlorine-containing plasma treatment, an ICP device is used, and chlorine gas is used as the chlorine. In addition, in order to stabilize the generation of plasma, not only chlorine gas but also plasma mixed with argon gas is used for treatment.

After the element separation trench 37 is formed, a partial area of the element portion is removed from the p-GaAs contact layer to the n-GaAs base layer, and the n-In _0.5 Ga _0.5 PBSF layer is exposed. The removal is performed by a wet treatment using a tartaric acid hydrogen peroxide solution, and the pattern formation uses a photolithography step.

Next, an n-type contact electrode is formed. The n-type contact electrode uses a metal containing Au as the main component and added with Ge or Si, which is an impurity for ohmic contact formation.

Secondly, a p-type contact electrode is formed. The p-type contact electrode uses a metal containing Au as the main component and added with Be or Zn, which is an impurity for ohmic contact formation.

After the contact electrode 38 is formed as shown in FIG. 20, the flip chip is mounted on the driving substrate 39 as shown in FIG. 21. Flip-chip mounting is performed by thermal compression bonding and ultrasonic application.

After being mounted on the drive substrate 39, it is immersed in a hydrofluoric acid solution to etch the SiO ₂ film. By etching the SiO ₂ film, as shown in FIG. 22, the element portion and the Au film are separated, and the wafer remains on the drive substrate 39. Through this step, the temporary support substrate 31 and the wafer are separated.

(Comparative example) As shown in Fig. 23, a PV-EPW (epitaxial wafer) 110 with a PV-EP layer (epitaxial functional layer structure) 114 is prepared. On the GaAs starting substrate 113, a p-GaAs buffer layer 0.5μm, p-InGaP etching stop layer 101 is formed 0.3μm, p-GaAs contact layer is formed 0.3μm, p-In _0.5 Ga _0.5 P window layer is formed 0.2μm, p-GaAs emitter layer is formed 0.5μm, n-GaAs The base layer was formed at 3.5 μm, the n-In _0.5 Ga _0.5 PBSF layer was formed at 0.05 μm, and the n-GaAs contact layer was formed at 0.5 μm.

Next, as shown in FIG. 24, on the PV-EPW 110, the BCB layer 116 is formed to be 1.0 μm, and is opposed to the first temporary support substrate 111a for thermocompression bonding to form a temporary support bonding substrate. For the thermocompression bonding conditions at this time, the bonding pressure was set to 6N/cm ² , the temperature during bonding was set to 150°C, and the holding time was set to 10 minutes.

Next, as shown in FIG. 25, the GaAs starting substrate 113 is etched and removed with ammonia hydrogen peroxide.

Next, the etching solution is replaced with hydrochloric acid, the p-InGaP etching stop layer 101 is removed, and the p-GaAs contact layer of the epitaxial functional layer structure 114 is exposed. An Al film is formed on the exposed p-GaAs contact layer as the first bonding metal layer 106a, and on the Si substrate as the second temporary support substrate 111b for temporary support, the Al film is formed by 0.5 μm as the second bonding In the metal layer 106b, the first and second bonding metal layers 106a and 106b are opposed to each other, and thermal compression bonding is performed, as shown in FIG. 26, to form a new temporary support bonding substrate. The thermocompression bonding conditions at this time are to apply a pressure of 10 N/cm ² or more and a heat of 250°C in a vacuum for bonding.

Next, heat at 150° C. is applied to the aforementioned new temporary support bonding substrate to soften the BCB layer, and as shown in FIG. 27, the first temporary support substrate 111a and the second temporary support substrate 111b are separated.

Because BCB remains on the surface where the BCB layer has been peeled off, it is washed with BCB diluent and ashing is performed to remove the BCB material (Figure 28).

Next, as follows, as shown in FIG. 29, element separation grooves 117 and contact electrodes 118 are formed. After removing the starting substrate 113, photolithography is used to form an etching resist pattern with a device separation groove that matches the size of the micro LED, and the PV-EP layer exposed by the opening is treated with a chlorine-containing plasma to be etched and removed to form a device. The groove 117 part and the element part are separated. In the chlorine-containing plasma treatment, an ICP device is used, and chlorine gas is used as the chlorine. In addition, in order to stabilize the generation of plasma, not only chlorine gas but also plasma mixed with argon gas is used for treatment.

After the element separation trench 117 is formed, a partial area of the element portion is removed from the p-GaAs contact layer to the n-GaAs base layer, and the n-In _0.5 Ga _0.5 PBSF layer is exposed. The removal is performed by a wet treatment using a tartaric acid hydrogen peroxide solution, and the pattern formation uses a photolithography step.

Next, an n-type contact electrode is formed. The n-type contact electrode uses a metal containing Au as the main component and added with Ge or Si, which is an impurity for ohmic contact formation.

Secondly, a p-type contact electrode is formed. The p-type contact electrode uses a metal containing Au as the main component and added with Be or Zn, which is an impurity for ohmic contact formation.

After the contact electrode 118 is formed, the flip chip is mounted on the driving substrate 119 as shown in FIG. 30. Flip-chip mounting is performed by thermal compression bonding and ultrasonic application.

After being mounted on the drive substrate 119, it is immersed in a hydrofluoric acid solution to etch the Al film. The Al film (first and second bonding metal layers 106a, 106b) is etched to separate the element part and the Si substrate for temporary support (temporary support substrate 111b), and as shown in FIG. 31, the chip remains in the drive The substrate 119.

We investigated the poor bonding area at the time of bonding in the comparative example and the examples, and investigated the ratio of good products (bonding yield) in which the poor bonding area is 10% or less. Fig. 32 shows the bonding yield in the comparative example and the embodiment. In the comparative example, since the bonding is performed through the harder Al metal layer, there are many voids caused by the bonding of the metal layer. However, among SiO ₂ bonding or BCB bonding, the best mechanical flatness or heat treatment conditions can be used Since the formation of voids is greatly suppressed, the examples 1 to 3 in which the epitaxial wafer is temporarily bonded via the dielectric layer can greatly reduce the area of poor bonding.

In addition, FIG. 33 shows the peeling yield when peeling off the wafer portion of the temporarily bonded substrates processed into a bulk (with element separation grooves) in the comparative example and the embodiment. In the comparative example, the etching rate of Al used for the first and second bonding metal layers is likely to be uneven. This leads to uneven corrosion of the Al layer, which reduces the peeling yield. On the other hand, in the embodiments, _{the wet etching of SiO 2} is not easy to produce unevenness, which improves the peeling yield.

In addition, in the comparative example, since the bonding is performed through the BCB layer, the step of removing the remaining BCB material is required. However, in the example, since the dielectric layer peeling and the residue removal treatment on the surface of the functional layer are performed at the same time, So reduce the number of steps.

In addition, the present invention is not limited to the above-mentioned embodiment. The above-mentioned embodiments are exemplified, and those having substantially the same structure and the same functions and effects as the technical ideas described in the scope of the patent application of the present invention are included in the technical scope of the present invention.

10: Semiconductor substrate (EPW; PV-EPW) 11: Temporary support substrate 12: Dielectric layer 13: Starting substrate 14: PV-EP layer (epitaxial functional layer structure) 15: Sacrifice layer 16: BCB (Benzocyclobutene; Benzocyclobutene) bonding layer 17: Form component separation groove 18: Electrode 19: Drive substrate 20: epitaxial wafer (EPW; PV-EPW) 21: Temporary support substrate 22a: first dielectric layer 22b: second dielectric layer 23: Starting substrate 24: PV-EP layer (epitaxial functional layer structure) 25: Sacrifice layer 27: component separation groove 28: Electrode 29: Drive substrate 30: Epitaxy wafer (EPW; PV-EPW) 31: Temporary support substrate 32: Dielectric layer 33: Starting substrate 34: PV-EP layer (epitaxial functional layer structure) 35: Sacrifice layer 36a: The first metal layer 36b: second metal layer 37: component separation groove 38: Electrode 39: Drive substrate 101: Etch stop layer 106a: first bonding metal layer 106b: second bonding metal layer 110: Epitaxy wafer (PV-EPW) 111a: The first temporary support substrate 111b: Second temporary support substrate 113: Starting substrate 114: PV-EP layer (epitaxial functional layer structure) 116: BCB layer 117: component separation groove 118: Contact electrode 119: Drive substrate

Fig. 1 is a schematic diagram of temporarily joining a semiconductor substrate and a temporary support substrate via a dielectric layer in the temporary joining method of the present invention. FIG. 2 is a schematic diagram of the formation of a dielectric layer on the surface of an epitaxial wafer in the first embodiment. FIG. 3 is a schematic diagram of temporarily bonding the semiconductor substrate and the temporary support substrate by coating the surface of the dielectric layer on the BCB layer and bonding to the temporary support substrate by thermocompression bonding in the first embodiment. FIG. 4 is a schematic diagram of the sacrificial layer is etched and the starting substrate is peeled off after the temporary bonding to the temporary support substrate in the first embodiment. Fig. 5 is a schematic diagram of forming an epitaxial functional layer with element separation grooves after peeling off the starting substrate in the first embodiment. FIG. 6 is a schematic diagram of forming an ohmic contact by forming an electrode on the peeling surface of the substrate after forming the element separation groove in the first embodiment, and performing a heat treatment. FIG. 7 is a schematic diagram of flip-chip mounting of a semiconductor substrate to a driving substrate in the first embodiment. FIG. 8 is a schematic diagram of the first embodiment, after mounting the drive substrate, and then etching the dielectric layer to separate the drive substrate from the temporary support substrate. FIG. 9 is a schematic view of the formation of a dielectric layer on the surface of an epitaxial wafer in the second embodiment. FIG. 10 is a schematic diagram of the second embodiment in which the first and second dielectric layers are thermocompression bonded to temporarily bond the semiconductor substrate and the temporary support substrate. 11 is a schematic diagram of the second embodiment, after temporarily bonding to the temporary support substrate, etching the sacrificial layer, and peeling off the starting substrate. Fig. 12 is a schematic view of the second embodiment, after the starting substrate is peeled off, and the element separation groove is formed in the epitaxial functional layer. FIG. 13 is a schematic view of forming an ohmic contact by forming an electrode on the peeling surface of the substrate after forming the element separation groove in the second embodiment, and performing a heat treatment. FIG. 14 is a schematic diagram of flip-chip mounting of a semiconductor substrate to a driving substrate in the second embodiment. 15 is a schematic diagram of the second embodiment, after mounting the drive substrate, etching the dielectric layer to separate the drive substrate and the temporary support substrate. FIG. 16 is a schematic diagram of forming a dielectric layer on the surface of an epitaxial wafer in the third embodiment. FIG. 17 is a third embodiment in which the first metal layer formed on the dielectric layer and the second metal layer formed on the temporary support substrate are thermocompression bonded to bond the semiconductor substrate and the temporary support substrate Schematic diagram of temporary bonding. FIG. 18 is a schematic view of the third embodiment, after temporarily bonding to the temporary support substrate, etching the sacrificial layer, and peeling off the starting substrate. FIG. 19 is a schematic view of the epitaxial functional layer formed in the epitaxial functional layer after peeling off the starting substrate in the third embodiment. Fig. 20 is a schematic diagram of forming an ohmic contact by forming an electrode on the peeling surface of the substrate after forming the element separation groove in the third embodiment. FIG. 21 is a schematic diagram of flip-chip mounting of a semiconductor substrate to a driving substrate in the third embodiment. Fig. 22 is a schematic diagram of the third embodiment, after mounting the drive substrate, etching the dielectric layer to separate the drive substrate from the temporary support substrate. FIG. 23 is a schematic diagram of preparing an epitaxial wafer having an etching stop layer and an epitaxial functional layer structure on a starting substrate in a comparative example. FIG. 24 is a schematic diagram of thermocompression bonding of the first temporary support substrate to the epitaxial functional layer structure via the BCB layer in the comparative example. FIG. 25 is a schematic diagram of peeling off the starting substrate after bonding to the first temporary support substrate in the comparative example. 26 is a comparative example, after the etching stop layer is removed, the first bonding metal layer is formed, and the second temporary support substrate on which the second bonding metal layer is formed is made to face the first and second bonding metal layers. Schematic drawing of thermocompression bonding. FIG. 27 is a schematic diagram of the BCB layer being softened by heating and separating the first temporary support substrate and the second temporary support substrate in a comparative example. Fig. 28 is a schematic diagram of removing the BCB remaining on the surface of the peeled BCB layer in the comparative example. Fig. 29 is a schematic view of the formed element separation grooves and contact electrodes in the comparative example. FIG. 30 is a schematic diagram of flip-chip mounting of a semiconductor substrate to a driving substrate in a comparative example. FIG. 31 is a schematic diagram of a comparative example, after mounting the driving substrate, etching the first and second bonding metal layers to separate the driving substrate and the second temporary support substrate. Fig. 32 shows the bonding yield in the comparative example and the embodiment. Fig. 33 shows the peel yield in the comparative example and the example.

10: Semiconductor substrate (EPW; PV-EPW)

11: Temporary support substrate

12: Dielectric layer

Claims (5)

A method of temporarily bonding a semiconductor substrate, which is a method of temporarily bonding a semiconductor substrate to a temporary support substrate, at least having: a temporary bonding step, and mounting the sum of the semiconductor substrate mounted on the mounting substrate to the mounting substrate The mounting side of the substrate is the surface on the opposite side, which is temporarily bonded to the temporary support substrate; and the temporary bonding method of the semiconductor substrate is characterized by: In the temporary bonding step, the semiconductor substrate and the temporary support substrate are thermocompression-bonded with a dielectric layer interposed therebetween. The temporary bonding method of semiconductor substrate of claim 1, wherein: Before the temporary bonding step, there is a BCB (Benzocyclobutene) bonding layer forming step, forming the dielectric layer on the temporary bonding surface of the semiconductor substrate, and further on the formed dielectric A BCB bonding layer is formed on the bulk layer; then, the semiconductor substrate is temporarily bonded to the temporary support substrate. The temporary bonding method of semiconductor substrate of claim 1, wherein: Before the temporary bonding step, there are: a first dielectric layer forming step, forming a first dielectric layer on the temporarily bonded surface of the semiconductor substrate; and a second dielectric layer forming step, on the temporary support substrate Two dielectric layers are formed on the side; then, the first and second dielectric layers are thermocompression bonded to each other, so that the semiconductor substrate is temporarily bonded to the temporary support substrate. The temporary bonding method of semiconductor substrate of claim 1, wherein: Before the temporary bonding step, there is: a first metal layer forming step, forming the dielectric layer on the temporary bonding surface of the semiconductor substrate, and further forming a first metal layer on the formed dielectric layer; And a second metal layer forming step, forming a second metal layer on the side of the temporary support substrate; then, thermocompression bonding the first and second metal layers to each other, so that the semiconductor substrate is interposed with the dielectric layer It is temporarily bonded to the temporary support substrate. The temporary bonding method of a semiconductor substrate according to any one of claims 1 to 4, wherein: The dielectric layer is set as a silicon oxide film, and the temporary support substrate is set as a silicon substrate.

Images