TW202026233A - Patterned photoelectric substrate with improved luminous efficiency, light-emitting diode and manufacturing method thereof including forming first and second patterned structures, forming first and second metal layers, and forming a filling layer - Google Patents

Abstract

The invention discloses a patterned photoelectric substrate with improved luminous efficiency, a light-emitting diode and a manufacturing method thereof. The manufacturing method includes: providing a substrate; forming a first patterned structure and a spaced area on the substrate surface; forming a first metal layer and a second metal layer; forming a second patterned structure on the second metal layer; extending the second patterned structure downward to the first metal layer and part of the surface of the substrate; removing the first metal layer and the second metal layer from the substrate to form a substrate having a first patterned structure and a second patterned structure; and forming a filling layer at a predetermined growth rate to fill the second patterned structure.

Description

Patterned photoelectric substrate with improved luminous efficiency, light-emitting diode and manufacturing method thereof

The present invention relates to a patterned photoelectric substrate, a light emitting diode and a manufacturing method thereof with improved luminous efficiency, in particular to a substrate with both a micron-level first patterned structure and a sub-micron-level second patterned structure, and The light-emitting diode of the substrate is provided with a filling layer in the second patterned structure, and the second patterned structure is filled to improve the luminous efficiency of the light-emitting diode.

The development of human lighting history has entered the era of solid-state lighting. The characteristics of brighter brightness, lower price, longer life, and higher stability are the goals that the solid-state lighting industry pursues. The lighting market first emphasizes the brightness requirements of light-emitting diodes. Generally speaking, the maximum light output (L _max ) of the light-emitting diode is mainly determined by the external quantum efficiency (η _ext ) and the maximum operating current (I _max ), namely L _max =η _ext ×I _max , where the external quantum efficiency (η _ext ) is in turn determined by the internal quantum efficiency (η _int ) and the light extraction efficiency (η _extr ), that is, η _ext =η _int ×η _extr . At present, the internal quantum efficiency of general blue light emitting diodes has reached more than 70%, but the internal quantum efficiency of green light emitting diodes has dropped to below 40%. Therefore, the internal quantum efficiency and light extraction efficiency are improved by improving There is still a lot of room for the external quantum efficiency of light-emitting diodes or to increase the brightness of light-emitting diodes.

Since the lattice mismatch between gallium nitride and sapphire substrate is as high as 16%, when the sapphire substrate is used as the substrate for epitaxy of gallium nitride film, there will be stress inside the gallium nitride film, and many different types appear The differential row defects make the differential row density of the gallium nitride film reach 10 ⁹ to 10 ¹⁰ cm ^-2 , which seriously affects the quality of the epitaxial film, and the defects usually act as non-radiative recombination centers, resulting in reduced luminous efficiency. Therefore, the key to the development of patterned sapphire substrate manufacturing technology is to reduce the defect density, so as to substantially improve the epitaxial quality of the gallium nitride film and increase the luminous brightness. The GaN film grows on the sidewall of the patterned substrate to change the growth direction of the GaN film's differential defect. The differential defect will be bent by 90° to form a stack and dislocation to eliminate defects, and through three-dimensional stress during epitaxy The release reduces the formation of defects and reduces the density of the internal dislocation of the film to improve the crystal quality. Current research has also pointed out that GaN films grown on patterned sapphire substrates have been found to reduce the density of row defects to 10 ⁸ to 10 ⁹ cm ^-2 , and further improve the internal quantum efficiency and luminance of light-emitting diodes.

In the latest research, there are also sub-micron-scale patterned substrates to grow light-emitting diode structures. For patterned substrates of the same area, reducing the pattern size and increasing the number of patterns will increase the effective area of lateral growth, and the mechanism of lateral growth will be enhanced. , Which makes it easier to change the growth direction and form stacking dislocations to eliminate the row defects, and greatly reduce the row density inside the film. At the same time, due to the short pattern spacing, it is easy to form voids in the gallium nitride epitaxy to prevent the defect extension and improve the nitride Ga film epitaxial quality. The research results show that GaN films grown on a micron-scale patterned sapphire substrate can reduce the displacement density to 10 ⁸ cm ^-2 . If the patterned substrate is changed to a sub-micron scale, the stress release per unit volume can be increased. The differential row density is reduced to 10 ⁷ cm ^-2 or less.

Known technologies, such as the Republic of China Patent Publication No. I396297, disclose a light-emitting diode, including: a substrate with micron-level holes in it; a nano-porous photonic crystal structure as a buffer layer formed on the substrate On; the first type epitaxial layer is formed on the porous photonic crystal structure of the buffer layer; the light emitting layer is formed on the first type epitaxial layer; the second type epitaxial layer is formed on the light emitting layer On; a first contact electrode is formed on the above-mentioned first type epitaxial layer; and, a second contact electrode is formed on the above-mentioned second type epitaxial layer.

Another Republic of China Patent No. 201251113 discloses a method for manufacturing an LED substrate, an LED substrate and a white LED structure. The main purpose is to make the LED emit high-brightness white light with good color rendering. The reflective surface of the substrate is formed with plural The top of the convex particles are curved. The bottom width of the convex particles is 2 to 4 microns, and the height is 1.2 to 1.8 microns. The distance between adjacent convex particles is 0.6 to 3 microns. The indium gallium epitaxial layer emits ultraviolet light with a wavelength in the range of 380 to 410 nanometers after being energized. The ultraviolet light is reflected by the reflective surface of the substrate and the convex particles, and excites the mixed zinc oxide and yttrium aluminum garnet. Fluorescent substances generate complementary colors of ultraviolet light, and after mixing with each other, high-brightness white light with good color rendering is scattered by a package, which can be used for lighting and other purposes.

However, in the above-mentioned invention diodes, the luminous efficiency of the light-emitting diode is mainly improved by separately forming a nanometer-scale porous photonic crystal structure or micron-scale protruding particles on the substrate. However, the aforementioned micron-scale or Nano-level structure design still has its own inherent limitations for reducing the degree of differential row density or improving the degree of luminous efficiency.

In addition, for example, the ROC Patent Application No. 102111662 filed by the applicant in this case discloses a substrate of an optoelectronic element, providing at least one optoelectronic element formed on an upper surface of the substrate, characterized in that the upper surface of the substrate has A plurality of micron structures and a plurality of sub-micron structures form a rough surface, wherein the size of the sub-micron structures is smaller than the micron structures. In this way, the optical diffusion rate of the substrate can be improved, and the quality of the epitaxial film material grown on the substrate can be improved, thereby increasing the light extraction efficiency of the optoelectronic device, and achieving the improvement of the light-emitting brightness of the entire optoelectronic device. The invention also provides a photoelectric element. Among them, the previous proposal was proposed by the applicant to improve the quality of epitaxial thin film materials or improve the luminous brightness of the overall optoelectronic device through the combination of microstructure and submicron structure.

Furthermore, during the process of covering the epitaxial layer on the substrate, if the pattern on the substrate includes a groove structure, the depth-to-width ratio of the groove has a corresponding relationship with the epitaxial rate of the epitaxial layer. Furthermore, if the groove has a higher aspect ratio, that is, the groove depth is deeper and the width is smaller, the groove structure is likely to be unable to be instantly completed by the epitaxial layer due to the fast epitaxial layer. Covering and filling; However, if the epitaxial rate is reduced in order to completely cover and fill the groove with the epitaxial layer in real time, the production efficiency will be reduced.

As mentioned above, when the epitaxial layer cannot completely cover and fill the groove structure on the substrate, there will be a large number of gaps between the groove structure and the epitaxial layer. Furthermore, when light enters different media, that is, when the light enters the gap in the groove from the epitaxial layer, the total reflection increases. Therefore, the gap in the groove structure will cause the LED to emit light from the light-emitting layer to travel direction Changed and trapped in the groove structure, resulting in poor light extraction efficiency, that is, reducing the luminous efficiency of the light-emitting diode.

Therefore, there is an urgent need to develop a patterned photoelectric substrate with improved luminous efficiency and a light-emitting diode with the substrate, which can effectively reduce and increase the luminous efficiency of the light-emitting diode, thereby improving the applicability and value of the light-emitting diode There is a need.

The main purpose of the present invention is to provide a patterned optoelectronic substrate with improved luminous efficiency and a manufacturing method thereof, which can be filled in the groove structure by the patterned structure on the surface of the substrate and the filling layer to make the light emitting diode The body has more stable and better luminous efficiency and performance.

In order to achieve the above objective, the present invention provides a method for manufacturing a patterned photoelectric substrate with improved luminous efficiency, the steps of which include:

Step S1: Provide a substrate;

Step S2: forming a first patterned structure and a spacer area on the surface of the substrate by a first etching process;

Step S3: forming a first metal layer and a second metal layer on the first patterned structure and the surface of the spacer area on the substrate;

Step S4: A second patterned structure is formed on the second metal layer by a second etching process, and the second patterned structure is located at one or both of the first patterned structure and the spacer area. By;

Step S5: extend the second patterned structure down to the first metal layer and part of the surface of the substrate by a third etching process;

Step S6: removing the first metal layer and the second metal layer from the substrate by an acid treatment to form the substrate having the first patterned structure and the second patterned structure;

And step S7: forming a filling layer at a predetermined growth rate to fill the second patterned structure.

In the method for fabricating a patterned optoelectronic substrate with improved luminous efficiency, the structure of the second patterned structure is a primary micron-level groove structure, and its aspect ratio is between 0.3:1 and 20: 1 between.

In the method for manufacturing a patterned optoelectronic substrate with improved luminous efficiency, the filling layer is filled in the second patterned structure by physical vapor deposition.

In the method for fabricating a patterned photoelectric substrate with improved luminous efficiency, the sub-micron groove structure includes a polygonal structure.

In the method for manufacturing a patterned optoelectronic substrate with improved luminous efficiency, the predetermined growth rate is between 0.01 and 3.0 nanometers per second.

In the method for fabricating a patterned photoelectric substrate with improved luminous efficiency, the material used for the filling layer has a refractive index between 1.7 and 2.5.

A patterned photoelectric substrate with improved luminous efficiency, comprising: a first patterned structure, which is a micron-level protruding structure or a micron-level groove structure; a spacer area; and a second patterned structure, which is a micron level A level groove structure is formed on one or both of the first patterned structure and the spacer area; and a filling layer is disposed in the submicron level groove structure of the second patterned structure.

The patterned photoelectric substrate with improved luminous efficiency, wherein the first patterned structure or the second patterned structure is in the shape of a cone, arc, cylinder, pyramid or prism.

In the patterned photoelectric substrate with improved luminous efficiency, the aspect ratio of the sub-micron groove structure is between 0.3:1 and 20:1.

In the patterned photoelectric substrate with improved luminous efficiency, the filling layer is made of materials with a refractive index between 1.7 and 2.5.

A light-emitting diode with a patterned photoelectric substrate with improved luminous efficiency, comprising: a substrate, the substrate being the patterned photoelectric substrate with improved luminous efficiency as described in any one of the foregoing; a buffer layer disposed on the On the substrate; and an optoelectronic element disposed on the buffer layer, and the optoelectronic element includes: a first semiconductor layer, a light emitting layer, and a second semiconductor layer, wherein the first semiconductor layer is bonded to the buffer layer ; The light-emitting layer is sandwiched between the first semiconductor layer and the second semiconductor layer.

The light-emitting diode further includes a first electrode and a second electrode. The first electrode and the second electrode are electrically connected to the first semiconductor layer and the second semiconductor layer, respectively.

The following is a specific embodiment to illustrate the implementation of the present invention. Those skilled in the art can easily understand the other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific embodiments, and various details in this specification can also be modified and changed according to different viewpoints and applications without departing from the spirit of the present invention.

Please refer to FIG. 1 and FIGS. 2A to 2J, which are a method of fabricating a patterned photoelectric substrate with improved luminous efficiency proposed by the present invention, including the following steps:

Step S1: Provide a substrate 10; in one embodiment, the substrate 10 is a sapphire substrate with a flat surface, or a silicon substrate with a flat surface (refer to FIG. 2A).

Step S2: Form a first patterned structure 11 and a spacer region 12 on the surface of the substrate 10 by a first etching process (refer to FIG. 2B); in one embodiment, the first etching process may be an isotropic etching (Isotropic etching) or an anisotropic etching (Anisotropic etching), which can be inductively coupled plasma reactive ion etching (ICP-RIE), chemical liquid etching, dry etching, plasma etching, or lightning Shot processing method. In addition, isotropic etching can use a chemical etching solution (such as strong acid) to perform a chemical etching reaction in a high temperature environment to produce a periodic micron-level protrusion or groove structure on the substrate 10; in addition, anisotropic The etching process is to first form a patterned photoresist layer on the substrate 10, and then use the inductively coupled plasma reactive ion etching (ICP-RIE) technology to etch to selectively remove part of the substrate 10, which can also achieve the above The purpose of forming a micron-level protrusion or groove structure with a certain periodicity.

In addition, in step S2, it further includes providing a first photoresist layer (not shown) on a part of the surface of the substrate 10, so that the first etching process can selectively remove part of the substrate 10; In the aforementioned method for manufacturing a patterned optoelectronic substrate with improved luminous efficiency of the present invention, the first patterned structure 11 can be a micron-level protruding structure (as shown in FIG. 2B) or a micron-level groove structure, and spaced apart The area 12 can be a planar structure. In one aspect of the present invention, the first patterned structure 11 may be a micron-level protruding structure with a height of 1.2 to 2 microns and an outer diameter of 1 to 5 microns. The adjacent first patterned structure The distance between 11 (that is, the length or width of the interval region 12) is 0.1 μm to 1 μm. In addition, in another aspect of the present invention, the first patterned structure 11 may be a micron-level groove structure, which will be described in detail later.

Step S3: forming a first metal layer 13 and a second metal layer 14 on the surface of the first patterned structure 11 and the spacer area 12 on the substrate 10 (refer to FIG. 2C); wherein, the first metal layer 13 or the second sublayer 14 can be formed by coating method, chemical plating method, sputtering method, vapor deposition method, cathodic arc method, or chemical vapor deposition method. Among them, vapor deposition method includes electron beam evaporation method, thermal evaporation method, The high-frequency vapor deposition method, or laser vapor deposition method, etc., the present invention is not limited to this. Here, in the method for fabricating a patterned optoelectronic substrate with improved luminous efficiency disclosed in the present invention, the first metal layer 13 is at least one selected from a combination of titanium, chromium, molybdenum, or silicon dioxide (SiO ₂ ). The thickness of the first metal layer 13 can be 1 nanometer to 1 micrometer; in addition, the second metal layer 14 is aluminum, and the thickness of the second metal layer 14 can be 10 nanometers to 100 micrometers. In another aspect of the present invention, the first metal layer 13 is mainly titanium.

Step S4: A second patterned structure 15 is formed on the second metal layer 14 by a second etching process. The second patterned structure 15 is located on one or both of the first patterned structure 11 and the spacer region 12 (Refer to FIG. 2D); In one embodiment, the second etching process uses an anodic aluminum oxide (AAO) process, but it is not limited to this. In the case of using anodized aluminum treatment, it includes providing a second photoresist layer on the surface of the second metal layer 14 above the first patterned structure 11, so that the anodized aluminum treatment can selectively remove parts The second metal layer 14 above the spacer region 12, therefore, the second patterned structure 15 can be formed on the second metal layer 14 above the spacer region 12, but the second metal layer 14 above the first patterned structure 11 is It does not have the second patterned structure 15. In another embodiment, in the method for fabricating a patterned photoelectric substrate with improved luminous efficiency of the present invention, in step S4, it further includes providing a second photoresist layer with a second metal layer 14 above the spacer region 12 On the surface, the anodized aluminum treatment can selectively remove part of the second metal layer 14 above the first patterned structure 11. Therefore, the second patterned structure 15 can be formed on the first patterned structure 11 Two metal layers 14, but the second metal layer 14 above the spacer area 12 does not have the second patterned structure 15.

Step S5: The second patterned structure 15 is extended down to the first metal layer 13 and part of the surface of the substrate 10 by the third etching process (refer to FIG. 2E); the third etching process described here can be the same The aforementioned first etching treatment will not be repeated here.

Step S6: Remove the first metal layer 13 and the second metal layer 14 from the substrate 10 by an acid treatment to form a substrate 10 having a first patterned structure 11 and a second patterned structure 15 (refer to FIG. 2F), and the acid solution referred to here can be oxalic acid (H ₂ C ₂ O ₄ ), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), etc., or it can be treated as required and matched The time can be prepared by a variety of acid solutions, for example, hydrofluoric acid: nitric acid: acetic acid in a ratio of 2:3:10, and pickled for about 2 minutes.

Step S7: forming a filling layer 16 in the second patterned structure 15 at a predetermined growth rate, as shown in FIG. 2G and its partial enlarged view 2H. Here, the filling layer 16 may be formed by physical vapor deposition (Physical Vapor Deposition) at a predetermined growth rate, such as sputtering or evaporation, to fill the filling layer 16 in the second patterned structure 15 , And the predetermined growth rate is preferably between 0.01 and 3.0 nanometers per second.

Wherein, the structure shape of the aforementioned second patterned structure 15 is a primary micron-level groove structure, and its aspect ratio is between 0.3:1 and 20:1. And this time the micron-level groove structure includes a polygonal structure, including a trapezoidal structure, a tapered structure, an arc structure, a columnar structure, or an angular structure. In addition, it should be particularly noted that the material used for the filling layer 16 is not particularly limited, and a material with a refractive index between 1.7 and 2.5 can be selected as a better way, such as sapphire (refractive index 1.7), aluminum nitride AlN , Silicon Nitride SiN, Silicon Dioxide SiO ₂ , Titanium Nitride TiN or Gallium Nitride (refractive index 2.5) are all available.

Please refer to FIG. 2I. It should be noted that, in addition to filling the second patterned structure 15 with the filling layer 16, the filling layer 16 will also exist on the first patterned structure 11 and the spacer area 12. In addition, please also refer to FIG. 2J, which is another embodiment of the second patterned structure 15. The structure of the second patterned structure 15 is a pyramid-shaped sub-micron groove structure. In this embodiment, The filling layer 16 is made of gallium nitride material, at a predetermined growth rate between 0.01 and 3.0 nanometers per second, to fill the angular cone-shaped groove gaps in the second patterned structure 15. Accordingly, the present invention is applied The proposed manufacturing method of patterned optoelectronic substrate with improved luminous efficiency is further applied to products made of light-emitting diodes. Through the angular cone-shaped sub-micron groove structure, the amount of light incident can be increased, and the filling layer 16 Filling in the second patterned structure 15 can avoid the phenomenon of total reflection of light, greatly increase the amount of light, and further improve the luminous efficiency.

In another embodiment of the present invention, the filling layer 16 includes aluminum nitride. If the substrate 10 is made of sapphire, since the refractive index of aluminum nitride and sapphire are similar, the critical angle of light entering different media can reach approximately 42.5 degrees, according to this, the total reflection phenomenon caused by light entering different media can be eliminated. In addition, in another embodiment of the present invention, the filling layer 16 is formed in the second patterned structure 15 of the substrate 10 by sputtering or atomic layer deposition, but it is not limited to this.

In addition, in the aforementioned method of manufacturing a patterned photoelectric substrate with improved luminous efficiency, after step S7, it further includes providing a buffer layer 40 and a photoelectric element formed on the substrate 20 so that the substrate 20 can be Combining the buffer layer 40 and the optoelectronic element to form a light emitting diode 30 or a solar cell will be further described in the following FIG. 3A.

2K, the present invention provides another embodiment, which is a patterned optoelectronic substrate 20 with improved luminous efficiency, including: a first patterned structure 21, in this embodiment, the first patterned structure 21 is A micron-level groove structure; and a spacer region 22; a second patterned structure 25, which is a primary micron-level groove structure, formed on one or both of the first patterned structure 21 and the spacer region 22 And a filling layer 26 disposed in the sub-micron groove structure of the second patterned structure 25. The manufacturing process of the patterned optoelectronic substrate 10 with improved luminous efficiency in this embodiment is substantially the same as that of the previous embodiment, except that the concave-convex type of the first patterned structure 21 is different. In this embodiment, a first photoresist layer (not shown in the figure) is provided on a part of the surface of the substrate 20, so that the first etching process is to selectively remove part of the substrate 20 to form a cone-shaped micron-level groove The first patterned structure 21 of the structure and the spacer region 22 of the planar structure; then, according to the aforementioned manufacturing process, the first patterned structure 21 contains a plurality of second patterned structures 25 to form a first patterned structure The patterned photoelectric substrate 20 of the structure 21 and the second patterned structure 25 with improved luminous efficiency is then provided with a filling layer 26, and the second patterned structure 25 is filled and leveled.

In an embodiment, the first patterned structure 21 or the second patterned structure 26 is conical, arc-shaped, cylindrical, pyramid-shaped, or prism-shaped, or may be a polygonal structure, including a trapezoidal structure , A conical structure, an arc structure, a columnar structure or an angular structure, etc., are not limited.

It should be particularly noted that the aspect ratio of the sub-micron groove structure of the second patterned structure 26 is between 0.3:1 and 20:1. The filling layer 26 is made of materials with a refractive index between 1.7 and 2.5, such as sapphire (with a refractive index of 1.7) or gallium nitride (with a refractive index of 2.5).

Please refer to FIG. 3A, which is a light-emitting diode 30 having a patterned photoelectric substrate with improved luminous efficiency proposed by the present invention, and the photoelectric substrate is the aforementioned patterned photoelectric substrate 20 with improved luminous efficiency, having a The first patterned structure 21, the spacer region 22, the second patterned structure 25, and the filling layer 26 are disposed in the second patterned structure 25 or on the substrate 20, and will not be repeated here.

A buffer layer 40 is disposed on the substrate 20. In the embodiment shown in FIG. 2H, the buffer layer 40 is disposed on the first patterned structure 21 and the spacer region 22, and the filling layer 26 is filled in Between the second patterned structure 25 and the buffer layer 40. In the embodiment shown in FIG. 2I, the filling layer 26 is respectively filled on the first patterned structure 21, the spacer area 22, and the second patterned structure 25, and the buffer layer 40 is combined with the filling layer 26.

An optoelectronic element is disposed on the buffer layer 40, and the optoelectronic element includes: a first semiconductor layer 51, a light emitting layer 52, and a second semiconductor layer 53, wherein the first semiconductor layer 51 is bonded to the buffer layer 40; The light emitting layer 52 is sandwiched between the first semiconductor layer 51 and the second semiconductor layer 53.

Among them, the first semiconductor layer 51 and the second semiconductor layer 53 have relative electrical properties. For example, the first semiconductor layer 51 and the second semiconductor layer 53 are divided into a P-type semiconductor layer and an N-type semiconductor layer, or the first semiconductor layer 51 The second semiconductor layer 53 is divided into an N-type semiconductor layer and a P-type semiconductor layer. In addition, in the aforementioned light emitting diode 30 of the present invention, it further includes a first electrode 54 and a second electrode 55. The first electrode 54 and the second electrode 55 are electrically connected to the first semiconductor layer 51 and the second electrode 55, respectively. The second semiconductor layer 53, and the first electrode 54 and the first semiconductor layer 51 or the second electrode 55 and the second semiconductor layer 53 have the same electrical properties. For example, the first electrode 54 and the first semiconductor layer 51 are both positive The second electrode 55 and the second semiconductor layer 53 are both negative, or the first electrode 54 and the first semiconductor layer 51 are both negative, and the second electrode 55 and the second semiconductor layer 53 are both positive. In addition, in the light-emitting diode 30 disclosed in the present invention, the photoelectric element can be a straight-through light-emitting diode, a side-through light-emitting diode, or a flip-chip light-emitting diode, and the present invention is not limited Here.

Please refer to FIG. 3B. It should be particularly noted that the substrate 20 used in the light-emitting diode 30 provided by the present invention has a filling layer 26 and is at least disposed in the second patterned structure 25. Therefore, when buffering When the layer 40 is disposed on the substrate 20, there is a bonding portion 261 between the buffer layer 40 and the filling layer 26. The bonding portion 261 can be as shown in FIG. 2H, and the filling layer 26 is filled and leveled in the second patterned structure 25. Inside, then the buffer layer 40 will be combined with the spacer area, the filling layer and the first patterned structure respectively, and the junction 261 will have a flat structure; another implementation aspect can be as shown in FIG. 2I or FIG. 2J, the filling layer 26 In addition to being filled in the second patterned structure, it is also evenly arranged on the spacer area and the first patterned structure. Therefore, the bonding portion 261 also exhibits a relatively flat structure; please refer to FIG. 3B, in another embodiment, When the filling layer 26 is filled in the second patterned structure 25 and joined with the buffer layer 40, the bonding portion 261 has a recessed structure, which is particularly suitable for a structure with a deeper aspect ratio of the second patterned structure 25. In the sputtering process, the deeper gaps of the second patterned structure 25 are filled (here, the filling layer 26), and then the MOCVD epitaxial rate is matched to control the horizontal and vertical growth, so that the buffer layer 40 is connected to Above the filling layer 26, the hollow structure is avoided in the overall structure.

In addition, in the aforementioned light emitting diode of the present invention, the buffer layer 40 may be a gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), or the like, or a combination thereof , To reduce the stress caused by the lattice mismatch between the substrate 20 (e.g., sapphire substrate) and the optoelectronic element (e.g., the gallium nitride epitaxial layer of the light-emitting diode), thereby reducing defects in the optoelectronic element The purpose of quantity; in addition, in addition to using a gallium nitride epitaxial layer as the optoelectronic element to form a light emitting diode 30, in another aspect of the present invention, a solar substrate can be selected as the optoelectronic element. To form a solar cell, at this time, the buffer layer 40 can also be an amorphous silicon carbide, and can also be used to reduce the crystal lattice between the substrate 20 (such as a sapphire substrate) and the solar monocrystalline layer or solar polycrystalline layer The stress caused by the mismatch can further reduce the number of defects in the optoelectronic element, and the present invention is not limited to this.

Accordingly, the present invention proposes a light-emitting diode 30. Since the substrate 20 used is a patterned photoelectric substrate with improved luminous efficiency as described above, the thickness of the light-emitting diode 30 through the second patterned structure 25 is a micrometer. The high-level groove structure can increase the amount of light incident. Furthermore, by using a predetermined growth rate to fill the filling layer 26 in the second patterned structure 25, the phenomenon of total reflection of light can be avoided, and the phenomenon of total reflection of light can be avoided. Increasing the amount of incident light further improves the luminous efficiency, so that the entire light emitting diode 30 has more stable and better luminous efficiency and performance.

Please refer to Figure 4 and Figure 5, which are the diffuse reflectance (DR; diffuse reflectance) and diffuse transmittance (DT; diffuse transmittance) of the groove structure with different aspect ratios on the substrate for various wavelengths of light. Experimental data graph. Figure 6 is a graph showing the relationship between diffuse reflectance, diffuse transmittance and aspect ratio, and the AR value indicated in the figure is the aspect ratio. As can be seen in Figures 4 and 5, when there is no sub-micron groove structure or micro-scale groove structure on the substrate, but only the sapphire substrate (Bare), no matter the wavelength of the light, the detector detects The ratio of DR to DT is maintained at 0.2%.

However, when a sub-micron groove structure or a micron groove structure is provided on the substrate, under the same wavelength of light, as the aspect ratio increases, the DR and DT increase, which can effectively improve the LED light extraction effectiveness. Figure 4 can also see that as the aspect ratio increases, DR and DT also increase.

Please refer to FIGS. 7 and 8, which are electron microscope side views of growing LED structure layers on substrates with groove structures with different aspect ratios. Continuing from the above, although the prior art has disclosed the technical features of providing a sub-micron-level groove structure or a micro-level groove structure on the substrate, and from the above content, it can be seen that as the aspect ratio of the groove structure is greater, the DR And DT will increase accordingly. However, in the actual epitaxial process, if the MOCVD technology is used to generate an epitaxial layer on the substrate, it will encounter a technical bottleneck that cannot completely fill the groove structure with a high aspect ratio. As shown in Figure 8, although a groove structure with a lower aspect ratio (shallower) is easier to fill, however, as shown in Fig. 7, a groove structure with a higher aspect ratio (deeper) will not be easy Filling, therefore, will cause the LED epitaxial structure to leave gaps in nanoscale-patterned sapphire substrates (NPSS) with high aspect ratio, so that the light emitted by the LED cannot be smoothly derived from the sapphire substrate. In other words, even if a submicron-level groove structure or a micro-level groove structure with a high aspect ratio is provided on the substrate, the LED light extraction efficiency cannot be effectively improved when the existing epitaxial process cannot be broken.

Please refer to Figure 9, Figure 10 and Figure 11, which in turn are LED structures with gaps in the groove structure on the substrate, LED structures without groove structure on the substrate, and LED structures with the groove structure on the substrate completely filled. . Figure 9 shows the aforementioned groove structure with high aspect ratio. Although a substrate with a higher aspect ratio can theoretically improve the light extraction efficiency, the groove is a sub-micron groove structure or a micron-level groove. The groove structure, so after the subsequent MOCVD process, the groove structure will be as shown in Figure 9. As can be seen in Figure 9, because the groove structure on the substrate has gaps, when the light enters the LED medium To the groove structure on the substrate, the groove structure on the substrate is an air medium, and its refractive index is 1, while the LED epitaxial layer on the substrate uses gallium nitride as an example, and its refractive index is 2.5. Therefore, if Taking into account the condition of total reflection, according to the snell's law of optics, the light of the LED will produce a critical angle of 23.5 degrees, so that the light is reflected back to the epitaxial layer of the LED and cannot escape into the atmosphere.

As shown in Figure 10, it is the implementation of the structure without grooves on the substrate. Therefore, taking a sapphire substrate (Sapphire) as an example, its refractive index is 1.7, and the refractive index of gallium nitride is 2.5. Therefore, if you consider the total In the reflected state, the light of the LED will produce a critical angle of 42.5 degrees. As shown in FIG. 11, it is another embodiment of the groove structure, but it is not limited to this. The key point of the present invention is that since the groove structure on the substrate has been completely filled, the substrate Under the condition that the sub-micron-level groove structure or the micro-level groove structure can still be maintained on the upper surface, the light of the LED can still generate a critical angle of 42.5 degrees. Accordingly, the LED light extraction efficiency can be effectively improved. In other words, although NPSS with a high aspect ratio is beneficial to light extraction efficiency, the premise is that the groove structure of the LED must be filled and leveled. Accordingly, through the patterned optoelectronic substrate with improved luminous efficiency proposed by the present invention, the second patterned structure is a micron-level groove structure, which can increase the amount of light incident. Furthermore, by using a predetermined The growth rate fills the filling layer in the second patterned structure, which can avoid the phenomenon of total reflection of light, greatly increase the amount of light incident, and further improve the luminous efficiency, thereby making the entire light-emitting diode more stable and more efficient. Excellent luminous efficiency and performance.

Figure 12 is a comparison diagram of the LED luminous efficiency of the filling state of the groove structure on the various substrates of Figures 9 to 11, where the Y axis refers to the light intensity, the unit is mcd (millicandela), and the label is HAR-LED means In the aspect of FIG. 9, the groove structure on the substrate has an LED structure with gaps, the label B-LED refers to the LED structure without groove structure on the substrate in the aspect of FIG. 10, and the LED structure labeled LAR-LED is the one in FIG. As for the LED structure in which the groove structure on the substrate is completely filled, it can be known that the LAR-LED has the highest light intensity. In addition, the implementation aspects of Figures 9 to 11 are derived from experiments carried out by using a flat sapphire substrate to excavate nano-holes and adding a micro-structure pattern (nano-patterned sapphire substrate NPSS). Of course It is also suitable for composite substrates.

The above-mentioned embodiments are merely examples for the convenience of description, and the scope of rights claimed in the present invention should be subject to the scope of the patent application, rather than being limited to the above-mentioned embodiments.

S1, S2, S3, S4, S5, S6, S7: steps 10, 20: substrate 30: LED 11.21: The first patterned structure 12, 22: Interval area 13: The first metal layer 14: second metal layer 15, 25: second patterned structure 16, 26: Filling layer 40: buffer layer 51: The first semiconductor layer 52: luminescent layer 53: second semiconductor layer 54: first electrode 55: second electrode 261: Joint

FIG. 1 is a flow chart of the manufacturing method of a patterned optoelectronic substrate with improved luminous efficiency according to the present invention. 2A to 2J are schematic diagrams of an embodiment of the patterned photoelectric substrate with improved luminous efficiency of the present invention. FIG. 2I shows another embodiment of the filling layer. FIG. 2J is another implementation aspect of the second patterned structure. 2K is another embodiment of a patterned photoelectric substrate with improved luminous efficiency proposed by the present invention. 3A and 3B are a light-emitting diode with a patterned photoelectric substrate with improved luminous efficiency proposed by the present invention. 4 and 5 are experimental data diagrams of the diffuse reflectance and diffuse transmittance of the groove structure with different aspect ratios on the substrate for various wavelengths of light. Figure 6 is a graph showing the relationship between diffuse reflectance, diffuse transmittance and aspect ratio of a substrate with groove structure when incident light is 450mm. Figures 7 and 8 are electron microscope images of substrates with grooved structures with different aspect ratios after growing LED structure layers. FIG. 9 is a schematic diagram of an LED structure with a gap in the groove structure on the substrate and a diagram of the light trace. FIG. 10 is a schematic diagram of the structure of an LED without a groove structure on the substrate and a diagram of the light trace. FIG. 11 is a schematic diagram of the LED structure and the light track travel diagram with the groove structure on the substrate completely filled. FIG. 12 is a comparison diagram of the luminous efficiency of LEDs in the filling state of the groove structure on the various substrates of FIG. 9 to FIG. 11.

S1, S2, S3, S4, S5, S6, S7: steps

Claims (14)

A method for manufacturing a patterned optoelectronic substrate with improved luminous efficiency, the steps of which include: Step S1: Provide a substrate; Step S2: forming a first patterned structure and a spacer area on the surface of the substrate by a first etching process; Step S3: forming a first metal layer and a second metal layer on the first patterned structure and the surface of the spacer area on the substrate; Step S4: A second patterned structure is formed on the second metal layer by a second etching process, and the second patterned structure is located at one or both of the first patterned structure and the spacer area. By; Step S5: extend the second patterned structure down to the first metal layer and part of the surface of the substrate by a third etching process; Step S6: removing the first metal layer and the second metal layer from the substrate by an acid treatment to form the substrate having the first patterned structure and the second patterned structure; and Step S7: forming a filling layer at a predetermined growth rate to fill the second patterned structure. The method for fabricating a patterned optoelectronic substrate with improved luminous efficiency as described in the first item of the scope of patent application, wherein the structure shape of the second patterned structure is a micron-level groove structure, and its aspect ratio is medium Between 0.3:1 and 20:1. The method for fabricating a patterned optoelectronic substrate with improved luminous efficiency as described in item 2 of the scope of patent application, wherein the sub-micron groove structure includes a polygonal structure. According to the method for fabricating a patterned optoelectronic substrate with improved luminous efficiency as described in item 1 of the scope of patent application, the filling layer is filled in the second patterned structure by means of physical vapor deposition. The method for fabricating a patterned photoelectric substrate with improved luminous efficiency as described in item 1 or 4 of the scope of the patent application, wherein the predetermined growth rate is between 0.01 to 3.0 nanometers per second. As described in item 1 or 4 of the scope of patent application, the method for fabricating a patterned photoelectric substrate with improved luminous efficiency, wherein the material used in the filling layer has a refractive index between 1.7 and 2.5. A patterned photoelectric substrate with improved luminous efficiency, including: A first patterned structure, which is a micron-level protrusion structure or a micron-level groove structure; A compartment A second patterned structure is a primary micron-level groove structure and is formed on one or both of the first patterned structure and the spacer region; and A filling layer is arranged in the sub-micron groove structure of the second patterned structure. The patterned optoelectronic substrate with improved luminous efficiency described in item 7 of the scope of patent application, wherein the first patterned structure or the second patterned structure is conical, circular, cylindrical, pyramidal or Angle columnar. The patterned photoelectric substrate with improved luminous efficiency as described in item 7 of the scope of patent application, wherein the aspect ratio of the sub-micron groove structure is between 0.3:1 and 20:1. As described in item 7 of the scope of patent application, the patterned photoelectric substrate with improved luminous efficiency, wherein the filling layer is selected from a material with a refractive index between 1.7 and 2.5. A light-emitting diode with a patterned photoelectric substrate for improving luminous efficiency, including: A substrate, which is a patterned optoelectronic substrate with improved luminous efficiency according to any one of 7-10 of the scope of patent application; A buffer layer disposed on the substrate; and A photoelectric element is arranged on the buffer layer, and the photoelectric element includes: a first semiconductor layer, a light emitting layer, and a second semiconductor layer, wherein the first semiconductor layer is bonded to the buffer layer; the light emitting layer , Sandwiched between the first semiconductor layer and the second semiconductor layer. For example, the light emitting diode described in claim 11 further includes a first electrode and a second electrode. The first electrode and the second electrode are electrically connected to the first semiconductor layer and The second semiconductor layer. According to the light emitting diode described in item 11 of the scope of patent application, there is a junction between the filling layer and the buffer layer. For example, the light-emitting diode described in claim 13 of the patent scope, wherein the joint portion has a recessed structure.

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