TW202010235A - Power source controll circuit - Google Patents
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- TW202010235A TW202010235A TW107129396A TW107129396A TW202010235A TW 202010235 A TW202010235 A TW 202010235A TW 107129396 A TW107129396 A TW 107129396A TW 107129396 A TW107129396 A TW 107129396A TW 202010235 A TW202010235 A TW 202010235A
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本發明涉及一種電源控制電路,特別是一種以PWM形式輸出電流的電流型磁滯控制的電源控制電路。 The invention relates to a power supply control circuit, in particular to a current-type hysteresis controlled power supply control circuit that outputs current in the form of PWM.
在現有技術中,尤其是針對雷射二極體驅動電路(Laser Diode Driver)的控制電路中,一般而言都是採用傳統的迴授控制或是電壓磁滯控制。但這些現有技術,會伴隨者下列所述之缺失:傳統的磁滯控制IC大都是以定電壓的控制方式為主,若是要修改為定電流時則大都會以並聯式電阻器(Shunt Resistor)作為偵測,但是對於使用大電流的負載應用做驅動時,則使用Shunt Resistor的功率損耗將會非常大。又,若要減低Shunt Resistor的功率損耗,就必須將電阻本身放得非常小,如此,則精準度容易被硬體規格限制住,且提升硬體規格的成本,將會大幅度的上升。再者,目前定電壓技術應用上,需考量用並聯,則Shunt Resistor必須放置在高壓端(High-side)端,然而一般的電流感應IC(Current Sense IC)大都有耐壓的限制,耐壓越高精準度與反應速度越慢,將不利於未來發展的高壓機種。因此,有待且必要加以改善。 In the prior art, especially the control circuit for the laser diode driver circuit (Laser Diode Driver), generally, the conventional feedback control or voltage hysteresis control is adopted. However, these existing technologies will be accompanied by the following shortcomings: traditional hysteresis control ICs are mainly based on constant voltage control, and if they are to be modified to constant current, most of them will use shunt resistors (Shunt Resistor) As a detection, but when using a heavy current load application as a drive, the power loss using Shunt Resistor will be very large. In addition, to reduce the power loss of the Shunt Resistor, the resistor itself must be kept very small. As a result, the accuracy is easily limited by the hardware specifications, and the cost of upgrading the hardware specifications will increase significantly. In addition, in the current application of constant voltage technology, it is necessary to consider parallel connection. The Shunt Resistor must be placed on the high-side (High-side) side. However, most current sense ICs (Current Sense IC) have a voltage limit. The higher the accuracy and the slower the response speed, the lower the development of high-pressure models. Therefore, it needs to be improved.
本發明公開一種電源控制電路,透過本發明的技術能夠多方面廣泛的被應用,有效改善傳統定電壓形式的磁滯控制,本發明亦能夠運用於多方面廣泛負載及可程式化負載電流(Program Current)的電路應用中,使其控制線路的應用較為簡化,不僅反應速度快且能運用於高功率大電流的電路應用中。 The invention discloses a power supply control circuit. The technology of the invention can be widely used in various aspects to effectively improve the hysteresis control of the traditional constant voltage form. The invention can also be applied to a wide range of loads and programmable load currents (Program Current) circuit application, the application of its control circuit is simplified, not only fast response but also can be used in high power and large current circuit applications.
本發明的一種電源控制電路,係用於驅動高功率大電流的負載,該電源控制電路包括有:一直流輸入電源Vin;一輸入電容C1,與該直流輸入電源Vin並聯:一第一切換元件Q1,該第一切換元件Q1的第一端耦接於該直流輸入電源Vin的正極端;一第二切換元件Q2,該第二切換元件Q2的第一端耦接於該第一切換元件Q1的第二端,該第二切換元件Q2的第二端耦接於該直流輸入電源Vin的負極端;一電感L1,該電感L1的第一端耦接於該第一切換元件Q1的第二端,該電感L1輸出一脈寬調變PWM形式的輸出電流Io;一電流偵測器,該電流偵測器與該電感L1串接,用以偵測該輸出電流Io,且輸出一電流偵測訊號CC;一二極體D1,該二極體D1的陽極端耦接於該電感L1的第二端,該二極體D1的陰極端耦接於該直流輸入電源Vin的正極端;一第三切換元件Q3,該第三切換元件Q3的第一端耦接於該二極體D1的陽極端,該第三切換元件Q3的第二端耦接於該直流輸入電源Vin的負極端;一負載,該負載耦接於該第三切換元件Q3的第一端與該第三切換元件Q3的第二端之間,並由該輸出電流Io所驅動;一磁滯電流控制器,該磁滯電流控制器是分別與該第一切換元件Q1、該第二切換元件Q2及該第三切換元件Q3的個別控制端相耦接,及輸入有該電流偵測訊號CC,且輸入有一脈波及一電流控制訊號PC,該磁滯電流控制器用以提供該第一~第三切換元件Q1~Q3所需要的驅動訊號;其中該輸出電流Io能依據該負載的需求做調整而具有一位移準位。 A power supply control circuit of the present invention is used to drive a high-power and large-current load. The power supply control circuit includes: a DC input power supply Vin; an input capacitor C1 connected in parallel with the DC input power supply Vin: a first switching element Q1, the first end of the first switching element Q1 is coupled to the positive terminal of the DC input power Vin; a second switching element Q2, the first end of the second switching element Q2 is coupled to the first switching element Q1 The second end of the second switching element Q2 is coupled to the negative terminal of the DC input power Vin; an inductor L1, the first end of the inductor L1 is coupled to the second end of the first switching element Q1 At the end, the inductor L1 outputs an output current Io in the form of a pulse width modulated PWM; a current detector connected in series with the inductor L1 to detect the output current Io and output a current detector Measurement signal CC; a diode D1, the anode end of the diode D1 is coupled to the second end of the inductor L1, the cathode end of the diode D1 is coupled to the positive terminal of the DC input power Vin; one A third switching element Q3, the first end of the third switching element Q3 is coupled to the anode end of the diode D1, and the second end of the third switching element Q3 is coupled to the negative end of the DC input power supply Vin; A load coupled between the first end of the third switching element Q3 and the second end of the third switching element Q3 and driven by the output current Io; a hysteresis current controller, the magnetic The hysteresis controller is respectively coupled to the individual control terminals of the first switching element Q1, the second switching element Q2, and the third switching element Q3, and the current detection signal CC is input, and a pulse and A current control signal PC, the hysteresis current controller is used to provide the driving signals required by the first to third switching elements Q1 to Q3; wherein the output current Io can be adjusted according to the demand of the load to have a displacement level .
本發明在一實施例中,所述電源控制電路之中的該磁滯電流控制器包括有:一迴授比較器,該迴授比較器的非反向輸入端是輸入該電流偵測訊號CC,該迴授比較器的反向輸入端是耦接一電阻RCC1後接地,並經由一電阻RCC2連接到該迴授比較器的輸出端;一磁滯放大器,該磁滯放大器的非反向輸入端耦接該電流控制訊號PC,該磁滯放大器的反向輸入端耦接於該迴授比較器 的輸出端;一延時電路,該延時電路的輸入端耦接於該磁滯放大器的輸出端,該延時電路並輸出一第一延時訊號Hin及一第二延時訊號Lin;一第一驅動電路,是輸入該第一延時訊號Hin及該第二延時訊號Lin,並輸出一第一H驅動訊號及一第一L驅動訊號,該第一H驅動訊號耦接於該第一切換元件Q1的控制端,該第一L驅動訊號耦接於該第二切換元件Q2的控制端;及一第二驅動電路,是輸入該脈波,並輸出一第二OUT驅動訊號,該第二OUT驅動訊號耦接於該第三切換元件Q3的控制端。 In an embodiment of the present invention, the hysteresis current controller in the power control circuit includes: a feedback comparator, and the non-inverting input terminal of the feedback comparator inputs the current detection signal CC , The inverting input of the feedback comparator is coupled to a resistor RCC1 and then grounded, and is connected to the output of the feedback comparator via a resistor RCC2; a hysteresis amplifier, the non-inverting input of the hysteresis amplifier The terminal is coupled to the current control signal PC, the inverting input of the hysteresis amplifier is coupled to the output of the feedback comparator; a delay circuit, the input of the delay circuit is coupled to the output of the hysteresis amplifier , The delay circuit also outputs a first delay signal Hin and a second delay signal Lin; a first drive circuit is to input the first delay signal Hin and the second delay signal Lin, and output a first H drive signal And a first L drive signal, the first H drive signal is coupled to the control end of the first switching element Q1, the first L drive signal is coupled to the control end of the second switching element Q2; and a second The driving circuit inputs the pulse wave and outputs a second OUT driving signal. The second OUT driving signal is coupled to the control end of the third switching element Q3.
10‧‧‧磁滯電流控制器 10‧‧‧ Hysteresis current controller
20‧‧‧迴授比較器 20‧‧‧ Feedback comparator
22‧‧‧第一放大器 22‧‧‧First amplifier
25‧‧‧濾波電路 25‧‧‧filter circuit
30‧‧‧磁滯放大器 30‧‧‧ Hysteresis amplifier
32‧‧‧第二放大器 32‧‧‧Second amplifier
40‧‧‧延時電路 40‧‧‧ Delay circuit
41‧‧‧第一反向器 41‧‧‧First inverter
42‧‧‧第二反向器 42‧‧‧The second inverter
43‧‧‧第三反向器 43‧‧‧The third inverter
50‧‧‧第一驅動電路 50‧‧‧ First drive circuit
52‧‧‧放大器 52‧‧‧Amplifier
60‧‧‧保護電路 60‧‧‧Protection circuit
70‧‧‧第二驅動電路 70‧‧‧ Second drive circuit
72‧‧‧脈波轉換器 72‧‧‧Pulse converter
80‧‧‧電流偵測器 80‧‧‧current detector
90‧‧‧負載 90‧‧‧load
Vin‧‧‧直流輸入電源 Vin‧‧‧DC input power
C1‧‧‧輸入電容 C1‧‧‧ Input capacitance
Io‧‧‧輸出電流 Io‧‧‧Output current
L1‧‧‧電感 L1‧‧‧Inductance
Q1~Q3‧‧‧第一~第三切換元件 Q1~Q3‧‧‧First to third switching elements
D1、DL1~DLN‧‧‧二極體 D1, DL1~DLN‧‧‧ diode
RCC1、RCC2‧‧‧電阻 RCC1, RCC2 ‧‧‧ resistance
C1a、C1b、CZ1、CZ2‧‧‧電容 C1a, C1b, CZ1, CZ2
RZ1、RZ2‧‧‧電阻 RZ1, RZ2 ‧‧‧ resistance
DZ1~DZ4‧‧‧二極體 DZ1~DZ4‧‧‧Diode
Q101~Q106、Q108~Q110、Q200‧‧‧切換開關 Q101~Q106, Q108~Q110, Q200‧‧‧switch
L11‧‧‧第一電感 L11‧‧‧First inductor
L12‧‧‧第二電感 L12‧‧‧Second inductor
D11、D12、D25、D26‧‧‧二極體 D11, D12, D25, D26 ‧‧‧ diode
R11~R13、R25、R26‧‧‧電阻 R11~R13, R25, R26
S1‧‧‧開關元件 S1‧‧‧Switch element
PULSE‧‧‧脈波 PULSE‧‧‧Pulse
PC‧‧‧電流控制訊號 PC‧‧‧Current control signal
CC‧‧‧電流偵測訊號 CC‧‧‧current detection signal
IPWM‧‧‧電流脈波控制訊號 IPWM‧‧‧Current pulse control signal
ISET‧‧‧電流設定訊號 ISET‧‧‧Current setting signal
ISIM‧‧‧電流位移控制訊號 ISIM‧‧‧Current displacement control signal
Hin‧‧‧第一延時訊號 Hin‧‧‧First delayed signal
Lin‧‧‧第二延時訊號 Lin‧‧‧second delayed signal
HO‧‧‧第一HO驅動訊號 HO‧‧‧First HO drive signal
HS‧‧‧第一HS驅動訊號 HS‧‧‧The first HS drive signal
LO‧‧‧第一LO驅動訊號 LO‧‧‧First LO drive signal
LS‧‧‧第一LO驅動訊號 LS‧‧‧First LO drive signal
OUTH‧‧‧第二OUTH驅動訊號 OUTH‧‧‧Second OUTH drive signal
OUTL‧‧‧第二OUTL驅動訊號 OUTL‧‧‧Second OUTL drive signal
SH‧‧‧電流位移 SH‧‧‧Current displacement
SP‧‧‧突波 SP‧‧‧Surge
圖1為本發明實施例之電路及電路方塊連接示意圖;圖2為圖2A及圖2B相組合連接之示意圖;圖2A為本發明實施例中之主電路架構一部分實施示意圖;圖2B為本發明實施例中之主電路架構另一部分實施示意圖;圖3為本發明實施例之部分的磁滯電流控制器內部實施示意圖;圖4為本發明實施例之第一驅動電路輸出/輸入訊號的實施示意圖;圖5為本發明實施例之第二驅動電路輸出/輸入訊號的實施示意圖;圖6為本發明實施例之電流控制訊號實施示意圖;圖7為本發明實施例之電流脈波控制訊號實施示意圖;圖8為本發明實施例之輸出電流波形示意圖;圖9為本發明實施例之電感實施示意圖;圖10為本發明實施例之電感特性示意圖;圖11為本發明中電感L1的實施例示意圖;圖12為本發明中電感L1的另一實施例示意圖。 1 is a schematic diagram of the connection of circuits and circuit blocks according to an embodiment of the present invention; FIG. 2 is a schematic diagram of the combined connection of FIGS. 2A and 2B; FIG. 2A is a schematic diagram of part of the implementation of the main circuit architecture in the embodiment of the present invention; The schematic diagram of another part of the implementation of the main circuit architecture in the embodiment; FIG. 3 is a schematic diagram of the internal implementation of a part of the hysteresis current controller of the embodiment of the invention; FIG. 4 is a schematic diagram of the implementation of the output/input signal of the first driving circuit of the embodiment of the invention FIG. 5 is a schematic diagram of the implementation of the output/input signals of the second driving circuit according to an embodiment of the present invention; FIG. 6 is a schematic diagram of the implementation of the current control signal of the embodiment of the present invention; FIG. 7 is a schematic diagram of the implementation of the current pulse control signal of the embodiment of the present invention; FIG. 8 is a schematic diagram of an output current waveform according to an embodiment of the present invention; FIG. 9 is a schematic diagram of an inductor according to an embodiment of the present invention; FIG. 10 is a schematic diagram of an inductor characteristic according to an embodiment of the present invention; FIG. 11 is a schematic diagram of an embodiment of the inductor L1 according to the present invention; FIG. 12 is a schematic diagram of another embodiment of the inductor L1 in the present invention.
在下文中將參閱隨附圖式,藉以更充分地描述各種例示性實 施例,並在隨附圖式中展示一些例示性實施例。然而,本發明之概念可能以許多不同形式來加以體現,且不應解釋為僅限於本文中所闡述之例示性實施例。確切而言,提供此等例示性實施例使得本發明將為詳盡且完整,且將向熟習此項技術者充分傳達本發明概念的範疇。在諸圖式中,可為了清楚而誇示電路方塊與電路元件與各個裝置之相對應位置,其中對於類似英文標號或數字,始終指示類似元件。 In the following, reference will be made to the accompanying drawings in order to more fully describe the various exemplary embodiments, and some exemplary embodiments are shown in the accompanying drawings. However, the concepts of the present invention may be embodied in many different forms and should not be interpreted as being limited to the exemplary embodiments set forth herein. Rather, providing these exemplary embodiments will make the invention detailed and complete, and will fully convey the scope of the inventive concept to those skilled in the art. In the drawings, the relative positions of the circuit blocks and circuit components and the various devices can be exaggerated for clarity, where similar components or symbols are always indicated for similar English labels or numbers.
應理解,雖然在本文中可能使用術語開關元件係包括有切換元件、切換開關或開關元件,是指一種切換元件的表達術語,但並不限定是採用IGBT、BJT、MOS、CMOS、JFET或是MOSFET之N通道或P通道,即此等元件不應受此等電子元件實際產品術語之限制。以及本文所出現之第一、第二、第三…;或是第一切換元件Q1、第三切換元件Q3;或輸入電容C1、電容C10、電容CZ1;或是二極體D1、二極體D2…,此等術語乃用以清楚地區分一元件與另一元件,並非具有一定的元件的先後數字的順序關係,即有可能會有第一切換元件Q1、第三切換元件Q3而可能無第二切換元件Q2之實施態樣,亦即電路元件標示的號碼/數字,乃非一定具有連續之序號作為元件符號之標示關係。 It should be understood that although the term switching element may include a switching element, a switching switch, or a switching element in this document, which refers to an expression term for a switching element, it is not limited to IGBT, BJT, MOS, CMOS, JFET, or MOSFET N-channel or P-channel, that is, these components should not be limited by the actual product terminology of these electronic components. And the first, second, third... appearing in this article; or first switching element Q1, third switching element Q3; or input capacitor C1, capacitor C10, capacitor CZ1; or diode D1, diode D2... These terms are used to clearly distinguish one element from another, and do not have a certain number of elements in the order of sequence relationship, that is, there may be a first switching element Q1, a third switching element Q3 may not The implementation state of the second switching element Q2, that is, the number/number marked by the circuit element, does not necessarily have a continuous serial number as the marking relationship of the element symbol.
如本文中所使用術語之第一端、第二端、上端或下端、左端或右端、左側(端)或右側(端)、一次側或二次側等等,此等術語乃用以清楚地區分一個元件的一端點與該元件的另一端點,或為區分一元件與另一元件之間的連接關係,或是一個端點與另一個端點之間係為不同,其並非用以限制該文字序號所呈現之順序關係或是位置關係,且非必然有數字上連續的關係。又,可能使用了術語「及/或」包括相關聯之列出項目中之任一者及一或多者之所有組合。再者,本文可能使用術語「複數個」或是「至少兩個」來描述具有多個元件,但此等複數個元件或至少兩個元件,乃不僅限於實施有二個、三個或四個及四個以上的元件數目表示所實 施的技術。 As used herein, the terms first end, second end, upper or lower end, left or right end, left (end) or right (end), primary side or secondary side, etc., these terms are used to clarify the area One end point of an element is separated from the other end point of the element, either to distinguish the connection relationship between one element and another element, or the difference between one end point and another end point is not intended to limit The sequence relationship or position relationship presented by the text serial number does not necessarily have a continuous relationship in numbers. Also, the term "and/or" may be used to include any and all combinations of one or more of the associated listed items. Furthermore, the term "plural" or "at least two" may be used herein to describe having multiple elements, but these plural elements or at least two elements are not limited to the implementation of two, three or four And the number of elements above four indicates the technology implemented.
本發明係用於驅動高功率大電流的負載,為了解決舊有的定電壓磁滯控制線路的缺失,提出一整套的電源控制電路的解決方案,是包含有主架構的SR-BUCK的降壓型電路,搭配霍爾元件(Hall CT)型態的電流偵測器,以及由申請人自行研發成功的電流型態的磁滯控制線路而加以實施。圖1所示,本發明之電源控制電路,包括有:一直流輸入電源Vin、一輸入電容C1、一第一切換元件Q1、一第二切換元件Q2、一電感L1、一電流偵測器80、一二極體D1、一第三切換元件Q3、一磁滯電流控制器10以及一負載90。其中,所述的直流輸入電源Vin可以是前端由另外的一個由交流AC轉換為直流DC的交流/直流轉換器所輸出的直流電源,來作為該直流輸入電源Vin。輸入電容C1是與直流輸入電源Vin並聯;第一切換元件Q1有第一端(如圖1中第一切換元件Q1的上端所示)、第二端(如圖1中第一切換元件Q1的下端所示)以及一控制端(即Q1的閘極端),該第一切換元件Q1的第一端耦接於該直流輸入電源Vin的正極端。在同樣切換元件各端名稱的定義下,第二切換元件Q2的第一端則是耦接於該第一切換元件Q1的第二端,第二切換元件Q2的第二端耦接於該直流輸入電源Vin的負極端。 The present invention is used to drive high-power and large-current loads. In order to solve the lack of the old constant voltage hysteresis control circuit, a complete set of power supply control circuit solution is proposed, which is a buck including the main structure of SR-BUCK It is implemented with a Hall CT type current detector and a current type hysteresis control circuit developed by the applicant. As shown in FIG. 1, the power control circuit of the present invention includes a DC input power Vin, an input capacitor C1, a first switching element Q1, a second switching element Q2, an inductor L1, and a
電感L1的第一端(如圖1中電感L1的左端)耦接於該第一切換元件Q1的第二端,且所述電感L1是輸出一脈寬調變PWM形式的輸出電流Io。所述電流偵測器80是與電感L1串接的連接方式,是用以偵測該輸出電流Io的電流狀態,且電流偵測器80是輸出一電流偵測訊號CC,以作為後續控制電流相關操作之用。在一實施例中,所述電流偵測器80於實際電路上,是以一霍爾電流偵測元件(Hall CT)而實施,但不限於現有市面上所販售的霍爾電流偵測元件。圖1的二極體D1的陽極端耦接於該電感L1的第二端,該二極體D1的陰極端耦接於該直流輸入電源Vin的正極端; 第三切換元件Q3的第一端耦接於該二極體D1的陽極端,第三切換元件Q3的第二端耦接於該直流輸入電源Vin的負極端。負載90乃是耦接於第三切換元件Q3的第一端與該第三切換元件Q3的第二端之間,並由該輸出電流Io所驅動。 The first end of the inductor L1 (such as the left end of the inductor L1 in FIG. 1) is coupled to the second end of the first switching element Q1, and the inductor L1 outputs an output current Io in the form of a pulse width modulated PWM. The
在一實施例中,本發明所述的負載90是能由複數個二極體DL1~DLN的串聯連接所組成,所述的二極體DL1~DLN中,每一二極體DL1~DLN能夠是雷射發光二極體,亦即在實際電路實施時,負載90是由多個雷射發光二極體所串接而組成的負載90。此外,本發明所提出的電源控制電路亦能夠運用於LED PWM Dimming的LED脈寬調變調光照明的電路中,此時負載90即為LED PWM的調光照明負載;又能運用於UV Coating的紫外線塗層機台的電源供應來源,此時負載90為紫外線塗層機台;還能運用於各種高速電流脈波的應用場合。顯見本發明極具有未來高壓大功率機種的應用潛力。 In one embodiment, the
圖1的磁滯電流控制器10為發明人自行設計的電路,其中磁滯電流控制器10是分別與第一切換元件Q1、第二切換元件Q2及第三切換元件Q3的控制端相耦接;且磁滯電流控制器10是輸入有該電流偵測訊號CC,另外輸入有一脈波PULSE及一電流控制訊號PC,磁滯電流控制器10用以提供該第一~第三切換元件Q1~Q3所需要的驅動訊號,亦即為磁滯電流控制器10為驅動第一~第三切換元件Q1~Q3執行高頻切換操作的主要驅動電路。 The hysteresis
有關磁滯電流控制器10的內部電路包括有一迴授比較器20、一磁滯放大器30、一延時電路40、一第一驅動電路50、一保護電路60以及一第二驅動電路70。其中迴授比較器20的非反向輸入端(+)是輸入該電流偵測訊號CC,迴授比較器20的反向輸入端(-)是耦接一電阻RCC1後接地,並經由一電阻RCC2連接到該迴授比較器20的輸出端。磁滯放大器30的非反向輸入端(+)耦接該電流控制訊號PC,磁滯放大器30的反向輸入端(-)耦接於迴授 比較器20的輸出端。延時電路40的輸入端耦接於磁滯放大器30的輸出端,且延時電路40並輸出一第一延時訊號Hin及一第二延時訊號Lin(如圖3所示)。第一驅動電路50是輸入該第一延時訊號Hin及該第二延時訊號Lin,並輸出一第一H驅動訊號及一第一L驅動訊號,該第一H驅動訊號耦接於該第一切換元件Q1的控制端,該第一L驅動訊號耦接於該第二切換元件Q2的控制端,關於第一H驅動訊號及第一L驅動訊號的進一步說明於圖2A中再述。另外,第二驅動電路70是輸入該脈波(PULSE),並輸出一第二OUT驅動訊號,該第二OUT驅動訊號耦接於該第三切換元件Q3的控制端,進一步說明於圖2B中再述。 The internal circuit of the hysteresis
保護電路60的輸出是耦接於第一驅動電路50,用以執行電路保護的作用。保護電路60再實際電路運用上,為一關閉栓鎖(OFF-Latch)的邏輯或閘(Logic OR Gate),該邏輯或閘輸入有一過電流訊號OCP與一過溫度訊號OTP,並輸出一關閉訊號,該關閉訊號連接到該第一驅動電路50;當發生過電流或是過溫度之情形時,會切斷該第一驅動電路50的驅動訊號輸出,使整個電源控制電路停止電路運作。 The output of the
上述本發明案的圖1所示的主要架構電路中,在輸出端部分沒有接上大電容;一般而言,降壓型的Buck Converter線路的輸出端都還是會有設置一個大電容,一方面是接續傳遞能量,另一方面則有助於削減鏈波(ripple)。但,本發明案並沒有設置大電容,此乃因為應用在雷射相關的負載90時,輸出是以脈寬調變PWM的形式,並不需要接續傳遞能量,故,削減鏈波(ripple)的工作就完全放在主電感L1上面。在一實際運用實施例上,本發明輸出頻率的應用為5k Hz,輸出電流為0-50安培(A)。 In the main architecture circuit shown in FIG. 1 of the present invention, there is no large capacitor connected to the output end; generally speaking, the output end of the buck type Buck Converter circuit will still have a large capacitor on the one hand. It is to transfer energy continuously, on the other hand, it helps to reduce ripples. However, the present invention does not provide a large capacitor. This is because when it is applied to a laser-related
圖2為圖2A及圖2B為相連接的電路,乃是進一步對應於圖1中的主電路架構的一實施例說明,前述的第一切換元件Q1是由圖2A的一切換開關Q101、一切換開關Q102及一切換開關Q103 等三個元件所並聯接組成;該第二切換元件Q2是由一切換開關Q104、一切換開關Q105及一切換開關Q106三個元件所並聯接組成;該第三切換元件Q3是由一切換開關Q108、一切換開關Q109及一切換開關Q110三個元件所並聯接組成。 FIG. 2 is a connected circuit of FIG. 2A and FIG. 2B, which is an illustration corresponding to an embodiment of the main circuit architecture in FIG. 1. The aforementioned first switching element Q1 is composed of a switching switch Q101, a switch of FIG. 2A. The switch Q102 and a switch Q103 and other three components are connected in parallel; the second switch Q2 is composed of a switch Q104, a switch Q105 and a switch Q106 connected in parallel; the third The switch element Q3 is composed of three elements, a switch Q108, a switch Q109, and a switch Q110, connected in parallel.
另外所述的第一H驅動訊號包括有一第一HO驅動訊號及一第一HS驅動訊號,以及所述的第一L驅動訊號包括有一第一LO驅動訊號及一第一LS驅動訊號。該第一HO驅動訊號連接到切換開關Q101的控制端,同時連接到切換開關Q102的控制端且連接到切換關Q103的控制端。該第一HS驅動訊號則是連接到該切換開關Q101的控制端且耦接於該切換開關Q101的第二端,同時連接到該切換開關Q102的控制端且耦接於該切換開關Q102的第二端,以及連接到該切換開關Q103的控制端且耦接於該切換開關Q103的第二端。此外,該第一LO驅動訊號連接到該切換開關Q104的控制端,同時連接到該切換開關Q105的控制端,以及連接到該切換開關Q106的控制端。又,第一LS驅動訊號連接於直流輸入電源Vin的負極端,且該第一LS驅動訊號連接到該切換開關Q104的控制端且耦接於該切換開關Q104的第二端,同時連接到該切換開關Q105的控制端且耦接於該切換開關Q105的第二端,以及連接到該切換開關Q106的控制端且耦接於該切換開關Q106的第二端。 In addition, the first H drive signal includes a first HO drive signal and a first HS drive signal, and the first L drive signal includes a first LO drive signal and a first LS drive signal. The first HO driving signal is connected to the control terminal of the switch Q101, at the same time to the control terminal of the switch Q102 and to the control terminal of the switch Q103. The first HS driving signal is connected to the control end of the switch Q101 and coupled to the second end of the switch Q101, and is also connected to the control end of the switch Q102 and coupled to the first end of the switch Q102 Two terminals, and a control terminal connected to the switch Q103 and coupled to the second terminal of the switch Q103. In addition, the first LO driving signal is connected to the control terminal of the changeover switch Q104, at the same time to the control terminal of the changeover switch Q105, and to the control terminal of the changeover switch Q106. In addition, the first LS drive signal is connected to the negative terminal of the DC input power Vin, and the first LS drive signal is connected to the control terminal of the switch Q104 and coupled to the second terminal of the switch Q104, while being connected to the The control terminal of the switch Q105 is coupled to the second terminal of the switch Q105, and is connected to the control terminal of the switch Q106 and coupled to the second terminal of the switch Q106.
在一實施例中,若是僅有一個第一切換元件Q1(如圖1所示)則該第一HO驅動訊號連接到該第一切換元件Q1的控制端;該第一HS驅動訊號連接到該第一切換元件Q1的控制端且耦接於該第一切換元件Q1的第二端。同樣的,若是僅有一第二切換元件Q2,則該第一LO驅動訊號連接到該第二切換元件Q2的控制端;該第一LS驅動訊號連接到該第二切換元件Q2的控制端且耦接於該第二切換元件Q2的第二端。 In an embodiment, if there is only one first switching element Q1 (as shown in FIG. 1), the first HO driving signal is connected to the control end of the first switching element Q1; the first HS driving signal is connected to the The control end of the first switching element Q1 is coupled to the second end of the first switching element Q1. Similarly, if there is only one second switching element Q2, the first LO driving signal is connected to the control end of the second switching element Q2; the first LS driving signal is connected to the control end of the second switching element Q2 and coupled It is connected to the second end of the second switching element Q2.
在圖2A中,切換開關Q103的第一端及第二端之間並聯有一 二極體DZ1,實際電路運用上為一嵌位二極體,使切換開關Q103的第一、二端之間能嵌位在一電壓準位中,該二極體DZ1並且與一電阻RZ1與一電容CZ1的串聯接線路所並聯而連接;同樣的,切換開關Q106的第一端及第二端之間並聯有一二極體DZ2,在運用上為一嵌位二極體,使切換開關Q106的第一、二端之間能嵌位在一電壓準位中,該二極體DZ2是與一電阻RZ2與一電容CZ2的串聯接線路所並聯連接。 In FIG. 2A, a diode DZ1 is connected in parallel between the first end and the second end of the switch Q103, and the actual circuit is used as a clamping diode, so that the switch Q103 is connected between the first and second ends Can be embedded in a voltage level, the diode DZ1 is connected in parallel with a series connection of a resistor RZ1 and a capacitor CZ1; similarly, the first end and the second end of the switch Q106 are connected in parallel There is a diode DZ2, which is an embedded diode in use, so that the first and second ends of the switch Q106 can be embedded in a voltage level, the diode DZ2 is connected to a resistor RZ2 It is connected in parallel with a series connection of a capacitor CZ2.
圖2B中顯示了電感L1的第二種實施例,亦即電感L1是透過一第一電感L11及一第二電感L12所組成,且是由第一電感L11及第二電感L12兩者串聯所組成,也就是說流經電感L1上的電流,也同時是為流經過第一電感L11的電流,並再流經過第二電感L12之後輸出。其中第一電感L11的一端是先耦接於電流偵測器80的一端,再由電流偵測器80的另一端(亦即電流輸出端)而連接該第二電感L12的一端,將輸出電流Io輸出至負載90,如此連接方式使得電流偵測器80得以偵測該輸出電流Io的電流狀態,作為後續電流控制之依據。二極體D1則是由二極體D11與二極體D12並聯連接所組成。需聲明者,本發明在實際運用時,有關電感元件的實際元件繞線製作時,能夠是如圖1所述的做成單一電感L1,亦可為如圖2B所示的由第一電感L11以及第二電感L12兩個電感串聯所組成的電感元件,本發明並不加以限制。 FIG. 2B shows a second embodiment of the inductor L1, that is, the inductor L1 is composed of a first inductor L11 and a second inductor L12, and is composed of both the first inductor L11 and the second inductor L12 connected in series The composition, that is to say, the current flowing through the inductor L1 is also the current flowing through the first inductor L11 and then flows through the second inductor L12 and then output. One end of the first inductor L11 is first coupled to one end of the
關於第三切換元件Q3是由切換開關Q108、切換開關Q109及切換開關Q110所並聯接組成,所述的第二OUT驅動訊號包括有一第二OUTH驅動訊號及一第二OUTL驅動訊號。該第二OUTH驅動訊號連接到該切換開關Q108的控制端,同時連接到該切換開關Q109的控制端,以及連接到該切換開關Q110的控制端。該第二OUTL驅動訊號連接到該切換開關Q108的控制端,同時連接到該切換開關Q109的控制端,以及連接到該切換開關Q110的控制端。 The third switching element Q3 is composed of a switch Q108, a switch Q109 and a switch Q110 connected in parallel. The second OUT driving signal includes a second OUTH driving signal and a second OUTL driving signal. The second OUTH driving signal is connected to the control terminal of the switch Q108, and to the control terminal of the switch Q109, and to the control terminal of the switch Q110. The second OUTL driving signal is connected to the control terminal of the switch Q108, and to the control terminal of the switch Q109, and to the control terminal of the switch Q110.
在一實施例中,若是僅有一個第三切換元件Q3,則該第二OUTH驅動訊號連接到該第三切換元件Q3的控制端;該第二OUTL驅動訊號連接到該第三切換元件Q3的控制端。另外,圖2B中負載90的兩端之間並聯接有一二極體DZ3與一二極體DZ4兩者的串聯接線路,使得負載90的兩端電壓能夠被嵌位於由二極體DZ3與DZ4串聯接所形成的電壓準位。 In one embodiment, if there is only one third switching element Q3, the second OUTH driving signal is connected to the control terminal of the third switching element Q3; the second OUTL driving signal is connected to the third switching element Q3 Control terminal. In addition, in FIG. 2B, a series connection of a diode DZ3 and a diode DZ4 is connected between the two ends of the
圖3進一步揭示迴授比較器20、磁滯放大器30以及延時電路40的相關電路構成。其中迴授比較器20的非反向輸入端(+)連接電流控制訊號CC;迴授比較器20的反向輸入端(-)連接DC 5V的電壓源。在一實施例中,迴授比較器20與磁滯放大器30之間,包括連接有一第一放大器22,該第一放大器22是用來將迴授比較器20的輸出訊號加以放大。第一放大器22的輸出端是再連接到磁滯放大器30的相關電路中。 FIG. 3 further reveals related circuit configurations of the
磁滯放大器30的非反向入端(+)耦接有一濾波電路25。濾波電路25包括有一電阻R11、一電阻R12、一電阻R13以及一切換開關Q200;該電阻R11的第一端(如圖3中電阻R11的上端)連接該電流控制訊號PC;該電阻R12的第一端(如圖3中電阻R12的左端)耦接於該電阻R11的第二端(如圖3中電阻R11的下端);該電阻R13的第一端(如圖3中電阻R13的上端)耦接於該電阻R11的第二端,該電阻R13的第二端(如圖3中電阻R13的下端)耦接於磁滯放大器30的非反向輸入端(+);該切換開關Q200的第一端耦接於該電阻R12的第二端,該切換開關Q200的第二端接地,該切換開關Q200的控制端連接一電流脈波控制訊號IPWM。 The non-inverting input (+) of the
此外,圖3所示,當在脈波(PULSE)的PWM調變情形時,各個切換開關的輸出執行並聯(Shunt)的ON/OFF切換時會產生電流脈波,由於輸出短路的時候該電感L1中仍然儲存有電能量,當輸出開路時送出去電流脈波的時候,因為高速di/dt的關係,會有些微的電流突波(Current Spike)及過切換(Overshoot),為了避免這個 現象,本發明案的電路控制中包括在輸出短路時,同時降低電流控制訊號PC的準位,進而降低了電感L1的儲能能量,同時降低電流突波(Current Spike)及過切換(Overshoot)的現象。 In addition, as shown in FIG. 3, when the PWM modulation of the pulse wave (PULSE) occurs, the output of each changeover switch performs parallel (Shunt) ON/OFF switching to generate a current pulse. Due to the output short circuit, the inductance There is still electrical energy stored in L1. When the current pulse is sent out when the output is open, there will be a slight current spike and overshoot due to the high-speed di/dt relationship. To avoid this phenomenon In the circuit control of the present invention, when the output is short-circuited, the level of the current control signal PC is reduced at the same time, thereby reducing the energy storage energy of the inductor L1, and at the same time reducing the current spike and overshoot. phenomenon.
上述關於濾波電路25能消除突波的電路作用,主要是關於切換開關Q200的開關作用可以解決突波(Spike)的問題,請配合參閱圖2A、圖2B的主線路圖;本案的主架構線路有兩種狀態: The above-mentioned circuit function of the
(1)、在傳遞能量的狀態,能量經過切換開關Q101、Q102、103到第一電感L11即第二電感L12而輸出。 (1) In the state of transferring energy, the energy is output to the first inductance L11, that is, the second inductance L12 through the changeover switches Q101, Q102, 103.
(2)、在能量無輸出狀態,切換開關Q104、Q105、106以及切換開關Q108、Q109、110導通,輸出短路。 (2) In the state of no energy output, the switch Q104, Q105, 106 and the switch Q108, Q109, 110 are turned on, and the output is short-circuited.
由於第(2)種狀態,電感元件仍存有能量(continue mode),所以當切換到另外的狀態時,會有突波(Spike),如圖8輸出電流Io的狀態圖中標號SP所示,SP即為所述的突波。因此,解決方式的原理是在第(2)種狀態時,改變迴授(即導通切換開關Q200就會改變迴授的電阻分壓)的電壓值,進而降低電感元件中的儲存能量,解決突波(Spike)的問題;其中,標號PC的訊號是電流控制訊號,是作為電流控制用。 Due to the (2) state, the inductive element still has energy (continue mode), so when switching to another state, there will be a spike (Spike), as shown by the reference SP in the state diagram of the output current Io in FIG. 8 , SP is the surge. Therefore, the principle of the solution is to change the voltage value of the feedback (that is, turning on the switch Q200 will change the resistance voltage division of the feedback) in the (2) state, thereby reducing the stored energy in the inductive element and solving the sudden The problem of Spike; among them, the signal labeled PC is the current control signal, which is used for current control.
圖3的磁滯放大器30的反向入端(-)耦接於第一放大器22的輸出端。在一實施例中,磁滯放大器30與延時電路40之間是另耦接有一第二放大器32,第二放大器32是用來將該磁滯放大器30的輸出訊號加以放大。之後該第二放大器32的輸出端連接到該延時電路40。 The inverting input (-) of the
圖3所示的延時電路40中包括有一第一反向器41與一第二反向器42。第一反向器41的輸入端是與電阻24相耦接,第一反向器的輸出端耦接於第二反向器42的輸入端。第二反向器42的輸出端耦接一電阻R26,該電阻R26的另一端(如圖3所示電阻R26的左端)即為輸出該第一延時訊號Hin,該電阻R26同時與一二極體D26並聯接,二極體D26的陰極端耦接該第二反向器42的輸 出端。第一反向器41的輸出端也有耦接一電阻R25,該電阻R25的另一端(如圖3所示電阻R25的左端)即為輸出該第二延時訊號Lin,該電阻R25同時與一二極體D25並聯接,二極體D25的陰極端耦接該第一反向器41的輸出端。如此,圖3輸出該第一延時訊號Hin以及第二延時訊號Lin,之後再傳送到第一驅動電路50中,進一步的驅動第一切換元件Q1及第二切換元件Q2執行開關切換的運作。 The
圖4說明第一驅動電路50是輸入該第一延時訊號Hin以及第二延時訊號Lin,之後輸出第一HO驅動訊號、第一HS驅動訊號、第一LO驅動訊號及第一LS驅動訊號。在實務上,第一驅動電路50是以一單晶片的IC元件所完成,經由對該IC輸入電源及相關的線路連接規格,即能將輸入的第一延時訊號Hin及第二延時訊號Lin,之後輸出第一HO驅動訊號、第一HS驅動訊號、第一LO驅動訊號及第一LS驅動訊號。 4 illustrates that the
同樣的,圖5所示為第二驅動電路70的示意圖;在實務上,第二驅動電路70也是以一顆單晶片的IC元件所完成,經由對該第二驅動電路70的IC元件輸入電源及相關的線路連接規格,即能將輸入的電流脈波控制訊號IPWM轉換為輸出第二OUTH驅動訊號已及第二OUTL驅動訊號。 Similarly, FIG. 5 is a schematic diagram of the
然而,對照於圖1的由脈波(PULSE)輸入至第二驅動電路70的方式,在一實施例中請配合參閱圖6所示,則是如何將脈波(PULSE)轉換為電流脈波控制訊號IPWM的實施說明,主要是經過一脈波轉換器72的連接方式所完成。圖6中該脈波(PULSE)訊號耦接至一第三反向器43的輸入端,第三反向器43的輸出端連接到一開關元件S1的控制端,開關元件S1的第一端(如圖6所示開關元件S1的上端)是作為脈波轉換器72的輸入端,開關元件S1的第二端則接地。 However, referring to the method of inputting the pulse wave (PULSE) to the
另一方面,脈波轉換器72的輸入端還包括有一電流位移控制 訊號ISIM,其中電流位移控制訊號ISIM的ON及OFF再配合所述的脈波(PULSE)的ON及OFF可以控制不同的電流控制模式,藉以產生不同電流脈波型態的輸出電流Io。如此,本發明實施例能夠配合不同的負載需求而調整不同的電流控制模式,可為程式化電流Program Current的應用,運用範圍極為廣泛。在實際運用上,該脈波轉換器72為一單晶片IC,而該脈波轉換器72的IC是輸出包括有該電流脈波控制訊號IPWM以及有一電流設定訊號ISET。 On the other hand, the input terminal of the
圖7是將所述的電流設定訊號ISET經過放大器52的作用,產生該電流控制訊號PC。其中電流設定訊號ISET耦接到放大器52的非反向輸入端(+),放大器52的反向輸入端(-)與放大器52的輸出端耦接,放大器52的輸出端是輸出該電流控制訊號PC。 FIG. 7 generates the current control signal PC by passing the current setting signal ISET through the
圖8所示為輸出電流Io的波形示意圖,其中顯示輸出電流Io為一脈寬調變PWM的形式,並且該輸出電流Io能夠依據使用者對於負載90調變的需求,而能夠具有一個電流位移SH的準位調整,而非一定從0準位開始,且在後續調變之中,也能配合使用者的需求,將電流準位調變為0準位,進一步而言,本發明的輸出電流Io能夠依據該負載的需求做調整而具有一位移準位,此位移準位即為圖8中的電流位移SH。顯見,本發明之電源控制電路極具有依據不同的負載特性的需求,能執行輸出電流Io的不同調變,有效改善現有技術之缺失。圖8中標號SP為突波,是由圖3所示的濾波電路25加以濾波。 8 is a waveform diagram of the output current Io, which shows that the output current Io is in the form of a pulse width modulation PWM, and the output current Io can have a current displacement according to the user's demand for
圖9中揭示所述的實施例可以是由第一電感L11串聯第二電感L12組成電感L1,所述電感L1的鐵芯材質在一實施例中是由軟磁金屬磁粉芯所組成,其材質例如包括有鐵與矽的合成物,鐵芯並以環氧樹脂整體加以包覆,且結構上為一同心圓的扁圓柱體,該鐵芯有兩組繞線,形成有一第一電感L11及一第二電感L12,該電感L1即由該第一電感L11及該第二電感L12兩者串聯 所組成,亦即第一電感L11即第二電感L12的鐵芯材質也是由軟磁金屬磁粉芯所組成,同樣其材質例如包括有鐵與矽的合成物,鐵芯並以環氧樹脂整體加以包覆;其中第一電感L11的一端是耦接於該電流偵測器80的一端,再由該電流偵測器80的另一端而連接該第二電感L12的一端,用以偵測該輸出電流Io。所述的電流偵測器80在電路實際製作上,能為霍爾電流轉換元件所完成。 The embodiment disclosed in FIG. 9 may be that the first inductor L11 is connected in series with the second inductor L12 to form an inductor L1. In one embodiment, the core material of the inductor L1 is composed of a soft magnetic metal magnetic powder core. It consists of a composite of iron and silicon. The iron core is covered with epoxy resin as a whole, and the structure is a concentric flat cylinder. The iron core has two sets of windings, forming a first inductance L11 and a The second inductance L12, the inductance L1 is composed of the first inductance L11 and the second inductance L12 in series, that is, the iron core material of the first inductance L11, that is, the second inductance L12 is also composed of a soft magnetic metal magnetic powder core Also, its material includes, for example, a composite of iron and silicon, the core is coated with epoxy resin as a whole; one end of the first inductor L11 is coupled to one end of the
圖10所示為電感L1的導磁技術特徵的曲線示意圖,是當該電感L1的直流磁化力Oe(DC Magnetizing Force Oe,如橫軸所示)超過一個臨界值之後,會使得該電感L1的初始導磁率(Percent of Initial Permeability%,如縱軸所示)會呈現緩和下降的非線性導磁特性。如此特性,將會使得本發明的電源控制電路整體對於負載端的鏈波(ripple)現象,具有良好的鏈波消除作用,同時本發明案電路架構所能控制的頻寬較大,暫態響應快速,在緩和下降區間易於控制。 FIG. 10 is a schematic diagram showing the characteristics of the magnetic permeability of the inductor L1. When the DC magnetizing force Oe (DC Magnetizing Force Oe, as shown on the horizontal axis) of the inductor L1 exceeds a critical value, the inductor L1 will be The initial magnetic permeability (Percent of Initial Permeability%, as shown on the vertical axis) will show a non-linear magnetic permeability characteristic that decreases gently. Such characteristics will make the overall power control circuit of the present invention have a good effect on the ripple phenomenon of the load side, and at the same time, the circuit architecture of the present invention can control a larger bandwidth and fast transient response. , Easy to control in the slow down range.
圖11是本發明中電感L1的實施例,由圖11中所示,該單一的電感L1是由多匝數的圓柱狀繞線,以纏繞或疊繞方式繞於該軟磁金屬磁粉芯的鐵芯所組成。圖12是本發明中電感L1的另一實施例,由圖12中可知,單一電感L1則另外透過多匝數的扁平狀繞線以纏繞或疊繞方式繞於該軟磁金屬磁粉芯的鐵芯所組成。在一實施例中,本發明中的電感L1的鐵芯重量是介於290g-330g之間者,其中該輸出電流Io可大於50安培。另外,在電感L1由第一電感L11與第二電感L12所串連的實施例中,第一電感L11的鐵芯重量是介於145g-165g之間,以及第二電感L12的鐵芯重量是介於145g-165g之間;同樣地,該輸出電流Io可大於50安培。此外,第一電感L11和第二電感L12的鐵芯重量可以不同,在電路板上布局可以隨之調整,但總重需大於250g。 11 is an embodiment of the inductance L1 of the present invention. As shown in FIG. 11, the single inductance L1 is a multi-turn cylindrical wire wound around the iron of the soft magnetic metal magnetic powder core in a winding or stacking manner Core composition. FIG. 12 is another embodiment of the inductor L1 of the present invention. As can be seen from FIG. 12, a single inductor L1 is additionally wound or stacked around the iron core of the soft magnetic metal magnetic powder core through a multi-turn flat winding wire Formed by. In an embodiment, the weight of the core of the inductor L1 in the present invention is between 290g-330g, wherein the output current Io may be greater than 50 amperes. In addition, in the embodiment where the inductor L1 is connected by the first inductor L11 and the second inductor L12 in series, the weight of the core of the first inductor L11 is between 145g-165g, and the weight of the core of the second inductor L12 is Between 145g-165g; similarly, the output current Io can be greater than 50 amps. In addition, the weight of the core of the first inductor L11 and the second inductor L12 may be different, and the layout on the circuit board can be adjusted accordingly, but the total weight needs to be greater than 250g.
綜上所述,本發明提出一種電源控制電路,能針對現有的定電壓磁滯控制的缺失做改善,有效達到提供高精準度、反應速度 快且大功率高電壓的電源控制目的。另外也可以進一步實現多方面的廣泛負載與程式化電流Program Current應用的技術效果,且能簡化線路應用的控制,有效改善現有技術之缺失,顯見本發明案具備申請專利之要件。 In summary, the present invention proposes a power control circuit that can improve the lack of the existing constant voltage hysteresis control, and effectively achieve the purpose of providing power control with high accuracy, fast response, and high power and high voltage. In addition, it can further achieve the technical effects of the application of a wide range of loads and program current Program Current, and can simplify the control of line applications, effectively improve the lack of existing technology, and it is obvious that the present invention has the requirements for patent application.
然,本發明說明內容所述,僅為較佳實施例之舉例說明,當不能以之限定本發明所保護之範圍,任何局部變動、修正或增加之技術,仍不脫離本發明所保護之範圍中。 However, the description of the present invention is only an example of the preferred embodiment. When it cannot be used to limit the scope of protection of the present invention, any local changes, modifications or additions of the technology still do not deviate from the scope of protection of the present invention in.
10‧‧‧磁滯電流控制器 10‧‧‧ Hysteresis current controller
20‧‧‧迴授比較器 20‧‧‧ Feedback comparator
30‧‧‧磁滯放大器 30‧‧‧ Hysteresis amplifier
40‧‧‧延時電路 40‧‧‧ Delay circuit
50‧‧‧第一驅動電路 50‧‧‧ First drive circuit
60‧‧‧保護電路 60‧‧‧Protection circuit
70‧‧‧第二驅動電路 70‧‧‧ Second drive circuit
80‧‧‧電流偵測器 80‧‧‧current detector
90‧‧‧負載 90‧‧‧load
Vin‧‧‧直流輸入電源 Vin‧‧‧DC input power
C1‧‧‧輸入電容 C1‧‧‧ Input capacitance
Io‧‧‧輸出電流 Io‧‧‧Output current
L1‧‧‧電感 L1‧‧‧Inductance
Q1~Q3‧‧‧第一~第三切換元件 Q1~Q3‧‧‧First to third switching elements
RCC1、RCC2‧‧‧電阻 RCC1, RCC2 ‧‧‧ resistance
D1、DL1~DLN‧‧‧二極體 D1, DL1~DLN‧‧‧ diode
PULSE‧‧‧脈波 PULSE‧‧‧Pulse
PC‧‧‧電流控制訊號 PC‧‧‧Current control signal
CC‧‧‧電流偵測訊號 CC‧‧‧current detection signal
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JP5942455B2 (en) * | 2012-02-09 | 2016-06-29 | 株式会社ソシオネクスト | Switching regulator |
JP6513458B2 (en) * | 2014-06-06 | 2019-05-15 | アルプスアルパイン株式会社 | Dust core, method of manufacturing the dust core, electronic / electrical component comprising the dust core, and electronic / electrical device on which the electronic / electrical component is mounted |
CN104202874B (en) * | 2014-09-01 | 2016-10-05 | 矽力杰半导体技术(杭州)有限公司 | The LED drive circuit of a kind of single inductance and driving method |
US9538601B1 (en) * | 2015-10-08 | 2017-01-03 | Allegro Microsystems, Llc | Method and apparatus for driving loads using a DC-DC converter |
CN106374748A (en) * | 2016-10-09 | 2017-02-01 | 昂宝电子(上海)有限公司 | BUCK converter and control method therefor |
US9906221B1 (en) * | 2016-12-30 | 2018-02-27 | Delta Electronics, Inc. | Driving circuit of a power circuit |
-
2018
- 2018-08-23 TW TW107129396A patent/TWI675538B/en active
Also Published As
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TWI675538B (en) | 2019-10-21 |
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