TW201944184A - Server system and host board - Google Patents

Server system and host board

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Publication number
TW201944184A
TW201944184A TW107117248A TW107117248A TW201944184A TW 201944184 A TW201944184 A TW 201944184A TW 107117248 A TW107117248 A TW 107117248A TW 107117248 A TW107117248 A TW 107117248A TW 201944184 A TW201944184 A TW 201944184A
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Taiwan
Prior art keywords
programmable logic
complex programmable
logic element
version information
management controller
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TW107117248A
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Chinese (zh)
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TWI669581B (en
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童俊
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英業達股份有限公司
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Publication of TWI669581B publication Critical patent/TWI669581B/en
Publication of TW201944184A publication Critical patent/TW201944184A/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/32Monitoring with visual or acoustical indication of the functioning of the machine
    • G06F11/324Display of status information

Abstract

The present invention provides a server system and a host board. The server system includes a complex programmable logic device, a baseboard management controller, and a basic input/output system. The complex programmable logic device is disposed on a motherboard and stores information about a version of the complex programmable logic element. The complex programmable logic element has a first access interface. The baseboard management controller accesses the complex programmable logic elements through the first access interface to obtain the version of the complex programmable logic element. The basic input/output system accesses the baseboard management controller and reads the version of the complex programmable logic components. With the present invention, the user can simply read the version of the complex programmable logic element without knowing anything.

Description

伺服器系統及主機板Server system and motherboard

本發明屬於測試維護技術領域,涉及一種測試運維系統,特別是涉及一種伺服器系統及主機板。The invention belongs to the technical field of test and maintenance, and relates to a test operation and maintenance system, in particular to a server system and a main board.

目前BU6 MLB CPLD(Complex Programmable Logic Device,複雜可編程邏輯元件)的版本資訊都是採用8個綠色LED 來顯示的。利用LED 顯示版本資訊非常不便閱讀,具體缺陷如下:第一,8個綠色LED哪一個是最高位(MSB),哪一個是最低位(LSB),非常不易識別。第二,一般MLB在整機測試或出貨到客戶手裡時,由於機構件的遮擋,測試人員或客戶運籌人員幾乎看不到這些LED。At present, the version information of the BU6 MLB CPLD (Complex Programmable Logic Device) is displayed by 8 green LEDs. Using LED to display version information is very inconvenient to read. The specific defects are as follows: First, which of the eight green LEDs is the most significant bit (MSB) and which is the least significant bit (LSB), it is very difficult to identify. Second, when the MLB is generally tested or shipped to customers, due to the obstruction of the mechanical parts, testers or customer operations staff can hardly see these LEDs.

綜上所述,現有BU6 MLB CPLD的版本資訊在整機測試狀態或客戶運維狀態都是非常不易讀取的,為整機測試和客戶運維造成了極大的不便。In summary, the version information of the existing BU6 MLB CPLD is very difficult to read in the overall machine test status or customer operation and maintenance status, which causes great inconvenience for the overall machine test and customer operation and maintenance.

鑒於以上所述現有技術的缺點,本發明的目的在於提供一種伺服器系統及主機板,用於解決現有CPLD的版本資訊在整機測試狀態或客戶運維狀態不易獲知的問題。In view of the shortcomings of the prior art described above, an object of the present invention is to provide a server system and a motherboard for solving the problem that the version information of the existing CPLD is difficult to obtain in the test state of the whole machine or the operation and maintenance state of the customer.

為實現上述目的及其他相關目的,本發明提供一種伺服器系統,所述伺服器系統包括:一複雜可編程邏輯元件,設置於一主機板上,存儲有所述複雜可編程邏輯元件的版本資訊;所述複雜可編程邏輯元件設有第一訪問介面;一基板管理控制器,通過所述第一訪問介面訪問所述複雜可編程邏輯元件,獲取所述複雜可編程邏輯元件的版本資訊;一基本輸入輸出系統,訪問所述基板管理控制器,讀取所述複雜可編程邏輯元件的版本資訊。In order to achieve the above object and other related objects, the present invention provides a server system. The server system includes: a complex programmable logic element disposed on a motherboard and storing version information of the complex programmable logic element The complex programmable logic element is provided with a first access interface; a substrate management controller accesses the complex programmable logic element through the first access interface to obtain version information of the complex programmable logic element; The basic input-output system accesses the substrate management controller and reads version information of the complex programmable logic element.

本發明的一實施例中,所述複雜可編程邏輯元件利用十六進位記錄所述複雜可編程邏輯元件的版本資訊。In an embodiment of the present invention, the complex programmable logic element uses hexadecimal to record version information of the complex programmable logic element.

本發明的一實施例中,所述基板管理控制器中設置有一第一轉換模組;所述第一轉換模組用於將從所述複雜可編程邏輯元件獲取的十六進位的版本資訊轉換為十進位的版本資訊,以便所述基本輸入輸出系統讀取。In an embodiment of the present invention, the substrate management controller is provided with a first conversion module; the first conversion module is used to convert the hexadecimal version information obtained from the complex programmable logic element. Version information in decimals so that the basic input-output system can read it.

本發明的一實施例中,所述基本輸入輸出系統設置有一第二轉換模組;所述第二轉換模組用於將從所述基板管理控制器獲取的十六進位的版本資訊轉換為十進位的版本資訊。In an embodiment of the present invention, the basic input / output system is provided with a second conversion module; the second conversion module is used to convert the hexadecimal version information obtained from the baseboard management controller into ten. Carry version information.

本發明的一實施例中,所述基本輸入輸出系統在啟動狀態時顯示讀取到的所述版本資訊。In an embodiment of the present invention, the basic input / output system displays the read version information when the basic input / output system is in an activated state.

本發明的一實施例中,所述基板管理控制器通過I2C匯流排與所述第一訪問介面通信。In an embodiment of the present invention, the substrate management controller communicates with the first access interface through an I2C bus.

本發明的一實施例中,所述基本輸入輸出系統通過KCS介面訪問所述基板管理控制器。In an embodiment of the present invention, the basic input / output system accesses the substrate management controller through a KCS interface.

本發明還提供一種主機板,所述主機板包括:複雜可編程邏輯元件,存儲有所述複雜可編程邏輯元件的版本資訊;所述複雜可編程邏輯元件設有第一訪問介面;基板管理控制器,通過所述第一訪問介面訪問所述複雜可編程邏輯元件,獲取所述複雜可編程邏輯元件的版本資訊。The present invention also provides a motherboard. The motherboard includes: a complex programmable logic element storing version information of the complex programmable logic element; the complex programmable logic element is provided with a first access interface; and a substrate management control And accessing the complex programmable logic element through the first access interface to obtain version information of the complex programmable logic element.

本發明的一實施例中,所述基板管理控制器設置有一第一轉換模組;所述第一轉換模組用於將從所述複雜可編程邏輯元件獲取的十六進位的版本資訊轉換為十進位的版本資訊。In an embodiment of the present invention, the substrate management controller is provided with a first conversion module; the first conversion module is configured to convert the hexadecimal version information obtained from the complex programmable logic element into Decimal version information.

如上所述,本發明所述的伺服器系統及主機板,具有以下有益效果:通過本發明,使用者不但不需要預先準備HDD(Hard Disk Drive,硬碟驅動器),然後安裝OS(Operating System,作業系統),然後輸入命令獲取CPLD的版本,而且使用者還不需要知道任何東西就可以簡單的讀取到CPLD(複雜可編程邏輯元件)的版本。本發明使得讀取CPLD 版本的過程變得簡單、高效,而且配置低,不需要專業的知識。As described above, the server system and the motherboard according to the present invention have the following beneficial effects: Through the present invention, the user does not only need to prepare a HDD (Hard Disk Drive) in advance, and then install an OS (Operating System, Operating system), and then enter the command to get the CPLD version, and the user does not need to know anything to simply read the CPLD (complex programmable logic element) version. The invention makes the process of reading the CPLD version simple, efficient, and low in configuration, and does not require professional knowledge.

以下通過特定的具體實例說明本發明的實施方式,本領域技術人員可由本說明書所揭露的內容輕易地瞭解本發明的其他優點與功效。本發明還可以通過另外不同的具體實施方式加以實施或應用,本說明書中的各項細節也可以基於不同觀點與應用,在沒有背離本發明的精神下進行各種修飾或改變。需說明的是,在不衝突的情況下,以下實施例及實施例中的特徵可以相互組合。The following describes the embodiments of the present invention through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through different specific implementations, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, in the case of no conflict, the following embodiments and features in the embodiments can be combined with each other.

需要說明的是,以下實施例中所提供的圖示僅以示意方式說明本發明的基本構想,遂圖式中僅顯示與本發明中有關的組件而非按照實際實施時的元件數目、形狀及尺寸繪製,其實際實施時各元件的型態、數量及比例可為一種隨意的改變,且其元件佈局型態也可能更為複雜。It should be noted that the illustrations provided in the following embodiments are only a schematic illustration of the basic idea of the present invention, and the drawings only show the components related to the present invention and not the number, shape and For size drawing, the type, quantity, and proportion of each component can be changed at will in actual implementation, and the component layout type may be more complicated.

請參閱圖1A,本發明實施例提供一種伺服器系統,所述伺服器系統100包括:一複雜可編程邏輯元件110,一基板管理控制器120,一基本輸入輸出系統130。Referring to FIG. 1A, an embodiment of the present invention provides a server system. The server system 100 includes: a complex programmable logic element 110, a substrate management controller 120, and a basic input / output system 130.

所述複雜可編程邏輯元件110設置於一主機板200上,存儲有所述複雜可編程邏輯元件的版本資訊;所述複雜可編程邏輯元件設有第一訪問介面。The complex programmable logic element 110 is disposed on a motherboard 200 and stores version information of the complex programmable logic element. The complex programmable logic element is provided with a first access interface.

所述基板管理控制器120通過所述第一訪問介面訪問所述複雜可編程邏輯元件110,獲取所述複雜可編程邏輯元件的版本資訊。The substrate management controller 120 accesses the complex programmable logic element 110 through the first access interface to obtain version information of the complex programmable logic element.

所述基本輸入輸出系統130訪問所述基板管理控制器120,讀取所述複雜可編程邏輯元件的版本資訊。所述基本輸入輸出系統130設有KCS介面(IPMI 介面的一種方式)。The basic input-output system 130 accesses the substrate management controller 120 and reads version information of the complex programmable logic element. The basic input / output system 130 is provided with a KCS interface (one way of the IPMI interface).

進一步,所述基本輸入輸出系統130在啟動狀態時顯示讀取到的所述版本資訊。Further, the basic input / output system 130 displays the read version information when it is in a startup state.

進一步,所述基板管理控制器120通過I2C(Inter-Integrated Circuit)匯流排與所述第一訪問介面通信。所述基本輸入輸出系統130通過KCS介面訪問所述基板管理控制器120。Further, the substrate management controller 120 communicates with the first access interface through an I2C (Inter-Integrated Circuit) bus. The basic input / output system 130 accesses the substrate management controller 120 through a KCS interface.

請參閱圖1B,本發明的一實施例中,所述複雜可編程邏輯元件110利用十六進位記錄所述複雜可編程邏輯元件的版本資訊。所述基板管理控制器120設置有一第一轉換模組121;所述第一轉換模組121用於將從所述複雜可編程邏輯元件獲取的十六進位的版本資訊轉換為十進位的版本資訊,以便所述基本輸入輸出系統130讀取。Please refer to FIG. 1B. In an embodiment of the present invention, the complex programmable logic element 110 uses hexadecimal to record version information of the complex programmable logic element. The substrate management controller 120 is provided with a first conversion module 121; the first conversion module 121 is configured to convert the hexadecimal version information obtained from the complex programmable logic element to the decimal version information So that the basic input-output system 130 can read it.

請參閱圖1C,本發明的一實施例中,所述複雜可編程邏輯元件110利用十六進位記錄所述複雜可編程邏輯元件的版本資訊。所述基本輸入輸出系統130設置有一第二轉換模組131;所述第二轉換模組131用於將從所述基板管理控制器獲取的十六進位的版本資訊轉換為十進位的版本資訊。Please refer to FIG. 1C. In an embodiment of the present invention, the complex programmable logic element 110 uses hexadecimal to record version information of the complex programmable logic element. The basic input-output system 130 is provided with a second conversion module 131. The second conversion module 131 is configured to convert the hexadecimal version information obtained from the substrate management controller into decimal version information.

請參閱圖1D,本發明的一實施例中,所述複雜可編程邏輯元件110為CPLD(Complex Programmable Logic Device,複雜可編程邏輯元件),所述基板管理控制器120為BMC(Baseboard Management Controller,基板管理控制器),所述基本輸入輸出系統130為BIOS(Basic Input Output System,基本輸入輸出系統)。Referring to FIG. 1D, in an embodiment of the present invention, the complex programmable logic element 110 is a Complex Programmable Logic Device (CPLD), and the baseboard management controller 120 is a baseboard management controller (BMC). A baseboard management controller), the basic input output system 130 is a BIOS (Basic Input Output System, basic input output system).

其中,CPLD主要是由可程式設計邏輯巨集單元(Macro Cell,MC)圍繞中心的可程式設計互連矩陣單元組成。其中MC結構較複雜,並具有複雜的I/O單元互連結構,可由使用者根據需要生成特定的電路結構,完成一定的功能。由於CPLD內部採用固定長度的金屬線進行各邏輯塊的互連,所以設計的邏輯電路具有時間可預測性,避免了分段式互連結構時序不完全預測的缺點。Among them, the CPLD is mainly composed of a programmable logic matrix unit (Macro Cell, MC) around the center. Among them, the MC structure is more complex and has a complex I / O unit interconnection structure. Users can generate specific circuit structures according to needs to complete certain functions. Because CPLD uses fixed-length metal wires to interconnect the logic blocks, the designed logic circuit has time predictability, which avoids the disadvantage of incomplete prediction of the timing of the segmented interconnect structure.

BMC(Baseboard Management Controller,基板管理控制器)支援行業標準的 IPMI 規範。該規範描述了已經內置到主機板上的管理功能。這些功能包括:本地和遠端診斷、控制台支援、配置管理、硬體管理和故障排除。BMC 提供下列功能:(1)與 IPMI 1.0 的相容性;(2)用於風扇轉速監視的轉速計輸入;(3)用於風扇轉速控制的脈衝寬度調節器輸出;(4)用於前面板按鈕和開關的按鈕輸入;(5)與伺服器控制台埠進行多路傳輸的一個序列埠;(6)遠端存取和 ICMB(Intelligent Chassis Management Bus,智慧主機殼管理匯流排)支援;(7)三個 I2C 主埠和備用埠(其中一個埠用於 智慧主機殼管理匯流排 );(8)LPC(Low Pin Count,低針計數)匯流排提供對三種 KCS(Keyboard Controller Style,鍵盤控制器方式)和 BT(One-Block Transfer,單塊傳輸)介面的訪問;(9)32 位 ARM7 處理器。The BMC (Baseboard Management Controller) supports industry-standard IPMI specifications. This specification describes the management functions that have been built into the motherboard. These features include: local and remote diagnostics, console support, configuration management, hardware management, and troubleshooting. BMC provides the following functions: (1) compatibility with IPMI 1.0; (2) tachometer input for fan speed monitoring; (3) pulse width regulator output for fan speed control; (4) for front Button input for panel buttons and switches; (5) A serial port for multiplexing with the server console port; (6) Remote access and ICMB (Intelligent Chassis Management Bus) support ; (7) three I2C main and spare ports (one of which is used for smart mainframe management bus); (8) LPC (Low Pin Count) bus provides three types of KCS , Keyboard controller mode) and BT (One-Block Transfer) interface; (9) 32-bit ARM7 processor.

BIOS(Basic Input Output System,基本輸入輸出系統)在IBM PC相容系統上,是一種業界標準的固件介面。BIOS是個人電腦啟動時載入的第一個軟體,是一組固化到電腦內主機板上一個ROM晶片上的程式;它保存著電腦最重要的基本輸入輸出的程式、開機後自檢程式和系統自啟動程式,它可從CMOS中讀寫系統設置的具體資訊;其主要功能是為電腦提供最底層的、最直接的硬體設置和控制。The BIOS (Basic Input Output System) is an industry standard firmware interface on IBM PC compatible systems. The BIOS is the first software loaded when a personal computer is started. It is a set of programs that are solidified on a ROM chip on the motherboard of the computer; it saves the most important basic input and output programs of the computer, the self-test program after booting, and The system self-starting program can read and write the specific information of the system settings from the CMOS; its main function is to provide the lowest and most direct hardware settings and control for the computer.

具體地,CPLD 可以將版本資訊存儲在CPLD 內部的使用者編碼寄存器中,其中前六位為PCA版本號,後兩位是CPLD 版本號,例如:0A:代表0.10版本。BMC 通過I2C按照CPLD spec規定的命令去讀取使用者編碼寄存器中的內容,如:RAW 0X06 0X52 7(I2C BUS ID) 0X80(CPLD I2C address) 4 0Xc0 0x00 0x00 0x00。CPU中BIOS通過LPC中IPMI規範中的KCS介面讀取BMC從CPLD 中讀取到版本號。開機進入BIOS設置(setup)中查看版本資訊,版本是兩位元十六進位的數在CPLD中,高位代表小數點前面的數位,低位元代表小數點後面的數位,這裡顯示的是a,BMC或BIOS需要將a轉換成十進位,按照定義最終調整的結果為0.10。Specifically, the CPLD can store the version information in the user code register inside the CPLD, where the first six digits are the PCA version number and the last two digits are the CPLD version number, for example: 0A: stands for version 0.10. The BMC reads the contents of the user code register through the I2C according to the command specified by the CPLD spec, such as: RAW 0X06 0X52 7 (I2C BUS ID) 0X80 (CPLD I2C address) 4 0Xc0 0x00 0x00 0x00. The BIOS in the CPU reads the BMC and reads the version number from the CPLD through the KCS interface in the IPMI specification in LPC. Boot into the BIOS setup to view the version information. The version is a two-digit hexadecimal number in CPLD. The high-order number represents the number before the decimal point, and the low-order number represents the number after the decimal point. Here is a, BMC Or the BIOS needs to convert a to decimal, and the final adjustment result is 0.10 according to the definition.

請參閱圖2A,本發明實施例還提供一種主機板,所述主機板200包括:複雜可編程邏輯元件210,基板管理控制器220。Referring to FIG. 2A, an embodiment of the present invention further provides a motherboard. The motherboard 200 includes a complex programmable logic element 210 and a baseboard management controller 220.

所述複雜可編程邏輯元件210存儲有所述複雜可編程邏輯元件的版本資訊;所述複雜可編程邏輯元件210設有第一訪問介面。The complex programmable logic element 210 stores version information of the complex programmable logic element; the complex programmable logic element 210 is provided with a first access interface.

所述基板管理控制器220通過所述第一訪問介面訪問所述複雜可編程邏輯元件211,獲取所述複雜可編程邏輯元件的版本資訊。The substrate management controller 220 accesses the complex programmable logic element 211 through the first access interface to obtain version information of the complex programmable logic element.

進一步,所述基板管理控制器220通過I2C匯流排與所述第一訪問介面通信。Further, the substrate management controller 220 communicates with the first access interface through an I2C bus.

請參閱圖2B,本發明的一實施例中,所述基板管理控制器220中設置有一第一轉換模組221;所述第一轉換模組221用於將從所述複雜可編程邏輯元件獲取的十六進位的版本資訊轉換為十進位的版本資訊。Please refer to FIG. 2B. In an embodiment of the present invention, a first conversion module 221 is provided in the substrate management controller 220; the first conversion module 221 is configured to obtain the first conversion module 221 from the complex programmable logic element. The hexadecimal version information is converted to the decimal version information.

通過本發明,使用者不但不需要預先準備HDD(Hard Disk Drive,硬碟驅動器),然後安裝OS(Operating System,作業系統),然後輸入命令獲取CPLD的版本,而且使用者還不需要知道任何東西就可以簡單的讀取到CPLD(複雜可編程邏輯元件)的版本。本發明使得讀取CPLD 版本的過程變得簡單、高效,而且配置低,不需要專業的知識。With the present invention, not only does the user not need to prepare a HDD (Hard Disk Drive) in advance, then install an OS (Operating System), and then enter a command to obtain the CPLD version, and the user does not need to know anything You can simply read the CPLD (Complex Programmable Logic Element) version. The invention makes the process of reading the CPLD version simple, efficient, and low in configuration, and does not require professional knowledge.

綜上所述,本發明有效克服了現有技術中的種種缺點而具高度產業利用價值。In summary, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

上述實施例僅例示性說明本發明的原理及其功效,而非用於限制本發明。任何熟悉此技術的人士皆可在不違背本發明的精神及範疇下,對上述實施例進行修飾或改變。因此,舉凡所屬技術領域中具有通常知識者在未脫離本發明所揭示的精神與技術思想下所完成的一切等效修飾或改變,仍應由本發明的申請專利範圍所涵蓋。The above-mentioned embodiments merely illustrate the principle of the present invention and its effects, but are not intended to limit the present invention. Anyone familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field to which they belong without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the scope of patent application of the present invention.

100‧‧‧伺服器系統100‧‧‧ server system

110‧‧‧複雜可編程邏輯元件110‧‧‧ Complex Programmable Logic Element

120‧‧‧基板管理控制器120‧‧‧ substrate management controller

121‧‧‧第一轉換模組121‧‧‧The first conversion module

130‧‧‧基本輸入輸出系統130‧‧‧ basic input and output system

131‧‧‧第二轉換模組131‧‧‧Second Conversion Module

200‧‧‧主機板200‧‧‧ Motherboard

210‧‧‧複雜可編程邏輯元件210‧‧‧ Complex Programmable Logic Elements

220‧‧‧基板管理控制器220‧‧‧ substrate management controller

221‧‧‧第一轉換模組221‧‧‧The first conversion module

圖1A顯示為本發明實施例所述的伺服器系統的一種實現結構示意圖。 圖1B顯示為本發明實施例所述的伺服器系統的第二種實現結構示意圖。 圖1C顯示為本發明實施例所述的伺服器系統的第三種實現結構示意圖。 圖1D顯示為本發明實施例所述的伺服器系統的第四種實現結構示意圖。 圖2A顯示為本發明實施例所述的主機板的一種實現結構示意圖。 圖2B顯示為本發明實施例所述的主機板的第二種實現結構示意圖。FIG. 1A is a schematic diagram of an implementation structure of a server system according to an embodiment of the present invention. FIG. 1B is a schematic diagram of a second implementation structure of a server system according to an embodiment of the present invention. FIG. 1C is a schematic diagram of a third implementation structure of a server system according to an embodiment of the present invention. FIG. 1D is a schematic diagram of a fourth implementation structure of a server system according to an embodiment of the present invention. FIG. 2A is a schematic diagram of an implementation structure of a motherboard according to an embodiment of the present invention. FIG. 2B is a schematic diagram of a second implementation structure of a motherboard according to an embodiment of the present invention.

Claims (9)

一種伺服器系統,包括:一複雜可編程邏輯元件,設置於一主機板上,存儲有所述複雜可編程邏輯元件的版本資訊;所述複雜可編程邏輯元件設有一第一訪問介面;一基板管理控制器,通過所述第一訪問介面訪問所述複雜可編程邏輯元件,獲取所述複雜可編程邏輯元件的版本資訊;一基本輸入輸出系統,訪問所述基板管理控制器,讀取所述複雜可編程邏輯元件的版本資訊。A server system includes: a complex programmable logic element disposed on a motherboard and storing version information of the complex programmable logic element; the complex programmable logic element is provided with a first access interface; a substrate A management controller that accesses the complex programmable logic element through the first access interface to obtain version information of the complex programmable logic element; a basic input-output system that accesses the substrate management controller and reads the Version information of complex programmable logic elements. 如請求項1所述的伺服器系統,其中所述複雜可編程邏輯元件利用十六進位記錄所述複雜可編程邏輯元件的版本資訊。The server system according to claim 1, wherein the complex programmable logic element uses hexadecimal to record version information of the complex programmable logic element. 如請求項2所述的伺服器系統,其中所述基板管理控制器設置有一第一轉換模組;所述第一轉換模組用於將從所述複雜可編程邏輯元件獲取的十六進位的版本資訊轉換為十進位的版本資訊,以便所述基本輸入輸出系統讀取。The server system according to claim 2, wherein the substrate management controller is provided with a first conversion module; the first conversion module is used for obtaining a hexadecimal from the complex programmable logic element. The version information is converted into decimal version information so that the basic input-output system can read it. 如請求項2所述的伺服器系統,其中所述基本輸入輸出系統設置有一第二轉換模組;所述第二轉換模組用於將從所述基板管理控制器獲取的十六進位的版本資訊轉換為十進位的版本資訊。The server system according to claim 2, wherein the basic input / output system is provided with a second conversion module; the second conversion module is used for a hexadecimal version obtained from the baseboard management controller. Information is converted to decimal version information. 如請求項3或4所述的伺服器系統,其中所述基本輸入輸出系統在啟動狀態時顯示讀取到的所述版本資訊。The server system according to claim 3 or 4, wherein the basic input / output system displays the version information read when the basic input / output system is in an activated state. 如請求項1所述的伺服器系統,其中所述基板管理控制器通過一I2C匯流排與所述第一訪問介面通信。The server system according to claim 1, wherein the baseboard management controller communicates with the first access interface through an I2C bus. 如請求項1所述的伺服器系統,其中所述基本輸入輸出系統通過一KCS介面訪問所述基板管理控制器。The server system according to claim 1, wherein the basic input / output system accesses the substrate management controller through a KCS interface. 一種主機板,包括:一複雜可編程邏輯元件,存儲有所述複雜可編程邏輯元件的版本資訊;所述複雜可編程邏輯元件設有一第一訪問介面;一基板管理控制器,通過所述第一訪問介面訪問所述複雜可編程邏輯元件,獲取所述複雜可編程邏輯元件的版本資訊。A motherboard includes: a complex programmable logic element storing version information of the complex programmable logic element; the complex programmable logic element is provided with a first access interface; and a substrate management controller passes through the first An access interface accesses the complex programmable logic element to obtain version information of the complex programmable logic element. 如請求項8所述的主機板,其中所述基板管理控制器設置有一第一轉換模組;所述第一轉換模組用於將從所述複雜可編程邏輯元件獲取的十六進位的版本資訊轉換為十進位的版本資訊。The motherboard according to claim 8, wherein the baseboard management controller is provided with a first conversion module; the first conversion module is used to obtain a hexadecimal version obtained from the complex programmable logic element Information is converted to decimal version information.
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