TWI590037B - Computer and controlling method thereof - Google Patents

Description

Computer device and control method thereof

The present invention relates to a computer device and a control method thereof, and more particularly to a computer device having two modes of operation and a control method thereof.

Server type computer devices typically have a baseboard management controller (BMC) to govern the signal path between the various components on the motherboard.

However, for the convenience of maintenance of the server, the baseboard management controller has built-in version information for management. However, when there is no baseboard management controller, there are problems with read and write conflicts in some signal paths.

The present invention provides a computer apparatus and a control method thereof for avoiding occurrence of read/write collision of a signal path without a substrate management controller.

The computer device disclosed by the present invention has a platform path controller, a field replaceable unit, a memory, a complex programmable logic device, and a basic input output system chip. The platform path controller has a first port and a second port. The field replaceable unit is electrically connected to the first port of the platform path controller. The memory is electrically connected to the first port of the platform path controller. The complex programmable logic device is electrically connected to the second port of the platform path controller, and detects the indication signal of the second port to selectively generate a restart signal. The basic input output system chip is electrically coupled to the platform path controller, the field replaceable unit, and the complex programmable logic device for selectively causing the computer device to restart in the manufacturing mode or the normal mode in accordance with the restart signal. In the manufacturing mode, the basic input-output system chip makes the memory inaccessible to the platform path controller and makes the field replaceable unit accessible to the platform path controller.

The control method disclosed by the present invention is suitable for a computer device, the method comprising the steps of: in the normal mode, generating an indication signal when the platform path controller receives the write command. A restart signal is generated when the complex programmable logic device detects the indication signal. And when the computer device is restarted, the basic input/output system chip causes the computer device to boot in the manufacturing mode in accordance with the restart signal. In the manufacturing mode, the field replaceable unit is accessible to the platform path controller, and the memory is inaccessible to the platform path controller.

In summary, the computer device and the control method thereof according to the present invention prevent the platform path controller from storing each component by selectively adjusting certain components for the accessibility of the platform path controller. When taken, the problem of read and write conflicts occurs.

The above description of the present invention and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention.

The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.

Please refer to FIG. 1 , which is a schematic diagram of a computer device architecture according to an embodiment of the invention. As shown in FIG. 1 , a computer device 1000 according to an embodiment of the invention has a platform controller (PCH), a field-replaceable unit (FRU), a memory 1300, and a complex A program input logic device (CPU) 1400 (basic input/output system chip, BIOS chip). The platform path controller 1100 has a first port 1101 and a second port 1103. The field replaceable unit 1200 is electrically connected to the first port 1101 of the platform path controller 1100. The memory 1300 is also electrically connected to the first port 1101 of the platform path controller 1100. The complex programmable logic device 1400 is electrically coupled to the second port 1103 of the platform path controller 1100. The basic input output system die 1500 is electrically coupled to the platform path controller 1100, the field replaceable unit 1200, and the complex programmable logic device 1400. In some embodiments, the first port 1101 and the second port 1103 are pins of the platform path controller 1100.

The complex programmable logic device 1400 detects the indication signal V _ind of the second port 1103 of the platform path controller 1100 to selectively generate the restart signal V _res . The basic input output system die 1500 selectively causes the computer device 1000 to restart in the manufacturing mode or the normal mode in accordance with the restart signal V _res . In the manufacturing mode, the basic input output system die 1500 renders the memory 1300 inaccessible to the platform path controller 1100 and makes the field replaceable unit 1200 accessible to the platform path controller 1100. In the normal mode, the basic input output system die 1500 renders the field replaceable unit 1200 inaccessible to the platform path controller 1100 and makes the memory 1300 accessible to the platform path controller 1100.

In one embodiment, as shown in FIG. 1, the computer device 1000 further has a first switch 1600 electrically connected to the first input and output system chip 1500, the memory 1300 and the first port 1101 of the platform path controller 1100, and the first Switch 1600 is controlled by basic input output system die 1500 to determine the turn-on or turn-off of the signal path between first port 1101 and memory 1300 of platform path controller 1100. In particular, when the computer device 1000 is in the manufacturing mode, the first switch 1600 is in a closed state. Therefore, the platform path controller 1100 cannot access the memory 1300. And when the computer device 1000 is in the normal mode, the first switch 1600 is in an on state. The platform path controller 1100 is thus enabled to access the memory 1300. Specifically, the first switch 1600 has a first end 1601 of the first switch, a second end 1603 of the first switch, and a control end 1605 of the first switch. The first end 1601 of the first switch is electrically connected to the first port 1101, the second end 1603 of the first switch is electrically connected to the memory 1300, and the control end 1605 of the first switch is electrically connected to the basic input/output system chip. 1500. In one embodiment, the basic input/output system chip 1500 is electrically connected to the control terminal 1605 of the first switch through the platform path controller 1100.

In an embodiment, as shown in FIG. 1 , the computer device 1000 further has a second switch 1700 electrically connected to the first input and output system chip 1500 , the field replaceable unit 1200 and the first port 1101 of the platform path controller 1100 , respectively. The second switch 1700 is controlled by the basic input output system die 1500 to determine the turn-on or turn-off of the signal path between the first port 1101 of the platform path controller 1100 and the field replaceable unit 1200. In particular, when the computer device 1000 is in the manufacturing mode, the second switch 1700 is in an on state. The platform path controller 1100 is thus able to access the field replaceable unit 1200. When the computer device 1000 is in the normal mode, the second switch 1700 is in the off state. The platform path controller 1100 is thus unable to access the field replaceable unit 1200. Specifically, the second switch 1700 has a first end 1701 of the second switch, a second end 1703 of the second switch, and a control end 1705 of the second switch. The first end 1701 of the second switch is electrically connected to the first port 1101, the second end 1703 of the second switch is electrically connected to the field replaceable unit 1200, and the control end 1705 of the second switch is electrically connected to the basic input and output. System wafer 1500. In one embodiment, the basic input/output system chip 1500 is electrically connected to the control terminal 1705 of the second switch through the platform path controller 1100. In an embodiment, the first switch 1600 and the second switch 1700 may be implemented by a relay, a transistor switch, or other equivalent electronic components, and the invention is not limited thereto.

In an embodiment, when the user transmits a write request to the field replaceable unit 1200 to the platform path controller 1100 through the operating system, the computer device 1000 enters the manufacturing mode and the platform path by the above operation. The controller 1100 transmits an indication signal V _ind through the second port 1103. In some embodiments, the voltage level of the second port 1103 is preset to be high, and the indication signal V _ind is generated by temporarily pulling the voltage level of the second port 1103 low. Thus, the complex programmable logic device 1400 confirms whether the indication signal V _ind is generated by the platform path controller 1100 by detecting the voltage level of the second port 1103. When the complex programmable logic device 1400 receives the indication signal V _ind , the complex programmable logic device 1400 sends a restart signal V _res .

When the basic input output system wafer 1500 receives the restart signal V _res in the normal mode, the basic input output system wafer 1500 restarts the computer device 1000 in the manufacturing mode. When the basic input output system wafer 1500 receives the restart signal V _res in the manufacturing mode, the basic input output system wafer 1500 restarts the computer device 1000 in the normal mode.

Specifically, please refer to FIG. 2, which is a flowchart of a computer device control method according to an embodiment of the invention. As shown in FIG. 2, when the platform path controller 1100 receives an instruction to write to the field replaceable unit 1200, as shown in step S210, the platform path controller 1100 sets the voltage level of the second port 1103 from the pre- Set the high potential to low. Then, as shown in step S220, the complex programmable logic device 1400 detects the voltage level of the second port 1103, and then connects the voltage level of the third port 1105 of the platform path controller 1100 of the basic input/output system chip 1500. It is adjusted from the preset high potential to the low potential. Both the basic input/output system chip 1500 and the platform path controller 1100 are notified to enter the manufacturing mode. After the basic input/output system chip 1500 detects that the voltage level of the third port 1105 of the platform path controller 1100 has dropped to a low level, as shown in step S230, the entire computer device 1000 is restarted. After restarting, the system configuration settings in the basic input/output system chip 1500 are used to set the state of each component, and as shown in step S240, the basic input/output system chip 1500 detects the voltage of the third port 1105 at this time. The level is low, so the basic input output system die 1500 sets the entire computer device 1000 in the manufacturing mode. The manufacturer can then write the version information or other necessary information of the computer device 1000 to the field replaceable unit 1200 through the first port 1101 of the platform path controller 1100 as shown in step S250. Since the platform path controller 1100 cannot access the memory at this time, there is no doubt that the writing is erroneous.

Wherein, after the computer device 1000 is restarted, the complex programmable logic device 1400 pulls the voltage level of the third port 1105 high. Therefore, when the manufacturer completes the information writing in step S250, as shown in step S260, when the computer device 1000 is restarted again, the basic input/output system chip 1500 reads that the voltage level of the third port 1105 is high at this time. The computer device 1000 is restarted in the normal mode. In the above process, the manufacturing mode is a mode for the manufacturer to write information, and the normal mode is a state in which the computer device 1000 is generally used.

In addition, although the signal path of the first switch 1600 and the second switch 1700 is switched in the above embodiment of the present invention, the accessibility of the field replaceable unit 1200 and the memory 1300 is adjusted. In another embodiment, the basic input output system die 1500 is implemented by actually enabling the field replaceable unit 1200 or memory 1300 to be enabled or disabled. In an embodiment, the basic input/output system chip 1500 adjusts the manner of operation of the platform path controller 1100 such that one of the field replaceable unit 1200 and the memory 1300 cannot be saved for the platform path controller 1100. take. However, the present invention does not limit the manner in which the adjustment of the accessibility of the field replaceable unit 1200 to the memory 1300 is achieved.

In summary, the computer apparatus and the control method thereof according to any of the above embodiments of the present invention can selectively adjust specific components by mode switching without requiring a substrate management controller. Accessibility, for component access in the corresponding mode, to avoid the problem of read and write conflicts.

Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.

1000‧‧‧Computer equipment

1100‧‧‧Platform Path Controller

1101‧‧‧First port

1103‧‧‧Second port

1105‧‧‧ third port

1200‧‧‧Field replaceable unit

1300‧‧‧ memory

1400‧‧‧Complex programmable logic devices

1500‧‧‧Basic Input and Output System Wafer

1600‧‧‧First switch

1601‧‧‧First end of the first switch

1603‧‧‧The second end of the first switch

1605‧‧‧ control end of the first switch

1700‧‧‧second switch

1701‧‧‧ the first end of the second switch

1703‧‧‧second end of the second switch

1705‧‧‧Control terminal of the second switch

FIG. 1 is a schematic diagram of a computer device architecture according to an embodiment of the invention. 2 is a flow chart of a computer device control method in accordance with an embodiment of the present invention.

1000‧‧‧Computer equipment

1100‧‧‧Platform Path Controller

1101‧‧‧First port

1103‧‧‧Second port

1105‧‧‧ third port

1200‧‧‧Field replaceable unit

1300‧‧‧ memory

1400‧‧‧Complex programmable logic devices

1500‧‧‧Basic Input and Output System Wafer

1600‧‧‧First switch

1601‧‧‧First end of the first switch

1603‧‧‧The second end of the first switch

1605‧‧‧ control end of the first switch

1700‧‧‧second switch

1701‧‧‧ the first end of the second switch

1703‧‧‧second end of the second switch

1705‧‧‧Control terminal of the second switch

Claims (12)

A computer device comprising: a platform path controller having a first port and a second port; a field replaceable unit electrically connected to the first port of the platform path controller; a memory, electrical Connecting to the first port of the platform path controller; a complex programmable logic device electrically connected to the second port of the platform path controller, and detecting an indication signal of the second port to selectively Generating a restart signal; and a basic input/output system chip electrically coupled to the platform path controller, the field replaceable unit, and the complex programmable logic device for selectively causing the computer device to respond to the restart signal Rebooting in a manufacturing mode or a normal mode; wherein the basic input-output system chip in the manufacturing mode makes the memory inaccessible to the platform path controller and causes the field replaceable unit to The platform path controller is accessible; wherein the basic input/output system is when the computer device is in the normal mode The sheet for a field replaceable unit is not accessible to the platform controller hub, and the memory for the platform controller hub accessible. The computer device of claim 1, further comprising a first switch electrically connected to the basic input/output system chip, the memory and the first port of the platform path controller, and the first switch is configured by the basic The input output system chip controls the first port of the platform path controller to be turned on/off with the memory. The computer device of item 2, wherein the first switch is in a closed state when the computer device is in the manufacturing mode. The computer device of item 2, wherein the first switch is in an on state when the computer device is in the normal mode. The computer device of claim 1, further comprising a second switch electrically connected to the basic input/output system chip, the field replaceable unit and the first port of the platform path controller, and the second switch is The basic input output system die controls the on/off of the first port of the platform path controller and the field replaceable unit. The computer device of item 5, wherein the second switch is in an on state when the computer device is in the manufacturing mode. The computer device of item 5, wherein the second switch is in a closed state when the computer device is in the normal mode. The computer device of claim 1, wherein the platform path controller enters the manufacturing mode when the platform path controller receives a write request to the field replaceable unit, and the platform path controller issues the second port The indication signal. The computer device of claim 1, wherein the voltage level of the second port is preset to be high, and the indication signal is generated by temporarily pulling the voltage level of the second port low. The computer device of claim 1, wherein the basic input output system wafer restarts the computer device in the manufacturing mode when the basic input/output system chip receives the restart signal in the normal mode. The computer device of claim 1, wherein the basic input output system wafer restarts the computer device in the normal mode when the basic input/output system chip receives the restart signal in the manufacturing mode. A control method is suitable for a computer device, the method comprising: in a normal mode, when a platform path controller receives a write command, generating an indication signal; when a complex programmable logic device detects The indication signal generates a restart signal; when the computer device is restarted, a basic input/output system chip activates the computer device in a manufacturing mode according to the restart signal; wherein in the manufacturing mode, a field replaceable unit Accessible to the platform path controller, a memory is inaccessible to the platform path controller; in the manufacturing mode, the complex programmable logic device adjusts the restart signal; and when the computer device is restarted, the The basic input/output system chip activates the computer device in the normal mode according to the adjusted restart signal; and wherein in the manufacturing mode, the field replaceable unit is accessible to the platform path controller, the memory pair The platform path controller is not accessible.