TW201924045A - Nitride semiconductor epitaxial substrate and high electron mobility transistor using the nitride semiconductor - Google Patents

Nitride semiconductor epitaxial substrate and high electron mobility transistor using the nitride semiconductor Download PDF

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TW201924045A
TW201924045A TW107128806A TW107128806A TW201924045A TW 201924045 A TW201924045 A TW 201924045A TW 107128806 A TW107128806 A TW 107128806A TW 107128806 A TW107128806 A TW 107128806A TW 201924045 A TW201924045 A TW 201924045A
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nitride semiconductor
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epitaxial substrate
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大石浩司
大森典子
阿部芳久
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日商闊斯泰股份有限公司
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Abstract

There is provided a nitride semiconductor epitaxial substrate having a spacer structure capable of obtaining characteristics unprecedented in the prior art. In the nitride semiconductor epitaxial substrate of the present invention, a channel layer, a spacer layer, and an electron supply layer are stacked in this order. The channel layer is GaN. The spacer layer is AlaGa1-aN (0 < a < 0.5). The electron supply layer is AlxInyGa1-x-yN (0 < x+y ≤ 1). The spacer layer has a thickness of two molecular layers or less. Thus, adverse effects due to the existence of a conventional spacer layer are suitably suppressed.

Description

氮化物半導體磊晶基板以及氮化物半導體高電子移動率電晶體 Nitride semiconductor epitaxial substrate and nitride semiconductor high electron mobility transistor

本發明係關於一種基板結構,用以提升於可高頻化、高輸出化之功率器件所適用的氮化物半導體磊晶基板中之該器件的性能。 The present invention relates to a substrate structure for improving the performance of a device in a nitride semiconductor epitaxial substrate to which a high frequency, high output power device is applied.

以使用有氮化物半導體、尤其是使用有氮化錄系化合物半導體基板之高電子移動率電晶體(HEMT)而言,已知有在電子行走層與電子供給層之間夾設所謂的分隔層以提升電性之技術。 In the case of a high electron mobility transistor (HEMT) using a nitride semiconductor, particularly a semiconductor substrate having a nitrided compound semiconductor, it is known to sandwich a so-called spacer layer between the electron walking layer and the electron supply layer. To improve the technology of electricity.

日本特開2004-200711號公報所揭示之技術如下。亦即,一種具有異質結構之氮化物系III-V族化合物半導體裝置,包含:第1二元化合物半導體層,係構成通道層;由AlGaN所構成之三元混晶半導體層,係構成阻障層,Al與Ga之組成比為一定;以及第2二元化合物半導體層,係夾設於前述第1二元化合物半導體層與前述三元混 晶半導體層之間;此外,前述第1二元化合物半導體層係GaN,前述第2二元化合物半導體層係層厚為1分子層以上4分子層以下之AlN。 The technique disclosed in Japanese Laid-Open Patent Publication No. 2004-200711 is as follows. That is, a nitride-based III-V compound semiconductor device having a heterostructure includes: a first binary compound semiconductor layer constituting a channel layer; and a ternary mixed crystal semiconductor layer composed of AlGaN, which constitutes a barrier a layer, a composition ratio of Al to Ga is constant; and a second binary compound semiconductor layer interposed between the first binary compound semiconductor layer and the ternary mixture Further, in the first binary compound semiconductor layer-based GaN, the second binary compound semiconductor layer layer has a thickness of one molecule or more and four or less layers of AlN.

日本特開2003-229439號公報所揭示之化合物半導體元件,具有使得分別以Ga為必要之由III族元素之氮化物所構成之電子供給層、分隔層、通道層依此順序以晶格匹配形態來接合而成之結構,前述分隔層係由AlGaN層所構成,且該分隔層之與前述通道層相接之區域的AlN混晶比較剩餘區域來得高。 The compound semiconductor device disclosed in Japanese Laid-Open Patent Publication No. 2003-229439 has an electron supply layer, a spacer layer, and a channel layer which are made of a nitride of a group III element which is necessary for Ga, respectively, in a lattice matching form. In the structure formed by bonding, the spacer layer is composed of an AlGaN layer, and an AlN mixed crystal of a region of the spacer layer in contact with the channel layer is higher than a remaining region.

日本特開2004-200711號公報之發明,考慮到當分隔層、亦即前述第2二元化合物半導體層採用AlN之情況,由於AlN具有6.2eV此一極大的能帶隙,若此層厚變得過厚則從阻障層往通道層的電流注入會受到阻礙變得無法發揮異質結構的功能,故藉由將膜厚設定在1分子層以上4分子層以下,可一面維持接合界面的陡峭性、一面利用穿隧效應來進行充分的載子輸送。 In the invention of Japanese Laid-Open Patent Publication No. 2004-200711, it is considered that when the separation layer, that is, the second binary compound semiconductor layer is made of AlN, since AlN has a maximum energy band gap of 6.2 eV, if the layer thickness is changed When the thickness is too large, the current injection from the barrier layer to the channel layer is prevented from becoming a function of the heterostructure. Therefore, by setting the film thickness to 1 molecule or more and 4 or less layers, the bonding interface can be kept steep. The tunneling effect is used for sufficient carrier transport.

日本特開2003-229439號公報之發明並非針對AlGaN分隔層全體,而是使得最可顯著期待對於2DEG層之壓電電場効應之區域、亦即AlGaN分隔層與通道層之交界區域的AlN混晶比相對於剩餘區域作選擇性提高,以謀求解決此問題。亦即,並非針對分隔層之全體,而是僅針對交界區域來提高AlN混晶比,具體上係將分隔層之厚度保持在不致發生晶格鬆弛的程度來提高AlN混晶比,藉此大幅增加對於通道層之壓電電場施加效果。此外,藉由 提高交界區域之AlN混晶比,則分隔層側之傳導帶底能階Ec會上昇,可更為加大傳導帶之不連續值,自發極化效應也獲得提高。藉此,相較於分隔層以同樣的組成所構成之結構,可於通道層側形成更深且更狹窄的三角電勢,而謀求2DEG層中之電子濃度之增大乃至於元件之高輸出化。 The invention of Japanese Laid-Open Patent Publication No. 2003-229439 is not directed to the entire AlGaN spacer layer, but makes it possible to most expect an AlN mixed crystal region which is the region of the piezoelectric field effect of the 2DEG layer, that is, the boundary region between the AlGaN spacer layer and the channel layer. The selectivity is increased relative to the remaining area in order to solve this problem. That is, the AlN mixed crystal ratio is not increased for the entire partition layer, but only for the boundary region, specifically, the thickness of the separation layer is maintained to the extent that lattice relaxation is not caused to increase the AlN mixed crystal ratio, thereby greatly increasing The effect of applying a piezoelectric field to the channel layer is increased. In addition, by When the AlN mixed crystal ratio of the junction region is increased, the bottom energy level Ec of the conduction layer on the partition layer side is increased, the discontinuous value of the conduction band is further increased, and the spontaneous polarization effect is also improved. Thereby, a deeper and narrower triangular potential can be formed on the channel layer side than the structure in which the spacer layer is formed by the same composition, and an increase in the electron concentration in the 2DEG layer and an increase in the output of the element can be achieved.

如此般,上述任一發明雖在HEMT結構方面可說是有用的技術,惟特別關於更加薄化分隔層方面難以說已充分善盡檢討,而有進一步改良的空間。 As such, although any of the above inventions can be said to be a useful technique in terms of the structure of the HEMT, it is difficult to say that the thinner separation layer is sufficiently fully reviewed, and there is room for further improvement.

本發明有鑑於相關課題,目的在於提供一種氮化物半導體磊晶基板以及氮化物半導體高電子移動率電晶體,不僅具有薄分隔層之結構,更可適用於高性能之氮化物半導體裝置。 The present invention has been made in view of the above problems, and an object of the invention is to provide a nitride semiconductor epitaxial substrate and a nitride semiconductor high electron mobility transistor, which are not only have a structure of a thin spacer layer, but are also applicable to a high performance nitride semiconductor device.

本發明之氮化物半導體磊晶基板具備有如下之層結構:依序積層有通道層、分隔層、電子供給層,前述通道層為GaN,前述分隔層為AlaGa1-aN(0<a<0.5),前述電子供給層為AlxInyGa1-x-yN(0<x+y≦1),前述分隔層之層厚為2分子層以下。 The nitride semiconductor epitaxial substrate of the present invention has a layer structure in which a channel layer, a spacer layer, and an electron supply layer are sequentially laminated, the channel layer is GaN, and the spacer layer is Al a Ga 1-a N (0<a<0.5), the electron supply layer is Al x In y Ga 1-xy N (0<x+y≦1), and the layer thickness of the separator layer is 2 molecules or less.

以往因存在分隔層而有無法充分獲得電流崩潰抑制效果的問題,但藉由具有前述相關構成,而可成為此問題獲得有意義改善之氮化物半導體磊晶基板。 Conventionally, there has been a problem that the current collapse suppressing effect cannot be sufficiently obtained due to the existence of the spacer layer. However, by having the above-described related configuration, it is possible to obtain a nitride semiconductor epitaxial substrate which is remarkably improved.

此外,使用有此種氮化物半導體磊晶基板之氮化物半導體HEMT成為具有更優異電性者而適切。 Further, a nitride semiconductor HEMT using such a nitride semiconductor epitaxial substrate is suitable for use in a more excellent electrical property.

依據本發明,可提供一種氮化物半導體磊晶基板,因存在分隔層而無法充分獲得電流崩潰抑制效果此一問題獲得有意義改善,再者使用此氮化物半導體磊晶基板之氮化物半導體HEMT可發揮優異電性。 According to the present invention, it is possible to provide a nitride semiconductor epitaxial substrate, which is incapable of obtaining a current collapse suppressing effect due to the presence of a spacer layer. This problem is remarkably improved, and the nitride semiconductor HEMT using the nitride semiconductor epitaxial substrate can be utilized. Excellent electrical properties.

1‧‧‧基底基板 1‧‧‧Base substrate

2‧‧‧阻障層 2‧‧‧Barrier layer

3‧‧‧GaN層(通道層) 3‧‧‧GaN layer (channel layer)

4‧‧‧AlGaN層(電子供給層) 4‧‧‧AlGaN layer (electron supply layer)

S‧‧‧分隔層 S‧‧‧ separation layer

Z‧‧‧氮化物半導體基板 Z‧‧‧ nitride semiconductor substrate

圖1係顯示本發明之氮化物半導體磊晶基板之一態樣之剖面示意圖。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing a state of a nitride semiconductor epitaxial substrate of the present invention.

圖2係表示比較例1與實施例1之電子供給層4/分隔層S/通道層3附近經STEM觀察之剖面圖與經STEM-EDS(Scanning Transmission Electron Microscopy-Energy Dispersive Spectroscopy)分析所得之元素比之結果之圖。 2 is a cross-sectional view showing the vicinity of the electron supply layer 4/separator layer S/channel layer 3 of Comparative Example 1 and Example 1, and the elements obtained by STEM-EDS (Scanning Transmission Electron Microscopy-Energy Dispersive Spectroscopy). Figure of the result.

圖3係實施例1之電子供給層4/分隔層S/通道層3附近以較圖2來得低倍率進行剖面STEM觀察之情況中之明視野STEM像(左),HAADF-STEM(High-Angle Annular Dark-Field Scanning Transmission Electron Microscopy)像(右)。 3 is a bright-field STEM image (left), HAADF-STEM (High-Angle) in the case where the vicinity of the electron supply layer 4/separator layer S/channel layer 3 of Example 1 is subjected to cross-sectional STEM observation at a low magnification as shown in FIG. Annular Dark-Field Scanning Transmission Electron Microscopy) (right).

以下,一併參照圖式來詳細說明本發明。本發明之氮化物半導體磊晶基板具備如下之層結構:依序積層有通道 層3、分隔層S、電子供給層4,前述通道層3為GaN,前述分隔層S為AlaGa1-aN(0<a<0.5),前述電子供給層4為AlxInyGa1-x-yN(0<x+y≦1),前述分隔層S之層厚為2分子層以下。 Hereinafter, the present invention will be described in detail with reference to the drawings. The nitride semiconductor epitaxial substrate of the present invention has a layer structure in which a channel layer 3, a spacer layer S, and an electron supply layer 4 are sequentially laminated, the channel layer 3 is GaN, and the spacer layer S is Al a Ga 1-a N (0 < a < 0.5), the electron supply layer 4 is Al x In y Ga 1-xy N (0 < x + y ≦ 1), and the layer thickness of the spacer layer S is 2 molecular layers or less.

圖1係顯示本發明之氮化物半導體磊晶基板之一態樣之剖面示意圖。此外,本發明所顯示的圖全部基於說明起見而將形狀加以示意性地簡化且予以強調者,細部之形狀、尺寸、以及比率與實際不同。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing a state of a nitride semiconductor epitaxial substrate of the present invention. Further, the drawings shown in the present invention are all schematically simplified and emphasized, for the sake of explanation, and the shapes, sizes, and ratios of the details are different from actual ones.

圖1所示氮化物半導體基板Z於基底基板1上依序形成有阻障層2、通道層3、分隔層S、電子供給層4。此外,雖未圖示,但可進而賦予電極以及依必要性來賦予帽蓋層(cap layer)而成為HEMT。 On the nitride semiconductor substrate Z shown in FIG. 1, a barrier layer 2, a channel layer 3, a spacer layer S, and an electron supply layer 4 are sequentially formed on the base substrate 1. Further, although not shown, an electrode can be further provided by providing an electrode and a cap layer as necessary.

本發明在具有異質界面而將該界面附近所產生的二維電子氣(2DEG)當作電流路徑來使用之HEMT尤其可發揮適切特性。是以,基底基板1與阻障層2之素材、物性、結構、製造方法並無特別限制,可廣泛使用周知之手法。 In the present invention, the HEMT having a heterogeneous interface and using the two-dimensional electron gas (2DEG) generated in the vicinity of the interface as a current path can particularly exhibit appropriate characteristics. The material, physical properties, structure, and manufacturing method of the base substrate 1 and the barrier layer 2 are not particularly limited, and a well-known method can be widely used.

基底基板1可舉出矽單晶、碳化矽、藍寶石、以及氮化鎵(GaN)等。此等材料中,矽單晶雖相較於絶縁性更高之碳化矽、藍寶石等在縱向之耐壓方面有不利之趨勢,但在易於大口徑化且可達成低成本方面可說是適切。因此,本發明係例示使用有矽單晶之氮化物半導體基板。 The base substrate 1 may be a germanium single crystal, tantalum carbide, sapphire, or gallium nitride (GaN). Among these materials, the tantalum single crystal has an unfavorable tendency in terms of the longitudinal withstand voltage compared with the more rigid tantalum carbide, sapphire, etc., but it is suitable in terms of ease of large diameter and low cost. Therefore, the present invention exemplifies a nitride semiconductor substrate using a germanium single crystal.

阻障層2可適用例如日本專利第5159858號公報或是日本專利第5188545號公報所揭示之阻障層結構。具體而言,可適用:由第一層為厚度50nm至200nm之AlN與 第二層為厚度100nm至300nm之AlGaN所構成之層;或是,使得AlxGa1-xN單晶層(0.6≦x≦1.0)與AlyGa1-yN單晶層(0≦y≦0.5)自基板側起依序交互地反覆積層,且該AlxGa1-xN單晶層(0.6≦x≦1.0)含有碳為1×1018atoms/cm3至1×1021atoms/cm3,且該AlyGa1-yN單晶層(0≦y≦0.5)含有碳為1×1017atoms/cm3至1×1021atoms/cm3而成之多層阻障層。進而,若相接於通道層3之高電阻之阻障層作為一例係具有碳濃度1×1018atoms/cm3至3×1018atoms/cm3、厚度100nm至200nm程度之GaN層,則可發揮此GaN層所致縱向之耐壓提升效果而特佳。 The barrier layer 2 can be applied, for example, to a barrier layer structure disclosed in Japanese Patent No. 5159858 or Japanese Patent No. 5188545. Specifically, it is applicable to: a layer composed of AlN having a thickness of 50 nm to 200 nm in the first layer and AlGaN having a thickness of 100 nm to 300 nm in the second layer; or an Al x Ga 1-x N single crystal layer (0.6) ≦x≦1.0) and Al y Ga 1-y N single crystal layer (0≦y≦0.5) are sequentially alternately laminated from the substrate side, and the Al x Ga 1-x N single crystal layer (0.6≦x) ≦1.0) contains carbon of 1×10 18 atoms/cm 3 to 1×10 21 atoms/cm 3 , and the Al y Ga 1-y N single crystal layer (0≦y≦0.5) contains carbon of 1×10 17 A multilayer barrier layer of atoms/cm 3 to 1 × 10 21 atoms/cm 3 . Further, if the barrier layer of high resistance which is in contact with the channel layer 3 is, for example, a GaN layer having a carbon concentration of 1×10 18 atoms/cm 3 to 3×10 18 atoms/cm 3 and a thickness of 100 nm to 200 nm, It is particularly preferable to exert the vertical pressure withstand effect of the GaN layer.

本發明中,通道層3係由第1之13族元素之氮化物半導體所構成,電子供給層4係由第1之13族元素以及第2之13族元素之氮化物半導體所構成。13族元素為鎵(Ga)、鋁(Al)以及銦(In)等。本發明中,第1之13族元素為Ga、Al以及In中任一元素,第2之13族元素係Ga、Al以及In中任一元素但為第1之13族元素以外之元素。第1之13族元素為Ga而第2之13族元素為Al的組合在基板設計自由度的高度上為適切。 In the present invention, the channel layer 3 is composed of a nitride semiconductor of a group 13 element, and the electron supply layer 4 is composed of a nitride semiconductor of a group 13 element and a group 13 element. The group 13 elements are gallium (Ga), aluminum (Al), and indium (In). In the present invention, the first group 13 element is any one of Ga, Al, and In, and the second group 13 element is any element other than Ga, Al, and In, but is a group other than the group 13 element. The combination of the Group 13 and Group 13 elements of Ga and the Group 2 and Group 13 elements of Al is suitable for the degree of substrate design freedom.

通道層3以及電子供給層4之層厚並無特別限制,大致上關於通道層3為0.3μm至3.0μm,關於電子供給層4為10nm至100nm。此外,電子供給層4也可摻雜各種元素。各種元素可舉出例如碳、磷、鎂、矽、鐵、氧以及氫等。 The layer thickness of the channel layer 3 and the electron supply layer 4 is not particularly limited, and is approximately 0.3 μm to 3.0 μm with respect to the channel layer 3 and 10 nm to 100 nm with respect to the electron supply layer 4. Further, the electron supply layer 4 may also be doped with various elements. Examples of the various elements include carbon, phosphorus, magnesium, barium, iron, oxygen, hydrogen, and the like.

本發明中,於通道層3與電子供給層4之間具有分隔層S。此分隔層S基本上係為了獲得與習知技術中之分隔層為相同功能之物,目的在於兼顧HEMT中之二維電子氣濃度之增大所致高輸出化與電子移動度之提升。 In the present invention, a partition layer S is provided between the channel layer 3 and the electron supply layer 4. This separation layer S is basically for the purpose of obtaining the same function as the separation layer in the prior art, and aims to achieve both an increase in output and an increase in electron mobility due to an increase in the concentration of the two-dimensional electron gas in the HEMT.

本發明之特徴在於具有以下形態:分隔層S為AlaGa1-aN(0<a<0.5),電子供給層4為AlxInyGa1-x-yN(0<x+y≦1),分隔層S之層厚為2分子層以下,此等當中尤其在於具有以下形態:分隔層S之層厚為2分子層以下。 The present invention is characterized in that the partition layer S is Al a Ga 1-a N (0 < a < 0.5), and the electron supply layer 4 is Al x In y Ga 1-xy N (0 < x + y ≦ 1) The layer thickness of the separator layer S is 2 molecular layers or less. Among them, in particular, the layer thickness of the separator layer S is 2 molecular layers or less.

此種形態可藉由掃描型穿透電子顕微鏡(STEM)來觀察氮化物半導體基板Z之剖面,並以能量分散型X射線光譜法(EDS)進行元素分析來特定。圖2係比較例1以及實施例1之電子供給層4/分隔層S/通道層3附近經STEM觀察之剖面圖,顯示了對於電子供給層4/分隔層S/通道層3附近進行STEM-EDS分析所得之結果。此外,EDS係藉由附屬於STEM裝置之EDS測定裝置來測定。 Such a form can be observed by scanning a through-hole electron micromirror (STEM) to observe the cross section of the nitride semiconductor substrate Z and performing elemental analysis by energy dispersive X-ray spectroscopy (EDS). 2 is a cross-sectional view showing the vicinity of the electron supply layer 4/separator layer S/channel layer 3 of Comparative Example 1 and Example 1 by STEM, showing STEM-for the vicinity of the electron supply layer 4/separator layer S/channel layer 3. The results obtained by EDS analysis. Further, EDS is measured by an EDS measuring device attached to a STEM device.

此外,以EDS所得之值基於測定原理故數值充其量僅為參考值,但可正確反映出不同元素彼此之存在比率,本發明也可大致正確地瞭解成為對象之元素A係呈現何種分布。 In addition, the value obtained by EDS is based on the measurement principle, so the numerical value is only a reference value at best, but the ratio of the existence of different elements to each other can be correctly reflected, and the present invention can also roughly understand exactly what kind of distribution of the element A which is the object.

分隔層S具有AlaGa1-aN(0<a<0.5)之組成。為了發揮分隔層之功能、亦即為了提升移動度,Al必須以某種程度存在。只要通道層3如本發明般為GaN,則Al組成a從0.1程度起可顯現出移動度提升效果,a愈大則效果愈高。 The spacer layer S has a composition of Al a Ga 1-a N (0 < a < 0.5). In order to function as a separation layer, that is, to improve mobility, Al must exist to some extent. As long as the channel layer 3 is GaN as in the present invention, the Al composition a can exhibit a mobility improvement effect from a degree of 0.1, and the larger the a, the higher the effect.

另一方面,由於分隔層S係直接相接於由GaN所構成之通道層3,一旦分隔層S與GaN之晶格常數的差正比於a而變大,則差排密度將由於在界面處所產生的應變而增加。此增加之差排密度被認為是電流崩潰惡化的原因之一。 On the other hand, since the spacer layer S is directly in contact with the channel layer 3 composed of GaN, once the difference in lattice constant between the spacer layer S and GaN is larger than that of a, the difference in density will be due to the interface The resulting strain increases. This increased difference in density is considered to be one of the causes of the deterioration of the current collapse.

此外,以有機金屬氣相成長法(MOCVD法;Metal-Organic Chemical Vapor Deposition method)來形成層之情況,具有AlaGa1-aN(0<a<0.5)之組成之分隔層S相較於GaN含有更多的碳,可說是使得電流崩潰惡化。 Further, in the case where a layer is formed by a metal-organic vapor phase growth method (MOCVD method), a separator layer S having a composition of Al a Ga 1-a N (0 < a < 0.5) is compared. The fact that GaN contains more carbon can be said to make the current collapse worse.

再者,具有AlaGa1-aN(0<a<0.5)之組成之分隔層S的厚度若薄,則可和通道層之GaN更為產生晶格匹配,故不易有缺陷進入,在電流崩潰之抑制上具有效果。但是,若為相同厚度,一旦a變大,則分隔層S與GaN之晶格常數差會擴大,故由GaN所構成之通道層中所發生的缺陷量會變多。 Further, if the thickness of the spacer layer S having a composition of Al a Ga 1-a N (0 < a < 0.5) is thin, it can be more lattice-matched with the GaN of the channel layer, so that it is less likely to enter into defects. The suppression of current collapse has an effect. However, if the thickness is the same, once a is increased, the difference in lattice constant between the spacer layer S and GaN is increased, so that the amount of defects occurring in the channel layer made of GaN is increased.

綜上所述,可說當分隔層S係由AlaGa1-aN(0<a<0.5)所構成之情況,從電流崩潰抑制效果之觀點來看,厚度愈薄、a愈小為愈佳,但若a未達預定值以上則無法謀求移動度提升。 In summary, it can be said that when the spacer layer S is composed of Al a Ga 1-a N (0 < a < 0.5), the thinner the thickness, the smaller a is from the viewpoint of the current collapse suppressing effect. The better, but if a does not reach the predetermined value or more, the mobility cannot be improved.

基於上述觀點,以下針對本發明與習知技術的差異來詳細說明。 Based on the above points, the following description of the differences between the present invention and the prior art will be described in detail.

日本特開2004-200711號公報係例示了層厚為1分子層以上4分子層以下之AlN的分隔層。亦即,針對AlN所具有的缺點、亦即自阻障層朝通道層之電流注入阻礙係 嘗試以薄化層厚的方式來因應。但是,若AlN與GaN直接相接,無法否認因著於界面發生差排,相較於分隔層為AlGaN之情況,AlN層之高碳濃度終究往性能劣化的方向移動。 Japanese Laid-Open Patent Publication No. 2004-200711 exemplifies a separation layer of AlN having a layer thickness of 1 molecular layer or more and 4 molecular layers or less. That is, for the disadvantages of AlN, that is, the current injection barrier of the self-blocking layer toward the channel layer Try to respond by thinning the layer thickness. However, if AlN is directly in contact with GaN, it cannot be denied that the high carbon concentration of the AlN layer eventually moves in the direction of deterioration of performance due to the difference in the interface between the layers and the AlGaN layer.

日本特開2003-229439號公報中,係將分隔層之與通道層相接處之Al原子比率相對於剩餘部分提高,進而,為了提高合金散射之抑制效果,分隔層之與通道層相接之部位以AlN為佳,而AlN之層厚以數原子層為佳。亦即,即便是日本特開2003-229439號公報也可說是具有下述技術思想:分隔層之與通道層相接之部位以AlN為佳,而AlN所產生之缺點利用減少層厚來因應。 In Japanese Laid-Open Patent Publication No. 2003-229439, the ratio of Al atoms at the junction of the separation layer and the channel layer is increased with respect to the remaining portion, and further, in order to improve the suppression effect of alloy scattering, the separation layer is in contact with the channel layer. The part is preferably AlN, and the layer thickness of AlN is preferably a few atomic layers. That is, even Japanese Patent Laid-Open Publication No. 2003-229439 can be said to have the following technical idea: the portion where the separation layer is in contact with the channel layer is preferably AlN, and the disadvantage of AlN is reduced by reducing the layer thickness. .

對此,本發明係針對分隔層S之與通道層3相接之部位的Al原子比率以及分隔層S之層厚這兩個參數進一步檢討,一方面定調於薄化分隔層S、一方面從新的視野來檢討通道層3與分隔層S之Al原子比率關係會對於HEMT造成何種影響。 In this regard, the present invention further examines the two parameters of the Al atomic ratio of the portion of the separation layer S that is in contact with the channel layer 3 and the layer thickness of the separation layer S, on the one hand, the thinning separation layer S, on the one hand From a new perspective, it is necessary to review how the ratio of the Al atomic ratio of the channel layer 3 to the spacer layer S affects the HEMT.

亦即,將重點放在分隔層S之存在會促使電流崩潰之惡化,而發現下述現象,從而完成了本發明。所述現象為:相較於日本特開2004-200711號公報以及特開2003-229439號公報所記載之分隔層,藉由降低由AlGaN所構成之分隔層S之Al原子比率並薄化厚度,由於AlGaN與構成通道層3之GaN可更為產生晶格匹配故缺陷不易進入而在崩潰之抑制方面具有效果;以及存在著具有前述效果且不 致嚴重損及原本分隔層所具有之移動度提升效果的最佳值。 That is, focusing on the existence of the separation layer S causes deterioration of current collapse, and the following phenomenon is found, thereby completing the present invention. In the case of the separator described in JP-A-2004-200711 and JP-A-2003-229439, the Al atom ratio of the separator layer S composed of AlGaN is reduced and the thickness is reduced. Since AlGaN and the GaN constituting the channel layer 3 can be more lattice-matched, defects are less likely to enter and have an effect on suppression of collapse; and there is a effect as described above and The optimum value that causes serious damage to the mobility improvement effect of the original separation layer.

本發明發現藉由採用分隔層S之層厚為2分子層以下此一構成可得到上述作用效果。由於分隔層S務必要存在,故下限為1分子層。另一方面,由於瞭解到若分隔層S過厚的確在電流崩潰惡化這點上不利,故可說層厚以2分子以下為佳。 The present inventors have found that the above-described effects can be obtained by using the constitution in which the layer thickness of the partition layer S is 2 molecular layers or less. Since the separation layer S is necessary, the lower limit is one molecular layer. On the other hand, it is understood that if the partition layer S is too thick, it is disadvantageous in that the current collapse is deteriorated, so that the layer thickness is preferably 2 molecules or less.

本發明中,分隔層S中之Al原子比率係適切以STEM-EDS來進行評價。但是,以1分子至2分子之厚度要正確評價Al原子比率,就現況而言極為困難。從而,雖然即便使用STEM-EDS仍無法期盼高精度的定量化,但是例如將電子供給層4與分隔層S加以區別這件事、以及獲得各個層大致上的Al原子比率這件事是可能。 In the present invention, the ratio of Al atoms in the partition layer S is appropriately evaluated by STEM-EDS. However, it is extremely difficult to accurately evaluate the Al atom ratio in a thickness of from 1 molecule to 2 molecules. Therefore, although high-precision quantification cannot be expected even with STEM-EDS, it is possible to distinguish between the electron supply layer 4 and the separation layer S, and to obtain an Al atom ratio substantially in each layer. .

圖2係將比較例1與實施例1進行比對。對於分隔層S為厚的比較例1而言,分隔層S之存在可從照片清楚確認。相對於此,雖層厚薄且因解析度的關係而並不明瞭,然即便是實施例1亦確認出某種可辨識程度的顏色深淺。此外,對於實施例1而言,在圖2之EDS圖形中似乎看見分隔層S與電子供給層4在Al原子比率方面幾乎無差異,但從數值資料的解析結果可知分隔層S之Al原子比率為20%,電子供給層4之Al原子比率為15%。 Fig. 2 is a comparison between Comparative Example 1 and Example 1. For Comparative Example 1 in which the separation layer S was thick, the existence of the separation layer S can be clearly confirmed from the photograph. On the other hand, although the thickness of the layer was thin and the degree of resolution was not clear, even in the first embodiment, the color depth of a certain degree of recognition was confirmed. Further, with respect to Example 1, it seems that the separation layer S and the electron supply layer 4 have almost no difference in the atomic ratio of Al in the EDS pattern of FIG. 2, but the Al atomic ratio of the separation layer S is known from the analysis results of the numerical data. At 20%, the electron supply layer 4 has an Al atomic ratio of 15%.

圖3係以可更鮮明地看見圖2所示實施例1之剖面圖之分隔層S與電子供給層4之界面附近之交界的方式,而以較圖2更低倍率進行觀察時的明視野STEM像(左)與 HAADF-STEM像(右)。由於HAADF像成為Z對比,故分析區域中若輕原子愈多(此處為AlGaN中之Al組成愈高)則呈現愈暗。圖3從下方起依序可確認出最明亮(GaN層)、最暗(分隔層)、介於前述兩者中間之明亮度(AlGaN電子供給層)之對比不同的三層。依此方式在本發明之通道層三部分可明確確認出存在著Al組成比較AlGaN電子供給層來得高之分隔層。 3 is a view showing a clearer view when the boundary between the partition layer S of the cross-sectional view of the embodiment 1 shown in FIG. 2 and the electron supply layer 4 is more clearly seen at a lower magnification than that of FIG. STEM image (left) and HAADF-STEM image (right). Since the HAADF image becomes Z-contrast, the more light atoms in the analysis region (here, the higher the Al composition in AlGaN), the darker it appears. In Fig. 3, the brightest (GaN layer), the darkest (separator layer), and the three layers in which the contrast between the two (AlGaN electron supply layer) is different from each other can be confirmed in order from the bottom. In this manner, in the three portions of the channel layer of the present invention, it is possible to clearly confirm that there is a partition layer in which the Al composition is higher than that of the AlGaN electron supply layer.

本發明在分隔層S之Al原子比率高於電子供給層4之Al原子比率和分隔層S之Al原子比率與電子供給層4之Al原子比率無差異情況的比較中,就可更為保持原本分隔層所擁有的移動度提升效果這點上可說令人滿意。 In the comparison of the case where the Al atom ratio of the partition layer S is higher than the Al atom ratio of the electron supply layer 4 and the Al atom ratio of the partition layer S and the Al atom ratio of the electron supply layer 4, the original one can be more retained. The mobility enhancement effect of the separation layer is satisfactory.

此外,電子供給層4之Al原子比率在10%以上30%以下之間為佳。亦即,較佳為AlxInyGa1-x-yN(0<x+y≦1)中之x為0.1至0.3,y為0至0.9,且x+y≦1。電子供給層4之厚度亦無特別限制,係在10nm至60nm之間來適時設計。 Further, the atomic ratio of Al of the electron supply layer 4 is preferably between 10% and 30%. That is, it is preferable that x in Al x In y Ga 1-xy N (0<x+y≦1) is 0.1 to 0.3, y is 0 to 0.9, and x+y≦1. The thickness of the electron supply layer 4 is also not particularly limited, and is designed from 10 nm to 60 nm in a timely manner.

分隔層S中之Al原子比率所致曲線形狀可藉由MOCVD法來對於剛形成通道層3後之各種原料氣體與載子氣體之流量、反應爐內壓力進行調整,以及將Al原料氣體之供給時機等最佳化,而適切地獲得。 The shape of the curve due to the ratio of Al atoms in the partition layer S can be adjusted by the MOCVD method for the flow rates of various material gases and carrier gases immediately after the formation of the channel layer 3, the pressure in the reactor, and the supply of the Al source gas. The timing is optimized and properly obtained.

為利用MOCVD法得到本發明之分隔層S以及電子供給層4,適切的一態樣係在氣相成長裝置之反應爐內,使用Ga原料氣體以及N原料氣體來形成由GaN所構成之通道層3之後,在將要形成分隔層以及電子供給層時,使用 前述Ga原料氣體、前述N原料氣體以及Al原料氣體,以爐內壓力200hPa至300hPa花1.5秒至10秒來形成分隔層S,進而保持在前述分隔層形成時之成膜溫度,迅速地改變原料氣體之供給比率來形成前述電子供給層。 In order to obtain the separation layer S and the electron supply layer 4 of the present invention by the MOCVD method, a suitable aspect is to form a channel layer composed of GaN using a Ga source gas and an N source gas in a reaction furnace of a vapor phase growth apparatus. After 3, when the separation layer and the electron supply layer are to be formed, use The Ga source gas, the N source gas, and the Al source gas are formed in a furnace pressure of 200 hPa to 300 hPa for 1.5 seconds to 10 seconds to form a separator layer S, thereby maintaining the film formation temperature at the time of formation of the separator layer, and rapidly changing the material. The supply ratio of the gas forms the aforementioned electron supply layer.

依據此種方法,即便非分子蒸鍍之類的手法,也能以MOCVD法來形成1分子厚至2分子厚之氮化物半導體層。 According to this method, even a method such as non-molecular vapor deposition can form a nitride semiconductor layer having a thickness of one molecule to two molecules by MOCVD.

如上所述,本發明之氮化物半導體磊晶基板之結構,和以往具有分隔層者同樣地具備有可提升二維電子氣之移動度、使得電晶體高速化之效果,同時可抑制分隔層導入所致電流崩潰特性之惡化,並謀求降低AlGaN/GaN-HEMT元件之接通電阻。 As described above, the structure of the nitride semiconductor epitaxial substrate of the present invention has the effect of improving the mobility of the two-dimensional electron gas and increasing the speed of the transistor, as well as the separation layer. The current collapse characteristic is deteriorated, and the on-resistance of the AlGaN/GaN-HEMT device is lowered.

(實施例) (Example)

以下,基於實施例來具體說明本發明,但本發明不受限於下述實施例。 Hereinafter, the present invention will be specifically described based on examples, but the present invention is not limited to the following examples.

[共通實驗條件] [Common experimental conditions]

準備直徑6英吋、厚度1000μm、為p型之比電阻0.01Ω cm、面方位(111)之矽單晶基板作為基底基板1。將基底基板1以周知的基板洗淨方法來潔淨化之後,設置於MOCVD裝置內,於昇溫以及氣體置換後,以溫度1000℃花15分鐘在氫100%氛圍、爐內壓力135hPa之條件進行熱處理,去除基底基板1表面之自然氧化膜,使得表面呈現出矽原子階梯。 A tantalum single crystal substrate having a diameter of 6 inches, a thickness of 1000 μm, a p-type specific resistance of 0.01 Ω cm, and a plane orientation (111) was prepared as the base substrate 1. After the base substrate 1 is cleaned by a known substrate cleaning method, it is placed in an MOCVD apparatus, and after heat treatment and gas replacement, heat treatment is performed at a temperature of 1000 ° C for 15 minutes in a hydrogen atmosphere of 100% atmosphere and a furnace pressure of 135 hPa. The natural oxide film on the surface of the base substrate 1 is removed, so that the surface exhibits a helium atom ladder.

接著,使用三甲基鋁(TMAl;trimethyl aluminum)、氨(NH3)作為原料氣體,形成厚度70nm之AlN單晶。其次,調整為成長溫度1000℃、爐內壓力60hPa,使用三甲基鎵(TMG;trimethyl gallium)、TMAl、NH3作為原料氣體,形成厚度300nm之Al0.1Ga0.9N單晶層。其次,使用TMG、TMAl、NH3作為原料氣體,交互積層出厚度5nm之AlN單晶層以及厚度30nm之Al0.1Ga0.9N單晶層,形成層厚約2450nm之多層結構。藉由以上方式,於前述基底基板1之上形成阻障層2。 Next, trimethyl aluminum (TMAl; trimethyl aluminum) and ammonia (NH 3 ) were used as raw material gases to form an AlN single crystal having a thickness of 70 nm. Next, the growth temperature was 1000 ° C, the furnace pressure was 60 hPa, and trimethyl gallium (TMG; trimethyl gallium), TMAl, and NH 3 were used as raw material gases to form an Al 0.1 Ga 0.9 N single crystal layer having a thickness of 300 nm. Next, using TMG, TMAl, and NH 3 as raw material gases, an AlN single crystal layer having a thickness of 5 nm and an Al 0.1 Ga 0.9 N single crystal layer having a thickness of 30 nm were alternately laminated to form a multilayer structure having a layer thickness of about 2450 nm. In the above manner, the barrier layer 2 is formed on the base substrate 1 described above.

調整為成長溫度1030℃、爐內壓力200hPa,於前述阻障層2之上積層厚度3000nm之GaN單晶層作為通道層3。 The growth temperature was 1030 ° C, the furnace pressure was 200 hPa, and a GaN single crystal layer having a thickness of 3000 nm was laminated on the barrier layer 2 as the channel layer 3.

以後述實施例1以及比較例1所記載之條件於前述通道層3之上分別形成分隔層S(AlaGa1-aN)。 The separator S (Al a Ga 1-a N) is formed on the channel layer 3 under the conditions described in the first embodiment and the comparative example 1 to be described later.

然後,調整為成長溫度1000℃、爐內壓力200hPa,於分隔層S之上形成厚度24nm之Al0.18Ga0.82N單晶層作為電子供給層4,進而,形成4nm之GaN層作為帽蓋層。經過如上所述之工序,得到評價用之氮化物半導體磊晶基板。此外,利用氣相成長所形成之各層之厚度、碳濃度之控制,係藉由調整原料氣體之流量以及供給時間、基板溫度、其他周知之成長條件來進行。 Then, the growth temperature was 1000 ° C and the furnace pressure was 200 hPa, and an Al 0.18 Ga 0.82 N single crystal layer having a thickness of 24 nm was formed as the electron supply layer 4 on the spacer layer S, and a 4 nm GaN layer was formed as a cap layer. Through the above-described steps, a nitride semiconductor epitaxial substrate for evaluation was obtained. Further, the control of the thickness and carbon concentration of each layer formed by vapor phase growth is performed by adjusting the flow rate of the material gas, the supply time, the substrate temperature, and other well-known growth conditions.

[實施例1] [Example 1]

以成長溫度1030℃、爐內壓力200hPa,花1.5秒導入TMG、TMAl、NH3作為原料氣體,於前述通道層3之上形 成分隔層S作為實施例1。從圖2評價之結果,分隔層S之層厚為約0.25nm(1分子層)。 TMG, TMAl, and NH 3 were introduced as a material gas at a growth temperature of 1030 ° C and a furnace pressure of 200 hPa for 1.5 seconds, and a separator layer S was formed on the channel layer 3 as Example 1. As a result of evaluation in Fig. 2, the layer thickness of the spacer layer S was about 0.25 nm (1 molecule layer).

[比較例1] [Comparative Example 1]

以成長溫度1030℃、爐內壓力50hPa,花10秒導入TMG、TMAl、NH3作為原料氣體,於前述通道層3之上形成分隔層S作為比較例1。此情況,分隔層S中之Al含有量相較於實施例1變得相當高,於厚度方向形成Al組成比超過50%之高Al濃度區域。此層厚為約1nm(4分子層)。 TMG, TMAl, and NH 3 were introduced as a material gas at a growth temperature of 1030 ° C and a furnace pressure of 50 hPa for 10 seconds, and a separator layer S was formed on the channel layer 3 as Comparative Example 1. In this case, the Al content in the partition layer S becomes considerably higher than that in the first embodiment, and a high Al concentration region in which the Al composition ratio exceeds 50% is formed in the thickness direction. This layer has a thickness of about 1 nm (4 molecular layers).

針對所得之實施例1以及比較例1之氮化物半導體磊晶基板,就分隔層S以及鄰接於分隔層S之通道層3與電子供給層4之一部分進行剖面觀察與元素分析。剖面觀察與元素分析之條件如下所示。 With respect to the obtained nitride semiconductor epitaxial substrate of Example 1 and Comparative Example 1, cross-section observation and elemental analysis were performed on the partition layer S and a portion of the channel layer 3 and the electron supply layer 4 adjacent to the spacer layer S. The conditions for section observation and elemental analysis are as follows.

[評價1~STEM觀察] [Evaluation 1~STEM observation]

將個別之氮化物半導體磊晶基板朝直徑方向劈開,從主面中央附近取樣出碎片,藉由FIB(Focused Ion Beam;聚焦離子束)法來薄片化,得到測定用之試樣。對此試樣以STEM(掃描型穿透電子顕微鏡)進行觀察。所使用之裝置為日本電子(股份有限公司)製造之JEM-ARM200F,加速電壓設定為200kV。此外,元素分析係以附屬於所使用之STEM的EDS測定器(能量分散型X射線光譜器)(JED-2300T)來進行,測定條件係設定為加速電壓200kV、光束直徑0.1nm φ、能量分解能約140eV。 The individual nitride semiconductor epitaxial substrate was cleaved in the radial direction, and chips were sampled from the vicinity of the center of the main surface, and sliced by FIB (Focused Ion Beam) method to obtain a sample for measurement. This sample was observed by STEM (Scanning Through Electron Micromirror). The device used was JEM-ARM200F manufactured by JEOL Ltd., and the acceleration voltage was set to 200 kV. Further, the elemental analysis was carried out by an EDS measuring instrument (energy dispersive X-ray spectrometer) (JED-2300T) attached to the STEM used, and the measurement conditions were set to an acceleration voltage of 200 kV, a beam diameter of 0.1 nm φ, and energy decomposition energy. About 140eV.

[評價2~EDS分析] [Evaluation 2~EDS Analysis]

於上述STEM觀察後,針對電子供給層4/分隔層S/通道層3附近,在寬度20nm之範圍內於線上照射100點光束來進行EDS測定。光束間隔為0.2nm,每1點的測定時間為1秒。 After the STEM observation, the EDS measurement was performed by irradiating a 100-point light beam on the line in the vicinity of the electron supply layer 4/separator layer S/channel layer 3 over a width of 20 nm. The beam interval was 0.2 nm, and the measurement time per one point was 1 second.

此測定中為了特定出分隔層S之形態,係對於氮化物半導體磊晶基板之主面中央附近1點進行了取樣。基於MOCVD法之成膜由於成膜之精度高,故只取樣1點也足夠,但也可視必要性進而增加取樣數,例如,也可對距離外周10mm之內側追加2處,從合計3點來進行取樣。 In this measurement, in order to specify the form of the spacer layer S, one point near the center of the main surface of the nitride semiconductor epitaxial substrate was sampled. Since the film formation by the MOCVD method has high precision in film formation, it is sufficient to sample only one point. However, the number of samples may be increased depending on the necessity. For example, two places may be added to the inner side of the outer circumference of 10 mm, from a total of 3 points. Sampling.

[評價3~電子移動度] [Evaluation 3~Electronic mobility]

其次,針對和經過STEM觀察以及EDS分析為相同的氮化物半導體磊晶基板,基於van der Pauw法進行霍爾效應測定來評價電子移動度。一開始時係將基板切割為7mm見方之晶片,以真空蒸鍍於各個晶片之電子供給層4上之四處角落形成直徑0.25mm之Ti/Al電極。其次於N2氛圍以600℃、5分鐘進行合金化熱處理。然後,使用ACCENT製HL5500PC來進行霍爾效應測定。 Next, for the nitride semiconductor epitaxial substrate which was the same as the STEM observation and the EDS analysis, the Hall mobility measurement was performed based on the van der Pauw method to evaluate the electron mobility. Initially, the substrate was cut into 7 mm square wafers, and Ti/Al electrodes having a diameter of 0.25 mm were formed by vacuum evaporation at four corners on the electron supply layer 4 of each wafer. Next, alloying heat treatment was performed at 600 ° C for 5 minutes in an N 2 atmosphere. Then, the Hall effect measurement was performed using an ACCENT HL5500PC.

[評價4~電流崩潰] [Evaluation 4~ Current Crash]

電流崩潰特性之評價係以下述方式進行。首先,針對上述製作出之個別的評價用氮化物半導體磊晶基板,以乾式蝕刻來形成陷入閘極(recess gate)區域以及元件分離區域之溝槽,分別以真空蒸鍍而於電子供給層4側形成Au電極作為閘電極、形成Al電極作為源極以及汲極,此外於基底基板之內面側形成Al電極作為內面電極。然後, 在製作有HEMT元件之斷開狀態下對源極-汲極之間施佳某一定的直流電壓,從直流電壓施加前後之接通狀態之導通電流量之比來算出被稱為崩潰因子之常數。崩潰因子之值愈接近1.0表示元件之通電耗損愈小。崩潰因子為0.7至1.0之情況:良好,0.5至未達0.7之情況:略為不良,未達0.5之情況:不良。 The evaluation of the current collapse characteristics was carried out in the following manner. First, the nitride semiconductor epitaxial substrate for evaluation described above is formed by dry etching to form a trench that is trapped in the recess gate region and the element isolation region, and is vacuum-deposited on the electron supply layer 4, respectively. An Au electrode is formed as a gate electrode, an Al electrode is formed as a source and a drain, and an Al electrode is formed as an inner surface electrode on the inner surface side of the base substrate. then, In the off state in which the HEMT element is fabricated, a constant DC voltage is applied between the source and the drain, and a constant called a collapse factor is calculated from the ratio of the conduction current flow rate in the on state before and after the application of the DC voltage. . The closer the value of the crash factor is to 1.0, the smaller the power-on loss of the component. The case where the crash factor is 0.7 to 1.0: good, 0.5 to less than 0.7: slightly bad, less than 0.5: bad.

結果,實施例1之電子移動度在與比較例1的比較中係止於90%左右的降低,此可說是實用上不會成為太大問題之程度的差。另一方面,電流崩潰在實施例1為良好,在比較例1為略為不良。 As a result, the electron mobility of Example 1 was reduced by about 90% in comparison with Comparative Example 1, which is a difference in the extent that it would not be too much a problem in practical use. On the other hand, the current collapse was good in Example 1, and was slightly poor in Comparative Example 1.

依據上述結果可說實施例1兼顧了電子移動度提升效果與電流崩潰抑制效果。另一方面,比較例1相較於實施例1雖電子移動度大致同等以上,但電流崩潰抑制效果則差。 According to the above results, it can be said that the embodiment 1 takes into consideration the electron mobility improvement effect and the current collapse suppression effect. On the other hand, in Comparative Example 1, the electron mobility was substantially equal to or higher than that in Example 1, but the current collapse suppression effect was inferior.

由此可知,本發明之氮化物半導體磊晶基板可在不大幅損及電子移動度的前提下來有意義地得到電流崩潰抑制效果,故可說尤其可達成既希望儘量避免分隔層之插入所造成之不良影響又希望有某種程度的分隔層插入效果此種因應於個別要求的最佳化設計。 From this, it can be seen that the nitride semiconductor epitaxial substrate of the present invention can meaningfully obtain the current collapse suppressing effect without significantly impairing the electron mobility, and it can be said that it is particularly desirable to avoid the insertion of the spacer layer as much as possible. The adverse effects also hope to have a certain degree of separation effect, which is optimized for individual requirements.

Claims (2)

一種氮化物半導體磊晶基板,具備有如下之層結構:依序積層有通道層、分隔層以及電子供給層,前述通道層為GaN,前述分隔層為AlaGa1-aN(0<a<0.5),前述電子供給層為AlxInyGa1-x-yN(0<x+y≦1),前述分隔層之層厚為2分子層以下。 A nitride semiconductor epitaxial substrate having a layer structure in which a channel layer, a spacer layer, and an electron supply layer are sequentially laminated, wherein the channel layer is GaN, and the spacer layer is Al a Ga 1-a N (0<a <0.5) The electron supply layer is Al x In y Ga 1-xy N (0<x+y≦1), and the layer thickness of the separator layer is 2 molecules or less. 一種氮化物半導體高電子移動率電晶體,係使用有如請求項1所記載之氮化物半導體磊晶基板。 A nitride semiconductor high electron mobility transistor is a nitride semiconductor epitaxial substrate according to claim 1.
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