TW201839905A - Selective sidewall spacers - Google Patents

Abstract

Processing methods may be performed to form semiconductor structures that may include spacer materials on dielectric materials. The methods may include depositing a first dielectric material on a silicon element on a semiconductor substrate. The first dielectric material may be selectively deposited on the silicon element relative to exposed regions of a second dielectric material. The methods may also include selectively etching the silicon element from the semiconductor substrate.

Description

Selective sidewall spacer

This technology relates to semiconductor systems, processing, and equipment. More specifically, the present technology relates to systems and methods for selectively etching and selectively depositing layers of materials on a semiconductor device.

It is possible to fabricate an integrated circuit by processing a layer of intricately patterned material on the surface of the substrate. Producing a patterned material on a substrate requires a control method for removing the exposed material. Chemical etching is used for a variety of purposes, including transferring a pattern in a photoresist into a layer underneath, thinning a layer, or thinning the lateral dimension of a feature that has been rendered on a surface. It is generally desirable to have an etching process that etches one material faster than the other to facilitate, for example, pattern transfer processing or separate material removal. This etching process is said to be selective for the first material. Due to the variety of materials, circuits, and processes, etching processes have been developed that are selective for a variety of materials. However, the deposition process is typically performed using a blanket coating or conformal fill to continue across the substrate.

As device sizes continue to shrink in next-generation devices, selectivity can play a greater role when the material formed in a particular layer is only a few nanometers (especially when the material is critical in the formation of the transistor). Many different etch processing options have been developed between various materials, but standard selectivity may no longer be applicable to current and future device sizes. Moreover, based on the number of masking, forming, and removing operations required to form and protect the various critical dimensions of the features across the device, the processing time continues to increase while patterning and formation is performed elsewhere on the substrate.

Therefore, there is a need for an improved system and method that can be used to produce high quality devices and structures. This technology addresses these and other needs.

A processing method can be performed to form a semiconductor structure that can include spacer material on the dielectric material. The method can include the step of depositing a first dielectric material on the germanium component on the semiconductor substrate. The first dielectric material can be selectively deposited on the tantalum element relative to the exposed area of the second dielectric material. The method can also include the step of selectively etching the germanium component from the semiconductor substrate.

In some embodiments, the first dielectric material can include tantalum nitride. The deposition may include an atomic layer deposition process. The second dielectric material can be yttrium oxide or can include yttrium oxide. The method can also include the step of selectively recessing the first dielectric material around the germanium component. The recess can remove the top portion of the first dielectric material relative to the second dielectric material. The step of selectively etching the germanium element can be performed using a selectivity to the first dielectric material that is greater than or about 20:1. The step of selectively etching the germanium element can be performed using a selectivity to the second dielectric material that is greater than or about 100:1. The deposition of the first dielectric material can be performed using a selectivity of the germanium element that is greater than or about 2:1 relative to the second dielectric material. The first dielectric material can include spacers characterized by a width of less than 20 nm.

The techniques of this disclosure may also include a method of forming a semiconductor structure. The method can include the step of exposing the surface of the ruthenium containing component to an inhibitor. The method can include the steps of depositing an oxygen-containing material on the germanium-containing element extending from the semiconductor substrate. The oxygen-containing material can be selectively deposited on the germanium-containing element relative to the exposed areas of the mask layer on the substrate. The method can also include the step of selectively etching the oxygen-containing material from the tantalum element.

In some embodiments, the inhibitor can reduce the formation of oxygen-containing materials on the surface of the ruthenium containing component. The surface of the germanium containing component can be the top surface of the germanium containing component. The mask layer may include tantalum oxide or tantalum nitride. The method can also include the step of selectively recessing the oxygen-containing material around the germanium-containing element. The recess can remove the top portion of the oxygen-containing material relative to the mask layer. The step of selectively etching the germanium containing element can be performed using a selectivity to the oxygen containing material greater than or about 100:1. The step of selectively etching the germanium containing element can be performed using a selectivity to the mask layer greater than or about 20:1. Oxygen-containing material deposition can be performed using a selectivity of the germanium-containing element relative to the mask layer that is greater than or about 2:1. The oxygen containing material can include spacers characterized by a width of less than 20 nm.

Such techniques can provide many benefits over conventional systems and techniques. For example, processing can protect critical dimensions and provide improved selectivity by utilizing techniques that do not include reactive ion etching. Furthermore, by performing a selective operation, the spacer characteristics can be more uniform between the spacers, which can reduce pitch walking. These and other embodiments, as well as many of its advantages and features, are described in more detail in conjunction with the following description and accompanying drawings.

The techniques of the present invention include systems and components for semiconductor processing having small pitch characteristics. As the line pitch decreases, standard lithography processing may be limited and alternative mechanisms may be used in patterning. During one such patterning operation, a nitride spacer can be formed over the oxide surface. In one formation, a nitride layer is deposited over the dummy polysilicon line and over the pad oxide. In order to form a nitride spacer, an etching process is performed, and the nitride layer and the continuity of the polysilicon can be removed. To ensure that the nitride has been completely removed between the spacers, excessive corrosion is often performed. However, such a treatment may sputter the underlying pad oxide, which may redeposit along the sidewalls of the nitride spacer as a foot. If this foot is not removed, the line thickness between the core and the gap may be different, which may cause a pitch walk in subsequent processing. Conventional removal processes include reactive ion etching ("RIE") that can reduce the selectivity to many components. This may also cause the spacer material itself to be rounded and removed, which may further exacerbate the pitch walk when the spacer no longer has a uniform height, width, or other characteristics. Furthermore, when the material exposed to the RIE contains carbon (such as a low-k dielectric), the associated ashing process may remove carbon from the dielectric and reduce dielectric capability.

Conventional techniques have attempted to address these issues that may occur in many situations during manufacturing. For example, mandrel and sidewall spacer formation can be created in front and back processing (including self-aligned patterning, fin spacers, dummy gate spacers, and metallization, etc.). As each of these processes may further generate and cause spacer irregularities, improved processing including improved selectivity and improved spacer profile is needed.

The present technology overcomes these problems by performing a selective etch process in a particular device, and can be used to etch with higher selectivity than conventional RIE, which may allow for additional patterning that may not previously be possible. It operates and provides additional protection for critical feature sizes, such as thin spacer profiles. By performing a selective deposition operation in a particular equipment, surrounding features can be protected during spacer formation and mandrel removal. These processes can achieve reduced processing while creating a more uniform structure across the substrate.

While the remainder of the disclosure will routinely identify particular etching and deposition processes utilizing the disclosed techniques, it should be understood that the systems and methods are equally applicable to various other etching, deposition, and cleaning that may occur in the described chambers. deal with. Therefore, the technique should not be considered limited to the etching and deposition processes that can be used only. The present disclosure will discuss one possible system and chamber that can be used with the present technology to perform certain removal and deposition operations prior to the described operations of the exemplary processing sequences in accordance with the present technology.

FIG. 1 illustrates a top plan view of one embodiment of a processing system 100 having deposition, etching, baking, and curing chambers in accordance with an embodiment. In the drawings, a pair of front open pods (FOUPs) 102 are supplied with substrates of various sizes, which are received by robotic arms 104 and placed in a substrate processing chamber located in series sections 109a-c. Prior to one of 108a-f, it is placed into the low pressure holding area 106. The second robotic arm 110 can be used to transport substrate wafers from the holding area 106 to the substrate processing chambers 108a-f and back. In addition to cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), wet etching, pre-cleaning, degassing, orientation, and other substrate processing, Each of the substrate processing chambers 108a-f can be provided to perform a number of substrate processing operations including dry etching processes and selective deposition as described herein.

The substrate processing chambers 108a-f can include one or more system components for depositing, annealing, curing, and/or etching a dielectric film on a substrate wafer. In one configuration, two pairs of processing chambers (eg, 108c-d and 108e-f) can be used to deposit a dielectric material or metal-containing material on the substrate, while a third pair of processing chambers (eg, 108a-b) It can be used to etch the deposited dielectric. In another configuration, all three pairs of chambers (eg, 108a-f) can be configured to etch a dielectric film on the substrate. Any one or more of the processes described may be performed in a chamber separate from the manufacturing system shown in the different embodiments.

In some embodiments, the chamber specifically includes at least one etch chamber as described below and at least one deposition chamber as described below. All of the etching and deposition processes described below can be performed in a controlled environment by including these chambers in combination with the processing side of the factory interface. For example, the vacuum environment can be maintained on the processing side of the holding area 106 such that all of the chambers and transfers in the embodiment are maintained under vacuum. This also limits the contact of water vapor and other air components with the substrate being processed. It should be understood that system 100 can take into account additional configurations for dielectric films having deposition, etching, annealing, and curing chambers.

2A illustrates a cross-sectional view of an exemplary processing chamber system 200 having separate plasma generating regions within a processing chamber. During film etching (for example, titanium nitride, tantalum nitride, tungsten, cobalt, aluminum oxide, tungsten oxide, tantalum, polycrystalline germanium, antimony oxide, antimony nitride, antimony oxynitride, antimony oxyhydroxide, etc.), the process gas can pass The gas inlet assembly 205 flows into the first plasma region 215. A remote plasma system (RPS) 201 can optionally be included in the system and can process the first gas that subsequently travels through the gas inlet assembly 205. The inlet assembly 205 can include two or more different gas supply passages, wherein if a second passage (not shown) is included, the second passage can bypass the RPS 201.

A cooling plate 203, a panel 217, an ion suppressor 223, a showerhead 225, and a substrate support 265 having a substrate 255 disposed thereon are illustrated, and each may be included in accordance with an embodiment. The pedestal 265 can have a heat exchange channel through which the heat exchange fluid flows to control the temperature of the substrate, and the temperature of the substrate can be manipulated during processing operations to heat and/or cool the substrate or wafer. It is also possible to use an embedded resistive heater element while resistive heating a wafer support disk that may comprise aluminum, ceramic, or a combination of pedestals 265 to achieve relatively high temperatures, such as from up to or about 100 ° C to above or about 1100 ° C. .

Panel 217 may be pyramidal, conical, or other similar structure having a narrow top portion that extends to a wide bottom portion. Additionally, panel 217 may be flat and include a plurality of through passages for dispensing process gases, as shown. Depending on the use of the RPS 201, the plasma generating gas and/or the plasma exciting material may pass through a plurality of holes in the panel 217 as shown in FIG. 2B for more uniform delivery into the first plasma region 215.

An exemplary configuration may include passing gas inlet assembly 205 into gas supply region 258 separated by panel 217 from first plasma region 215 such that gas/substance flows through the holes in panel 217 into first plasma region 215. Structural and operational features may be selected to prevent large amounts of plasma from the first plasma region 215 from flowing back into the supply region 258, the gas inlet assembly 205, and the fluid supply system 210. The insulating ring 220 between the features is shown with the panel 217, or the electrically conductive top portion of the chamber and the showerhead 225, which allows the AC potential to be applied to the panel relative to the showerhead 225 and/or the ion suppressor 223 217. The insulating ring 220 can be positioned between the face plate 217 and the showerhead 225 and/or the ion suppressor 223 to enable capacitive coupling plasma (CCP) to be formed in the first plasma region. Additionally, a baffle (not shown) may be located in the first plasma region 215 or otherwise coupled to the gas inlet assembly 205 to affect the flow of fluid through the gas inlet assembly 205 into the region.

Ion suppressor 223 can include a plate or other geometry defining a plurality of pores throughout the structure, the plurality of pores configured to inhibit migration of ionically charged species exiting first plasma region 215 while allowing uncharged neutrality Or a radical species passes through ion suppressor 223 into the active gas delivery zone between the suppressor and the showerhead. In an embodiment, ion suppressor 223 can comprise a multiwell plate having various pore configurations. These uncharged species can include highly reactive species that are transported through the pores with less reactive carrier gas. As noted above, migration of ionic species through the pores may be reduced and, in some cases, completely inhibited. Controlling the amount of ionic species passing through ion suppressor 223 can advantageously provide increased control of the gas mixture in contact with the underlying wafer substrate, which in turn can increase control of deposition and/or etch characteristics of the gas mixture. For example, the adjustment of the ion concentration of the gas mixture can significantly change its etch selectivity, for example, SiNx: SiOx etch rate, Si: SiOx etch rate, and the like. In an alternative embodiment of performing deposition, the balance of conformal flow deposition of the dielectric material can also be translated.

The plurality of apertures in ion suppressor 223 can be configured to control the passage of reactive gases (i.e., ions, free radicals, and/or neutral species) through ion suppressor 223. For example, the aspect ratio of the holes, or the hole diameter to length ratio, and/or the geometry of the holes can be controlled such that the flow of ionically charged species in the reactive gas passing through the ion suppressor 223 is reduced. The holes in the ion suppressor 223 may include a tapered portion facing the plasma excitation region 215 and a cylindrical portion facing the showerhead 225. The cylindrical portion can be shaped and sized to control the flow of ionic species to the showerhead 225. An adjustable electrical bias can also be applied to the ion suppressor 223 as an additional means of controlling the flow of ionic species through the suppressor.

Ion suppressor 223 can be used to reduce or eliminate the amount of ionically charged species traveling from the plasma generating region to the substrate. Uncharged neutral and free radical species can still pass through the openings in the ion suppressor to react with the substrate. It should be noted that in an embodiment, complete elimination of the ionically charged species in the reaction zone surrounding the substrate may not be performed. In some cases, the ionic species are intended to reach the substrate to perform an etching and/or deposition process. In these cases, the ion suppressor can help control the concentration of ionic species in the reaction zone at the level that facilitates processing.

The showerhead 225 in combination with the ion suppressor 223 may allow plasma to be present in the first plasma region 215 to avoid direct excitation of gas in the substrate processing region 233 while still allowing the excited species to travel from the chamber plasma region 215. Go to substrate processing area 233. In this manner, the chamber can be configured to prevent plasma from contacting the substrate 255 in the etch. This can advantageously protect the various complex structures and films patterned on the substrate, and various complex structures and films can be damaged, displaced, or otherwise bent if directly in contact with the plasma produced. Furthermore, the rate at which the oxide species is etched may be increased when the plasma is allowed to contact the substrate or near the substrate level. Thus, if the exposed area of the material is an oxide, the material can be further protected by maintaining the plasma away from the substrate.

The processing system can further include a power supply 240 electrically coupled to the processing chamber to provide electrical power to the panel 217, the ion suppressor 223, the showerhead 225, and/or the pedestal 265 to be in the first plasma region 215 or Plasma is generated in the treatment zone 233. Depending on the processing performed, the power supply can be configured to deliver an adjustable amount of power to the chamber. Such a configuration may allow tunable plasma for processing in execution. Unlike a remote plasma unit that is typically presented with an on or off function, the tunable plasma can be configured to deliver a specific amount of power to the plasma region 215. This in turn may allow for the formation of specific plasma characteristics such that the precursors may be dissociated in a particular manner to enhance the etch profile created by these precursors.

The plasma may be excited in the chamber plasma region 215 above the showerhead 225 or the substrate processing region 233 below the showerhead 225. In an embodiment, the plasma formed in the substrate processing region 233 may be a DC bias plasma formed using a pedestal as an electrode. A plasma may be present in the chamber plasma region 215 to produce a free radical precursor from the influx of, for example, a fluorine-containing precursor or other precursor. Typically, an AC voltage in the radio frequency (RF) range can be applied between a conductive top portion of the processing chamber (such as panel 217) and showerhead 225 and/or ion suppressor 223 to excite the cavity during deposition. The plasma in the chamber plasma region 215. The RF power supply can produce a high RF frequency of 13.56 MHz, but other frequencies can be generated separately or combined with the 13.56 MHz frequency to produce other frequencies.

FIG. 2B illustrates a detailed view 253 of features affecting the distribution of process gases through panel 217. As shown in FIGS. 2A and 2B, panel 217, cooling plate 203, and gas inlet assembly 205 intersect to define a gas supply region 258, wherein process gas can be delivered from gas inlet 205 into gas supply region 258. The gas may fill the gas supply region 258 and flow through the apertures 259 in the panel 217 to the first plasma region 215. The apertures 259 can be configured to direct flow in a substantially unidirectional manner such that process gases can flow into the processing region 233, but can be partially or completely prevented from flowing back into the gas supply region 258 after passing through the panel 217.

A gas distribution assembly, such as showerhead 225 for processing chamber section 200, may be referred to as a dual channel showerhead (DCSH), and is additionally illustrated in detail in the embodiment illustrated in FIG. The dual channel showerhead can provide an etch process to allow separation of the etchant outside of the processing region 233 to provide limited interaction with the chamber components and each other prior to delivery to the processing region.

The showerhead 225 can include an upper plate 214 and a lower plate 216. The plates can be coupled to one another to define a volume 218 between the plates. The coupling of the plates can provide a first fluid passage 219 through the upper and lower plates and a second fluid passage 221 through the lower plate 216. The formed passageway can be configured to provide a fluid inlet and outlet from the volume 218 alone through the second fluid passage 221 through the lower plate 216, while the first fluid passage 219 can be fluidly isolated from the volume 218 between the plate and the second fluid passage 221. The volume 218 can be vented through one side of the gas distribution assembly 225.

Figure 3 is a bottom view of a showerhead 325 for use with a processing chamber, in accordance with an embodiment. The showerhead 325 can correspond to the showerhead 225 shown in FIG. 2A. The through holes 365 (the view of the first fluid passage 219 are illustrated) may have a plurality of shapes and configurations to control and influence the flow of the precursor through the showerhead 225. The small holes 375 (shown as a view of the second fluid passage 221) may be distributed substantially evenly over the surface of the showerhead (even in the through holes 365) and may help the precursor provide a ratio when leaving the showerhead. Other configurations are more evenly mixed.

Turning to FIG. 4, a schematic cross-sectional view of an atomic layer deposition system 400 or reactor in accordance with one or more embodiments of the present technology is illustrated. System 400 can include a load lock chamber 10 and a processing chamber 20. The processing chamber 20 can generally be a sealable outer casing that can be operated under vacuum or at least low pressure. The processing chamber 20 can be isolated from the load lock chamber 10 by an isolation valve 15. The isolation valve 15 can seal the process chamber 20 and the load lock chamber 10 in a closed position and can allow the substrate 60 to be transferred from the load lock chamber 10 through the valve to the process chamber 20 in the open position, and vice versa.

System 400 can include a gas distribution plate 30 that can dispense one or more gases across substrate 60. The gas distribution plate 30 can be any suitable distribution plate known to those skilled in the art, and the particular gas distribution plate should not be considered to limit the scope of the present technology. The output face of the gas distribution plate 30 may face the first surface 61 of the substrate 60.

The gas distribution plate 30 can include a plurality of gas crucibles and a plurality of vacuum crucibles, the plurality of gas crucibles configured to deliver one or more gas streams to the substrate 60, and a plurality of vacuum crucibles disposed between each gas crucible, And configured to deliver a flow of gas out of the processing chamber 20. As shown in FIG. 4, the gas distribution plate 30 can include a first precursor injector 420, a second precursor injector 430, and a purge gas injector 440. Syringe 420, injector 430, injector 440 can be controlled by a system computer (not shown), such as a host, or by a chamber specific controller, such as a programmable logic controller. The precursor injector 420 can be configured to inject a continuous or pulsed flow of the reaction precursor of Compound A through the plurality of gas helium 425 into the processing chamber 20. The precursor injector 430 can be configured to inject a continuous or pulsed flow of the reaction precursor of Compound B through a plurality of gas helium 435 into the processing chamber 20. The purge gas injector 440 can be configured to inject a continuous or pulsed flow of non-reactive or purge gas through the plurality of gas helium 445 into the processing chamber 20. The purge gas can be configured to remove reactive materials and reaction byproducts from the processing chamber 20. The purge gas is typically an inert gas such as nitrogen, argon, and helium. A gas crucible 445 may be disposed between the gas crucible 425 and the gas crucible 435 to separate the precursor of the compound B from the precursor of the compound A, thereby avoiding cross-contamination between the precursors.

In another aspect, a distal plasma source (not shown) can be coupled to the precursor injector 420 and the precursor injector 430 prior to injecting the precursor into the processing chamber 20. The plasma of the reactive species can be produced by applying an electric field to the compound in the remote plasma source. Any power source capable of activating the intended compound can be used. For example, power sources using DC, RF, and microwave-type discharge techniques can be used. If an RF power source is used, it can be capacitively or inductively coupled. Activation can also be produced by thermal based techniques, gas dissociation techniques, high intensity light sources such as ultraviolet light sources, or exposure to x-ray sources.

System 400 can further include a pumping system 450 coupled to processing chamber 20. The pumping system 450 can be generally configured to evacuate the gas stream out of the processing chamber 20 by one or more vacuum ports 455. A vacuum crucible 455 can be disposed between each gas crucible to evacuate the gas stream out of the processing chamber 20 after the gas stream reacts with the substrate surface and further limit cross-contamination between the precursors.

System 400 can include a plurality of partitions 460 disposed on processing chamber 20 and between each turn. The lower portion of each partition may extend proximate to the first surface 61 of the substrate 60 (eg, about 0.5 mm or more from the first surface 61). In this manner, the lower portion of the partition 460 can be separated from the surface of the substrate by a distance sufficient to allow the flow of gas to flow around the lower portion toward the vacuum crucible 455 after the gas stream reacts with the surface of the substrate. Arrow 498 indicates the direction of the gas flow. Since partition 460 is operable as a physical barrier to gas flow, partition 460 can also limit cross-contamination between precursors. The configurations shown are for illustrative purposes only and are not to be considered as limiting the scope of the technology. Those of ordinary skill in the art will appreciate that the gas distribution system shown is only one possible distribution system and that other types of showerheads can be employed.

In operation, the substrate 60 (such as by a robot) can be delivered to the load lock chamber 10 and can be placed on the shuttle 65. After the isolation valve 15 is opened, the shuttle 65 can move along the rail 70. Once the shuttle 65 enters the processing chamber 20, the isolation valve 15 can be closed to seal the processing chamber 20. The shuttle 65 can then be moved through the processing chamber 20 for processing. In one embodiment, the shuttle 65 can move through the chamber in a linear path.

As the substrate 60 moves through the processing chamber 20, the first surface 61 of the substrate 60 may be repeatedly exposed to the precursor of the compound A from the gas crucible 425 and the precursor of the compound B from the gas crucible 435 with gas from the gas crucible 445 Purge the gas. The injection of the purge gas can be designed to remove unreacted material from the previous precursor prior to exposing the substrate surface 61 to the next precursor. After each exposure to various gas streams, the gas stream can be evacuated by vacuum pumping 455 through vacuum pumping 455. Since a vacuum crucible can be placed on both sides of each gas crucible, the gas flow can be evacuated by vacuum crucibles 455 on both sides. Thus, the gas flow can flow from the individual gas crucibles vertically downward toward the first surface 61 of the substrate 60, across the first surface 410 and around the lower portion of the partition 460, and finally upward toward the vacuum crucible 455. In this way, each gas can be evenly distributed across the substrate surface 61. The substrate 60 can also be rotated while exposed to various gas streams. Rotation of the substrate can be useful to prevent strip formation in the formed layer. The rotation of the substrate can be a continuous or discrete step.

The extent to which the substrate surface 61 is exposed to each gas can be determined by, for example, the flow rate of each gas from the gas and the rate of movement of the substrate 60. In one embodiment, the flow rate of each gas can be configured without removing the absorbed precursor from the substrate surface 61. The width between each partition, the number of gas imperfections disposed on the processing chamber 20, and the number of times the substrate may be transferred back and forth may also determine the extent to which the substrate surface 61 is exposed to various gases. Therefore, the number and quality of deposited films can be optimized by varying the above factors.

In another embodiment, system 400 can include precursor injector 420 and precursor injector 430 without purge gas injector 440. Thus, as the substrate 60 moves through the processing chamber 20, the substrate surface 61 can be alternately exposed to the precursor of Compound A and the precursor of Compound B without being exposed to the purge gas therebetween.

The embodiment shown in Figure 4 has a gas distribution plate 30 above the substrate. While the embodiments have been described and illustrated with respect to this upright orientation, it should be understood that the opposite orientation is also possible. In that case, the first surface 61 of the substrate 60 may face downward, and the gas flowing toward the substrate may be directed upward. In one or more embodiments, at least one radiant heat source 90 can be positioned to heat the second side of the substrate.

In some embodiments, the shuttle 65 can be a base 66 for carrying the substrate 60. Generally, the pedestal 66 can be a carrier that helps to form a uniform temperature across the substrate. The pedestal 66 can be moved in both left-to-right and right-to-left directions between the load lock chamber 10 and the process chamber 20 with respect to the arrangement of FIG. The pedestal 66 can have a top surface 67 for carrying the substrate 60. The pedestal 66 can be a heated pedestal such that the substrate 60 can be heated for processing. As an example, the pedestal 66 can be heated by a radiant heat source 90 disposed below the susceptor 66, a heater plate, a resistive coil, or other heating device. Although illustrated as a lateral transition, embodiments of system 400 can also be used in a rotary system in which the wheel can be rotated clockwise or counterclockwise to continuously process one or more substrates located below the gas distribution system shown. It should be similarly understood that additional modifications are included in the present technology.

FIG. 5 illustrates a method 500 of forming a semiconductor structure in which a number of operations can be performed, for example, in the aforementioned chamber 200 and chamber 400. Method 500 can include one or more operations prior to initiating the method, including front end processing, deposition, etching, grinding, cleaning, or any other operation that can be performed prior to the operation. The method may include a plurality of selectable operations shown in the figures, which may or may not be particularly associated with methods in accordance with the present techniques. For example, many operations are described in order to provide a broader range of structure formation, but are not critical to the technology, or may be performed by alternative methods, which are discussed further below. Method 500 describes the operations illustrated schematically in Figures 6A-6C, which are described in conjunction with the operation of method 500. It should be understood that FIG. 6 is only a partial schematic view, and the substrate may include any number of transistor segments having the pattern shown in the figures.

Method 500 can involve operations performed on a substrate having a plurality of exposed regions, such as on a substrate that includes regions further developed to produce various structures as previously described. As shown in FIG. 6A, a portion of the processed substrate 600 including the dielectric material 605 and the germanium containing material 610 is illustrated. The cerium-containing material 610 can include various components (which can include placeholders or virtual components (including mandrels or spines)) for later metal filling. The germanium-containing material may have been formed first, such as by depositing and etching a mandrel of the material. For example, the depressions may have been performed in the chamber 200. The germanium containing material 610 may have been formed on the previously deposited dielectric material 605. The dielectric material 605 can be a substrate material or can be a layer covering the substrate (such as a mask layer or an etch stop layer).

The yttrium-containing material 610 can be characterized by a height above the dielectric material 605 and a thickness of the component. For example, the germanium-containing material 610 can extend over the dielectric material 605 by greater than or about 5 nm, and in various examples can extend over the dielectric material 605 to or about 10 nm, reach or about 25 nm, reach or about 50 nm, reach Or about 75 nm, reaching or about 100 nm, reaching or about 125 nm, reaching or about 150 nm, reaching or about 175 nm, reaching or about 200 nm, reaching or about 225 nm, reaching or about 250 nm, or higher. Height can also be any range within any of these ranges. The germanium-containing material 610 may also be less than or about 100 nm across the width of each element, and may be less than or about less than or about 90 nm, less than or about 80 nm, less than or about 70 nm, less than or about 60 nm, less than or about 50 nm in embodiments. 40 nm, less than or about 30 nm, less than or about 25 nm, less than or about 20 nm, less than or about 15 nm, less than or about 10 nm, less than or about 5 nm, or less.

The method 500 may initially include forming a first dielectric material 615 around the germanium-containing material 610 at operation 505. As shown in FIG. 6B, a first dielectric material 615 can be formed in the selective deposition, wherein the first dielectric material 615 can be preferred with respect to the exposed dielectric material 605 (which can be a second dielectric material). Formed on the cerium-containing material 610. Deposition can be performed in a chamber similar to chamber 400 described above.

At optional operation 510, etch back or removal of the first dielectric material 615 can be performed along the top surface of the germanium containing material 610. The etch back can be a chemical mechanical polishing operation, or can involve a chemical etch (such as a plasma enhanced etch process) to expose the ruthenium containing material 610. At operation 515, the germanium containing material 610 can be selectively removed around the first dielectric material 615. As shown in FIG. 6C, the germanium containing material 610 can be removed from the second dielectric material 605 and between the continuous first dielectric materials 615. The resulting structure can provide a continuous spacer element across the surface of the second dielectric material 605. By utilizing the methods discussed further below, the present technique can produce a more uniform spacer while minimizing damage to the underlying second dielectric material 605.

Several deposition and etching operations can be performed in a single environment (such as sharing with cluster tools between chambers). For example, an additional deposition chamber can be used with one or more etch chambers 200 and deposition chambers 400, such as can be used to fill second dielectric material 605. Each transfer can be done under vacuum, and each of the chambers can reside on the same cluster tool to allow the transfer to occur in a controlled environment. For example, vacuum conditions can be maintained during transfer and transfer can be performed without breaking the vacuum. The method 500 can be performed on a single tool with respect to conventional techniques that can include additional masking operations, lithography, and other operations that may require transfer between many tools, with vacuum conditions not being compromised in the embodiments. Moreover, method 500 may not utilize any RIE operation, which may reduce polymer buildup and the necessary ashing and cleaning operations associated with RIE. Due to the reduced selectivity, the RIE operation may also overetch the germanium containing material 610, which may cause the second dielectric material 605 to become cluttered.

The present technology can also produce a flat profile of the first dielectric material 615 compared to prior art. Due to the low selectivity of the RIE, it is also possible to round or etch the exposed top portion of the first dielectric material 615, which may result in a dissimilar profile of the first dielectric material. By using grinding or etching in accordance with the present technology, a flatter and uniform profile between the spacer and the spacer can be created. This etch can maintain the height of each individual spacer across the spacer and can produce a height variation of less than 10 nm across the spacer or spacer. Height variations may also be limited to less than or about 9 nm, less than or about 8 nm, less than or about 7 nm, less than or about 6 nm, less than or about 5 nm, less than or about 4 nm, less than or about 3 nm, less than or about 2 nm, less than or about 1 nm. Or a flat profile can be created substantially across the top of each spacer.

Various materials can be utilized in the process, while etching and deposition can be selective for multiple components. Thus, the present technology may not be limited to a single set of materials. For example, the germanium-containing material 610 can be germanium (such as polysilicon), and can also be other germanium-containing materials (including tantalum nitride) and other non-metals that can operate in the final structure (such as the footprint of subsequent materials). symbol). The second dielectric material 605 can be or include tantalum oxide, tantalum nitride, titanium nitride, but other insulating materials and masking materials can also be used. For example, other oxygenated, nitrogenous, or carbonaceous materials can be used. For example, the second dielectric material 605 can be a high quality dielectric such as a thermal oxide that can provide a relatively dense layer between other layers and materials. The first dielectric material 615 may also include an insulating material, and may include a germanium-containing material, a nitrogen-containing material, an oxygen-containing material, a carbonaceous material, or some combination of these materials (such as tantalum nitride, tantalum carbonitride, titanium oxide). , or other materials).

When the first dielectric material 615 includes carbon (such as having carbon ruthenium oxide or other low-k dielectric (eg, having a dummy gate spacer)), the present technology can include additional benefits over the prior art. The RIE process is then ashed and cleaned to remove polymer residue from the etched structure. The ashing operation also removes carbon from the exposed material when the exposed material also includes carbon or other materials that are sensitive to handling. This may remove carbon doping (such as in low-k dielectrics), which may increase the dielectric constant of the material, making the material unsuitable for the intended purpose, as well as affecting device performance and electrical resistance.

Since the second dielectric material 605 can be exposed during selective deposition of the first dielectric material 615, the second dielectric material 605 can be a different material than the first dielectric material in the embodiment, but in additional embodiments The two materials can be similar. Although different materials, both the first dielectric material 615 and the second dielectric material 605 may be one or more selected from the group consisting of carbonaceous materials, nitrogen-containing materials, and oxygen-containing materials. Material, and can be any of the above materials. However, the first dielectric material 615 may be a different material than the material used for the second dielectric material 605.

Selective deposition of the first dielectric material 615 can be performed in a chamber capable of deposition and capable of atomic layer deposition, including the chamber 400 described above. The deposition may be preset to selectively deposit an insulating material on the germanium containing material 610 relative to the dielectric material 605. For example, the first dielectric material 615 (which in some embodiments may be tantalum nitride, hafnium oxide, or some other oxide-containing material) may be formed substantially on the tantalum-containing material 610 (which may be tantalum), At the same time, it is formed at least on the second dielectric material 605 or is limited to the second dielectric material 605. Selective deposition can be performed by a variety of operations, which can include forming a self-assembled monolayer to facilitate selective deposition, or can include actively inhibiting the formation of a dielectric on other dielectric or semiconductor materials.

A self-assembled monolayer can be formed over the area of the structure to tune the deposition. For example, a first self-assembled monolayer can be formed over the structure and then exposed to a lithographic mask to remove a single layer from the ruthenium containing material 610. A single layer can be maintained over the second dielectric material 605. The monolayer may have a capping moiety that may or may not interact with the subsequently delivered precursor. For example, in embodiments, the capping moiety can be hydrophobic and can be capped with a hydrogen containing moiety, such as a methyl group, which can not interact with the additional precursor. A second self-assembled monolayer can be formed over the cerium-containing material 610, which can be hydrophilic or react with one or more precursors used to create the first dielectric material 615. The second self-assembled monolayer can be selectively formed over the ruthenium containing material 610 because the material can be repelled from the first self-assembled monolayer or can be selectively stretched to the component. The second self-assembled monolayer can be capped with a hydroxyl or other hydrophilic moiety, or partially capped with an additional precursor that interacts specifically with the first dielectric material 615.

Atomic layer deposition can then be performed using two or more precursors to develop the first dielectric material 615. The deposited precursor can include a metal-containing or ruthenium-containing precursor and includes a precursor configured to interact with a portion of the capped second self-assembled monolayer (rather than the first self-assembled monolayer). For example, when a hydrophilic and hydrophobic capping monolayer is used, one of the atomic layer deposition precursors can include water. In this way, deposition may not be formed on the first self-assembled monolayer which may be hydrophobic. If the first dielectric material comprises a metal oxide such as titanium oxide, the precursor for atomic layer deposition may include a titanium-containing precursor or some other metal-containing material and water. In other embodiments, a ruthenium containing precursor may be used in place of the metal containing material. Then, during a half reaction with water, water may not interact with the first self-assembled monolayer formed over the second dielectric material 605, and thus the deposition may not be formed over the first self-assembled monolayer. In this manner, the first dielectric material 615 can be selectively formed over the germanium containing material 610.

After the first dielectric material 615 has been formed to a suitable height, the first self-assembled monolayer may be exposed to UV light and removed from the substrate, or some other removal may be made. Thus, the first self-assembled monolayer may be formed directly after selective etching of the germanium containing material 610, or after transfer to an additional chamber but prior to additional processing operations. In this way, multiple operations used in conventional formations can be eliminated, which can significantly reduce the queue time (such as several hours). In other embodiments, a slight depression may be performed after selective deposition to remove residual material from the second dielectric material 605, depending on the operation performed. It should be understood that this is merely an example of utilizing a self-assembled monolayer based on a set of deposited materials. Additional materials that can be used as an alternative precursor are discussed further below.

Embodiments may also utilize an inhibitor to selectively form the first dielectric material 615 over the germanium containing material 610 while not forming the first dielectric material 615 over the second dielectric material 605 or forming a limited formation on the dielectric material 605. The amount. For example, an inhibitor may be applied across the surface of the dielectric material, which may not be applied, or may be removed from the cerium-containing material 610. Inhibitors can also be applied across the longitudinal surface while maintaining a clean vertical surface, which can allow for the formation of materials that are selective for vertical surfaces alone. The inhibitor can be any number of materials, and the material can be characterized by a siloxane backbone (such as a decane) or a tetrafluoroethylene backbone (such as PTFE), as well as other oily or surfactant materials. Material may be applied across the surface of the substrate to cover the exposed portions of the dielectric material 605.

The inhibitor material can prevent adhesion or adsorption of materials that can be normally formed or deposited on the ruthenium containing material 610. A first dielectric material 615 is then formed and a remover can be applied to the substrate to remove the inhibitor material. The remover can be a wet etchant, a reactant, or a surfactant cleaner that can remove residual inhibitor material that exposes the underlying dielectric material 605 or the top surface of the ruthenium containing material 610. The use of an inhibitor may allow for the formation of a first dielectric material in a defined region that does not need to be defined by subsequent patterning and/or etching of the blanket film. By removing the previous and subsequent patterning operations, the processing can further reduce the queue time of conventional processing.

The inhibitor may also be the product of a plasma application that can neutralize the surface of the substrate or render the surface of the substrate inert. For example, the modified plasma can be formed from one or more precursors, which can include an inert precursor. The plasma may be applied to the surface of the substrate, which may alter the top surface of the tantalum containing material 610 or the second dielectric material 605, but this may not affect the vertical surface of the tantalum containing material 610. For example, a nitrogen-containing precursor (which may be nitrogen) can be delivered to the plasma processing zone of the processing chamber that produces the plasma. The plasma effluent (which may include a nitrogen-containing plasma effluent) may be delivered to the substrate and a nitrided surface may be formed along the exposed portion of the top surface along the cerium-containing material 610.

The plasma effluent may not be delivered downward (or may not flow down) to the level of the second dielectric material 605. The first dielectric material 615 can then be formed using one or more deposition techniques, which can include atomic layer deposition or other vapor or physical deposition. An additional barrier mechanism can also be applied to the second dielectric material relative to the sidewalls of the ruthenium containing material 610, which can enable deposition along only or predominantly along the sidewalls of the ruthenium containing material 610. For example, the plasma effluent can be subsequently processed using atomic layer deposition techniques. After each cycle of deposition, the nitrogen-containing plasma can be reapplied to the surface area of the substrate (such as above the germanium containing material 610). In this manner, the surface of the ruthenium containing material 610 can be passivated to prevent or limit the formation of the first dielectric material 615 overlying the regions. Utilizing these plasma effluents on the non-recessed portions of the substrate may allow for the formation of a cap material in the defined regions that need not be defined by subsequent patterning and/or etching of the blanket film. By removing the previous and subsequent patterning operations, the processing can further reduce the queue time of conventional processing.

Additional selective deposition techniques may also be used, which may include an alternative mechanism for selectively depositing a dielectric material, such as a nitrogen-containing material. For example, the nitrogen-containing material can serve as one of the self-assembled monolayers on the material to be deposited (such as one of the capped portions of the monolayer), which can allow for attraction to form the previously described materials. Specific precursor of one or more of them. Yet another technique can utilize temperature differences to enhance deposition on the crucible relative to the cerium oxide. For example, atomic layer deposition using a hafnium-containing precursor and a nitrogen-containing precursor can be performed at temperatures above or about 500 ° C, and can be above or about 750 ° C, above or about 900 ° C, above. It can be carried out at a temperature of about 1000 ° C, or at, above, or at about 1100 ° C.

As the temperature increases within this range, deposition can occur on the crucible at a higher rate than on the tantalum oxide. A selective etch of nitrogen can then be performed to remove the first dielectric material from the yttrium oxide surface. Although the first dielectric material can also be reduced on the surface of the crucible, since the thickness can be many times thicker than on the hafnium oxide, complete removal from the hafnium oxide can be performed while maintaining the thickness on the niobium-containing material 610 greater than or about 1 nm, greater than or about 2 nm, greater than or about 3 nm, greater than or about 4 nm, greater than or about 5 nm, greater than or about 6 nm, greater than or about 7 nm, greater than or about 8 nm, greater than or about 9 nm, greater or about 10 nm, or greater. . This effect may enable the present technology to implement a manner that is limited by the prior art. During normal conformal or blanket deposition, portions of the fin element will have a thickness equal to the thickness on the oxide layer. Thus, the etch back process can even utilize directional etching to expose at least a portion of the fin elements.

Any of these techniques may selectively deposit or form a dielectric or insulating material over the germanium containing material 610 relative to one or more non-metal, dielectric, or insulating regions. In addition, combinations can also be utilized to adjust the formation. For example, the inhibitor can be applied to the top surface of the ruthenium containing material 610, or the top surface can be rendered inert, and then a self-assembled monolayer can be used for the sidewalls of the ruthenium containing material 610 and the second dielectric material 605. Other combinations of the described techniques are also available and are also included in the present technology. The selectivity may be complete, that is, the first dielectric material is formed only over the germanium-containing material 610 or the intermediate layer, and the first dielectric material 615 may not be formed entirely over the second dielectric material 605.

In other embodiments, the selectivity may not be complete, and the ratio of deposition on the germanium containing material 610 to deposition on the dielectric material 605 may be greater than about 2:1. The selectivity may also be greater than or about 5:1, greater than or about 10:1, greater than or about 15:1, greater than or about 20:1, greater than or about 25:1, greater than or about 30:1, greater than or about 35. : 1. greater than or about 40:1, greater than or about 45:1, greater than or about 50:1, greater than or about 75:1, greater than or about 100:1, greater than or about 200:1, or more. As previously mentioned, depending on the structure produced, the deposited thickness on the cerium-containing material 610 can be less than or about 20 nm, less than or about 10 nm, less than or about 5 nm, or less. Thus, a selectivity below 20:1 may be acceptable to completely deposit the first dielectric material 615 while forming a limited amount of material over the second dielectric material 605 or substantially no material formation.

The deposition operation can be performed at any of the foregoing temperatures or pressures, and can be performed at temperatures greater than or about 300 ° C, and can be greater than or about 400 ° C, greater than or about 450 ° C, greater than or about 500 ° C, greater than or about Execution is carried out at a temperature of 600 ° C, greater than or about 700 ° C, greater than or about 800 ° C, greater than or about 900 ° C, greater than or about 1000 ° C, or higher. For example, during an atomic layer deposition operation, a temperature greater than or about 500 °C can be used to activate the precursors to interact with one another as the material layers are formed.

Etch or recess operations 510 and 515 may be selective etch operations as previously described, although operation 510 may not be performed depending on the selectivity of the deposition or deposition technique being performed. Additionally, grinding, such as chemical mechanical polishing, can be performed to expose the top surface of the cerium-containing material 610. The dielectric material can be recessed from the germanium containing material or mandrel in an etch chamber similar to the chamber 200 previously described. Once positioned within the processing region of the semiconductor processing chamber, the method can include forming a plasma of the fluorine-containing precursor in the distal plasma region of the processing chamber. The distal plasma region can be fluidly coupled to the processing region, but can be physically separated to confine the plasma at the substrate level, which can damage the exposed structure or material. The effluent of the plasma can flow into the processing zone where the effluent of the plasma can contact the semiconductor substrate and selectively etch the material.

The two etching operations can involve additional precursors along with a particular fluorine-containing precursor. In some embodiments, nitrogen trifluoride can be used to produce a plasma effluent. Additional or alternative fluorine precursors may also be utilized. For example, the fluorine-containing precursor can flow into the distal plasma region, and the fluorine-containing precursor can include a solvent selected from the group consisting of atomic fluorine, diatomic fluorine, bromine trifluoride, carbon tetrafluoride, chlorine trifluoride, and trifluoride. At least one precursor of the group consisting of nitrogen, hydrogen fluoride, sulfur hexafluoride, and antimony difluoride. The distal plasma zone can be in a different module than the processing chamber or in a compartment within the processing chamber. As shown in FIG. 2, both the RPS unit 201 and the first plasma region 215 can serve as a distal plasma region. The RPS can allow the plasma effluent to dissociate without damaging other chamber components, while the first plasma region 215 can provide a shorter path length to the substrate during which recombination can occur.

Additional precursors can also be delivered to the remote plasma region to enhance the fluorine-containing precursor. For example, during etching of the germanium-containing material, etching may be performed selectively on the germanium relative to the germanium oxide (which may be the second dielectric material 605). For example, a carbon or hydrogen containing precursor or hydrogen precursor can be delivered with a fluorine-containing precursor. For example, the additional precursor can also be a fluorine-containing precursor (such as fluoromethane). Precursors containing hydrogen or carbon and hydrogen may be included to maintain a specific H:F atomic ratio of the plasma effluent. In an embodiment, etching may be performed using an H:F ratio greater than one, which may provide increased selectivity to germanium relative to the dielectric material described above. The H:F atomic flow ratio can be maintained to be greater than or about 25:1, and in embodiments can be maintained at greater than or about 30:1, or greater than or about 40:1, which can be adjusted by adjusting the fluorine-containing precursor. The relative flow rate of the hydrogen-containing precursor is controlled.

This treatment can selectively etch 矽 with respect to yttrium oxide and tantalum nitride by a ratio greater than or about 70:1. In the disclosed embodiments, the etch selectivity can also be greater than or about 100:1, greater than or about 150:1, greater than or about 200:1, greater than or about 250:1, or greater than or about 300:1. The first dielectric material 615 and the second dielectric material 605 may be substantially or substantially maintained during the removal operation. In embodiments where the first dielectric material 615 or the second dielectric material 605 comprises titanium nitride or titanium oxide, the etch selectivity of ruthenium relative to the exposed metal-containing material may be greater than or about 100 in the disclosed embodiments. : 1. greater than or about 150:1, greater than or about 200:1, greater than or about 250:1, greater than or about 500:1, greater than or about 1000:1, greater than or about 2000:1, or greater than or about 3000. :1. In this manner, the mandrel or other niobium containing material 610 can be completely removed with or without substantial removal of other exposed materials on the substrate.

Selective etching of the first dielectric material 615 relative to the dielectric material 605 can be performed to remove residual first dielectric material 615 (if present), and similar or different precursors used elsewhere can be used. For example, although the material may be any material as previously described, in an embodiment, the first dielectric material 615 may be tantalum nitride or include tantalum nitride, and the dielectric material 605 may be tantalum oxide or include Yttrium oxide. The selective etching of tantalum nitride relative to tantalum oxide may utilize a fluorine-containing precursor as previously described, and may also include an oxygen-containing precursor. The oxygenated precursor can be delivered to the distal plasma zone along with the fluoride precursor, or the oxygenated precursor can be bypassed to the distal plasma zone for direct delivery into the processing zone.

In some embodiments, the first dielectric material etch operation may not include a hydrogen-containing precursor during etching and may be performed in a hydrogen-free environment. The operation can selectively etch tantalum nitride with respect to yttria using a selectivity greater than or about 20:1, and the tantalum nitride can be etched with a selectivity greater than or about 30:1. Since the amount of removable first dielectric material 615 can be less than or about 10 nm, less than or about 5 nm, or less, an etch rate of less than or about 20:1 can still sufficiently remove the first dielectric material. Without substantially damaging the dielectric material 605. The etching may also be selective to tantalum nitride relative to tantalum, which may be the underlying tantalum-containing material 610. The selectivity may be greater than or about 10:1, which may allow all of the remaining first dielectric material 615 to be removed without substantially damaging the germanium containing material 610, but when subsequent operations involve removal of the germanium containing material 610 Etching these materials can be acceptable.

In an embodiment, the etching operation can be performed below about 10 Torr, and in embodiments can be performed below or about 5 Torr. In embodiments, the treatment may also be performed at temperatures below about 100 °C and may be performed below about 50 °C. As performed in the chamber 200 or a variation of this chamber, or in a different chamber capable of performing similar operations, the process may be selective to the second dielectric material 605 to remove the first dielectric material 615 part. These operations may also be selective to the first dielectric material 615 and the second dielectric material 605 to remove portions of the germanium containing material 610.

Although in some embodiments, the present technology can perform etch back of the deposited tantalum nitride to remove any residual nitride from the surface of the dielectric material 605 and/or the top surface of the germanium containing material 610, but The thickness of the first dielectric material 615 on the sidewalls of the material 610 can be at least twice the thickness of the thickness of the first dielectric material 615 on the dielectric material 605 and/or on the top surface of the germanium containing material 610. Thus, the etch back process can completely remove the residual first dielectric material 615 on the dielectric material 605 while maintaining the complete coating on the sidewalls of the germanium containing material 610 to any thickness previously described. In this manner, the present technology can create substantially or substantially uniform spacers over the dielectric material that have minimal or no removal from the forming process. Moreover, for the processing of the first dielectric material 615 comprising carbon, the described process can result in a better structure than conventional techniques using RIE, and can remove carbon from the processing operation.

In the previous description, numerous details have been set forth in order to provide an understanding of various embodiments of the present invention. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

The invention has been described in terms of a number of modifications, alternative constructions, and equivalents, which can be used in the art without departing from the spirit of the embodiments. Moreover, many of the known processes and elements are not described in order to avoid unnecessarily obscuring the present technology. Therefore, the above description should not be taken as limiting the scope of the technology.

Where a range of values is provided, it is to be understood that unless the context clearly dictates otherwise, each intermediate value between the upper and lower limits of the Any narrower range between any stated or un recited intermediate value in the range and any other stated or intermediate value in the range. The upper and lower limits of these smaller ranges may be independently included in the range or excluded, and each of the smaller ranges including one or both of the upper and lower limits and the upper and lower limits are also included in the present technology. Depending on the limits specifically excluded from the stated range. Where the stated range includes one or two limitations, the scope of the one or both of the

The singular forms "a", "an" and "the" Thus, for example, reference to "a" or "an" or "an" or "an"

In addition, the words "including", "including", "including", "including", "including", and "including" are used in the specification and the following claims. The existence of a component, or operation, does not exclude the presence or addition of one or more other features, components, components, operations, acts, or groups.

10‧‧‧Loading lock chamber

15‧‧‧Isolation valve

20‧‧‧Processing chamber

30‧‧‧ gas distribution board

60‧‧‧Substrate

61‧‧‧ first surface

65‧‧‧ Shuttle

70‧‧‧ Track

90‧‧‧radiation heat source

100‧‧‧Processing system

102‧‧‧Front open wafer cassette

104‧‧‧Machine arm

106‧‧‧holding area

108a‧‧‧Processing chamber

108b‧‧‧Processing chamber

108c‧‧‧Processing chamber

108d‧‧‧Processing chamber

108e‧‧‧Processing chamber

108f‧‧‧Processing chamber

109a‧‧‧Series section

109b‧‧‧Series section

109c‧‧‧Series section

110‧‧‧Second robotic arm

200‧‧‧ chamber

201‧‧‧RPS unit

203‧‧‧Cooling plate

205‧‧‧ gas inlet assembly

210‧‧‧Fluid Supply System

214‧‧‧Upper board

215‧‧‧First plasma area

216‧‧‧ Lower board

217‧‧‧ panel

218‧‧‧ volume

219‧‧‧First fluid passage

220‧‧‧Insulation ring

221‧‧‧Second fluid channel

223‧‧‧Ion suppressor

225‧‧‧Sprinkler

233‧‧‧Substrate processing area

240‧‧‧Power supply

253‧‧‧Detailed view

255‧‧‧Substrate

258‧‧‧ gas supply area

259‧‧‧ pores

265‧‧‧ pedestal

325‧‧‧Sprinkler

365‧‧‧through hole

375‧‧‧Small holes

400‧‧‧ chamber

420‧‧‧Syringe

425‧‧‧ gas 埠

430‧‧‧Syringe

435‧‧‧ gas 埠

440‧‧‧Syringe

445‧‧‧ gas 埠

450‧‧‧ pumping system

455‧‧‧vacuum

460‧‧‧ partition

498‧‧‧ arrow

500‧‧‧ method

505‧‧‧ operation

510‧‧‧ operation

515‧‧‧ operation

600‧‧‧Substrate

605‧‧‧Second dielectric material

610‧‧‧Inorganic materials

615‧‧‧First dielectric material

A further understanding of the nature and advantages of the disclosed technology can be realized by reference to the description and the accompanying drawings.

FIG. 1 illustrates a top plan view of an exemplary processing system in accordance with an embodiment of the present technology.

2A illustrates a schematic cross-sectional view of an exemplary processing chamber in accordance with an embodiment of the present technology.

2B illustrates a detailed view of an exemplary panel in accordance with an embodiment of the present technology.

FIG. 3 illustrates a bottom plan view of an exemplary showerhead in accordance with an embodiment of the present technology.

FIG. 4 illustrates a schematic cross-sectional view of an exemplary processing chamber in accordance with an embodiment of the present technology.

FIG. 5 illustrates selected operations in a method of forming a semiconductor structure in accordance with an embodiment of the present technology.

6A through 6E illustrate schematic cross-sectional views of an exemplary substrate in accordance with an embodiment of the present technology.

Several of the figures are included as schematics. It should be understood that the drawings are for illustrative purposes only and should not be construed as a In addition, the drawings are provided as a schematic diagram to aid understanding, and may not include all aspects or information as compared to the actual representation, and may include exaggerated materials for illustrative purposes.

Similar components and/or features may have the same component symbols in the accompanying drawings. Furthermore, various components of the same type may be distinguished by the use of letters after the component symbols to distinguish similar components. If only the foremost component symbol is used in the specification, the description applies to any similar component having the same topmost component symbol, regardless of the letter.

Domestic deposit information (please note according to the order of the depository, date, number)

Foreign deposit information (please note in the order of country, organization, date, number)

Claims (20)

A method of forming a semiconductor structure, the method comprising the steps of: depositing a first dielectric material on a germanium element on a semiconductor substrate, wherein the exposed region of the first dielectric material relative to a second dielectric material And selectively depositing on the germanium component; and selectively etching the germanium component from the semiconductor substrate. A method of forming a semiconductor structure according to claim 1, wherein the first dielectric material comprises tantalum nitride. A method of forming a semiconductor structure according to claim 1, wherein the depositing step comprises an atomic layer deposition process. A method of forming a semiconductor structure according to claim 1, wherein the second dielectric material comprises ruthenium oxide. The method of forming a semiconductor structure according to claim 1, further comprising the step of selectively recessing the first dielectric material around the germanium element. A method of forming a semiconductor structure according to claim 5, wherein the recessing step removes a top portion of the first dielectric material relative to the second dielectric material. A method of forming a semiconductor structure according to claim 1, wherein the step of selectively etching the germanium element is performed using a selective of greater than or about 20:1 for the first dielectric material. A method of forming a semiconductor structure according to claim 7, wherein the step of selectively etching the germanium element is performed using a selective of the second dielectric material greater than or about 100:1. A method of forming a semiconductor structure as recited in claim 1, wherein the depositing of the first dielectric material is performed using a selectivity of the germanium element relative to the second dielectric material that is greater than or about 2:1. A method of forming a semiconductor structure according to claim 1, wherein the first dielectric material comprises a spacer characterized by a width of less than 20 nm. A method of forming a semiconductor structure, the method comprising the steps of: exposing a surface of a germanium-containing component to an inhibitor; depositing an oxygen-containing material on the germanium-containing component extending from a semiconductor substrate, wherein the oxygen-containing material The material is selectively deposited on the germanium-containing component relative to an exposed region of a mask layer on a substrate; and the oxygen-containing material is selectively etched from the germanium component. A method of forming a semiconductor structure according to claim 11, wherein the inhibitor reduces formation of the oxygen-containing material on the surface of the germanium-containing element. A method of forming a semiconductor structure according to claim 12, wherein the surface of the germanium containing element is a top surface of the germanium containing element. A method of forming a semiconductor structure according to claim 11, wherein the mask layer comprises hafnium oxide or tantalum nitride. The method of forming a semiconductor structure according to claim 11, further comprising the step of selectively recessing the oxygen-containing material around the germanium-containing element. A method of forming a semiconductor structure according to claim 15 wherein the recessing step removes a top portion of the oxygen-containing material relative to the mask layer. A method of forming a semiconductor structure according to claim 11 wherein the step of selectively etching the germanium containing element is performed using a selective selectivity to the oxygen containing material of greater than or about 100:1. A method of forming a semiconductor structure as recited in claim 17, wherein the step of selectively etching the germanium-containing component is performed using a selective of the mask layer greater than or about 100:1. A method of forming a semiconductor structure according to claim 11 wherein the deposition of the oxygen-containing material is performed using a selectivity of the germanium-containing element relative to the mask layer of greater than or about 2:1. A method of forming a semiconductor structure according to claim 11, wherein the oxygen-containing material comprises a spacer characterized by a width of less than 20 nm.