TW201826565A - Optoelectronic device and method for manufacturing the same - Google Patents

Abstract

An optoelectronic device including a first semiconductor layer having at least four boundaries, a first side and a second side opposite to the first side, wherein any two adjacent boundaries forms a corner, a second semiconductor layer formed on the first side of the first semiconductor layer, a second conductivity type electrode formed on the second semiconductor layer, and at least two first conductivity type electrodes formed on the first side of the first semiconductor layer, wherein the two first conductivity type electrodes are separated and forms a design pattern.

Description

Photoelectric element and method of manufacturing same

This invention relates to a photovoltaic element, and more particularly to an electrode design for a photovoltaic element.

The principle of light-emitting diode (LED) is to use energy difference between the n-type semiconductor and the p-type semiconductor to release energy in the form of light. This principle of illumination is different from incandescent lamps. The principle of heat generation, so the light-emitting diode is called a cold light source. In addition, the light-emitting diode has the advantages of high durability, long life, light weight, low power consumption, etc., so the current lighting market has high hopes for the light-emitting diode, and it is gradually replaced as a new generation of lighting tools. Light source, and is used in various fields, such as traffic signs, backlight modules, street lighting, medical equipment, etc.

1 is a schematic view showing the structure of a conventional light-emitting element. As shown in FIG. 1, a conventional light-emitting element 100 includes a transparent substrate 10, a semiconductor laminate 12 on a transparent substrate 10, and at least one electrode 14 located in the semiconductor. On the stack 12, the semiconductor stack 12 includes at least a first conductive semiconductor layer 120, an active layer 122, and a second conductive semiconductor layer 124 from top to bottom.

In addition, the above-described light-emitting element 100 can be further combined with other elements to form a light-emitting apparatus. 2 is a schematic view showing the structure of a conventional light-emitting device. As shown in FIG. 2, a light-emitting device 200 includes a sub-mount 20 having at least one circuit 202; at least one solder 22 is located in the above-mentioned sub-carrier 20, the light-emitting element 100 is bonded and fixed to the secondary carrier 20 by the solder 22, and the substrate 10 of the light-emitting element 100 is electrically connected to the circuit 202 on the secondary carrier 20; and an electrical connection structure 24 is Electrically connecting the electrode 14 of the light-emitting element 100 with the circuit 202 on the secondary carrier 20; wherein the secondary carrier 20 can be a lead frame or a large mounting substrate to facilitate the circuit of the light-emitting device 200. Plan and improve its cooling performance.

A photovoltaic element comprising: a first semiconductor layer having at least four boundaries, a first surface, and a second surface opposite to the first surface, wherein any two adjacent boundaries may form a corner; a second semiconductor a layer is formed on the first surface of the first semiconductor layer; a second electrical electrode is formed on the second semiconductor layer; and at least two first electrical electrodes are formed on the first surface of the first semiconductor layer Wherein the at least two first electrical electrodes are separated from one another and form a design.

The present invention discloses a light-emitting element and a method of manufacturing the same. In order to make the description of the present invention more detailed and complete, please refer to the following description and cooperate with the drawings of FIGS. 3A to 7.

3A and 3B are a top view and a side view showing the photovoltaic element 300 of the first embodiment of the present invention. Fig. 3B is a side view showing the structure of the A-B-C direction in Fig. 3A. The photovoltaic element 300 has a substrate 30. The substrate 30 is not limited to a single material, and may be a composite substrate in which a plurality of different materials are combined. For example, the substrate 30 may include two first substrates (not shown) and a second substrate (not shown) that are bonded to each other.

Forming an epitaxial layer 31 on the substrate 30 by a conventional epitaxial growth process, the first semiconductor layer 311 includes a first surface 3111 and a second surface 3112 opposite to the first surface, and an active layer 312 is formed. A first semiconductor layer 311 is formed over the first surface 3111, and a second semiconductor layer 313 is formed over the active layer 312. Then, a portion of the epitaxial layer is selectively removed by a yellow light lithography process to expose a portion of the first semiconductor layer 311 at the boundary of the photovoltaic element 300, and a trench S is formed in the photovoltaic element 300. In an embodiment, the trench S exposes a portion of the first semiconductor layer 311 and is surrounded by the second semiconductor layer 313. In an embodiment, the trench S is an elongated strip in the upper view.

Next, a first insulating layer 341 is deposited on the surface of the epitaxial layer 31 of the photovoltaic element 300 and the sidewall of the trench S by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

Next, at least one first first electrical electrode 321 is formed on the first semiconductor layer 311 exposed beside the boundary of the photovoltaic element 300. In one embodiment, the first first electrical electrode 321 is not surrounded by the second semiconductor layer 313, and a second first electrical electrode 322 is formed in the trench S. In this embodiment, the separated first first electrical electrode 321 and second first electrical electrode 322 form an electrode design of the first electrical electrode.

In an embodiment of the invention, the electrode design pattern may include the selection of the number of electrodes, the shape of the electrodes, and the position of the electrodes to enhance current spreading of the photovoltaic elements near the boundary regions. For example, the electrode design of the first electrical electrode may include one or more first first electrical electrodes 321 and one or more second first electrical electrodes 322, and the second first electrical electrode 322 The upper view is surrounded by the second semiconductor layer 313 and is extended.

In one embodiment, the first semiconductor layer 311 of the photovoltaic element 300 has at least four boundaries, and adjacent two boundaries may form a corner without a conductive structure crossing the boundary. In the present embodiment, the first first electrical electrodes 321 are formed at two corners on the same boundary of the photovoltaic element 300, separated from each other and not across the boundary of the photovoltaic element 300.

In an embodiment, the projection of the first first electrical electrode 321 on the first semiconductor layer 311 may have a pattern, which may be a polygon, a circle, an ellipse, a half circle, or a circle. Curved surface. The second first electrical electrode 322 may be linear, curved, linear and curved, or may have at least one branch. In an embodiment, the second first electrical electrode 322 can have a head end and a tail end, and the head end has a width greater than a width of the tail end.

Next, a second electrical electrode 33 is formed on the second semiconductor layer 313. In one embodiment, the ratio of the projected area of the second electrical electrode 33 to the surface area of the second semiconductor layer 311 is between 90 and 100%.

Then, a second insulating layer 342 is formed on the first first electrical electrode 321, the second first electrical electrode 322, the second electrical electrode 33, and a portion of the first insulating layer 341. The second insulating layer 342 may have a first opening 3421 for electrically connecting the second electrical electrode 33 to the subsequently formed fourth electrode 36. The second insulating layer 342 may also have a second opening 3422 as the first A first electrical electrode 321 is electrically connected to the subsequently formed third electrode 35. In an embodiment, the first insulating layer 341 or the second insulating layer 342 may completely cover the exposed first semiconductor layer 311.

In an embodiment, the first insulating layer 341 or the second insulating layer 342 may be a transparent insulating layer. The material of the first insulating layer 341 or the second insulating layer 342 may be an oxide, a nitride, or a polymer, and the oxide may include aluminum oxide (Al 2 O 3 ), cerium oxide (SiO 2 ), titanium oxide (TiO 2 ), Tantalum Pentoxide (Ta2O5) or alumina (AlOx); the nitride may comprise aluminum nitride (AlN), tantalum nitride (SiNx); the polymer may comprise polyimide or benzo ring A material such as benzocyclobutane (BCB) or a combination of the above. In an embodiment, the first insulating layer 341 or the second insulating layer 342 may be a Bragg Reflector structure.

Finally, a third electrode 35 is formed on the second insulating layer 342, the first first electrical electrode 321, and the second first electrical electrode 322, and the first first electrical electrode 321 and the second first The electrical electrodes 322 are electrically connected to each other; and a fourth electrode 36 is formed on the second insulating layer 342 and the second electrical electrode 33 and electrically connected to the second electrical electrode 33. In one embodiment, the ratio of the projected area of the third electrode 35 and the fourth electrode 36 on the first semiconductor layer 311 is from 80 to 100% from above.

In an embodiment, the third electrode 35 may cover only a portion of the first first electrical electrode 321; in another embodiment, the third electrode 35 may not cover the first first electrical electrode 321 at all.

In one embodiment, the upper edge of the third electrode 35 has a height H1 to the upper edge of the substrate 30, the upper edge of the fourth electrode 36 has a height H2 to the upper edge of the substrate 30, and H1 is substantially equal to H2. In one embodiment, the difference between H1 and H2 is less than 5-10%. By adjusting the difference between H1 and H2, the probability of disconnection of the flip-chip structure of the photovoltaic element 300 with the carrier or circuit component can be reduced, thereby increasing the yield of the product. In one embodiment, the boundary of the third electrode 35 has a minimum distance D1 from the boundary of the fourth electrode 36, and D1 is greater than 50 μm. In one embodiment, D1 may be 50-200 μm, 100-200 μm.

In an embodiment, the first first electrical electrode 321 , the second first electrical electrode 322 , the second electrical electrode 33 , the third electrode 35 , and the fourth electrode 36 may have a multi-layer structure, and/or A reflective layer (not shown) is included, and the light emitted from the active layer 312 has a reflectance of 80% or more. In an embodiment, the first first electrical electrode 321, the second first electrical electrode 322, and the third electrode 35 may also be formed in the same process. In an embodiment, the light emitted by the photovoltaic element 300 can be reflected by the first first electrical electrode 321, the second first electrical electrode 322, the second electrical electrode 33, the third electrode 35, or the fourth electrode 36. The photovoltaic element 300 is separated from the direction of the substrate 30.

The material of the first first electrical electrode 321 , the second first electrical electrode 322 , the second electrical electrode 33 , the third electrode 35 , and the fourth electrode 36 is preferably metal, for example, in order to achieve a certain degree of electrical conductivity. For example, gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), etc., alloys or Its laminated combination.

In one embodiment, a carrier or a circuit component (not shown) may be provided, and a first carrier electrode (not shown) and a first carrier electrode (not shown) are formed on the carrier or circuit component by wire bonding or soldering. The second carrier electrode (not shown). The first carrier electrode and the second carrier electrode can form a flip-chip structure with the third electrode 35 and the fourth electrode 36 of the photovoltaic element 300.

In an embodiment, a first adjustment layer (not shown) may be formed between the first first electrical electrode 321 and/or the second first electrical electrode 322 and the third electrode 35, and the electrical The first first electrical electrode 321 and/or the second first electrical electrode 322 and the third electrode 35 are connected. In an embodiment, a second adjustment layer (not shown) is formed between the second electrical electrode 33 and the fourth electrode 36, and is electrically connected to the second electrical electrode 33 and the fourth electrode 36. In this embodiment, the first adjustment layer and the second adjustment layer respectively have a height, and because the positions of the first adjustment layer and the second adjustment layer are formed, the heights of the first adjustment layer and the second adjustment layer are affected. The height of H1 and H2 above. Therefore, by separately designing the formation heights of the first adjustment layer and/or the second adjustment layer, the height difference between H1 and H2 can be reduced, and the subsequent formation of the flip-chip structure of the photovoltaic element 300 with the carrier or circuit component can be reduced. Line probability, which in turn increases product yield. In one embodiment, the projected area of the first adjustment layer on the first semiconductor layer 311 is larger than the projected area of the third electrode 35 on the first semiconductor layer 311, or the projection of the second adjustment layer on the first semiconductor layer 311. The area is larger than the projected area of the fourth electrode 36 on the first semiconductor layer 311. In an embodiment, the material of the first adjustment layer or the second adjustment layer is preferably, for example, a metal such as gold (Au), silver (Ag), copper (Cu), chromium (Cr), aluminum (Al), Platinum (Pt), nickel (Ni), titanium (Ti), tin (Sn), etc., alloys thereof or a combination thereof. In an embodiment, the first adjustment layer or the second adjustment layer may be a multi-layer structure, and/or include a reflective layer (not shown), and may have a reflection of more than 80% of the light emitted from the active layer 312. rate.

Fig. 3C is a top view showing the photovoltaic element 400 of the second embodiment of the present invention. The manufacturing method, the materials used, the reference numerals, and the like in the embodiment are the same as those in the first embodiment described above, and are not described herein again. In an embodiment of the invention, the electrode design profile may include selection of the number of electrodes, electrode shape, and electrode position to enhance current spreading of the photovoltaic element 400 near the boundary region.

In one embodiment, the first semiconductor layer 311 of the photovoltaic element 400 has at least four boundaries, and adjacent two boundaries may form a corner without a conductive structure crossing the boundary. In this embodiment, the first first electrical electrode 321 is formed on any corner of the first semiconductor layer 311, and the second insulating layer 342 can have a second opening 3422 as the first first electrical electrode. The 321 is electrically connected to the subsequently formed third electrode 35. The second first electrical electrode 322 is formed on the first semiconductor layer 311 and surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a third opening 3423 as the second first electrical electrode. 322 is electrically connected to the subsequently formed third electrode 35.

In this embodiment, the projection of the first first electrical electrode 321 on the first semiconductor layer 311 may have a pattern, wherein the graphic may be a polygon, a circle, an ellipse, a half circle, or a Arc surface. The second first electrical electrode 322 is extended and may have a shape of a line, an arc, a line and an arc, or may have at least one branch. In an embodiment, the second first electrical electrode 322 can have a head end and a tail end, and the head end can have a width greater than a width of the tail end.

In the present embodiment, the third first electrical electrode 323 is formed over the first semiconductor layer 311 exposed by the boundary of the photovoltaic element 400. In an embodiment, the third first electrical electrode 323 is not surrounded by the second semiconductor layer 313, and the second insulating layer 342 has a fourth opening 3424 as the third first electrical electrode 323 and the subsequent formation. The three electrodes 35 are electrically connected. The fourth first electrical electrode 324 is formed over the first semiconductor layer 311 exposed by the boundary of the photovoltaic element 400. In an embodiment, the fourth first electrical electrode 324 is not surrounded by the second semiconductor layer 313, and the second insulating layer 342 has a fifth opening 3425 as the fourth first electrical electrode 324 and the subsequent formation. The three electrodes 35 are electrically connected.

In this embodiment, the projection of the third first electrical electrode 323 on the first semiconductor layer 311 may have a pattern, wherein the graphic may be a polygon, a circle, an ellipse, a half circle, or a Arc surface. The shape of the fourth first electrical electrode 324 may be linear, curved, linear and curved, or may have at least one branch. In an embodiment, the fourth first electrical electrode 324 can have a head end and a tail end, and the head end can have a width greater than a width of the tail end. In an embodiment, the third first electrical electrode 323 and the fourth first electrical electrode 324 are different in shape.

In an embodiment, the first first electrical electrode 321 and the third first electrical electrode 323 may be formed beside the same boundary of the photovoltaic element 400 and separated from each other according to the requirements of the product design. In one embodiment, the first first electrical electrode 321 and the fourth first electrical electrode 324, or the third first electrical electrode 323 and the fourth first electrical electrode 324 are not formed in the same photocell 400. Next to the border.

In an embodiment, the head end of the fourth first electrical electrode 324 may be covered by the third electrode 35, and the tail end of the fourth first electrical electrode 324 is not covered by the fourth electrode 36. In this embodiment, the projected area of the third electrode 35 on the first semiconductor layer 311 is larger than the projected area of the fourth electrode 36 on the first semiconductor layer 311, and the third electrode 35 and the fourth electrode 36 are on the first semiconductor. The ratio of the projected area on layer 311 is between 110 and 120%. In one embodiment, the ends of the second first electrical electrode 322 and the fourth first electrical electrode 324 extend substantially parallel to each other.

Fig. 4A is a top view showing the photovoltaic element 500 of the third embodiment of the present invention. The manufacturing method, the materials used, the reference numerals, and the like in the embodiment are the same as those in the first embodiment described above, and are not described herein again. In an embodiment of the invention, the electrode design pattern may include selection of the number of electrodes, electrode shape, and electrode position to enhance current spreading of the photovoltaic element 500 near the boundary region.

In this embodiment, the four boundaries of the photovoltaic element 500 form a rectangle, and adjacent two boundaries may form a corner without a conductive structure crossing the boundary. The boundary has a first long side B1 and a second long side B3. a first short side B2 and a second short side B4. In an embodiment, the length of the first long side B1 or the second long side B3 is greater than the first short side B2 or the second short side B4. In this embodiment, the projections of the third electrode 35 and the fourth electrode 36 on the first semiconductor layer 311 are arranged along the first long side B1 or the second long side B3.

In this embodiment, two first first electrical electrodes 321 separated from each other are formed on two corners of the first short side B2, and the second insulating layer 342 may also have a second opening 3422 as The first first electrical electrode 321 is electrically connected to the subsequently formed third electrode 35. The two fourth first electrical electrodes 324 are respectively located on the first semiconductor layer 311 exposed by the boundary between the first long side B1 and the second long side B3. In this embodiment, the third first electrical electrode 323 is formed on the first short side B2, and the second insulating layer 342 may also have a fourth opening 3424 as the third first electrical electrode 323 and The subsequently formed third electrode 35 is electrically connected. The fourth first electrical electrode 324 is not surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a third opening 3423 to be electrically connected as the fourth first electrical electrode 324 and the subsequently formed third electrode 35. For sexual connections.

In one embodiment, the distance between the third first electrical electrode 323 and the two first first electrical electrodes 321 is substantially equal. In addition, the first first electrical electrode 321, the fourth first electrical electrode 324, and the third electrode 35 may be formed in the same process.

In this embodiment, the projection of the first first electrical electrode 321 on the first semiconductor layer 311 may have a pattern in which the graphic is a polygon, a circle, an ellipse, a half circle, or an arc. surface. The projection of the third first electrical electrode 323 on the first semiconductor layer 311 may have a pattern in which the pattern is a polygon, a circle, an ellipse, a half circle or a circular arc surface. The fourth first electrical electrode 324 is elongated, and may be linear, curved, linear and curved, or may have at least one branch. In one embodiment, the fourth first electrical electrode 324 has a head end and a tail end, and the head end may have a width greater than a width of the tail end. In an embodiment, the third first electrical electrode 323 and the fourth first electrical electrode 324 are different in shape.

In an embodiment, the head end of the fourth first electrical electrode 324 is directed to the first short side B2 and the tail end is directed to the second short side B4. In an embodiment, the front end of the fourth first electrical electrode 324 can be covered by the third electrode 35, and the tail end of the fourth first electrical electrode 324 is not covered by the fourth electrode 36. In one embodiment, the ends of the two fourth first electrical electrodes 324 extend substantially parallel to each other. In this embodiment, the projected area of the third electrode 35 on the first semiconductor layer 311 is larger than the projected area of the fourth electrode 36 on the first semiconductor layer 311; and the third electrode 35 and the fourth electrode 36 are on the first semiconductor. The ratio of the projected area on layer 311 is between 110 and 120%.

Fig. 4B is a top view showing the photovoltaic element 600 of the fourth embodiment of the present invention. The manufacturing method, the materials used, the reference numerals, and the like in the embodiment are the same as those in the first embodiment described above, and are not described herein again. In an embodiment of the invention, the electrode design pattern may include the selection of the number of electrodes, the shape of the electrodes, and the position of the electrodes to enhance current spreading of the photovoltaic element 600 near the boundary region.

In the present embodiment, the four boundaries of the photovoltaic element 600 form a rectangle, and adjacent two boundaries may form a corner without a conductive structure crossing the boundary. The photoelectric element 600 has a first long side B1, a second long side B3, a first short side B2 and a second short side B4. In an embodiment, the length of the first long side B1 or the second long side B3 is greater than the first short side B2 or the second short side B4. In this embodiment, the projections of the third electrode 35 and the fourth electrode 36 on the first semiconductor layer 311 are arranged along the first long side B1 or the second long side B3.

In this embodiment, at least one first first electrical electrode 321 is included. In one embodiment, four first first electrical electrodes 321 may be formed on four corners of the first semiconductor layer 311, and the second insulating layer 342 may also have a second opening 3422 as the first An electrical electrode 321 is electrically connected to the subsequently formed third electrode 35. Two second first electrodes 321 are formed on the first semiconductor layer 311 and surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a third opening 3423 as the second first The electrode 322 is electrically connected to the subsequently formed third electrode 35.

In this embodiment, the projection of the first first electrical electrode 321 on the first semiconductor layer 311 may have a pattern in which the graphic is a polygon, a circle, an ellipse, a half circle, or an arc. surface. The projection of the second first electrical electrode 322 on the first semiconductor layer 311 may have a pattern in which the pattern is a polygon, a circle, an ellipse, a half circle, or a circular arc surface. In an embodiment, the projected shapes of the two second first electrodes 322 on the first semiconductor layer 311 may be the same or different.

In the present embodiment, the third electrode 35 includes two extending portions 351, and the two extending portions 351 can substantially form a notch R, and the fourth electrode 36 is located in the notch R. In addition, the first first electrical electrode 321, the second first electrical electrode 322, and the third electrode 35 may be formed in the same process.

Fig. 4C is a top view showing the photovoltaic element 700 of the fifth embodiment of the present invention. The manufacturing method, the materials used, the reference numerals, and the like in the embodiment are the same as those in the first embodiment described above, and are not described herein again. In an embodiment of the invention, the electrode design pattern may include the selection of the number of electrodes, the shape of the electrodes, and the position of the electrodes to enhance current spreading of the photovoltaic element 700 near the boundary region.

In one embodiment, the first semiconductor layer 311 of the photovoltaic element 700 has at least four boundaries, and adjacent two boundaries may form a corner without a conductive structure crossing the boundary. In this embodiment, four first first electrical electrodes 321 are formed on four corners of the first semiconductor layer 311, and the second insulating layer 342 may also have a second opening 3422 as The first first electrical electrode 321 is electrically connected to the subsequently formed third electrode 35. A plurality of second first electrical electrodes 322 are formed on the first semiconductor layer 311 and surrounded by the second semiconductor layer 313, and the second insulating layer 342 may also have a fourth opening 3424 as the second first electrical The electrode 322 is electrically connected to the subsequently formed third electrode 35. A plurality of third first electrical electrodes 323 are formed over the first semiconductor layer 311 exposed by the boundary of the photovoltaic element 700. In other words, the third first electrical electrode 323 is not surrounded by the second semiconductor layer 313, and one or more third first electrical electrodes 323 may be included beside any of the boundaries of the first semiconductor layer 311. The second insulating layer 342 can have a third opening 3423 to be electrically connected to the subsequently formed third electrode 35 as the second first electrical electrode 322.

In this embodiment, the projection of the first first electrical electrode 321 on the first semiconductor layer 311 may have a pattern in which the graphic is a polygon, a circle, an ellipse, a half circle, or an arc. surface. The projection of the second first electrical electrode 322 on the first semiconductor layer 311 may have a pattern in which the pattern is a polygon, a circle, an ellipse, a half circle, or a circular arc surface. In an embodiment, the shape of the second first electrical electrode 322 may be extended, and the extending direction thereof may be parallel to the extending direction of the extending portion 351. The second first electrical electrode 322 may be linear, curved, linear and curved, or may have at least one branch. In one embodiment, the projected areas of the plurality of second first electrical electrodes 322 on the first semiconductor layer 311 may be the same or different. The projection of the third first electrical electrode 323 on the first semiconductor layer 311 may have a pattern in which the pattern is a polygon, a circle, an ellipse, a half circle or a circular arc surface.

In this embodiment, the third electrode 35 includes three extending portions 351, and the three extending portions 351 can form two notches R, and the two fourth electrodes 36 can be formed in the two notches R. . In this embodiment, at least one second first electrical electrode 322 may be formed in the extension portion 351.

In one embodiment, the projection shapes of the first first electrical electrode 321, the second first electrical electrode 322, and the third first electrical electrode 323 on the first semiconductor layer 311 may be the same or different. In addition, the first first electrical electrode 321, the second first electrical electrode 322, the third first electrical electrode 323, and the third electrode 35 may be formed in the same process.

Fig. 4D is a top view showing the photovoltaic element 700' of the sixth embodiment of the present invention. The embodiment is a possible variation of the fifth embodiment, and the manufacturing method, the material used, the electrode design, the reference numerals, and the like are the same as those in the fifth embodiment, and are not described herein again.

In the present embodiment, the second insulating layer 342 of the photovoltaic element 700' has a plurality of first openings 3421' for electrically connecting the second electrical electrodes 33 to the subsequently formed fourth electrodes 36. In the embodiment, the second insulating layer 342 has a plurality of first openings 3421, which can reduce the difference in height between the third electrode 35 and the fourth electrode 36, and reduce the probability of disconnection of the flip-chip structure with the carrier or the circuit component. , thereby increasing product yield.

5A to 5C are schematic views showing a light emitting module, and FIG. 5A is a perspective view showing an external light emitting module. The light emitting module 800 can include a carrier 502, a photoelectric component (not shown), and a plurality of Lenses 504, 506, 508 and 510, and two power supply terminals 512 and 514. The lighting module 800 can be connected to the lighting unit 540 described later.

5B-5C is a cross-sectional view showing a light-emitting module 800, wherein FIG. 8C is an enlarged view of the E region of FIG. 8B. The carrier 502 can include an upper carrier 503 and a download body 501, wherein a surface of the download body 501 can be in contact with the upper carrier 503. Lenses 504 and 508 are formed over upper carrier 503. The upper carrier 503 can form at least one through hole 515, and the photovoltaic element 300 formed according to the embodiment of the present invention or a photoelectric element (not shown) of other embodiments can be formed in the through hole 515 and contact with the download body 501, and The glue 521 is surrounded. There is a lens 508 on the rubber material 521, wherein the material of the rubber material 521 can be silicone resin, epoxy resin or other materials. In one embodiment, a reflective layer 519 may be formed on both sidewalls of the via 515 to increase light extraction efficiency; a metal layer 517 may be formed on the lower surface of the download body 501 to improve heat dissipation efficiency.

6A-6B is a schematic diagram 900 of a light source generating device. A light source generating device 900 can include a light emitting module 800, a light emitting unit 540, and a power supply system (not shown) for supplying a current to the light emitting module 800. And a control component (not shown) for controlling the power supply system (not shown). The light source generating device 900 can be a lighting device, such as a street light, a lamp or an indoor lighting source, or a backlight source of a backlight module in a traffic sign or a flat display.

Figure 7 is a schematic view of a light bulb. The bulb 1000 includes a housing 921, a lens 922, a lighting module 924, a bracket 925, a heat sink 926, a series of junctions 927 and an electrical connector 928. The illumination module 924 includes a carrier 923 and includes at least one of the photovoltaic elements 300 of the above embodiment or other embodiments of the photovoltaic elements (not shown) on the carrier 923.

Specifically, the substrate 30 is a growth and/or load bearing foundation. The candidate material may comprise a conductive substrate or a non-conductive substrate, a light transmissive substrate or an opaque substrate. One of the conductive substrate materials may be germanium (Ge), gallium arsenide (GaAs), indium phosphate (InP), tantalum carbide (SiC), germanium (Si), lithium aluminate (LiAlO2), zinc oxide (ZnO). , gallium nitride (GaN), aluminum nitride (AlN), metal. One of the transparent substrate materials may be sapphire, lithium aluminate (LiAlO2), zinc oxide (ZnO), gallium nitride (GaN), glass, diamond, CVD diamond, and diamond-like carbon (Diamond-Like Carbon; DLC), spinel (MgAl2O4), alumina (Al2O3), yttrium oxide (SiOX) and lithium gallate (LiGaO2).

The epitaxial layer stack 31 includes a first semiconductor layer 311, an active layer 312, and a second semiconductor layer 313. The first semiconductor layer 311 and the second semiconductor layer 313 are, for example, a cladding layer or a confinement layer, and may be a single layer or a multilayer structure. The first semiconductor layer 311 and the second semiconductor layer 313 are different in electrical conductivity, polarity or dopant, and the electrical selection may be a combination of at least two of p-type, n-type, and i-type, and may be separately provided. Electrons and holes are used to combine electrons and holes in the active layer 312 to emit light. The material of the first semiconductor layer 311, the active layer 312, and the second semiconductor layer 313 may comprise a III-V semiconductor material such as AlxInyGa(1-xy)N or AlxInyGa(1-xy)P, where 0≦x, y ≦1; (x+y)≦1. According to the material of the active layer 312, the epitaxial stack can emit red light with a wavelength between 610 nm and 650 nm, green light with a wavelength between 530 nm and 570 nm, and wavelengths between 450 nm and 490 nm. Blue light, or ultraviolet light with a wavelength of less than 400 nm.

In another embodiment of the present invention, the photovoltaic element 300, 400, 500, 600, 700, 700' may be an epitaxial element or a light emitting diode, and the light emission spectrum thereof may be changed by changing the epitaxial stacked monolayer. Or multiple layers of physical or chemical elements to adjust. The single or multiple layer epitaxial laminate may be selected from the group consisting of aluminum (Al), gallium (Ga), indium (In), phosphorus (P), nitrogen (N), zinc (Zn), and oxygen (O). Group. The structure of the active layer 312 is, for example, a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-layer quantum well (multi- Quantum well; MQW) structure. Furthermore, adjusting the logarithm of the active layer 312 quantum well can also change the wavelength of the emission.

In an embodiment of the invention, a buffer layer (not shown) may be selectively included between the first semiconductor layer 311 and the substrate 30. This buffer layer is interposed between the two material systems to "transition" the material system of substrate 30 to the material system of first semiconductor layer 311. For the structure of the light-emitting diode, on the one hand, the buffer layer is used to reduce the material layer of the lattice mismatch between the two materials. On the other hand, the buffer layer may also be a single layer, a plurality of layers or a structure for combining two materials or two bifurcation structures, such as organic materials, inorganic materials, metals, and semiconductors; The selected structure is: reflective layer, thermally conductive layer, conductive layer, ohmic contact layer, anti-deformation layer, stress release layer, stress adjustment layer, bonding layer, wavelength Conversion layer, mechanical fixing structure, etc. In an embodiment, the material of the buffer layer may be selected from aluminum nitride or gallium nitride, and the buffer layer may be formed by sputtering or atomic layer deposition (ALD).

A contact layer (not shown) is more selectively formed between the second semiconductor layer 313 and the second electrical electrode 33. In particular, the contact layer can be an optical layer, an electrical layer, or a combination of both. The optical layer can alter the electromagnetic radiation or light from or into the active layer. As used herein, "change" refers to altering at least one optical property of electromagnetic radiation or light, including but not limited to frequency, wavelength, intensity, flux, efficiency, color temperature, rendering index, light field. (light field), and angle of view. The electrical layer may cause at least one of the voltage, resistance, current, and capacitance of the opposite side of the contact layer to change or change in value, density, or distribution. The constituent material of the contact layer comprises an oxide, a conductive oxide, a transparent oxide, an oxide having a transmittance of 50% or more, a metal, a relatively light-transmissive metal, a metal having a transmittance of 50% or more, an organic substance, At least one of an inorganic substance, a phosphor, a phosphor, a ceramic, a semiconductor, a doped semiconductor, and an undoped semiconductor. In some applications, the material of the contact layer is at least one of indium tin oxide, cadmium tin oxide, antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide. In the case of a relatively light-transmitting metal, the thickness thereof is preferably about 0.005 μm to 0.6 μm.

The above figures and descriptions are only corresponding to specific embodiments, however, the elements, embodiments, design criteria, and technical principles described or disclosed in the various embodiments are inconsistent, contradictory, or difficult to implement together. In addition, we may use any reference, exchange, collocation, coordination, or merger as required. Although the invention has been described above, it is not intended to limit the scope of the invention, the order of implementation, or the materials and process methods used. Various modifications and variations of the present invention are possible without departing from the spirit and scope of the invention.

100, 200, 300, 400, 500, 600, 700, 700'‧‧‧Lighting elements

10‧‧‧Transparent substrate

12‧‧‧Semiconductor laminate

14, E1, E2‧‧‧ electrodes

30‧‧‧Substrate

31‧‧‧ epitaxial stack

311‧‧‧First semiconductor layer

312‧‧‧Active layer

313‧‧‧Second semiconductor layer

S‧‧‧ Ditch

341‧‧‧First insulation

342‧‧‧Second insulation

3421‧‧‧ first opening

3422‧‧‧ second opening

3423‧‧‧ third opening

3424‧‧‧fourth opening

3425‧‧‧ fifth opening

321‧‧‧First first electrical electrode

322‧‧‧Second first electrical electrode

323‧‧‧The third first electrical electrode

324‧‧‧fourth first electrical electrode

33‧‧‧Second electrical electrode

35‧‧‧ third electrode

B1‧‧‧First long side

B3‧‧‧Second long side

B2‧‧‧First short side

B4‧‧‧Second short side

351‧‧‧Long extension

R‧‧‧ notch

36‧‧‧fourth electrode

800‧‧‧Lighting module

501‧‧‧Download

502‧‧‧ Carrier

503‧‧‧carrier

504, 506, 508, 510‧‧ lens

512, 514‧‧‧ power supply terminal

515‧‧‧through hole

519‧‧‧reflective layer

521‧‧‧ glue

540‧‧‧ Shell

900‧‧‧Light source generating device

1000‧‧‧Light bulb

721‧‧‧Shell

722‧‧‧ lens

724‧‧‧Lighting module

725‧‧‧ bracket

726‧‧‧ radiator

727‧‧‧ tandem

728‧‧‧Electrical connector

ABC‧‧ Direction

D1‧‧‧ distance

H1, H2‧‧‧ height

Figure 1 is a block diagram showing a side view of a conventional array of photovoltaic elements;

Figure 2 is a schematic view showing the structure of a conventional light-emitting device;

3A is a structural diagram showing a top view of a photovoltaic element unit according to an embodiment of the present invention;

3B is a structural view showing a side view of a photovoltaic element unit according to an embodiment of the present invention;

3C is a structural diagram showing a top view of a photovoltaic element unit according to another embodiment of the present invention;

4A-4D is a structural diagram showing a top view of a photovoltaic element unit according to another embodiment of the present invention;

5A-5C are schematic views showing a light emitting module;

6A-6B are diagrams showing a light source generating device; and

Figure 7 is a schematic view of a light bulb.

Claims (10)

A photovoltaic element comprising: an epitaxial stack comprising a first semiconductor layer, an active layer formed on the first semiconductor layer, and a second semiconductor layer formed on the active layer; a trench exposed to the first One portion of a semiconductor layer is surrounded by the second semiconductor layer; one or more boundaries expose another portion of the first semiconductor layer; one or a plurality of first first electrical electrodes are formed in the one or more a second portion of the first semiconductor layer exposed on the other portion of the first semiconductor layer; a second first electrode is formed on the portion of the first semiconductor layer exposed by the trench; a second electrical electrode is formed On the second semiconductor layer; and a third electrode is formed on the first first electrical electrode, the second first electrical electrode, and the second electrical electrode. The photovoltaic device according to claim 1, wherein the projection of the first first electrical electrode and the second first electrical electrode on the first semiconductor layer comprises a pattern from above The graphic contains a polygon, a circle, an ellipse or a half circle. The photovoltaic device according to claim 1, wherein the first first electrical electrode and the second first electrical electrode have the same projection on the first semiconductor layer from above. shape. The photovoltaic element according to claim 1, wherein the plurality of first first electrical electrodes are separated from each other. The photovoltaic device of claim 1, further comprising a first adjustment layer between the first first electrical electrode and/or the second first electrical electrode and the third electrode The projection area of the first adjustment layer on the first semiconductor layer is larger than the projected area of the third electrode on the first semiconductor layer. The photovoltaic device of claim 1, further comprising a fourth electrode formed on the second electrical electrode; and a second adjustment layer between the second electrical electrode and the fourth electrode, The projected area of the second adjusting layer on the first semiconductor layer is larger than the projected area of the fourth electrode on the first semiconductor layer. The photovoltaic element according to claim 6, wherein the third electrode and the fourth electrode have a minimum distance greater than 50 μm. The photovoltaic element according to claim 1, wherein the plurality of first first electrical electrodes are respectively formed on the plurality of boundaries. The photovoltaic device of claim 1, further comprising a fourth electrode formed on the second electrical electrode, wherein the third electrode comprises a recess, and the fourth electrode is located at the third electrode In the recess, a projected area of the third electrode on the first semiconductor layer is larger than a projected area of the fourth electrode on the first semiconductor layer. The photovoltaic device according to claim 1, further comprising a fourth electrode formed on the second electrical electrode; and a Bragg mirror between the fourth electrode and the second electrical electrode.