TW201822375A - Treating apparatus of semiconductor substrate - Google Patents

Treating apparatus of semiconductor substrate Download PDF

Info

Publication number
TW201822375A
TW201822375A TW105141267A TW105141267A TW201822375A TW 201822375 A TW201822375 A TW 201822375A TW 105141267 A TW105141267 A TW 105141267A TW 105141267 A TW105141267 A TW 105141267A TW 201822375 A TW201822375 A TW 201822375A
Authority
TW
Taiwan
Prior art keywords
region
semiconductor substrate
side wall
opening
cavity
Prior art date
Application number
TW105141267A
Other languages
Chinese (zh)
Other versions
TWI604630B (en
Inventor
呂維倫
郭光揚
陳皇宇
王建竣
白玉磐
Original Assignee
茂迪股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 茂迪股份有限公司 filed Critical 茂迪股份有限公司
Priority to TW105141267A priority Critical patent/TWI604630B/en
Priority to CN201710164618.5A priority patent/CN108615787A/en
Application granted granted Critical
Publication of TWI604630B publication Critical patent/TWI604630B/en
Publication of TW201822375A publication Critical patent/TW201822375A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1876Particular processes or apparatus for batch treatment of the devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A treating apparatus of a semiconductor substrate is described. The treating apparatus includes a chamber, a conveyance device, a light source and an air-circulating device. The chamber has a first sidewall and a second sidewall extending along a direction. The conveyance device is configured to convey a plurality of semiconductor substrates to be treated in the chamber along the first direction. The light source is disposed within the chamber and is configured to perform an irradiating and heating treatment on the semiconductor substrates. The air-circulating device is used to make air within the chamber substantially flow from the first sidewall to the second sidewall. The first sidewall includes a first region and a second region, in which the first region is closer to the conveyance device than the second region, and an opening area ratio of the first region is smaller than an opening area ratio of the second region.

Description

半導體基板的處理裝置    Processing device for semiconductor substrate   

本發明是有關於一種處理裝置,且特別是有關於一種半導體基板的照光加熱處理裝置。 The present invention relates to a processing apparatus, and more particularly, to a photothermal processing apparatus for a semiconductor substrate.

傳統太陽能技術中,大都採用柴可夫斯基(CZ)長晶法所製作之摻硼單晶片來作為製作太陽能電池的基板材料。原因在於這種摻硼單晶矽材料的摻雜工序較為方便易行,且所製造出之單晶矽棒的電阻率的分佈較為均勻。然而,採用摻硼單晶矽,尤其是採用電阻率較低(例如在0.5Ω.cm至1.5Ω.cm範圍內)的摻硼單晶矽作為基板材料所製作出的太陽能電池,其電池效率在太陽光光照下或在載流子注入下會衰減,這種現象稱為光致衰減(light induced degradation,LID)。 In traditional solar technology, boron-doped single wafers produced by the Tchaikovsky (CZ) growth method are mostly used as substrate materials for solar cells. The reason is that the doping process of this boron-doped single crystal silicon material is more convenient and easy, and the resistivity distribution of the manufactured single crystal silicon rod is more uniform. However, the solar cell produced by using boron-doped single-crystal silicon, especially boron-doped single-crystal silicon with low resistivity (for example, in the range of 0.5Ω · cm to 1.5Ω · cm) as a substrate material, has a cell efficiency Attenuation under sunlight or carrier injection, this phenomenon is called light induced degradation (LID).

目前已知對摻硼單晶矽太陽能電池進行適當的照光加熱處理有助於減少或避免光致衰減,其方式例如使太陽能電池經過照光加熱爐,而為了提升產能,目前以多流道(multi-lanes)方式進行。此種方式係在處理裝置之腔室內之多流道傳輸裝置的上方設置許多光源,當半導體太陽能電池經由傳輸裝置而在腔室內傳送時,光源可對半導體太陽能 電池進行照光加熱處理,來消除半導體太陽能電池之缺陷,藉此改善太陽能電池之光致衰減。 At present, it is known that proper irradiation and heating treatment of boron-doped monocrystalline silicon solar cells can help reduce or avoid photoinduced attenuation. For example, by passing solar cells through a heating furnace, in order to increase production capacity, multi-channel (multi-channel) -lanes) mode. In this method, a plurality of light sources are provided above the multi-channel transmission device in the chamber of the processing device. When the semiconductor solar cell is transmitted in the chamber through the transmission device, the light source can perform light heating treatment on the semiconductor solar cell to eliminate semiconductors. Defects of solar cells, thereby improving the light attenuation of solar cells.

然而,此種方式為了要對半導體太陽能電池提供足夠的照度,會產生過多的熱量,而導致處理裝置之腔室內的溫度過高。為了解決此一問題,目前係利用外加的冷卻系統來降低腔室內的溫度。多流道裝置的兩側壁具有許多均勻排列的開孔,以供冷卻氣流進出腔室。然而,多流道裝置因各流道之熱流彼此交互作用與原始硬體設計的影響,溫度分布嚴重不均。利用冷卻系統所提供之氣流雖可降低腔室內的溫度,但網格狀的側壁開孔分布設計會降低可引入的冷卻氣流,而造成風速下降,腔體溫度升高,使得可調控的製程溫度範圍受限,導致熱擾流難以移除,因此對於腔室內之溫度分布的均勻度的改善成效不彰,導致半導體太陽能電池的照光處理效果不佳。 However, in order to provide sufficient illuminance to the semiconductor solar cell in this manner, excessive heat is generated, and the temperature in the chamber of the processing device is excessively high. To solve this problem, an external cooling system is currently used to reduce the temperature in the chamber. The two side walls of the multi-runner device have a plurality of evenly arranged openings for the cooling airflow to and from the chamber. However, due to the interaction between the heat flow of each flow channel and the effect of the original hardware design, the temperature distribution of the multi-flow channel device is severely uneven. Although the airflow provided by the cooling system can reduce the temperature in the chamber, the grid-like side wall opening distribution design will reduce the cooling airflow that can be introduced, which will cause the wind speed to drop and the cavity temperature to increase, making the process temperature adjustable. The range is limited, which makes it difficult to remove the thermal turbulence. Therefore, the improvement of the uniformity of the temperature distribution in the chamber is not effective, and the illumination treatment effect of the semiconductor solar cell is not good.

藉由提高冷卻系統的風量,雖可降低腔體內的溫度,改善腔室內的溫度分布均勻度,但提高風量會造成半導體太陽能電池飛片,甚至造成破片,導致良率下降。 By increasing the air volume of the cooling system, although the temperature in the cavity can be reduced and the temperature distribution uniformity in the cavity can be improved, increasing the air volume will cause the semiconductor solar cell to fly, and even cause fragmentation, leading to a decrease in yield.

因此,本發明之一目的就是在提供一種半導體基板的處理裝置,其腔體之入風側的側壁中較接近運送裝置之區域的開口面積比率小於較遠離運送裝置之區域的開口面積比率。故,可在避免半導體基板飛片的情況下,提高風量來有效改善腔體內的溫度分布均勻度。 Therefore, it is an object of the present invention to provide a semiconductor substrate processing apparatus having an opening area ratio of a region closer to the conveyance device in a side wall of an air inlet side of a cavity smaller than an opening area ratio of an area farther from the conveyance device. Therefore, in the case of avoiding the flying of the semiconductor substrate, the air volume can be increased to effectively improve the uniformity of the temperature distribution in the cavity.

本發明之另一目的是在提供一種半導體基板的處理裝置,其腔體入風側的側壁中各區域可設有柵門,而可分別調整各區域的開口面積比率,因此可提升處理裝置的應用性。 Another object of the present invention is to provide a processing device for a semiconductor substrate. A gate can be provided in each region in a side wall of a cavity on the wind inlet side, and an opening area ratio of each region can be adjusted separately, so that the processing device can be improved. Applicability.

本發明之又一目的是在提供一種半導體基板的處理裝置,其腔體入風側的側壁可設有導流板,導流板可將通過之氣流朝遠離半導體基板之運送裝置的方向流動,藉此可更有效防止半導體基板產生飛片問題。 Another object of the present invention is to provide a semiconductor substrate processing device. A side wall of a cavity on the air inlet side may be provided with a deflector, and the deflector may flow the airflow passing therethrough away from the semiconductor substrate conveying device. This can more effectively prevent the problem of flying chips from occurring on the semiconductor substrate.

根據本發明之上述目的,提出一種半導體基板的處理裝置。此半導體基板的處理裝置包含腔體、運送裝置、光源以及空氣循環裝置。腔體具有沿第一方向延伸之第一側壁及第二側壁。運送裝置配置以於腔體中沿第一方向傳送待處理之複數個半導體基板。光源設於腔體內,且配置以對通過腔體之半導體基板進行照光加熱處理。空氣循環裝置用於使腔體內的氣體大致由第一側壁往第二側壁流動。第一側壁包含第一區域及第二區域,其中第一區域較第二區域更接近運送裝置,且第一區域之開口面積比率小於第二區域之開口面積比率。 According to the above object of the present invention, a processing apparatus for a semiconductor substrate is provided. This semiconductor substrate processing device includes a cavity, a transport device, a light source, and an air circulation device. The cavity has a first side wall and a second side wall extending along the first direction. The transporting device is configured to transport a plurality of semiconductor substrates to be processed in the cavity in a first direction. The light source is disposed in the cavity and is configured to perform light heating treatment on the semiconductor substrate passing through the cavity. The air circulation device is used to make the gas in the cavity flow from the first side wall to the second side wall. The first sidewall includes a first region and a second region, wherein the first region is closer to the transport device than the second region, and the opening area ratio of the first region is smaller than the opening area ratio of the second region.

依據本發明之一實施例,上述之第二側壁之開口分布方式異於第一側壁之開口方布方式。 According to an embodiment of the present invention, the opening distribution mode of the second side wall is different from the opening square cloth mode of the first side wall.

依據本發明之一實施例,上述之第二側壁之開口均勻分布。 According to an embodiment of the present invention, the openings of the second side wall are evenly distributed.

依據本發明之一實施例,上述之第二區域較第一區域更接近光源。 According to an embodiment of the present invention, the second region is closer to the light source than the first region.

依據本發明之一實施例,上述之第一區域設有第一柵門,第一柵門配置以調整第一區域之開口面積比率。 According to an embodiment of the present invention, the first region is provided with a first gate, and the first gate is configured to adjust an opening area ratio of the first region.

依據本發明之一實施例,上述之第二區域設有第二柵門,第二柵門配置以調整第二區域之開口面積比率。 According to an embodiment of the present invention, the second region is provided with a second gate, and the second gate is configured to adjust an opening area ratio of the second region.

依據本發明之一實施例,上述之第一區域設有導流板,配置以使通過之氣流朝遠離運送裝置的方向流動。 According to an embodiment of the present invention, a baffle plate is provided in the first area, and the air flow is configured to flow away from the conveying device.

依據本發明之一實施例,上述之導流板係可調裝置,且可調整以改變導流板與第一側壁之間的夾角。 According to an embodiment of the present invention, the above-mentioned deflector is an adjustable device, and can be adjusted to change an included angle between the deflector and the first side wall.

依據本發明之一實施例,上述之夾角為30度至150度。 According to an embodiment of the present invention, the included angle is 30 degrees to 150 degrees.

依據本發明之一實施例,上述之導流板係一長度可調裝置。 According to an embodiment of the present invention, the above-mentioned deflector is an adjustable-length device.

依據本發明之一實施例,上述之第一區域更包含第一分區與第二分區,第二分區較第一分區更接近第二區域,且第一分區之開口面積比率小於第二分區之開口面積比率。 According to an embodiment of the present invention, the first area further includes a first area and a second area, the second area is closer to the second area than the first area, and an opening area ratio of the first area is smaller than that of the second area. Area ratio.

100‧‧‧處理裝置 100‧‧‧ treatment device

102‧‧‧半導體基板 102‧‧‧Semiconductor substrate

104‧‧‧腔體 104‧‧‧ Cavity

106‧‧‧運送裝置 106‧‧‧ transport device

108‧‧‧光源 108‧‧‧ light source

110‧‧‧空氣循環裝置 110‧‧‧air circulation device

112‧‧‧第一側壁 112‧‧‧first side wall

112a‧‧‧第一側壁 112a‧‧‧first side wall

114‧‧‧第二側壁 114‧‧‧Second sidewall

116‧‧‧方向 116‧‧‧ Direction

118‧‧‧第一區域 118‧‧‧ first zone

118a‧‧‧第一分區 118a‧‧‧First Division

118b‧‧‧第二分區 118b‧‧‧Second Division

120‧‧‧第二區域 120‧‧‧Second Zone

122‧‧‧開口 122‧‧‧ opening

122a‧‧‧開口 122a‧‧‧ opening

124‧‧‧開口 124‧‧‧ opening

126‧‧‧方向 126‧‧‧ direction

128‧‧‧氣體 128‧‧‧gas

130‧‧‧外罩 130‧‧‧ Cover

132‧‧‧氣體通道 132‧‧‧gas channel

134‧‧‧導流板 134‧‧‧ deflector

136‧‧‧界面 136‧‧‧ interface

138a‧‧‧第一柵門 138a‧‧‧first gate

138b‧‧‧第一柵門 138b‧‧‧First Gate

140‧‧‧第二柵門 140‧‧‧ second gate

142‧‧‧開口 142‧‧‧ opening

為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:〔圖1〕係繪示依照本發明之一實施方式的一種半導體基板的處理裝置的裝置示意圖;〔圖2〕係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之一側的側視示意圖; 〔圖3〕係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之第一側壁的局部立體示意圖;〔圖4A〕係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之第一柵門的裝置示意圖;〔圖4B〕係繪示依照本發明之一實施方式的另一種半導體基板的處理裝置之第一柵門的裝置示意圖;〔圖5〕係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之第二柵門的裝置示意圖;〔圖6〕係繪示依照本發明之一實施方式的另一種半導體基板的處理裝置之一側的側視示意圖;以及〔圖7〕係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之另一側的側視示意圖。 In order to make the above and other objects, features, advantages, and embodiments of the present invention more comprehensible, the description of the accompanying drawings is as follows: [FIG. 1] A process of a semiconductor substrate according to an embodiment of the present invention is shown Schematic diagram of the device; [FIG. 2] is a schematic side view of one side of a semiconductor substrate processing device according to an embodiment of the present invention; [FIG. 3] is a schematic diagram of a device according to an embodiment of the present invention A partial perspective view of a first side wall of a semiconductor substrate processing apparatus; [FIG. 4A] is a schematic diagram showing a first gate of a semiconductor substrate processing apparatus according to an embodiment of the present invention; [FIG. 4B] is a drawing FIG. 5 is a schematic diagram of a first gate of a semiconductor substrate processing apparatus according to an embodiment of the present invention; FIG. 5 is a second gate of a semiconductor substrate processing apparatus according to an embodiment of the present invention; [FIG. 6] A schematic side view of one side of another semiconductor substrate processing apparatus according to an embodiment of the present invention; And [FIG. 7] A schematic side view of the other side of a semiconductor substrate processing apparatus according to an embodiment of the present invention.

請參照圖1與圖2,其係分別繪示依照本發明之一實施方式的一種半導體基板的處理裝置的裝置示意圖與一側的側視示意圖。在本發明之一實施方式中,半導體基板的處理裝置100可為多流道處理裝置,可用以同時對許多半導體基板102進行照光加熱處理,藉以修補半導體基板102中之半導體材料的缺陷。半導體基板102可為半導體太陽能電池。舉例而言,半導體基板102可為結晶矽太陽能電池。在一些實施例中,半導體基板102為摻硼單晶矽太陽能電池或摻硼多晶矽太陽能電池。處理裝置100對半導體基板102進行之照光加熱處理,可在很短時間內消除半導體基板102 中絕大部分的硼氧缺陷,藉此可降低例如半導體太陽能電池等半導體基板102因光致衰減的效率損失。 Please refer to FIG. 1 and FIG. 2, which respectively show a device schematic diagram and a side schematic view of a semiconductor substrate processing apparatus according to an embodiment of the present invention. In one embodiment of the present invention, the semiconductor substrate processing device 100 may be a multi-channel processing device, and may be used to simultaneously irradiate a plurality of semiconductor substrates 102 with light and heat to repair defects in the semiconductor materials in the semiconductor substrates 102. The semiconductor substrate 102 may be a semiconductor solar cell. For example, the semiconductor substrate 102 may be a crystalline silicon solar cell. In some embodiments, the semiconductor substrate 102 is a boron-doped single crystal silicon solar cell or a boron-doped polycrystalline silicon solar cell. The irradiation heating treatment of the semiconductor substrate 102 by the processing device 100 can eliminate most boron-oxygen defects in the semiconductor substrate 102 in a short time, thereby reducing the efficiency of the semiconductor substrate 102 such as a semiconductor solar cell due to light attenuation. loss.

在一些實施例中,如圖1與圖2所示,處理裝置100主要包含腔體104、運送裝置106、光源108以及空氣循環裝置110。腔體104包含第一側壁112與第二側壁114,其中第一側壁112與第二側壁114彼此相對,且第一側壁112與第二側壁114均沿著方向116延伸。在一些示範例子中,第一側壁112與第二側壁114互相平行。 In some embodiments, as shown in FIGS. 1 and 2, the processing device 100 mainly includes a cavity 104, a transport device 106, a light source 108, and an air circulation device 110. The cavity 104 includes a first sidewall 112 and a second sidewall 114, wherein the first sidewall 112 and the second sidewall 114 are opposite to each other, and the first sidewall 112 and the second sidewall 114 both extend along the direction 116. In some exemplary examples, the first sidewall 112 and the second sidewall 114 are parallel to each other.

如圖2所示,運送裝置106穿設於腔體104中,且配置以於腔體104中沿著方向116來傳送待處理之半導體基板102。因此,待處理之半導體基板102係沿著方向116行進。在一些例子中,運送裝置106可由多個輸送帶所組成,這些輸送帶對應位於腔體104內的通道中。在另一些例子中,運送裝置106亦可由數個滾輪所組成,或可由一輸送帶搭配數個滾輪所組成,本發明不在此限。 As shown in FIG. 2, the conveying device 106 is disposed in the cavity 104 and is configured to convey the semiconductor substrate 102 to be processed in the cavity 104 along the direction 116. Therefore, the semiconductor substrate 102 to be processed travels in the direction 116. In some examples, the conveying device 106 may be composed of a plurality of conveyor belts, which are correspondingly located in the channels in the cavity 104. In other examples, the conveying device 106 may also be composed of several rollers, or may be composed of a conveyor belt and several rollers, which is not limited in the present invention.

請再次參照圖1與圖2,光源108設置在腔體104內,且與運送裝置106相對,因此光源108可對由運送裝置106載送通過腔體104的半導體基板102進行光照加熱處理,來修補半導體基板102中之半導體材料的缺陷。在一些示範例子中,光源108為長型燈管,且沿著方向126延伸在腔體104內。光源108延伸之方向126可實質垂直半導體基板102行進之方向116。光源108之長度較佳係可涵蓋運送裝置106所載送通過之各通道中的半導體基板102。 Please refer to FIG. 1 and FIG. 2 again. The light source 108 is disposed in the cavity 104 and is opposite to the conveying device 106. Therefore, the light source 108 can perform light heating treatment on the semiconductor substrate 102 carried by the conveying device 106 through the cavity 104. Defects of semiconductor materials in the semiconductor substrate 102 are repaired. In some exemplary examples, the light source 108 is an elongated lamp tube and extends in the cavity 104 along the direction 126. The direction 126 in which the light source 108 extends may be substantially perpendicular to the direction 116 in which the semiconductor substrate 102 travels. The length of the light source 108 preferably covers the semiconductor substrate 102 in each channel carried by the transport device 106.

在一些實施例中,如圖1所示,空氣循環裝置110可設置在腔體104外,且可使腔體104內的氣體128大致由第一側壁112往第二側壁114流動,即相對於半導體基板102行進的方向116側向流動。空氣循環裝置110可例如為循環風扇等抽氣及/或排氣裝置。處理裝置100可選擇性地包含外罩130,其中外罩130可罩設在腔體104外。在一些示範例子中,空氣循環裝置110可設置在腔體104與外罩130之間,而腔體104與外罩130之間形成氣體通道132。如圖1與圖2所示,空氣循環裝置110從外罩130之一側抽入外罩130的氣體128可順著氣體通道132,而由第一側壁112從腔體104的側向進入腔體104內,再從第二側壁114流出腔體104並進入氣體通道132,然後順著氣體通道132而從外罩130的另一側排出外罩130,達到冷卻用之氣體128的循環。 In some embodiments, as shown in FIG. 1, the air circulation device 110 may be disposed outside the cavity 104, and the gas 128 in the cavity 104 may flow from the first sidewall 112 to the second sidewall 114, that is, relative to The direction 116 in which the semiconductor substrate 102 travels flows laterally. The air circulation device 110 may be, for example, an extraction and / or exhaust device such as a circulation fan. The processing device 100 may optionally include an outer cover 130, wherein the outer cover 130 may be disposed outside the cavity 104. In some exemplary examples, the air circulation device 110 may be disposed between the cavity 104 and the cover 130, and a gas passage 132 is formed between the cavity 104 and the cover 130. As shown in FIG. 1 and FIG. 2, the gas 128 that the air circulation device 110 draws into the cover 130 from one side of the cover 130 can follow the gas passage 132, and the first side wall 112 enters the cavity 104 from the side of the cavity 104. Inside, the cavity 104 flows out from the second side wall 114 and enters the gas passage 132, and then the outer cover 130 is discharged from the other side of the outer cover 130 along the gas passage 132 to achieve the circulation of the cooling gas 128.

在一些實施例中,請再次參照圖2,第一側壁112包含第一區域118與第二區域120。第一區域118與第二區域120相鄰,且第一區域118較第二區域120更接近運送裝置106,而第二區域120較第一區域118更接近光源108。第一區域118之面積可例如與第二區域120之面積大致相同。第一區域118中設有數個開口122。這些開口122可均勻設置在第一區域118中。舉例而言,如圖2所示,這些開口122上下排成兩列,且在每一列中,任相鄰二開口122之間的間距相同。在特定例子中,這些開口122亦可非均勻地 設置在第一區域118中。此外,這些開口122的形狀與尺寸可相同,或者可彼此不同,或者可部分相同部分不同。 In some embodiments, please refer to FIG. 2 again, the first sidewall 112 includes a first region 118 and a second region 120. The first region 118 is adjacent to the second region 120, and the first region 118 is closer to the transport device 106 than the second region 120, and the second region 120 is closer to the light source 108 than the first region 118. The area of the first region 118 may be substantially the same as the area of the second region 120, for example. A plurality of openings 122 are provided in the first region 118. These openings 122 may be uniformly disposed in the first region 118. For example, as shown in FIG. 2, the openings 122 are arranged in two rows up and down, and in each row, the interval between any two adjacent openings 122 is the same. In a specific example, the openings 122 may also be non-uniformly disposed in the first region 118. In addition, the shapes and sizes of the openings 122 may be the same, or may be different from each other, or may be partially the same.

第二區域120設有至少一開口124。在本實施方式中,第一區域118的開口面積比率小於第二區域120的開口面積比率。在一些示範例子中,如圖2所示,第二區域120設有單一開口124,此開口124橫設於絕大部分之第二區域120中,且開口124之面積遠大於每一開口122的面積。在另一些例子中,第二區域120設有數個開口124,其中這些開口124的數量小於開口122的數量,且每個開口124之面積大於每個開口122的面積。此外,開口124可均勻或可不均勻地設置在第二區域120中。這些開口124的形狀與尺寸可相同,或者可彼此不同,或者可部分相同部分不同。 The second region 120 is provided with at least one opening 124. In this embodiment, the opening area ratio of the first region 118 is smaller than the opening area ratio of the second region 120. In some exemplary examples, as shown in FIG. 2, the second region 120 is provided with a single opening 124, and the opening 124 is horizontally disposed in most of the second region 120, and the area of the opening 124 is much larger than that of each opening 122. area. In other examples, the second region 120 is provided with a plurality of openings 124, wherein the number of the openings 124 is smaller than the number of the openings 122, and the area of each of the openings 124 is larger than the area of each of the openings 122. In addition, the openings 124 may be uniformly or unevenly disposed in the second region 120. The shapes and sizes of the openings 124 may be the same, or may be different from each other, or may be partially the same.

請參照圖3,其係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之第一側壁的局部立體示意圖。在一些實施例中,第一側壁112的第二區域120更設有一或多個導流板134,其中導流板134可使通過之氣流朝遠離運送裝置106的方向流動。導流板134可樞接在第一側壁112的第二區域120,且導流板134為可調裝置,藉由樞轉調整導流板134可改變導流板134與第一側壁112之間的夾角。舉例而言,導流板134與第一側壁112之間的夾角可為約30度至約150度。在一些實施例中,導流板134可具有類似飛機襟翼的設計。舉例而言,導流板134為長度可調裝置,且導流板134可具有多段結構設計,可隨製程需求而伸縮各段結構來調整導流板134的整體長度。 Please refer to FIG. 3, which is a schematic partial perspective view of a first side wall of a semiconductor substrate processing apparatus according to an embodiment of the present invention. In some embodiments, the second region 120 of the first side wall 112 is further provided with one or more deflectors 134, wherein the deflectors 134 allow the airflow therethrough to move away from the transport device 106. The deflector 134 can be pivotally connected to the second region 120 of the first side wall 112, and the deflector 134 is an adjustable device. The pivoting adjustment of the deflector 134 can change the space between the deflector 134 and the first side wall 112 Angle. For example, the included angle between the deflector 134 and the first sidewall 112 may be about 30 degrees to about 150 degrees. In some embodiments, the deflector 134 may have an aircraft flap-like design. For example, the deflector 134 is an adjustable-length device, and the deflector 134 may have a multi-segment structure design, which can be expanded and contracted according to the process requirements to adjust the overall length of the deflector 134.

請再次參照圖3,在一些示範實施例中,二導流板134可分別設於第二區域120,且彼此相隔一段距離。光源108之設置位置對應於第二區域120,且光源108與界面136之間的距離可例如約為1/4的第一側壁112高度。半導體基板102的位置對應於第一區域118,且半導體基板102與界面136之間的距離可例如約為1/2的第一區域118高度。 Please refer to FIG. 3 again. In some exemplary embodiments, the two deflectors 134 may be respectively disposed in the second region 120 and spaced apart from each other. The position of the light source 108 corresponds to the second region 120, and the distance between the light source 108 and the interface 136 may be, for example, about 1/4 the height of the first sidewall 112. The position of the semiconductor substrate 102 corresponds to the first region 118, and the distance between the semiconductor substrate 102 and the interface 136 may be, for example, about 1/2 the height of the first region 118.

在一些實施例中,處理裝置100可選擇性地包含柵門。請參照圖4A與圖4B,其係分別繪示依照本發明之一實施方式的兩種半導體基板的處理裝置之第一柵門的裝置示意圖。舉例而言,如圖4A所示,處理裝置100可包含數個第一柵門138a,其中第一柵門138a分別對應設於第一區域118之開口122,且第一柵門138a可以上下移動,以調整各自對應之開口122的開口面積。第一柵門138a往下拉的時候,可縮減開口122的開口面積,第一柵門138a往上拉的時候,可擴大開口122的開口面積。第一區域118的這些第一柵門138a可獨立控制。藉由調整第一柵門138a的位置,可調整第一區域118的開口面積比率。當然,亦可改變第一柵門138a設置在開口122的位置,以使得第一柵門138a往上拉的時候縮減開口122的面積、以及使得第一柵門138a往下拉的時候擴大開口122的面積。 In some embodiments, the processing device 100 may optionally include a gate. Please refer to FIG. 4A and FIG. 4B, which are schematic diagrams illustrating the first gates of two types of semiconductor substrate processing apparatuses according to an embodiment of the present invention, respectively. For example, as shown in FIG. 4A, the processing device 100 may include a plurality of first gates 138a, wherein the first gates 138a respectively correspond to the openings 122 provided in the first area 118, and the first gates 138a can be moved up and down. To adjust the opening areas of the corresponding openings 122. When the first gate 138a is pulled down, the opening area of the opening 122 can be reduced, and when the first gate 138a is pulled up, the opening area of the opening 122 can be enlarged. The first gates 138a of the first region 118 can be controlled independently. By adjusting the position of the first gate 138a, the opening area ratio of the first region 118 can be adjusted. Of course, the position of the first gate 138a in the opening 122 can also be changed, so that the area of the opening 122 is reduced when the first gate 138a is pulled up, and the opening 122 is enlarged when the first gate 138a is pulled down. area.

在另一些例子中,如圖4B所示,處理裝置100可包含數個第一柵門138b,其中第一柵門138b分別對應設於第一區域118之開口122,且第一柵門138b可以左右移動,以調整各自對應之開口122的開口面積。在這些例子 中,第一柵門138b往右拉的時候,可縮減開口122的開口面積,第一柵門138b往左拉的時候,可擴大開口122的開口面積。第一區域118的這些第一柵門138b同樣可獨立控制。藉由調整第一柵門138b的位置,可調整第一區域118的開口面積比率。當然,亦可改變第一柵門138b設置在開口122的位置,以使得第一柵門138b往左拉的時候縮減開口122的面積、以及使得第一柵門138b往右拉的時候擴大開口122的面積。 In other examples, as shown in FIG. 4B, the processing device 100 may include a plurality of first gates 138b, wherein the first gates 138b respectively correspond to the openings 122 provided in the first region 118, and the first gates 138b may Move left and right to adjust the opening areas of the corresponding openings 122. In these examples, when the first gate 138b is pulled to the right, the opening area of the opening 122 can be reduced, and when the first gate 138b is pulled to the left, the opening area of the opening 122 can be enlarged. The first gates 138b of the first region 118 are also independently controllable. By adjusting the position of the first gate 138b, the opening area ratio of the first region 118 can be adjusted. Of course, the position of the first gate 138b at the opening 122 can also be changed, so that the area of the opening 122 is reduced when the first gate 138b is pulled to the left, and the opening 122 is enlarged when the first gate 138b is pulled to the right. Area.

請參照圖5,其係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之第二柵門的裝置示意圖。在一些實施例中,處理裝置100更可選擇性地包含至少一第二柵門140。第二柵門140可分別設於第二區域120之開口124,因此第二柵門140之數量可相同於開口124之數量。在圖5所示之例子中,第二柵門140可上下移動,以調整各自開口124的開口面積。在這些例子中,第二柵門140往下拉的時候,可縮減開口124的開口面積,第二柵門140往上拉的時候,可擴大開口124的開口面積。第二區域120的第二柵門140同樣可獨立控制。藉由調整第二柵門140的位置,可調整第二區域120的開口面積比率。當然,可改變第二柵門140設置在開口124的位置,使其開闔方向改變,且第二柵門140亦可如上述之第一柵門138b般,為左右移動設計。 Please refer to FIG. 5, which is a schematic diagram of a second gate of a semiconductor substrate processing apparatus according to an embodiment of the present invention. In some embodiments, the processing apparatus 100 may further include at least one second gate 140. The second gates 140 may be respectively disposed in the openings 124 of the second area 120, so the number of the second gates 140 may be the same as the number of the openings 124. In the example shown in FIG. 5, the second gates 140 can be moved up and down to adjust the opening areas of the respective openings 124. In these examples, when the second gate 140 is pulled down, the opening area of the opening 124 can be reduced, and when the second gate 140 is pulled up, the opening area of the opening 124 can be enlarged. The second gate 140 of the second area 120 can also be controlled independently. By adjusting the position of the second gate 140, the opening area ratio of the second region 120 can be adjusted. Of course, the position of the second gate 140 in the opening 124 can be changed to change the opening and closing direction, and the second gate 140 can also be designed to move left and right like the first gate 138b described above.

請參照圖6,其係繪示依照本發明之一實施方式的另一種半導體基板的處理裝置之一側的側視示意圖。在一 些實施例中,第一側壁112a之第一區域118可包含二個以上的分區。舉例而言,第一區域118包含第一分區118a與第二分區118b,其中第二分區118b較第一分區118a更接近第二區域120。在一些示範例子中,第一分區118a可不具有任何開口,第二分區118b可具有多個開口122a,其中這些開口122a的面積可等於或小於圖2之開口122的面積。因此,第一分區118a之開口面積比率小於第二分區118b之開口面積比率。當然,第一分區118a亦可設有多個開口,但第一分區118a之開口的面積小於第二分區118b之開口122a的面積,以使第一分區118a之開口面積比率小於第二分區118b之開口面積比率。在一些示範例子中,第一區域118對第二區域120的開口率可為約1/8。 Please refer to FIG. 6, which is a schematic side view illustrating one side of another semiconductor substrate processing apparatus according to an embodiment of the present invention. In some embodiments, the first region 118 of the first sidewall 112a may include more than two partitions. For example, the first region 118 includes a first region 118a and a second region 118b. The second region 118b is closer to the second region 120 than the first region 118a. In some exemplary examples, the first partition 118a may not have any openings, and the second partition 118b may have a plurality of openings 122a, wherein the area of these openings 122a may be equal to or smaller than the area of the opening 122 of FIG. 2. Therefore, the opening area ratio of the first partition 118a is smaller than the opening area ratio of the second partition 118b. Of course, the first partition 118a may also be provided with multiple openings, but the area of the opening of the first partition 118a is smaller than the area of the opening 122a of the second partition 118b, so that the ratio of the opening area of the first partition 118a is smaller than that of the second partition 118b. Opening area ratio. In some exemplary examples, the aperture ratio of the first region 118 to the second region 120 may be about 1/8.

請參照圖7,其係繪示依照本發明之一實施方式的一種半導體基板的處理裝置之另一側(即出風口側)的側視示意圖。腔體104之第二側壁114設有數個開口142。在一些示範例子中,這些開口142可均勻設置在第二側壁114中。舉例而言,如圖7所示,這些開口142上下排成四列,且在每一列中,任相鄰二開口142之間的間距相同。在特定例子中,這些開口142亦可非均勻地設置在第二側壁114中。此外,這些開口142的形狀與尺寸可相同,或者可彼此不同,或者可部分相同部分不同。在本實施方式中,請同時參照圖2與圖7,第二側壁114之開口142的分布方式異於第一側壁122之開口122與124的分布方式。 Please refer to FIG. 7, which is a schematic side view illustrating the other side (ie, the air outlet side) of a semiconductor substrate processing apparatus according to an embodiment of the present invention. The second sidewall 114 of the cavity 104 is provided with a plurality of openings 142. In some exemplary examples, the openings 142 may be uniformly disposed in the second sidewall 114. For example, as shown in FIG. 7, the openings 142 are arranged in four rows up and down, and in each row, the interval between any two adjacent openings 142 is the same. In a specific example, the openings 142 may also be non-uniformly disposed in the second sidewall 114. In addition, the shapes and sizes of the openings 142 may be the same, or may be different from each other, or may be partially the same. In this embodiment, please refer to FIGS. 2 and 7 at the same time. The distribution of the openings 142 of the second sidewall 114 is different from the distribution of the openings 122 and 124 of the first sidewall 122.

如圖2所示,由於腔體104之入風側的第一側壁112中較接近運送裝置106之第一區域118的開口面積比率小於較遠離運送裝置106之第二區域120的開口面積比率,因此可在避免半導體基板102飛片的情況下,藉由提高風量來有效改善腔體104內的溫度分布均勻度。 As shown in FIG. 2, since the opening area ratio of the first area 118 closer to the conveying device 106 in the first side wall 112 on the air inlet side of the cavity 104 is smaller than the opening area ratio of the second area 120 farther from the conveying device 106, Therefore, it is possible to effectively improve the uniformity of the temperature distribution in the cavity 104 by increasing the air volume while avoiding the flying of the semiconductor substrate 102.

此外,如圖4A、圖4B與圖5所示,腔體104之入風側的第一側壁112中的第一區域118的開口122與第二區域120的開口124可分別設有第一柵門138a或138b、與第二柵門140,因此可根據製程需求而分別調整第一區域118與第二區域120的開口面積比率,故可提升處理裝置100的應用性。 In addition, as shown in FIG. 4A, FIG. 4B and FIG. 5, the openings 122 of the first region 118 and the openings 124 of the second region 120 in the first side wall 112 on the air inlet side of the cavity 104 may be provided with first grids, respectively. The gates 138a or 138b and the second gate 140 can adjust the opening area ratios of the first region 118 and the second region 120 respectively according to process requirements, so that the applicability of the processing device 100 can be improved.

另外,如圖3所示,腔體104之入風側的第一側壁112可設有導流板134,此導流板134可將通過之氣流朝遠離運送裝置106的方向流動,如此一來,可更有效防止半導體基板102產生飛片問題。 In addition, as shown in FIG. 3, the first side wall 112 on the air inlet side of the cavity 104 may be provided with a deflector 134, and the deflector 134 may flow the air passing therethrough away from the conveying device 106. , Can more effectively prevent the semiconductor substrate 102 from generating flying problems.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何在此技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed as above by way of example, it is not intended to limit the present invention. Any person with ordinary knowledge in this technical field can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the appended patent application.

Claims (11)

一種半導體基板的處理裝置,包含:一腔體,該腔體具有沿一第一方向延伸之一第一側壁及一第二側壁;一運送裝置,配置以於該腔體中沿該第一方向傳送待處理之複數個半導體基板;一光源,設於該腔體內,且配置以對通過該腔體之該些半導體基板進行一照光加熱處理;以及一空氣循環裝置,用於使該腔體內的氣體大致由該第一側壁往該第二側壁流動;其中該第一側壁包含一第一區域及一第二區域,其中該第一區域較該第二區域更接近該運送裝置,且該第一區域之一開口面積比率小於該第二區域之一開口面積比率。     A semiconductor substrate processing device includes: a cavity having a first side wall and a second side wall extending along a first direction; and a conveying device configured in the cavity along the first direction Transmitting a plurality of semiconductor substrates to be processed; a light source provided in the cavity and configured to perform a light heating treatment on the semiconductor substrates passing through the cavity; and an air circulation device for making the The gas flows generally from the first side wall to the second side wall; wherein the first side wall includes a first region and a second region, wherein the first region is closer to the transport device than the second region, and the first region An opening area ratio of one of the regions is smaller than an opening area ratio of the second region.     如申請專利範圍第1項之半導體基板的處理裝置,其中該第二側壁之開口分布方式異於該第一側壁之開口方布方式。     For example, the processing device for a semiconductor substrate according to item 1 of the application, wherein the opening distribution mode of the second side wall is different from the opening square cloth mode of the first side wall.     如申請專利範圍第2項之半導體基板的處理裝置,其中該第二側壁之開口均勻分布。     For example, the processing device for a semiconductor substrate according to item 2 of the patent application, wherein the openings of the second sidewall are evenly distributed.     如申請專利範圍第1項之半導體基板的處理裝置,其中該第二區域較該第一區域更接近該光源。     For example, the processing device for a semiconductor substrate according to item 1 of the application, wherein the second region is closer to the light source than the first region.     如申請專利範圍第1項之半導體基板的處理裝置,其中該第一區域設有一第一柵門,配置以調整該第一區域之該開口面積比率。     For example, the processing device for a semiconductor substrate according to item 1 of the patent application, wherein the first area is provided with a first gate and configured to adjust the opening area ratio of the first area.     如申請專利範圍第5項之半導體基板的處理裝置,其中該第二區域設有一第二柵門,配置以調整該第二區域之該開口面積比率。     For example, the processing device for a semiconductor substrate according to item 5 of the patent application, wherein the second area is provided with a second gate and configured to adjust the opening area ratio of the second area.     如申請專利範圍第1項之半導體基板的處理裝置,其中該第一區域設有一導流板,配置以使通過之氣流朝遠離該運送裝置的方向流動。     For example, the processing device for a semiconductor substrate according to item 1 of the patent application, wherein the first region is provided with a deflector configured to pass the airflow therethrough in a direction away from the conveying device.     如申請專利範圍第7項之半導體基板的處理裝置,其中該導流板係一可調裝置,且可調整以改變該導流板與該第一側壁之間的一夾角。     For example, the device for processing a semiconductor substrate according to item 7 of the application, wherein the deflector is an adjustable device, and can be adjusted to change an included angle between the deflector and the first side wall.     如申請專利範圍第8項之半導體基板的處理裝置,其中該夾角為30度至150度。     For example, the semiconductor substrate processing apparatus of the eighth patent application range, wherein the included angle is 30 degrees to 150 degrees.     如申請專利範圍第7項之半導體基板的處理裝置,其中該導流板係一長度可調裝置。     For example, the semiconductor substrate processing apparatus of claim 7 in which the deflector is a length-adjustable device.     如申請專利範圍第1項之半導體基板的處理裝置,其中該第一區域更包含一第一分區與一第二分區,該第二分區較該第一分區更接近該第二區域,且該第一分區之一開口面積比率小於該第二分區之一開口面積比率。     For example, the processing device for a semiconductor substrate according to item 1 of the patent application, wherein the first region further includes a first partition and a second partition, the second partition is closer to the second region than the first partition, and the first An opening area ratio of one partition is smaller than an opening area ratio of the second partition.    
TW105141267A 2016-12-13 2016-12-13 Treating apparatus of semiconductor substrate TWI604630B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW105141267A TWI604630B (en) 2016-12-13 2016-12-13 Treating apparatus of semiconductor substrate
CN201710164618.5A CN108615787A (en) 2016-12-13 2017-03-20 Semiconductor substrate processing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW105141267A TWI604630B (en) 2016-12-13 2016-12-13 Treating apparatus of semiconductor substrate

Publications (2)

Publication Number Publication Date
TWI604630B TWI604630B (en) 2017-11-01
TW201822375A true TW201822375A (en) 2018-06-16

Family

ID=61023083

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105141267A TWI604630B (en) 2016-12-13 2016-12-13 Treating apparatus of semiconductor substrate

Country Status (2)

Country Link
CN (1) CN108615787A (en)
TW (1) TWI604630B (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2581378T3 (en) * 2008-06-20 2016-09-05 Volker Probst Processing device and procedure for processing stacked processing products
JP5965680B2 (en) * 2012-03-08 2016-08-10 東京エレクトロン株式会社 Processing chamber part cooling method, processing chamber part cooling program, and storage medium
TWI513028B (en) * 2014-08-15 2015-12-11 Motech Ind Inc Treating apparatus
WO2016109063A1 (en) * 2015-01-02 2016-07-07 Applied Materials, Inc. Processing chamber
CN204857673U (en) * 2015-07-10 2015-12-09 东莞市科隆威自动化设备有限公司 Temperature control system of light decay stove

Also Published As

Publication number Publication date
TWI604630B (en) 2017-11-01
CN108615787A (en) 2018-10-02

Similar Documents

Publication Publication Date Title
CN102421934B (en) High throughput multi-wafer epitaxial reactor
KR20160021026A (en) treating apparatus
CN101896995A (en) Thermal reactor with air-flow distribution of improvement
CN104979431B (en) A kind of light decay stove
WO2021088836A1 (en) Solar cell curing and hydrogen passivation integrated machine
CN102747418A (en) High-temperature large area silicon carbide epitaxial growth device and treatment method
JP7030448B2 (en) Upper cone body for epitaxy chamber
RU84520U1 (en) INSTALLATION FOR DRYING GRAIN MATERIAL
TW201822375A (en) Treating apparatus of semiconductor substrate
KR100935475B1 (en) Thermal treatment device
TW201923137A (en) Inject assembly for epitaxial deposition processes
CN102393133B (en) Dryer capable of adjusting temperature difference between cross sections
CN204857673U (en) Temperature control system of light decay stove
KR0175065B1 (en) Vertical type heat-treatment apparatus
ES2961740T3 (en) film making device
CN104264217B (en) A kind of MOCVD reaction units for preparing semiconductor epitaxial wafer
CN103468890A (en) Air-cooling normalization temperature-lowering device
CN104979249B (en) Air inlet-outlet device, the bench heat treater with air inlet-outlet device and disengaging gas method
KR20150019453A (en) Gas supplying apparatus for edge portion of heat processing apparatus for large glass substrate
CN103673582B (en) The method controlling loading area temperature in boat process falls in vertical furnace equipment
KR101546320B1 (en) apparatus for firing substrates
KR102011146B1 (en) Epitaxial wafer manufacturing apparatus
KR20160082832A (en) Recirculation Cooling Unit and Heat Treatment Apparatus Having the Same
TWI581335B (en) Heating treatment apparatus
TWI542030B (en) Processing Apparatus and Processing Method for Solar Cells

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees