TW201806054A - Sticking method of reconstituted type wafer - Google Patents

Abstract

A sticking method of reconstituted type wafer includes the following steps: providing a first reconstituted wafer that includes a first carrier board and a plurality of first wafers that have been tested and sequentially attached to the first carrier board; detecting identification features located close to the first carrier board and getting at least one first feature point of the first carrier board by using the identification feature of the first carrier board; providing a second reconstituted wafer that includes a second carrier board and a plurality of second wafers that have been tested and sequentially attached to the second carrier board; detecting identification features located close to the second carrier board and getting at least one second feature point of the second carrier board by using the identification feature of the second carrier board; sticking the first reconstituted wafer onto the second reconstituted wafer by overlapping the at least one first feature point and the at least one second feature point.

Description

Reassembly method of reconstituted wafer

The invention relates to a method for aligning a reconstituted wafer, in particular to first separating a wafer on a wafer and reconstituting a normal wafer into a reconstituted wafer, and reorganizing the two pieces by using a three-dimensional package stacking technology The wafer has a method in which the surfaces of the wafers are opposed to each other.

Due to the development of electronic technology, in order to save space inside the existing electronic device, the electronic device is made lighter and thinner. The wafer on the circuit board has been oriented in a three-dimensional stacking manner, and a three-dimensional stacked packaging technology of a semiconductor process has been developed. The three-dimensional stack packaging technique also allows at least two wafers to be stacked and electrically connected to each other.

Existing semiconductor technologies have utilized a three-dimensional integrated package of wafer (substrate) assemblies that bond two wafers. However, each wafer may contain germanium wafers. The prior art typically checks each wafer stack after stacking and cutting. This approach may result in a normal wafer being bonded to the germanium wafer to form a stack of wafers, wasting normal wafers.

The technical problem to be solved by the present invention is to provide a method for aligning a reconstituted wafer by first reassembling a normal wafer into a reconstituted wafer, and then stacking and packaging two reconstituted wafers, thereby reducing the three-dimensional stacking of the crucible. The chipset avoids wasting normal wafers to save resources.

In order to solve the above technical problem, according to one aspect of the present invention, a method for aligning a reconstituted wafer is provided, comprising the steps of: providing a first reconstituted wafer, the first reconstituted wafer having a first carrier a first adhesive layer is attached to an upper surface of the first carrier, and a plurality of first wafers that are normally detected are sequentially attached to the first adhesive layer; An identification feature of the perimeter of the board, and obtaining at least one first feature location point of the first carrier board by the identification feature of the first carrier board; providing a second reconstituted wafer, the second reconstituted wafer having a second carrier, a second adhesive layer attached to an upper surface of the second carrier, and a plurality of second substrates that are normally detected are sequentially attached to the second adhesive layer; An identification feature of the periphery of the second carrier, and at least one second feature location of the second carrier is obtained by the identification feature of the second carrier; and the at least one first feature location The manner of overlapping with the at least one second feature location point The recombinant upper surface of the first wafer having wafer bonded to the second wafer having recombinant upper surface of the second wafer.

The present invention has the following beneficial effects: the present invention reassembles the normal first wafer and the second wafer into the first reconstituted wafer and the second reconstituted wafer, and then stacks and packages two reconstituted wafers, thereby reducing defects. Stereo-stacked wafer sets avoiding wasting normal wafers to save resources. The invention can also accurately position the first reconstituted wafer and the second recombined wafer accurately, and utilize the identification features of the periphery of the first carrier and the second carrier to respectively find the first feature positioning point and the first The feature points are such that the first wafer of the first reconstituted wafer is accurately docked with the second wafer of the second reconstituted wafer.

In order to further understand the technology, method and effect of the present invention in order to achieve the intended purpose, reference should be made to the detailed description and drawings of the present invention. The drawings and the annexed drawings are intended to be illustrative and not to limit the invention.

10‧‧‧ wafer

101‧‧‧ Identification features

A11, A12, A13, A14, A26, A61, A76‧‧‧ first chip

A0‧‧‧ first feature

D‧‧‧Fixed spacing

20‧‧‧First Recombination Wafer

21‧‧‧ first carrier

201‧‧‧ Identification features

T1‧‧‧ first adhesive layer

D1‧‧‧first diameter imaginary line

C1‧‧‧First Center

L1‧‧‧First positioning imaginary line

Θ‧‧‧fixed angle

P11, P12‧‧‧ first feature location

30‧‧‧Second reconstituted wafer

31‧‧‧Second carrier

301‧‧‧ Identification features

B0‧‧‧ second feature

C2‧‧‧ second center

D2‧‧‧Second diameter imaginary line

T2‧‧‧Second adhesive layer

L2‧‧‧Second positioning imaginary line

P21, P22‧‧‧ second feature location

B11, B13, B15, B16, B61, B62, B63‧‧‧ second wafer

G‧‧‧ Sealing

Figure 1 is a schematic illustration of a reconstituted wafer of the present invention.

2 is a schematic view of a first reconstituted wafer of the present invention.

3 is a schematic view of a second reconstituted wafer of the present invention.

4 is a side view of the first reconstituted wafer and the second reconstituted wafer of the present invention after being pasted.

Figure 5 is a side elevational view of the first wafer of the present invention after being attached to the second wafer.

Please refer to FIG. 1 , which is a schematic diagram of a reconstituted wafer of the present invention. The present invention provides a method for aligning a reconstituted wafer, comprising the steps of: firstly providing a first reconstituted wafer, the first reconstituted wafer being a wafer 10 made by a semiconductor fab, first The defective wafers are removed and reorganized. The wafers of the wafer 10 are usually marked with a unique serial number, taking the wafer 10 of FIG. 1 as an example, assuming that the wafers of the first row are sequentially A11, A12, A13, A14. The sixth wafer of the second row is set to wafer A26, and the first wafer of the sixth row is set to wafer A61.

The process of reconstituting the wafer first checks whether each wafer on the wafer 10 has defects and marks it, such as the X mark in FIG. In Fig. 1, there are wafers A13, A26, A61, and A76 with X marks. All of the wafers are then cut apart to remove the wafers A13, A26, A61, and A76.

Please refer to FIG. 2, which is a schematic diagram of a first reconstituted wafer of the present invention. Taking the first reconstituted wafer 20 as an example, a first carrier 21 is first provided, and then a first adhesive layer T1 is attached to an upper surface of the first carrier 21. The first adhesive layer T1 is used for temporarily fixing the wafer. For example, it may be a UV tape which is commonly used in a semiconductor wafer die cutting process, and may be lost after being irradiated with ultraviolet light, so that the wafer is easy to be used. The photolysis film is separated. Then, a plurality of first wafers that are normally detected, for example, first wafers A11, A12, A14, etc., are sequentially attached to the first adhesive layer T1. the first The size of the carrier 21 may be equal to or smaller than the size of the original wafer 10, such as six inches or eight inches, or larger. The first carrier 21 has a similar structure to the identification features 101 of the wafer 10, such as triangular notches or flat cuts.

The step of providing the first reconstituted wafer 20 described above further includes the step of identifying the first feature A0 of each of the first wafers A11, A12, A14 prior to attaching the normal wafer. The first feature A0 can be a line on a wafer, or an electrical contact point...etc. Preferably, it is an electrical contact point to be interfaced with another wafer. In the process of attaching the normal wafer, a fixed pitch D is set between the first features A0 of two adjacent first wafers. That is, the distance between the first feature A0 of the first wafer A11 and the first feature A of the adjacent first wafer A12 is a fixed pitch D. The distance between the first feature A0 of the first wafer A12 and the first feature A of the adjacent first wafer A14 is a fixed pitch D. Thereby, even if the wafer has a slight error in the width of each wafer during the wafer cutting process and is not completely equal, the above steps can reduce errors in the process of attaching the normal wafer. When the wafer is pasted, the electrical contacts cannot be accurately docked.

Then, the identification feature 201 of the periphery of the first carrier 21 is searched for, and at least one first feature positioning point of the first carrier 21 is obtained by the identification feature 201 of the first carrier 21 .

According to the embodiment, the process of obtaining the at least one first feature positioning point includes the following steps: first obtaining, by the identification feature 201 of the first carrier 21, the first carrier 21 The first diameter imaginary line D1 passes through the first center C1 of the first carrier 21 . Then, a first positioning imaginary line L1 passing through the first center C1 is obtained, and the first positioning imaginary line L1 and the first diameter imaginary line D1 are sandwiched by a fixed angle θ. Finally, at least one intersection of the first positioning imaginary line L1 and the periphery of the first carrier 21 is obtained as the at least one first feature positioning point.

This embodiment can generate two intersection points as two first feature positioning points P11, P12. Thereby, the identification feature 201 of the first carrier 21 is further matched. With three points, you can decide a plane. However, since the embodiment is limited to the upper surface of the first carrier 21, obtaining a first feature positioning point, such as P11 or P12, and matching the identification feature 201 of the first carrier 21 can also be accurate. The stack is positioned with the second recombined wafer.

The fixed angle between the first positioning imaginary line L1 and the first diameter imaginary line D1 is less than or equal to 90 degrees. For example, it can be 45 degrees or 90 degrees. In addition, the first positioning imaginary line L1 and the first diameter imaginary line D1 are sandwiched by the fixed angle θ in the first direction. The first direction can be clockwise or counterclockwise. In this embodiment, it is in a counterclockwise direction.

However, the present invention is not limited to the above embodiment, for example, such that the first positioning imaginary line passes through the first feature A0 of the first one of the first wafers A11 of the first course to obtain the first positioning. An intersection of the imaginary line and the periphery of the first carrier 21 serves as the first feature positioning point.

Please refer to FIG. 3. FIG. 3 is a schematic diagram of a second reconstituted wafer of the present invention. Similar to the above steps, a second reconstituted wafer 30 is provided. The second reconstituted wafer 30 has a second carrier 31, a second adhesive layer T2 attached to an upper surface of the second carrier 31, and a plurality of second wafers that are normally detected, for example B11, B13, B15, B16, B61, B62, and B63 are sequentially attached to the second adhesive layer 31. In principle, the size of the second carrier 31 is equal to the size of the first carrier 21. The second carrier 31 is also an identification feature 301 having a similarity to the wafer, such as a triangular notch or a flat-cut notch.

Similar to the first reconstituted wafer, the second recombination wafer 30 identifies the second feature B0 of each of the second wafers B11, B13, B15, B16, B61, B62, B63 before attaching the normal wafer. The second feature B0 can be a line on a wafer, or an electrical contact point...etc. Preferably, it is an electrical contact point to be interfaced with another wafer. In the process of attaching the normal wafer, a fixed pitch D is set between the second features B0 of two adjacent second wafers. Thereby, the first feature A0 of the first wafer is electrically connected to the second feature B0 of the second wafer.

Then, the identification feature 301 of the periphery of the second carrier 31 is searched for, and The identification feature 301 of the second carrier 31 captures at least one second feature location of the second carrier 31.

For example, the process of obtaining the at least one second feature positioning point further includes the following steps: first, obtaining the second diameter of the second carrier 31 by the identification feature 301 of the second carrier 31 The imaginary line D2 passes through the second center line C2 of the second carrier 31. Then, a second positioning imaginary line L2 passing through the second center C2 is obtained, and the second positioning imaginary line L2 and the second diameter imaginary line D2 are sandwiched by a fixed angle θ. Finally, at least one intersection of the second positioning imaginary line L2 and the periphery of the second carrier 31 is obtained as the at least one second feature positioning point.

This embodiment can generate two intersection points as two second feature positioning points P21, P22. Thereby, in combination with the identification feature 301 of the second carrier 31, there may be three points, and a plane may be determined.

The second positioning imaginary line L2 and the second diameter imaginary line D2 are sandwiched by the fixed angle θ in a direction opposite to the first direction, that is, in the clockwise direction in this embodiment.

However, the present invention is not limited to the above embodiment, for example, such that the second positioning imaginary line passes through the second feature B0 of the last one of the second wafers B63 of the first course to obtain the second positioning imaginary The intersection of the line and the periphery of the second carrier 31 serves as the second feature positioning point. Thereby, the first of the first wafer A11 of the first row of the first reconstituted wafer 20 and the last of the second wafers B63 of the first row of the second recombination wafer 30 can be accurately made.

Finally, the first reconstituted wafer 20 has the first portion according to the manner that the at least one first feature positioning point (P11 or P12) overlaps with the at least one second feature positioning point (P21 or P22) An upper surface of a wafer is attached to the second reconstituted wafer 30 having an upper surface of the second wafer. The result is shown in FIG. 4. FIG. 4 is a side view of the first reconstituted wafer 20 and the second reconstituted wafer 30 of the present invention after being pasted. First recombination crystal The first of the first wafers A11 of the first row of the circle 20 and the last of the second wafers B63 of the first row of the second reconstituted wafers 30 form a three-dimensional stack.

The method for affixing the reconstituted wafer of the present invention may further include spraying a gap between the first reconstituted wafer 20 and the second reconstituted wafer 30, so that the sealant G is sealed. A gap between the first reconstituted wafer 20 and the second reconstituted wafer 30 is facilitated for the next process.

The feature and function of the present invention is that the normal first wafer and the second wafer are respectively reconstituted into the first reconstituted wafer 20 and the second reconstituted wafer 30, and then the two reconstituted wafers are stacked and packaged, thereby reducing The three-dimensional stacked chip set avoids wasting normal wafers to save resources. The invention can also accurately position the first reconstituted wafer 20 and the second reconstituted wafer 30 accurately, and utilize the identification features of the periphery of the first carrier and the second carrier to respectively find the first feature positioning point. And the second feature positioning point, such that the first wafer of the first reconstituted wafer 20 is accurately docked with the second wafer of the second reconstituted wafer 30.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

A11, A12, A14‧‧‧ first chip

A0‧‧‧ first feature

D‧‧‧Fixed spacing

20‧‧‧First Recombination Wafer

21‧‧‧ first carrier

201‧‧‧ Identification features

T1‧‧‧ first adhesive layer

D1‧‧‧first diameter imaginary line

C1‧‧‧First Center

L1‧‧‧First positioning imaginary line

Θ‧‧‧fixed angle

P11, P12‧‧‧ first feature location

Claims (9)

A method for aligning a reconstituted wafer, comprising the steps of: providing a first reconstituted wafer, the first reconstituted wafer having a first carrier, and a first adhesive layer attached to the first carrier An upper surface of the board, and a plurality of first wafers that are normally detected are sequentially attached to the first adhesive layer; an identification feature of the periphery of the first carrier is sought, and the first carrier is Obtaining at least one first feature positioning point of the first carrier; providing a second reconstituted wafer having a second carrier and a second adhesive layer attached thereto An upper surface of the second carrier, and a plurality of second wafers that are normally detected are sequentially attached to the second adhesive layer; the identification features of the periphery of the second carrier are sought, and Obtaining at least one second feature location point of the second carrier board by the identification feature of the second carrier board; and overlapping the at least one first feature location point with the at least one second feature location point, Having the first reconstituted wafer having an upper surface of the first wafer attached to the second recombination Circle having an upper surface of the second wafer. The method for affixing a reconstituted wafer according to claim 1, wherein the step of providing the first reconstituted wafer further comprises the step of: identifying each of the first wafers before attaching the normal wafer a first feature; and setting a fixed pitch between the first features of two adjacent ones of the first wafers. The method for affixing a reconstituted wafer according to claim 2, wherein the step of providing the second reconstituted wafer further comprises the step of: identifying each of the second wafers before attaching the second wafer a second feature; and setting a fixed pitch at the second of the two adjacent second wafers Between the features; wherein the first feature of the first wafer corresponds to the second feature electrically connected to the second wafer. The method for affixing a reconstituted wafer according to claim 2, wherein the step of obtaining the at least one first feature positioning point further comprises the step of: obtaining, by the identification feature of the first carrier a first diameter imaginary line of the first carrier, the first diameter imaginary line passing through the first center of the first carrier; obtaining a first positioning imaginary line passing through the first center, the first Positioning the imaginary line with the first diameter imaginary line with a fixed angle; and obtaining at least one intersection of the first positioning imaginary line and the periphery of the first carrier as the at least one first feature positioning point . The method for affixing a reconstituted wafer according to claim 4, wherein the fixed angle of the first positioning imaginary line and the first diameter imaginary line is less than or equal to 90 degrees. The method for aligning a reconstituted wafer according to claim 4, comprising: causing the first positioning imaginary line to pass the first feature of the first one of the first rows of the first row to obtain The intersection of the first positioning imaginary line and the periphery of the first carrier is used as the first feature positioning point. The method for affixing a reconstituted wafer according to claim 4, wherein the step of obtaining the at least one second feature locating point further comprises the step of: obtaining, by the identification feature of the second carrier a second diameter imaginary line of the second carrier, the second diameter imaginary line passing through the second center of the second carrier; obtaining a second positioning imaginary line passing through the second center, the second Positioning the imaginary line with the second diameter imaginary line with a fixed angle; and obtaining at least one intersection of the second positioning imaginary line and the periphery of the second carrier as the at least one second feature positioning point ; The first positioning imaginary line and the first diameter imaginary line are sandwiched by the fixed angle in a first direction, wherein the second positioning imaginary line and the second diameter imaginary line are along a first direction The opposite direction pinches the fixed angle. The method of affixing a reconstituted wafer according to claim 7, comprising: causing the second positioning imaginary line to pass the second feature of a last one of the second wafers of the first course to obtain the The intersection of the second positioning imaginary line and the periphery of the second carrier is used as the second feature positioning point. The method for aligning a reconstituted wafer according to claim 1, further comprising a gap between the first reconstituted wafer and the second reconstituted wafer.