TW201705110A - Gate driving circuit - Google Patents

Abstract

An embodiment of the invention provides a gate driving circuit for an in-cell touch panel to improve the issue that the undesired falling time of a pre-stage shifter register and the undesired rising time of a next-stage shifter register during a touch sensing period. The issue is caused due to the output signal of the shift register cannot be correctly transmitted to the pre-stage shifter register and the next-stage shifter register during the touch sensing period.

Description

Gate drive circuit

The invention relates to a shift register, in particular to a shift register in an in-cell touch panel.

Shift register is widely used in data driving circuit and gate driving circuit to control the timing of sampling data signals of each data line and generate scanning signals for each gate line. In the data driving circuit, the shift register is configured to output a selected signal to each data line, so that the image data can be sequentially written into each data line. On the other hand, in the gate driving circuit, the shift register is configured to generate a scan signal to each gate line for sequentially writing the image signals supplied to the data lines to the respective pixels.

Generally, the gate driving circuit of the non-touch panel includes a plurality of shift registers, wherein each shift register receives an output signal from the shift register of the upper stage as the shift register. Start signal. In the operation of the gate circuit of the touch panel, since the touch panel needs to be touched, the conventional gate driving circuit and the driving method cannot be directly applied to the touch panel.

Figure 1 is a schematic diagram of a conventional gate circuit. The gate circuit in Fig. 1 includes a plurality of shift registers SRC1, SRC2 to SRCN. Except that the first stage shift register SRC1 is enabled to receive the start signal STV, each of the shift register is enabled to receive the output signal of the previous stage shift register, and is enabled. One The output signal of the stage shift register is reversed to the shift register (ie, the shift register is turned off). However, the driving mechanism of the touch panel must be reserved for a period of time as a touch sensing period to sense the user's touch on the touch panel. During touch sensing, the gate circuit must be suspended. As a result, the shift register may not be correctly received by the output register of the previous stage shift register, or may not be correctly received. The output signal of the one-stage shift register is turned off.

An embodiment of the present invention provides a gate driving circuit for driving a pixel array. The gate driving circuit includes a plurality of shift registers, wherein the gate driving circuit includes at least one touch in a display period. The detection period, and an N-th shift register and a previous stage (for example, the N-1th stage) shift register correspond to a touch detection period. The Nth stage shift register includes a pull-up control circuit, a pull-up output circuit, a pull-down circuit, and a trigger circuit. The pull-up control circuit is configured to receive an output signal of the previous stage shift register. The pull-up output circuit is coupled to the pull-up control circuit to output a first output signal as an output signal of the Nth stage shift register during the non-touch detection period. The pull-down circuit is coupled to the pull-up output circuit and the pull-up control circuit, and receives and changes the logic level of the first output signal according to an output signal of the first-stage (for example, the (N+1)th stage shift register) . The trigger circuit is coupled to the pull-up output circuit and the pull-up control circuit, and the output signal of the previous stage shift register is enabled, and during the touch detection period, according to a touch detection The measurement signal additionally outputs a second output signal as an output signal of the Nth stage shift register.

Another embodiment of the present invention is a gate driving circuit for driving Moving a pixel array, the gate driving circuit comprises a plurality of shift registers, wherein a gate period of the gate driving circuit includes a touch detection period, and an Nth stage shift register and A first stage shift register corresponds to a touch detection period, and a length of a first clock signal received by the Nth stage shift register is greater than a length of the touch detection period.

SRC1, SRC2, SRCN, SR5, SR7‧‧‧ shift register

51‧‧‧Trigger signal generation circuit

81‧‧‧ Pull-up control circuit

82‧‧‧ Pull-up output circuit

83‧‧‧ Pulldown circuit

84‧‧‧ trigger circuit

1301‧‧‧First gate drive circuit

1302‧‧‧second gate drive circuit

1303‧‧‧Pixel Array

OUTN‧‧‧ first output signal

OUTNX‧‧‧second output signal

OUT(N-1) or OUT(N+1)‧‧‧ First output signal of the previous stage shift register

OUT(N-1)X or OUT(N+1)X‧‧‧Second output signal of the first stage shift register

Vx‧‧‧ touch detection signal

Figure 1 is a schematic diagram of a conventional gate circuit.

FIG. 2 is a schematic diagram showing the display period of the in-cell touch panel and the non-in-cell touch panel.

FIG. 3 is a timing diagram of a shift register in a gate circuit of a non-in-cell touch panel.

FIG. 4 is a timing diagram of a shift register in a gate circuit of an in-cell touch panel.

Figure 5 is a schematic view of an embodiment of an in-cell touch panel in accordance with the present invention.

Fig. 6 is a timing diagram showing an embodiment of a shift register in a gate circuit of an in-cell touch panel according to the present invention.

Figure 7A is a schematic diagram of an embodiment of a trigger signal in accordance with the present invention.

Figure 7B is a schematic diagram of another embodiment of a trigger signal in accordance with the present invention.

Figure 7C is a schematic diagram of another embodiment of a trigger signal in accordance with the present invention.

Figure 8A is a diagram showing an embodiment of a shift register in a gate drive circuit in accordance with the present invention.

Figure 8B is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention.

Figure 9 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention.

Figure 10 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention.

Figure 11 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention.

Figure 12 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention.

Figure 13 is a schematic view of another embodiment of an in-cell touch panel in accordance with the present invention.

FIG. 2 is a schematic diagram showing the display period of the in-cell touch panel and the non-in-cell touch panel. In the frame rate (FRAME) period of the 1/60 second (frame update frequency: 60 Hz) of the liquid crystal display, the in-cell touch panel must take part of the time as the touch detection period. Measure the user's touch status. Because the driving method of the plurality of shift registers in the current gate driving circuit is to trigger the touch signal by the output signal of the shift register located in the first stage of the touch detection period (for example, the N-1th stage). a shift register at the level one level after the detection period (for example, the Nth level), and touch The output signal of the shift register of the first stage (for example, the Nth stage) after the detection period is returned to the shift register located before the touch detection period (for example, the N-1th stage), and the acceleration is performed. The output signal of the first-stage shift register before the touch detection cycle is quickly pulled down to the low voltage level. During the touch detection cycle time, the shift register in the gate drive circuit cannot be driven correctly, so it is easy to cause the rise or fall of the output signal of the shift register before and after the touch detection cycle. The time is abnormal, so external signals and circuits need to be used to improve the problem.

Since the driving method of the gate driving circuit is a sequential driving method, as long as the start time t1 and the end time t2 of the touch detection cycle are known, the affected shift register can be known, and then the external input is passed. The signal, or the circuit for the shift register, is modified to improve the possible abnormality of the gate driving circuit caused by the touch detection period of the in-cell touch panel.

FIG. 3 is a timing diagram of a shift register in a gate circuit of a non-in-cell touch panel. In Figure 3, only four shift registers are taken as an example. The four shift registers are consecutively connected. In Figure 3, CLK1, CLK3, CLK5, and CLK7 indicate time. The waveform of the pulse signal, SR3, SR5, and SR7 are the rising control signal waveforms of the respective shift registers. As can be seen from FIG. 3, the rising control signal waveform of the shift register SR5 is first charged to the first voltage level by the clock signal CLK3, and then the shift register SR5 is received when the clock signal CLK5 is received. The rising control signal waveform is pulled up to the second voltage level. Then, when the pulse signal CLK5 transitions from the high voltage level to the low voltage level, the rising control signal waveform of the shift register SR5 is first pulled down to the first voltage level. Then, when the shift register SR5 detects that the clock signal CLK7 changes from the high voltage level to the low voltage level, the rising control signal waveform of the shift register SR5 is pulled down to the third voltage level.

FIG. 4 is a timing diagram of a shift register in a gate circuit of an in-cell touch panel. In Fig. 4, a touch detection period (TP sensing) is inserted between the shift registers SR5 and SR7. Therefore, during the touch detection period, the clock signal temporarily stops outputting, so the pull-up control signal of the shift register SR5 lacks the output signal of the shift register SR7 to pull-up control of the shift register SR5. The signal is discharged, so the level of the pull-up control signal of the shift register SR5 is lowered, thereby affecting the fall time of the output signal (not shown). At the same time, the shift register SR7 lacks the output signal of the shift register SR5 during the touch detection period to enable the shift register SR7, so that the level of the pull-up control signal of the shift register SR7 is Decrease, which in turn affects the rise time of the output signal (not shown). Therefore, in this case, different mechanisms are proposed to improve the rise time or fall time of the shift register corresponding to the touch detection period, such as the shift registers SR5 and SR7.

In order to solve this problem, please refer to Figure 5. Figure 5 is a schematic view of an embodiment of an in-cell touch panel in accordance with the present invention. In Fig. 5, only some of the elements are used for explanation, and the elements of the embodiment are not limited thereto. In this embodiment, the touch detection period is generated between the shift registers SR5 and SR7, so the trigger signal generating circuit 51 outputs a trigger signal to the shift register SR5 and/or SR7 to improve The aforementioned shortcomings. In the present embodiment, the trigger signal generating circuit 51 generates at least one trigger signal to the shift register SR5 to improve the falling time of the output signal of the shift register SR5. In another embodiment, the trigger signal generating circuit 51 generates two different trigger signals to the shift register SR5 and the shift register SR7, respectively, to improve the fall time of the output signal of the shift register SR5 ( Falling time) and the rising time of the output signal of the shift register SR7. Regarding the trigger signal generated by the trigger signal generating circuit 51, please refer to the figures 7A-7C. For the adjusted clock signal, please refer to Figure 6.

Fig. 6 is a timing diagram showing an embodiment of a shift register in a gate circuit of an in-cell touch panel according to the present invention. Please refer to Figure 4 and Figure 1 together. As shown in Figure 4, because during the touch detection cycle, all clock signals are maintained at a low voltage level (that is, no clock signal is generated). Therefore, in this embodiment, during the touch detection period, the clock signals input to the shift registers SR5 and SR7 are adjusted. In Fig. 6, the clock signal CLK7 input to the shift register SR7 is adjusted to maintain a high voltage level during the touch detection period. In this way, it can be ensured that the rising control signal of the shift register SR5 can be correctly maintained at the first logic level, and the rising control signal of the shift register SR7 can be correctly maintained at the second logic level (higher Logic level).

Figure 7A is a schematic diagram of an embodiment of a trigger signal in accordance with the present invention. In the prior art, during the touch detection period, the clock signal source stops outputting the clock signal, so in FIG. 7A, it can be found that after the clock signal CLKB, during the touch detection period, there is no time. The pulse signal is generated until the clock detection signal period CLKA is generated. In FIG. 7A, the touch detection signal Vx is an external signal, and the period in which the logic level of the touch detection signal Vx is at a high level covers at least the entire touch detection period. The touch detection signal Vx is used as an output signal of the shift register in the previous stage of the touch detection period [for example, OUT(n-1)] and a shift register after the touch detection period. The phase of the trigger signal of the output signal OUT n compensates for the falling time (Falling Time) of the shift register before the touch detection cycle caused by the interruption of the clock signal during the touch detection cycle and the touch The effect of the Rising Time Delay of the level shift register after the detection cycle.

Suppose a gate pulse has a length of 1 Tgw, and each clock signal has a length of 4 Tgw, which is the length of the 4 times pulse signal. It should be noted that the time length of each clock signal can be given different time lengths according to requirements, and 1 Tgw refers to the time required for a data line to charge pixels. In this embodiment, the touch detection signal Vx overlaps with the clock signal CLKB of the previous stage and the clock signal CLKA of the previous stage by at least 2 Tgw. In this embodiment, the touch detection signal Vx overlaps with half of the time length of the clock signal CLKA and half of the time length of the clock signal CLKB, but allows an error of 0.5 ms, that is, the length of the overlapped portion. Between 2Tgw +/- 0.5ms. In other words, in the present embodiment, the length of time of 1 Tgw is 0.5 ms. In this embodiment, the length of the touch detection signal Vx is a touch detection period (T _TP ) + 4 Tgw, where T _TP is the length of the touch detection period. In other words, in FIG. 7A, the shift register located in the first stage [(n-1)th stage of the touch detection period starts from the output signal of the (n-2)th stage (not shown), The delay time of the touch detection signal Vx is enabled, and the shift register of the first stage (nth level) after the touch detection period starts from the rise time of the touch detection signal Vx. It is enabled until the falling time of the clock signal CLKA.

Figure 7B is a schematic diagram of another embodiment of a trigger signal in accordance with the present invention. In the prior art, during the touch detection period, the clock signal source stops outputting the clock signal, so in FIG. 7B, it can be found that after the clock signal CLKB, during the touch detection period, there is no time. The pulse signal is generated until the clock detection signal period CLKA is generated.

In FIG. 7B, the touch detection signal Vx is an external signal, and the period in which the logic level of the trigger detection signal Vx is at a high level covers the entire touch. Detection cycle. Using the touch detection signal Vx as the pull-up control circuit of the [first (n-1)th stage shift register of the touch detection period and the subsequent stage of the touch detection period (nth level) The phase of the trigger signal of the pull-up control circuit of the shift register compensates for the fall time of the shift register of the previous stage of the touch detection period caused by the interruption of the clock signal during the touch detection period (Falling) Time) and the influence of the Rising Time of the shift register of the latter stage of the touch detection cycle.

In this embodiment, when the clock signal CLKB changes from a high logic level to a low logic level, the touch detection signal Vx is pulled up to a high logic level, and when the detection of the clock signal CLKA is converted to a high logic At the level, the touch detection signal Vx is pulled down to a low logic level. In other words, in FIG. 7B, the time when the touch detection signal Vx is maintained at the high logic level is exactly equal to the length of the touch detection period.

Figure 7C is a schematic diagram of another embodiment of a trigger signal in accordance with the present invention. The touch detection signal Vx in FIG. 7C includes the first touch detection signal Vx1 after the clock signal CLKB and the second touch detection signal Vx2 before the clock signal CLKA. In this embodiment, the first touch detection signal Vx1 and the second touch detection signal Vx2 have a time length of at least 1 Tgw, wherein the first touch detection signal Vx1 is used to be the previous stage (for example, the Nth -1 level) The pull-up control signal of the shift register is pulled high to reduce the falling time of the output signal of the previous stage shift register, and the second touch detection signal Vx2 is the reverse scan. When used in reverse scanning, the clock signal CLKA is provided to the shift register of the previous stage of the touch sensing period, and the clock signal CLKB is provided to the shift register of the first stage after the touch sensing period. Therefore, the second touch detection signal Vx2 is used to pull up the pull-up control signal of the previous stage shift register to reduce the falling time of the output signal of the previous stage shift register.

In an embodiment of the invention, the gate driving circuit of the embedded touch panel includes a plurality of cascaded shift registers. Wherein, when the touch detection period of the embedded touch panel is generated between the (N-1)th shift register and the Nth shift register, the Nth stage shift register receives The time length of the incoming clock signal must be greater than or equal to the length of the touch detection period, as shown in Figure 6. In another embodiment, the time length of the clock signal of the high logic level received by the Nth stage shift register must be greater than the length of the touch detection period, and the N-1th shift is temporarily suspended. The time length of the clock signal that the register receives the high logic level must also be greater than the length of the touch detection period. In addition, in another embodiment, the time that a first clock signal received by the Nth stage shift register is maintained at a high logic level must be greater than the length of the touch detection period, and the previous stage [the ( The N-1) stage shift register receives a second clock signal, and the logic level of the first clock signal rises earlier than the logic level of the second clock signal decreases. .

In an embodiment, the clock generation circuit in the embedded touch panel can directly generate the clock signal CLK7 as shown in FIG. 6 according to the touch sensing signal.

In the foregoing description, some of them are mainly based on changing the clock signal received by the shift register, but under the above concept, the object of the present invention can also be achieved by changing the circuit of the shift register. . The present invention provides an embodiment of a plurality of shift registers that can be applied to an in-cell touch panel. During the touch detection cycle, the shift register can receive the touch detection signal V _X and output the output signal to the previous stage (for example, the N-1 level) and the touch at the touch detection cycle. The shift register of the latter stage of the detection period (for example, the Nth stage) is used to improve the fall time of the shift register of the previous stage and the rise time of the shift register of the latter stage. The shift register in some embodiments can be applied to all shift registers in the gate driving circuit, and the shift register in some embodiments can only be applied to the touch detection period. Shift register.

Figure 8A is a diagram showing an embodiment of a shift register in a gate drive circuit in accordance with the present invention. The shift register in this embodiment is a shift register corresponding to a subsequent stage (for example, the Nth stage) of the touch detection period. In the embodiment of Fig. 5, the shift register in Fig. 8A is the shift register SR7 in Fig. 5. In another example, the shift register in this embodiment can be applied to all shift registers in the gate drive circuit. If the shift register is a shift register corresponding to one stage after the touch detection period, the shift register additionally outputs the second output signal OUTNX during the touch detection period, as shown in FIG. For example, the shift register SR7 outputs a second output signal OUT7X to the shift register SR5, if the shift register does not correspond to the shift of the previous or subsequent stage of the touch detection cycle. The shift register stores the first output signal OUTN during the non-touch detection period. If the embodiment of FIG. 5 is used as an example, the shift register SR7 outputs the first output signal OUT7 for shifting. Bit register SR5 and shift register SR9.

For the shift register located in the latter stage of the touch detection cycle (for example, the Nth stage), it includes a pull-up control circuit 81, a pull-up output circuit 82, a pull-down circuit 83, and a flip-flop circuit 84. The pull-up control circuit 81 receives the first output signal of the previous stage shift register, for example, OUT (N-1) or OUT (N+1). When the gate drive circuit is forward scanning, the output signal of the previous stage shift register is OUT(N-1). When the gate drive circuit is reverse scan, the output signal of the previous stage shift register is OUT(N+1). It should be noted that, in the previous embodiment, the shift register is described by N-1 or N+1, but in other embodiments, the shift register may be connected at a fixed interval. That is to say, the previous stage of the Nth stage shift register may be N-Y stage or N+Y and shift register, Y is an integer and less than N. As in the embodiment of Fig. 5, Y is 2.

The pull-up output circuit 82 is coupled to the pull-up control circuit 81 and receives a first clock signal (not shown). The pull-down circuit 83 receives the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. During the non-touch detection period, the pull-down circuit 83 and the pull-up output circuit 82 are configured to output a first output signal OUTN as an output signal of the shift register. Similarly, when the gate drive circuit is forward scanning, the first output signal of the next stage shift register is OUT(N+1). When the gate drive circuit is reverse scan, the first output signal of the next stage shift register is OUT(N-1).

For a shift register located at a later stage of the touch detection cycle (eg, the Nth stage), the trigger circuit 84 receives the second output signal OUT(N-1)X of the previous stage shift register or OUT (N+1) X, and the touch detection signal Vx. During the touch detection cycle, the touch detection signal V _x is pulled up to a high voltage level and output to the trigger circuit 84, and the trigger circuit 84 receives the second output signal OUT of the previous stage shift register ( N-1) X or OUT(N+1)X, at which time the Nth stage shift register outputs the second output signal OUTNX.

For the shift register located in the previous stage of the touch detection cycle (for example, the N-1th stage), please refer to FIG. 8B, which includes the pull-up control circuit 81, the pull-up output circuit 82, and the pull-down circuit. 83 and trigger circuit 84. The pull-up control circuit 81 receives an output signal of the shift register of the previous stage with respect to the shift register of the (N-1)th stage, for example, OUT(N-2) or OUTN. When the gate drive circuit is forward scanning, the output signal received by the pull-up control circuit of the shift register of the N-1th stage is OUT(N-2). When the gate drive circuit is reverse scan, the output signal received by the pull-up control circuit is For OUTN.

For the shift register located in the previous stage of the touch detection cycle (for example, the N-1th stage), the pull-up output circuit 82 receives the second clock signal CLK2 and is coupled to the pull-up control circuit 81.

For the shift register located in the previous stage of the touch detection cycle (for example, the N-1th stage), the pull-down circuit 83 receives the next shift of the shift register relative to the N-1th stage. The first output signal of the register is, for example, OUTN or OUT (N-2), and the pull-down circuit 83 and the pull-up output circuit 82 are used to output the first output signal OUT(N-1) of the shift register. Similarly, when the gate drive circuit is forward scanning, the first output signal of the next stage shift register is OUTN. When the gate drive circuit is reverse scan, the first output signal of the next stage shift register is OUT (N-2).

For the shift register located in the previous stage of the touch detection period (for example, the N-1th stage), the trigger circuit 84 receives the shift of the shift register relative to the N-1th stage. The second output signal OUTNX or OUT(N-2)X of the register and the touch detection signal Vx. During the touch detection cycle, the touch detection signal V _x is pulled up to a high voltage level and output to the trigger circuit 84, and the trigger circuit 84 receives the second output signal OUTNX of the subsequent stage shift register or OUT (N-2) X, at this time, the N-1th shift register outputs the second output signal OUT(N-1)X.

The previous stage shift register SR35 and the next stage shift register SR36 corresponding to one touch detection period are taken as an example. In the touch detection cycle, the shift register SR35 cannot receive the output signal of the shift register SR36, so that the falling time of the shift register SR35 is elongated, and the trigger circuit of the embodiment is used. The touch detection cycle is still generated by the shift register SR36 to output a second output signal OUT36X The register SR35 causes the fall time of the shift register SR35 to be improved. Similarly, during the touch detection period, the shift register SR36 can still receive the second output signal OUT35X outputted by the shift register SR35 to improve the rise time of the shift register SR36.

In the present invention, the trigger signal generating circuit 51 in Fig. 5 can be applied to the shift register shown in Fig. 8, and the trigger signal output from the trigger signal generating circuit 51 determines whether the flip-flop circuit 84 is enabled.

9 to 12 are schematic views of four embodiments of a shift register in the gate drive circuit according to the present invention, all of which are shifted at the next stage (Nth stage) of the touch detection cycle. Register to illustrate. Figure 9 is a schematic illustration of an embodiment of a shift register in a gate drive circuit in accordance with the present invention. The shift register is composed of a plurality of transistors and capacitors, wherein the first transistor T1 corresponds to the pull-up control circuit 81 in FIG. 8, and the second transistor T2 and the fourth transistor T4 correspond to the image in FIG. The pull-down circuit 83, the third transistor T3 corresponds to the pull-up output circuit 82 in FIG. 8, and the fifth transistor T5 and the sixth transistor T6 correspond to the flip-flop circuit 84 in FIG.

The input end of the first transistor T1 is coupled to the gate terminal to receive the first output signal OUT(N-1) or OUT(N+1) of the previous stage shift register. The second transistor T2 has an input end coupled to the output end of the first transistor T1, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The third transistor T3 has an input terminal for receiving the clock signal CLK, and a gate terminal coupled to the output end of the first transistor T1. The fourth transistor T4 has an input end coupled to the output end of the third transistor T3, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The capacitor C has a first end coupled to the first An output end of the transistor T1 and a second end are coupled to the output end of the third transistor T3.

The fifth transistor T5 has an input terminal for receiving the touch detection signal V _x , a gate terminal coupled to the output end of the first transistor T1 , and an output terminal for outputting the second output signal OUTNX. The input end of the sixth transistor T6 is coupled to the gate terminal to receive the second output signal OUT(N-1)X or OUT(N+1)X of the previous stage shift register, and the sixth transistor T6 The output end is coupled to the output end of the first transistor T1.

For a shift register located in the first stage of the touch detection cycle (for example, the (N-1)th stage), the connection between the transistors is at the next level of the touch detection cycle (for example, The N-level shift register is similar, except that in the forward scan, the sixth transistor T6 of the shift register located at the next stage of the touch detection cycle (for example, the Nth stage) The input end receives the second output signal OUT(N-1)X of the previous stage shift register, and is temporarily stored in the shift of the previous stage of the touch detection period (for example, the N-1th stage) The input end of the sixth transistor T6 of the device receives the second output signal OUTNX of the shift register of the next stage (for example, the Nth stage).

In a normal case (that is, during the display period), the touch detection signal V _x is a low voltage level. At this time, the shift register transmits the first stage shift register and the next level shift through the first output signal OUTN. The voltage level of the bit register is pulled up or pulled down. At this time, the voltage level of the first output signal OUTN is determined by the clock signal CLK. During the touch detection period, the shift register pulls up or pulls down the voltage level of the output signals of the previous stage shift register and the next stage shift register through the second output signal OUTNX. The voltage level of the second output signal OUTNX at this time is determined by the touch detection signal V _x .

In this embodiment, the trigger signal generating circuit 51 in FIG. 5 may The shift register shown in FIG. 9 is applied, and the trigger signal output from the trigger signal generating circuit 51 determines the voltage level of the second output signal OUTNX of the shift register.

Figure 10 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention. The shift register is composed of a plurality of transistors and capacitors, wherein the first transistor T1 corresponds to the pull-up control circuit 81 in FIG. 8, and the second transistor T2 and the fourth transistor T4 correspond to the image in FIG. The pull-down circuit 83, the third transistor T3 corresponds to the pull-up output circuit 82 in FIG. 8, and the fifth transistor T5 corresponds to the flip-flop circuit 84 in FIG.

The input end of the first transistor T1 is coupled to the gate terminal to receive the second output signal OUT(N-1)X or OUT(N+1)X of the previous stage shift register during the touch detection period. . The second transistor T2 has an input end coupled to the output end of the first transistor T1, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The third transistor T3 has an input terminal for receiving the clock signal CLK, and a gate terminal coupled to the output end of the first transistor T1. The fourth transistor T4 has an input end coupled to the output end of the third transistor T3, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The capacitor C has a first end coupled to the output end of the first transistor T1 and a second end coupled to the output end of the third transistor T3. The fifth transistor T5 has an input terminal for receiving the touch detection signal V _x , a gate terminal coupled to the output end of the first transistor T1 , and an output terminal outputting the second output signal OUTNX of the shift register .

Under normal circumstances (that is, during the display period), the touch detection signal Vx is a low voltage level. At this time, the shift register transmits the shift register to the previous stage and the next stage through the first output signal OUTN. The voltage level of the output signal of the register is pulled up or pulled down. At this time, the voltage level of the output signal OUTN is determined by the clock signal CLK. During the touch detection period, the touch detection cycle next stage (Nth stage) shift register transmits the output signal of the previous stage (N-1th stage) shift register through the second output signal OUTNX. The voltage level is pulled down, and the shift stage of the touch detection period (the N-1th stage) shift register is transmitted to the next stage (the Nth stage) by the second output signal OUT(N-1)X. The voltage level of the output signal of the register is pulled up. At this time, the voltage level of the output signal OUTNX or OUT(N-1)X is determined by the touch detection signal V _x .

In the present embodiment, the trigger signal generating circuit 51 in FIG. 5 can be applied to the shift register shown in FIG. 10, and the trigger signal outputted by the trigger signal generating circuit 51 determines the shift register. The voltage level of the output signal OUTNX.

In this embodiment, for the shift register located before the touch detection period (for example, the (N-1)th stage), the connection between the transistors and the touch detection period are The shift register of the first stage (for example, the Nth stage) is similar, except that in the forward scan, the shift register of the next stage of the touch detection period (for example, the Nth stage) The input end of the first transistor T1 receives the second output signal OUT(N-1)X of the previous stage shift register and is located in the previous stage of the touch detection cycle (for example, the N-1th stage) The input terminal of the first transistor T1 of the shift register receives the second output signal OUTNX of the shift register of the next stage (for example, the Nth stage).

Figure 11 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention. The shift register is composed of a plurality of transistors and capacitors, wherein the first transistor T1 corresponds to the pull-up control circuit 81 in FIG. 8, and the second transistor T2 and the fourth transistor T4 correspond to the image in FIG. Pull-down circuit 83, third power The crystal T3 corresponds to the pull-up output circuit 82 in FIG. 8, and the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 correspond to the flip-flop circuit 84 in FIG.

The input end of the first transistor T1 is coupled to the gate terminal to receive the first output signal OUT(N-1) or OUT(N+1) of the previous stage shift register. The second transistor T2 has an input end coupled to the output end of the first transistor T1, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The third transistor T3 has an input terminal for receiving the clock signal CLK, and a gate terminal coupled to the output end of the first transistor T1. The fourth transistor T4 has an input end coupled to the output end of the third transistor T3, and a gate terminal receiving the output signal OUT(N+1) or OUT(N-1) of the next-stage shift register and An output is grounded or relatively low. The capacitor C has a first end coupled to the output end of the first transistor T1 and a second end coupled to the output end of the third transistor T3. The fifth transistor T5 has an input terminal for receiving the touch detection signal V _x , a gate terminal coupled to the output end of the first transistor T1 , and an output terminal for outputting the second output of the shift register Signal OUTNX. The sixth transistor T6 has an input coupled to the gate of the sixth transistor T6 for receiving the second output signal OUT(NY)X of the (NY)-stage shift register, and an output terminal coupled Connected to the output of the first transistor T1. The seventh transistor T7 has an input coupled to the gate of the seventh transistor T7 for receiving the second output signal OUT(N+Y)X of the (N+Y)th stage shift register, and a The output end is coupled to the output end of the first transistor T1. In the present embodiment, at one time point, only one of the sixth transistor T6 and the seventh transistor T7 is turned on.

In a normal case (that is, during the display period), the touch detection signal V _x is a low voltage level. At this time, the shift register transmits the first stage shift register and the next level shift through the first output signal OUTN. The voltage level of the output signal of the bit register is pulled up or pulled down. At this time, the voltage level of the first output signal OUTN is determined by the clock signal CLK. During the touch detection period, the shift register pulls up or pulls down the voltage level of the output signals of the previous stage shift register and the next stage shift register through the second output signal OUTNX. The voltage level of the second output signal OUTNX at this time is determined by the touch detection signal V _x .

In this embodiment, the trigger signal generating circuit 51 in FIG. 5 can be applied to the shift register shown in FIG. 11, and the trigger signal outputted by the trigger signal generating circuit 51 determines the shift register. The voltage level of the output signal OUTNX.

In this embodiment, for the shift register located before the touch detection period (for example, the (N-1)th stage), the connection between the transistors and the touch detection period are The shift register of the first stage (for example, the Nth stage) is similar, except that during the forward scan, the shift is temporarily stored in the previous stage of the touch detection cycle (for example, the N-1th stage). The input end of the sixth transistor T6 of the device receives the second output signal of the previous stage shift register relative to the N-1th stage shift register, that is, the (N-2Y)th order shift The second output signal OUT(N-2Y)X output by the trigger circuit of the bit buffer is located at the seventh stage of the shift register of the previous stage of the touch detection cycle (for example, the N-1th stage) The input terminal of the transistor T7 receives the second output signal OUTNX of the shift register of the next stage (for example, the Nth stage).

It should be noted that, in this embodiment, the touch detection period may be randomly inserted between two display periods. For example, the number of shift registers before a touch detection period will be It is equal to the number of shift registers after the touch detection cycle. For example, after every 36-stage shift register is driven, touch detection is performed, and then the 36-stage shift register is driven and then touch detection is performed. Therefore, the touch detection period will be between the 36th shift register and the 37th shift register, and the 72th shift The scratchpad is between the 73rd and the shift register, and there is a 108th shift register to the 109th shift register, and so on. In this embodiment, since the sixth transistor T6 and the seventh transistor T7 are provided, the touch sensing function can be performed without being limited to the fixed isolation.

Figure 12 is a schematic illustration of another embodiment of a shift register in a gate drive circuit in accordance with the present invention. The shift register is composed of a plurality of transistors and capacitors, wherein the first transistor T1 corresponds to the pull-up control circuit 81 in FIG. 8, and the second transistor T2 and the fourth transistor T4 correspond to the image in FIG. The pull-down circuit 83, the third transistor T3 corresponds to the pull-up output circuit 82 in FIG. 8, and the second capacitor C2 corresponds to the flip-flop circuit 84 in FIG.

The input end of the first transistor T1 is coupled to the gate terminal to receive the first output signal OUT(N-1) or OUT(N+1) of the previous stage shift register. The second transistor T2 has an input end coupled to the output end of the first transistor T1, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The third transistor T3 has an input terminal for receiving the clock signal CLK, and a gate terminal coupled to the output end of the first transistor T1. The fourth transistor T4 has an input end coupled to the output end of the third transistor T3, and a gate terminal receiving the first output signal OUT(N+1) or OUT(N-1) of the next-stage shift register. And an output is grounded or relatively low. The first capacitor C1 has a first end coupled to the output end of the first transistor T1, and a second end coupled to the output end of the third transistor T3. The second capacitor C2 has a first end receiving the touch detection signal V _x and a second end coupled to the gate of the third transistor T3.

In the present embodiment, by using the capacitive coupling effect, so that the touch-sensing signal V _x at the transition from a low voltage level to high voltage level, the pulse signal is supplied to an upward moment OUTN of the first output signal, to produce similar The effect of the first trigger signal Vx1 in Fig. 7C is to improve the fall time of the shift register of the previous stage.

In this embodiment, the trigger signal generating circuit 51 in FIG. 5 can be applied to the shift register shown in FIG. 12, and the trigger signal Vx generated by the trigger signal generating circuit 51 or the first trigger signal Vx1. It is applied to the second capacitor C2 to improve the fall time of the previous stage shift register.

In an embodiment of the present invention, the circuit of FIG. 12 can also be used in a non-touch panel. For the N-th stage shift register of the non-touch panel, the trigger circuit 84 is coupled to the pull-up. The output circuit 82 and the pull-up control circuit 81, the pull-up output circuit 82 receives the first clock signal CLK1, and the trigger circuit receives a third clock signal CLK3 (not shown) that is later than the first clock signal CLK1. .

In an embodiment of the invention, the in-cell touch display device has a gate circuit for driving an array of pixels, wherein the gate circuit is composed of a plurality of shift registers, and each shift register The detailed circuit is shown in Figures 9-12.

In another embodiment of the present invention, the non-in-line touch display device has a gate circuit for driving a pixel array, wherein the gate circuit is composed of a plurality of shift registers, and each shift is temporarily suspended. The detailed circuit of the memory is shown in Figures 9, 11~12.

In an embodiment of the invention, the in-cell touch display device has a gate circuit for driving a pixel array, wherein the gate circuit is composed of a plurality of shift registers, and the Nth in the gate circuit The -1 level and the Nth stage shift register correspond to a touch detection period. Therefore, the N-1th stage and the Nth stage shift register can be implemented by the shift register shown in Figures 9-12.

In an embodiment of the present invention, an in-cell touch display device Having a gate circuit for driving a pixel array, wherein the gate circuit is composed of a plurality of gate driving units, wherein an output signal of each gate driving unit is transmitted to a gate driving unit of the next stage to start the next stage Gate drive unit. And the output signal of each level of the gate drive unit is transmitted to the gate drive unit of the previous stage, and the output signal of the gate drive unit of the previous stage is pulled down. The gate driving unit includes a shift register and a trigger circuit, wherein an embodiment of the shift register can be the pull-up control circuit 81, the pull-up output circuit 82, and the pull-down circuit in FIG. 8A or 8B. 83 composition. One embodiment of the trigger circuit is the flip-flop circuit 84 in FIG. 8A or FIG. 8B. During the display period as shown in FIG. 2, the output signal of the gate driving unit is determined by the shift register, and during the touch detection period as shown in FIG. 2, the trigger circuit receives a touch. The signal is detected such that the output signal of the gate drive unit is determined by the trigger circuit. In the present specification, the circuits in Figures 9, 11, and 12 can also be implemented as a gate drive unit.

Figure 13 is a schematic view of another embodiment of an in-cell touch panel in accordance with the present invention. In Fig. 13, only some of the elements are used for explanation, and the elements of the embodiment are not limited thereto. In FIG. 13, the in-cell touch panel includes a first gate driving circuit 1301 and a second gate driving circuit 1302 to drive a pixel array 1303. The first gate drive circuit 1301 includes a plurality of odd-numbered shift registers, and the second gate drive circuit 1302 includes a plurality of even-numbered shift registers.

In Fig. 13, assuming that a touch detection period (TP sensing) is inserted between the previous stage shift register SR9 and the next stage shift register SR11, the shift can be temporarily performed in the manner described above. The output signals of the registers SR9 and SR11 or the received clock signals are adjusted to achieve the object of the present invention. Similarly, the second gate drive The shift registers SR8, SR10 and/or SR12 in the path 1302 also need to adjust the output signal of the shift register or the received clock signal in the manner described above to achieve the object of the present invention.

The above is only the preferred embodiment of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes and modifications made by the scope of the invention and the description of the invention are All remain within the scope of the invention patent. In addition, any of the objects or advantages or features of the present invention are not required to be achieved by any embodiment or application of the invention. In addition, the abstract sections and headings are only used to assist in the search of patent documents and are not intended to limit the scope of the invention.

81‧‧‧ Pull-up control circuit

82‧‧‧ Pull-up output circuit

83‧‧‧ Pulldown circuit

84‧‧‧ trigger circuit

OUTN‧‧‧ first output signal

OUTNX‧‧‧second output signal

OUT(N-1) or OUT(N+1)‧‧‧ First output signal of the previous stage shift register

OUT(N-1)X or OUT(N+1)X‧‧‧Second output signal of the first stage shift register

Vx‧‧‧ touch detection signal

Claims (18)

A gate driving circuit for driving a pixel array, the gate driving circuit comprising a plurality of shift registers, wherein a gate detection circuit (FRAME) period includes a touch detection period, And an N-th shift register and a previous-stage shift register corresponding to the touch detection period, the N-th shift register includes: a pull-up control circuit for receiving the An output signal of the shift register of the previous stage; a pull-up output circuit coupled to the pull-up control circuit, receiving a first clock signal, and outputting a first output signal during the non-touch detection period An output signal of the N-stage shift register; a pull-down circuit coupled to the pull-up output circuit and the pull-up control circuit, receiving an output signal of the primary shift register; and a trigger circuit coupled to the upper The pull output circuit and the pull-up control circuit receive a touch detection signal. The gate driving circuit of claim 1, wherein the pull-up control circuit is a first transistor, and the pull-down circuit is composed of a second transistor and a fourth transistor, the pull-up output circuit For a third transistor, the circuit of the Nth stage shift register is connected as follows: the first transistor has an input end coupled to a gate terminal of the first transistor to receive the first stage shift The output signal of the bit register; The second transistor has an input end coupled to an output end of the first transistor, a gate terminal receiving an output signal of the second stage shift register, and an output terminal grounded or relatively low potential; The transistor has an input terminal for receiving the first clock signal, a gate terminal coupled to the output end of the first transistor, and an output terminal for outputting the first output signal; the fourth transistor An output end coupled to the output end of the third transistor, a gate terminal, receiving an output signal of the second stage shift register, and an output terminal grounded or relatively low or relatively low; and The first capacitor has a first end coupled to the output end of the first transistor, and a second end coupled to the output end of the third transistor; The gate driving circuit of claim 2, wherein the trigger circuit is formed by a fifth transistor and a sixth transistor, wherein: the fifth transistor has an input terminal for receiving the touch a detection signal, a gate terminal coupled to the output end of the first transistor, and an output terminal to output a second output signal; and the sixth transistor has an input end and a sixth transistor The gate is coupled to the terminal, and the output terminal is coupled to the output end of the first transistor, wherein the sixth transistor system receives a second output signal of a trigger circuit of the previous stage shift register. The gate driving circuit of claim 2, wherein the trigger circuit is a fifth transistor having an input terminal for receiving the touch detection signal. And a gate terminal coupled to the output end of the first transistor and an output terminal to output a second output signal. The gate driving circuit of claim 2, wherein the trigger circuit is formed by a fifth transistor, a sixth transistor, and a seventh transistor, wherein: the fifth transistor has a The input end receives the touch detection signal, a gate terminal coupled to the output end of the first transistor, and an output terminal to output a second output signal; the sixth transistor has an input end coupled a gate of the sixth transistor for receiving a second output signal of a trigger circuit output of a (NY)-stage shift register, and an output coupled to the output of the first transistor The first transistor has an input coupled to a gate of the seventh transistor for receiving a first (N+Y)th stage shift register. a second output signal outputted by the trigger circuit, and an output end coupled to the output end of the first transistor, wherein during the touch detection period, the sixth transistor and the seventh transistor have only one Being turned on. The gate driving circuit of claim 2, wherein the trigger circuit is formed by a second capacitor having a first end, receiving the touch detection signal, and a second end And coupling the output end of the first transistor. The gate drive circuit of claim 4, wherein the previous stage shift register comprises: a pull-up control circuit for receiving the second output signal of the Nth stage shift register; a pull-up output circuit coupled to the pull-up control circuit and outputting a non-touch detection period a first output signal; a pull-down circuit coupled to the pull-up output circuit and the pull-up control circuit, receiving the first output signal of the Nth stage shift register; and a trigger circuit coupled to the pull-up The output circuit and the pull-up control circuit receive the touch detection signal, and output a second output signal as an output signal of the previous stage shift register. The gate drive circuit of claim 1, wherein the previous stage shift register comprises: a pull-up control circuit for receiving an output signal of a front two-stage shift register; The pull-out output circuit is coupled to the pull-up control circuit to receive a second clock signal, and outputs a first output signal as an output signal of the previous stage shift register during the non-touch detection period; And the pull-up output circuit and the pull-up control circuit receive the output signal of the Nth stage shift register; and a trigger circuit coupled to the pull-up output circuit and the pull-up control circuit to receive the Touch detection signal. The gate driving circuit of claim 8, wherein the pull-up control circuit is a first transistor, and the pull-down circuit comprises a second transistor and a a fourth transistor, the pull-up output circuit is a third transistor, and the circuit of the previous stage shift register is connected as follows: the first transistor has an input end coupled to the first transistor a gate terminal for receiving an output signal of the front second shift register; the second transistor has an input coupled to an output of the first transistor, and a gate terminal receives the Nth shift An output signal of the bit register, and an output terminal grounded or relatively low; the third transistor has an input terminal for receiving the second clock signal, and a gate terminal coupled to the first transistor The output terminal and an output terminal output the first output signal; the fourth transistor has an input end coupled to the output end of the third transistor, and a gate terminal receives the Nth stage shift An output signal of the memory, and an output terminal is grounded or relatively low; a first capacitor has a first end coupled to the output end of the first transistor, and a second end coupled to the third The output of the crystal; The gate driving circuit of claim 9, wherein the trigger circuit is formed by a fifth transistor and a sixth transistor, the fifth transistor having an input end for receiving the touch detection signal a gate terminal coupled to the output end of the first transistor, and an output terminal for outputting a second output signal; the sixth transistor having an input terminal coupled to a gate terminal of the sixth transistor And an output end coupled to the output end of the first transistor, wherein the sixth transistor The system receives a second output signal output by a trigger circuit of the Nth stage shift register. The gate driving circuit of claim 9, wherein the trigger circuit is formed by a fifth transistor, a sixth transistor, and a seventh transistor, the fifth transistor having an input end, Receiving the touch detection signal, a gate terminal coupled to the output end of the first transistor, and an output terminal to output a second output signal; the sixth transistor having an input coupled to the sixth a gate of the transistor for receiving a second output signal outputted by a trigger circuit of a (N-2Y) stage shift register, and an output coupled to the output of the first transistor The seventh transistor has an input coupled to a gate of the seventh transistor for receiving a trigger circuit of the Nth stage shift register. A second output signal, and an output end coupled to the output end of the first transistor, wherein at a point in time, only one of the sixth transistor and the seventh transistor is turned on. The gate driving circuit of claim 9, wherein the trigger circuit is formed by a second capacitor having a first end, receiving the touch detection signal, and a second end And coupling the output end of the first transistor. For example, in the gate driving circuit of claim 6, the touch detection signal is maintained at a high logic level for a time greater than or equal to 1 Tgw and less than or equal to The length of the touch detection period, where Tgw is the length of time of a pulse signal. For example, in the gate driving circuit of claim 1, the touch detection signal is maintained at a high logic level for a time greater than or equal to the length of the touch detection period. The gate driving circuit of claim 14, wherein the first clock signal is maintained at a high logic level in a first interval, and the touch detection signal is maintained at a high logic level in a second interval. Bit, the time that the second interval overlaps with the first interval is less than 2Tgw+0.5 milliseconds (ms), Tgw is the length of time of a pulse signal, and the length of the first interval is about 4Tgw. The gate driving circuit of claim 8, wherein the second clock signal is maintained at a high logic level in a first interval, and the touch detection signal is maintained at a high logic level in a second interval. Bit, the time that the second interval overlaps with the first interval is greater than zero and less than 2Tgw+0.5 milliseconds (ms), Tgw is the length of time of a pulse signal, and the length of the first interval is about 4Tgw. A gate driving circuit for driving a pixel array, the gate driving circuit includes a plurality of shift registers, wherein a gate period of the gate driving circuit includes a touch detection period, and a The touch detection period is matched between the N-stage shift register and a previous-stage shift register, and the length of a first clock signal received by the N-th shift register is greater than the touch detection The length of the measurement period. The gate driving circuit of claim 17, wherein the previous stage shift register receives a second clock signal, and the logic level of the first clock signal rises earlier than the second time. The time point at which the logic level of the clock signal drops.