TW201704997A - Debugging system and control method thereof - Google Patents

Abstract

A debugging system is provided. The debugging system includes an emulator and a printed circuit board (PCB). The PCB includes a chip under test, at least one peripheral device and a switching device. The chip under test includes a first multi-functional pin and a second multi-functional pin for selectively supporting one of a debugging function and a specific function. The peripheral device supports the specific function. When the first and second multi-functional pins of the chip under test support the debugging function, the switching device couples the first and second multi-functional pins of the chip under test to a first group of pins of the emulator, to perform the debugging function, and couples a second group of pins of the emulator to the peripheral device, to perform the specific function.

Description

Debugging system and its control method

The present invention relates to a debugging system, and more particularly to a method for controlling a debugging system.

MicroController Units (MCUs) or microprocessors (Microprocessors) are widely used in various industrial and home electrical products or devices. Currently, microcontroller/microprocessor program development must use a wafer emulation system and use breakpoints to monitor the execution state of the program in order to debug the program.

The invention provides a debugging system. The above debug system includes an emulator and a printed circuit board. The emulator includes: a first set of pins having a first pin and a second pin; and a second set of pins having a third pin and a fourth pin.

The printed circuit board includes: a chip to be tested, comprising: a first multi-function pin, selectively supporting one of a debugging function and a specific function; and a second multi-function pin for selectively supporting The above-mentioned debugging function and the above-mentioned specific function; at least one peripheral component supporting the specific function; and a switch for selectively coupling the first and second multi-function pins of the chip to be tested to the above The first set of pins of the emulator or the periphery element. When the first and second multi-function pins of the chip to be tested support the debugging function, the switch couples the first and second multi-function pins of the chip to be tested to the emulator described above. The first set of pins are configured to perform the above-described debugging function, and the second set of pins of the emulator are coupled to the peripheral components to perform the specific functions described above.

Furthermore, the present invention provides a control method suitable for use in a debug system, wherein the debug system includes an emulator and a printed circuit board, wherein the printed circuit board includes a wafer to be tested, and selectively supports a detective A first multi-function pin and a second multi-function pin of the wrong function and one of the specific functions. When the first and second multi-function pins of the chip to be tested support the debugging function, respectively coupling the first and second multi-function pins of the chip to be tested via one switch of the printed circuit board Connecting to a first pin and a second pin of the emulator to perform the above-mentioned debugging function, and connecting a third pin and a fourth port of the emulator via the switch of the printed circuit board The foot is coupled to the peripheral components described above to perform the specific functions described above. When the first and second multi-function pins of the chip to be tested support the specific function, the first and second multi-function pins of the chip to be tested are coupled to the device via the switch of the printed circuit board. At least one peripheral component of the printed circuit board described above to perform the specific functions described above.

100‧‧‧Printed circuit board

110‧‧‧Switcher

120-170‧‧‧ peripheral components

150‧‧‧Samps to be tested

155‧‧‧Microcontroller

200‧‧‧ Bridge

250‧‧‧ Simulator

300‧‧‧Processing device

310‧‧‧Display unit

320‧‧‧ processor

CTRL‧‧‧ control signal

IC_P1, IC_P2‧‧‧ multi-function pin

ICE_P1-ICE_P4, PD_P1-PD_P2‧‧‧ pins

PG1‧‧‧First set of pins

PG2‧‧‧First set of pins

Path1-Path2‧‧‧Signal Path

1 is a view showing a detection system according to an embodiment of the present invention; and FIG. 2 is a view showing main components of a printed circuit board and a bridge in FIG. 1 according to an embodiment of the present invention; Figure 3 is a diagram showing the two multi-function pins of the wafer to be tested in Figure 2 assigned to perform a specific function; Figure 4 is a diagram showing that the two multi-function pins of the wafer to be tested in Figure 2 are assigned to perform the detection. FIG. 5 is a flowchart showing a control method of a debugging system according to an embodiment of the present invention; FIG. 5 is a diagram showing a control method of a debugging system according to another embodiment of the present invention. FIG. 7 is a flow chart showing a method of controlling a debug system according to another embodiment of the present invention.

The above and other objects, features and advantages of the present invention will become more <RTIgt; For debugging, use the In Circuit Emulator (ICE). The microcontroller/microprocessor to be tested can be placed in an integrated circuit on a printed circuit board, and the in-circuit simulator can be coupled between the printed circuit board and the processing device. The processing device may be a computer/electronic device such as a personal computer, a tablet or a mobile phone, and the processing device has an integrated development environment (IDE). As a result, engineers can simulate the behavior of microcontrollers/microprocessors on a chip through integrated development system software to reduce program development time and debug time.

Figure 1 shows a detection system 10 in accordance with an embodiment of the present invention. The debug system 10 includes a printed circuit board 100, a bridge 200, and a processing device 300, wherein the wafer to be tested 150 is disposed on the printed circuit board 100 and has a plurality of pins. In addition, the printed circuit board 100 further includes a switch 110 and a plurality of peripheral components 120-170, wherein the peripheral components 110-170 can perform different specific functions in conjunction with the wafer under test 150. The processing device 300 includes a display unit 310 and a processor 320. In this embodiment, the processing device 300 is a personal computer with an integrated development system software (IDE). The bridge 200 includes an emulator 250 that can be used in an integrated development system software environment, such as ULink, J-Link, or Nu-Link. In this embodiment, by the integrated development system software, the processor 320 in the processing device 300 can access the register and the memory in the chip 150 to be tested in the printed circuit board 100 through the bridge 200 for control. The microcontroller 155 in the wafer under test 150 executes different programs and obtains an execution result. At the same time, in the integrated development system software environment, the processor 320 can display the execution results of different programs on the display unit 310, so that the user can view and diagnose the operation state of the wafer to be tested 150 through the display unit 310.

2 is a schematic view showing main components of the printed circuit board 100 and the bridge 200 in Fig. 1 according to an embodiment of the present invention. It should be noted that the components of the printed circuit board 100 and the bridge 200 in FIG. 2 are merely examples and are not intended to limit the present invention. The printed circuit board 100 includes a switch 110, a wafer to be tested 150, and a peripheral component 120. In the printed circuit board 100, the wafer to be tested 150 is a master component, and the peripheral component 120 is a slave component such as a memory or the like, wherein the microcontroller 155 of the wafer under test 150 can control the peripheral component 120. Perform specific actions. Further, the emulator 250 in the bridge 200 includes a first set of pins PG1 and a second set of pins PG2. The first set of pins PG1 includes the pin ICE_P1 and the pin ICE_P2, and the second set of pins PG2 includes the pin ICE_P3 and the connection The pin ICE_P4, wherein the first set of pins PG1 and the second set of pins PG2 of the emulator 250 are coupled to the switch 110 of the printed circuit board 100. In addition, the wafer to be tested 150 has multi-functional pins IC_P1 and IC_P2, wherein the microcontroller 155 of the wafer under test 150 can assign the multi-function pins IC_P1 and IC_P2 to perform one of the plural functions, that is, the multi-function Pins IC_P1 and IC_P2 can be used to perform a variety of functions. In general, the use of multi-function pins reduces the number of pins on the wafer to reduce the cost of manufacturing the wafer. In this embodiment, the microcontroller 155 of the wafer under test 150 can assign the multi-function pins IC_P1 and IC_P2 as an in-line emulator (ICE) pin or a general purpose input/output (GPIO) pin. If the multi-function pins IC_P1 and IC_P2 are the in-circuit emulator pins, the to-be-tested chip 150 can be coupled to the emulator 250 of the bridge 200 via the multi-function pins IC_P1 and IC_P2 to communicate with the emulator 250 to perform the detection. Wrong function. On the other hand, if the multi-function pins IC_P1 and IC_P2 are general-purpose input and output pins, the wafer to be tested 150 can be coupled to the peripheral component 120 of the printed circuit board 100 via the multi-function pins IC_P1 and IC_P2 to communicate with the peripheral component 120. And perform general-purpose input and output functions. Conventionally, when the multi-function pin of the wafer to be tested is assigned as an in-circuit emulator pin and the debug function is performed, the multi-function pin cannot perform other functions, and the printed circuit board is coupled to the multi-function The peripheral components of the foot will also not operate properly. Therefore, the user cannot simultaneously verify the specific functions supported by the peripheral components, that is, on a conventional printed circuit board, the specific functions and debug functions of the wafer to be tested cannot be simultaneously executed.

In FIG. 2, the switch 110 selectively couples the multi-function pins IC_P1 and IC_P2 of the wafer to be tested 150 to the first group of pins PG1 of the emulator 250 according to the control signal CTRL (ie, the pin ICE_P1 and ICE_P2) or surrounding yuan Pins PD_P1 and PD_P2 of the device 120. In addition, when the switch 110 couples the multi-function pins IC_P1 and IC_P2 of the chip to be tested 150 to the first group pin PG1 of the emulator 250, the switch 110 also applies the emulator 250 according to the control signal CTRL. The two sets of pins PG2 (ie, the pins ICE_P3 and ICE_P4) are coupled to the pins PD_P1 and PD_P2 of the peripheral component 120. Thus, when the multi-function pins IC_P1 and IC_P2 of the wafer under test 150 are assigned as the in-circuit emulator pins to perform the debug function, the wafer under test 150 can communicate with the peripheral component 120 via the emulator 250 to perform a specific function. . Thus, on the printed circuit board 100, when the multi-function pins IC_P1 and IC_P2 of the wafer to be tested 150 are assigned to perform the debug function, the specific function and the debug function of the wafer under test 150 can be simultaneously performed. Additionally, the control signal CTRL can be provided by the wafer under test 150 or the emulator 250. In an embodiment, the control signal CTRL can be manually set by the user.

Fig. 3 is a view showing that the multi-function pins IC_P1 and IC_P2 of the wafer to be tested 150 in Fig. 2 are assigned to perform a specific function. In FIG. 3, the switch 110 couples the multi-function pins IC_P1 and IC_P2 of the wafer to be tested 150 to the pins PD_P1 and PD_P2 of the peripheral component 120 according to the control signal CTRL. Thus, the wafer under test 150 can communicate with the peripheral component 120 to perform a particular function.

Fig. 4 is a view showing that the multi-function pins IC_P1 and IC_P2 of the wafer to be tested 150 in Fig. 2 are assigned to perform the detecting function. In FIG. 4, the switch 110 couples the multi-function pins IC_P1 and IC_P2 of the wafer to be tested 150 to the first set of pins PG1 of the emulator 250 according to the control signal CTRL to establish the signal path Path1. Thus, the wafer under test 150 can perform a debug function by communicating with the emulator 250 via the signal path Path1. In this embodiment, the pin ICE_P1 of the emulator 250 is a data pin (eg, ICE_DAT), and the emulator 250 Pin ICE_P2 is a clock pin (eg ICE_CLK). In addition, the switch 110 also couples the second set of pins PG1 of the emulator 250 to the pins PD_P1 and PD_P2 of the peripheral component 120 according to the control signal CTRL to establish the signal path Path2. Thus, the wafer under test 150 can perform specific functions by communicating with the peripheral component 120 through the emulator 250 and the signal path Path2, such as a general-purpose input/output (GPIO), a universal asynchronous receiver/transmitter (UART), and a pulse. Wave width modulation (PWM) or internal integrated circuit (I2C) function.

Figure 5 is a flow chart showing a method of controlling a debug system according to an embodiment of the present invention. Referring to FIG. 4 and FIG. 5 simultaneously, in this embodiment, the wafer to be tested 150 communicates with the peripheral component 120 through the emulator 250 to perform a general-purpose input/output function, wherein the pins ICE_P3 and/or of the emulator 250 are implemented. Or the pin ICE_P4 simulates the case where the multi-function pins IC_P1 and IC_P2 are assigned to support the output pin of the general-purpose input/output function. First, the chip under test 150 provides an instruction BKPT1 (eg, a breakpoint) to the emulator 250 via the signal path Path1 to notify the emulator 250 to set the pin ICE_P3 and/or the pin ICE_P4 to support general-purpose input and output functions, such as The symbol 510 is displayed. Then, when the setting is completed, the emulator 250 sends an acknowledgment signal ACK1 (eg, returns) to the wafer 150 to be tested, as indicated by reference numeral 520. Then, after receiving the acknowledgment signal ACK1, the chip to be tested 150 provides the instruction BKPT2 to the emulator 250 to set the pin ICE_P3 and/or the pin ICE_P4 as the output (OUT), and the pin ICE_P3 and/or The signal level of pin ICE_P4 is set to VAL (eg, high logic level or low logic level) as indicated by reference numeral 530. Then, the pin ICE_P3 and/or the pin ICE_P4 will provide a signal with a signal level VAL via the signal path Path2. The pin PD_P1 and/or pin PD_P2 to the peripheral component 120 are shown as reference numeral 540. Thus, corresponding to the signal having the signal level VAL, the peripheral component 120 can perform the corresponding operation. Therefore, on the printed circuit board 100, the general-purpose input/output function and the debug function of the wafer to be tested 150 can be simultaneously performed. In addition, after providing a signal having signal level VAL to peripheral component 120, emulator 250 sends an acknowledgment signal ACK2 to wafer 150 to be tested, as indicated by reference numeral 550. In an embodiment, the wafer under test 150 sequentially provides the instruction BKPT1 and the instruction BKPT2 to the emulator 250, that is, the emulator 250 does not need to send the acknowledgment signal ACK1.

Figure 6 is a flow chart showing a control method of a debug system according to another embodiment of the present invention. Referring to FIG. 4 and FIG. 6 simultaneously, in this embodiment, the wafer to be tested 150 communicates with the peripheral component 120 through the emulator 250 to perform a general-purpose input/output function, wherein the pins ICE_P3 and/or of the emulator 250 are implemented. Or the pin ICE_P4 simulates the case where the multi-function pins IC_P1 and IC_P2 are assigned to support the input pin of the general-purpose input/output function. First, the chip under test 150 provides an instruction BKPT1 (eg, a breakpoint) to the emulator 250 via the signal path Path1 to notify the emulator 250 to set the pin ICE_P3 and/or the pin ICE_P4 to support general-purpose input and output functions, such as The symbol 610 is displayed. Then, when the setting is completed, the emulator 250 sends an acknowledgment signal ACK1 (eg, returns) to the wafer 150 to be tested, as indicated by reference numeral 620. Next, after receiving the acknowledgment signal ACK1, the wafer under test 150 provides the instruction BKPT2 to the emulator 250 to set the pin ICE_P3 and/or the pin ICE_P4 as an output (IN), as indicated by reference numeral 630. Thus, the pin ICE_P3 and/or the pin ICE_P4 will obtain a signal having a signal level VAL from the pin PD_P1 and/or the pin PD_P2 of the peripheral component 120 via the signal path Path2, as indicated by reference numeral 640. Then, after receiving the signal After the signal of the level VAL, the emulator 250 sends an acknowledgment signal ACK2 to the wafer under test 150, as indicated by reference numeral 650, to inform the wafer under test 150 that a signal having the signal level VAL has been received. Thus, corresponding to the signal having the signal level VAL, the wafer under test 150 can perform the corresponding operation. Therefore, on the printed circuit board 100, the general-purpose input/output function and the debug function of the wafer to be tested 150 can be simultaneously performed. In an embodiment, the wafer under test 150 sequentially provides the instruction BKPT1 and the instruction BKPT2 to the emulator 250, that is, the emulator 250 does not need to send the acknowledgment signal ACK1.

Figure 7 is a flow chart showing a method of controlling a debug system according to another embodiment of the present invention. Referring to FIG. 4 and FIG. 7 simultaneously, in this embodiment, the wafer to be tested 150 communicates with the peripheral component 120 through the emulator 250 to perform a general-purpose input/output function, wherein the pins ICE_P3 and/or of the emulator 250 are implemented. Or the pin ICE_P4 simulates the case where the multi-function pins IC_P1 and IC_P2 are assigned to support the interrupt pin of the general-purpose input/output function. First, the chip under test 150 provides an instruction BKPT1 (eg, a breakpoint) to the emulator 250 via the signal path Path1 to notify the emulator 250 to set the pin ICE_P3 and/or the pin ICE_P4 to an interrupt capable of supporting the general-purpose input/output function. The pin is shown as reference numeral 710. Next, when the setting is completed, the emulator 250 sends an acknowledgment signal ACK1 (eg, a return) to the wafer 150 to be tested, as indicated by reference numeral 720. Then, when the emulator 250 detects that the interrupt event INT from the peripheral component 120 (for example, from a low logic level to a high logic level) occurs on the pin ICE_P3 and/or the pin ICE_P4, as shown by reference numeral 730. The emulator 250 can notify the chip under test 150 that an interrupt event INT occurs through the signal path Path1, as indicated by reference numeral 740. Thus, the wafer to be tested 150 corresponds to the interrupt event INT from the peripheral element 120. The corresponding Interrupt Service Routine (ISR) can be executed. Therefore, on the printed circuit board 100, the general-purpose input/output function and the debugging function of the wafer 150 to be tested can be simultaneously performed.

Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and it is intended that the invention may be modified and modified without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100‧‧‧Printed circuit board

110‧‧‧Switcher

120‧‧‧ peripheral components

150‧‧‧Samps to be tested

155‧‧‧Microcontroller

200‧‧‧ Bridge

250‧‧‧ Simulator

CTRL‧‧‧ control signal

IC_P1, IC_P2‧‧‧ multi-function pin

ICE_P1-ICE_P4, PD_P1-PD_P2‧‧‧ pins

PG1‧‧‧First set of pins

PG2‧‧‧First set of pins

Claims (13)

An error detection system includes: an emulator comprising: a first set of pins having a first pin and a second pin; and a second set of pins having a third pin and a first a four-pin; and a printed circuit board comprising: a chip to be tested, comprising: a first multi-function pin, selectively supporting one of a debug function and a specific function; and a second multi-function a foot selectively selectively supporting the above-described debug function and the specific function; at least one peripheral component supporting the specific function; and a switch for selectively selecting the first and second functions of the chip to be tested The pin is coupled to the first set of pins of the emulator or the peripheral component; wherein when the first and second multi-function pins of the chip to be tested support the debugging function, the switch The first and second multi-function pins of the chip to be tested are coupled to the first group of pins of the emulator to perform the above-mentioned debugging function, and the second group of pins of the emulator are coupled to The above peripheral components The particular function. The debugging system of claim 1, wherein when the first and second multi-function pins of the chip to be tested support the specific function, the switch performs the first and the first The second multi-function pin is coupled to the peripheral component to perform the specific function described above. The debugging system of claim 1, wherein the emulator is an in-line emulator, and the first pin is a data pin of the online emulator, and the second pin is the online A clock pin of the simulator. The debugging system of claim 1, wherein when the first and second multi-function pins of the chip to be tested support the debugging function, the chip to be tested passes through the first and second The function pin provides a first command to the emulator to set the third pin and the fourth pin to support the specific function. The debugging system of claim 4, wherein the chip to be tested further provides a second command to the emulator via the first and second multi-function pins to set the third pin or the above The fourth pin is an input pin or an output pin. The debugging system of claim 4, wherein when the first and second multi-function pins support the debugging function, the chip to be tested is provided via the first and second multi-function pins. The first instruction is to the emulator to set the third pin and the fourth pin to be an interrupt pin. The debug system of claim 4, wherein the specific function is a general-purpose input/output function, a universal asynchronous transceiver function, a pulse width modulation function, or an internal integrated circuit function. The debugging system of claim 1, further comprising: a processing device coupled to the printed circuit board via the emulator to obtain and display the result of the debugging function. A control method suitable for a debug system, wherein the above debug system package An emulator and a printed circuit board, wherein the printed circuit board includes a wafer to be tested, a first multi-function pin and a second multi-option selectively supporting one of a debug function and a specific function The control method includes: when the first and second multi-function pins of the chip to be tested support the debugging function, the first of the chips to be tested is sent via one of the printed circuit boards And the second multi-function pin is respectively coupled to a first pin and a second pin of the emulator to perform the above-mentioned debugging function, and one of the emulators is connected via the switch of the printed circuit board The third pin and the fourth pin are coupled to the peripheral component to perform the specific function; and when the first and second multi-function pins of the chip to be tested support the specific function, via the printed circuit The switch of the board couples the first and second multi-function pins of the chip to be tested to at least one peripheral component of the printed circuit board to perform the specific function. The control method of claim 9, wherein the emulator is an in-line emulator, and the first pin of the chip to be tested is a data pin of the online emulator, and the chip to be tested The second pin is a clock pin of the online simulator. The control method of claim 9, wherein the step of performing the specific function further comprises: providing a first instruction to the emulator via the first and second multi-function pins of the chip to be tested, Supporting the above specific functions by setting the third pin and the fourth pin; and And providing a second command to the emulator via the first and second multi-function pins to set the third pin or the fourth pin as an input pin or an output pin. The control method of claim 11, wherein the specific function is a general-purpose input/output function, a universal asynchronous transceiver function, a pulse width modulation function, or an internal integrated circuit function. The control method of claim 9, wherein the step of performing the specific function further comprises: providing a first instruction to the emulator via the first and second multi-function pins of the chip to be tested, The third pin and the fourth pin are set as an interrupt pin.