TW201625708A - Method for making semiconductor device - Google Patents

Method for making semiconductor device Download PDF

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Publication number
TW201625708A
TW201625708A TW104133242A TW104133242A TW201625708A TW 201625708 A TW201625708 A TW 201625708A TW 104133242 A TW104133242 A TW 104133242A TW 104133242 A TW104133242 A TW 104133242A TW 201625708 A TW201625708 A TW 201625708A
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Taiwan
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temperature
semiconductor device
filler composition
interlayer filler
semiconductor
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TW104133242A
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Chinese (zh)
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Makoto Ikemoto
Yasuhiro Kawase
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Mitsubishi Chem Corp
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    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08GMACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G59/00Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
    • C08G59/18Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731Location prior to the connecting process
    • H01L2224/73101Location prior to the connecting process on the same surface
    • H01L2224/73103Bump and layer connectors
    • H01L2224/73104Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body

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  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Polymers & Plastics (AREA)
  • Organic Chemistry (AREA)
  • Medicinal Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Health & Medical Sciences (AREA)
  • Wire Bonding (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

Provided is a method for making a semiconductor device wherein a cured adhesive layer that is excellent in bonding property and in conductivity can be formed without occurrence of voids in the cured adhesive layer. In a method for making a semiconductor device by using thermocompression bonding equipment to thermocompression-bond together a semiconductor chip having solder bumps and a semiconductor board having electrode pads with an interlayer filler composition intervening therebetween, the bonding is performed on temperature condition that the temperatures of the head and stage of the thermocompression bonding equipment are in a range defined, in a graph having an ordinate axis representative of the head temperature and having an abscissa axis representative of the stage temperature, by the following four equations: H + 1.9S = 590 Equation 1, H + 0.526S = 310 Equation 2, H + 0.8S = 580 Equation 3, H + 1.25S = 725 Equation 4, where H is the head temperature (centigrade) and S is the stage temperature (centigrade).

Description

半導體元件之製造方法 Semiconductor component manufacturing method

本發明係關於將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,經由層間填充劑組成物,藉熱壓黏接合裝置進行熱壓黏接合,以製造半導體元件的方法。 The present invention relates to a method of manufacturing a semiconductor element by thermally bonding a semiconductor wafer having a solder bump and a semiconductor substrate having an electrode pad via an interlayer filler composition by a thermocompression bonding apparatus.

近年來為了更加提升半導體元件之性能,除了電晶體或佈線之細微化之外,正進行將形成了半導體元件層之半導體基板、或有機基板等之複數基板,對基板面予以垂直積疊而積層化的積層型半導體裝置之研究開發。 In order to further improve the performance of the semiconductor device, in addition to the miniaturization of the transistor or the wiring, a plurality of substrates such as a semiconductor substrate or an organic substrate on which the semiconductor element layer is formed are stacked, and the substrate faces are vertically stacked and laminated. Research and development of laminated semiconductor devices.

積層型半導體裝置已知有積層了半導體基板與有機基板者等,更具體而言,已知有使半導體基板彼此於其基板間藉由焊料凸塊等電氣信號端子等連接,並於基板間填充層間填充劑組成物,藉層間填充劑組成物層使基板彼此接黏之構造的三維積層型半導體裝置。 In the laminated semiconductor device, a semiconductor substrate and an organic substrate are known. More specifically, it is known that semiconductor substrates are connected to each other by electrical signal terminals such as solder bumps between the substrates, and are filled between the substrates. An interlayer filler composition is a three-dimensional laminated semiconductor device having a structure in which a substrate is adhered to each other by an interlayer filler composition layer.

作為積層型半導體裝置之製造方法,提案有於形成了半導體元件層之晶圓上,形成由層間填充劑組成物(ICF:Inter Chip Fill)所構成之層,視需要進行加熱予以B階段化,接著以切割(Dicing)進行晶片切出,將所得半導體基板複數積層,重複加壓加熱之暫時接合,最終於加壓加熱條件下進行正式接合的前置法(Pre-applied process)的製程(例如參照非專利文獻1)。 As a method of manufacturing a stacked-type semiconductor device, it is proposed to form a layer composed of an interlayer filler composition (ICF: Inter Chip Fill) on a wafer on which a semiconductor element layer is formed, and to perform step-by-step heating as needed. Next, wafer cutting is performed by dicing, and the obtained semiconductor substrate is laminated in plural layers, and the temporary bonding by pressurization heating is repeated, and finally a pre-applied process of performing the final bonding under pressurized heating conditions (for example, Reference is made to Non-Patent Document 1).

圖2為表示由前置法所進行之半導體元件之製造方 法的立體圖;在形成了由焊盤端子1A與焊料1B所構成之複數焊料凸塊1的半導體晶片2上,由塗佈噴嘴4供給層間填充劑組成物3(圖2(a)),形成層間填充劑組成物層5後(圖2(b)),視需要進行B階段化,將形成了層間填充劑組成物層5之半導體晶片2反轉,對載置於熱壓黏接合裝置之平台(未圖示)上、形成了電極墊6之半導體基板7上使層間填充劑組成物層5側相對向,藉未圖示之壓頭進行按壓(圖2(c))。於熱壓黏接合裝置之壓頭與平台之間,對半導體基板7與半導體晶片2進行加熱加壓,藉此使層間填充劑組成物層硬化,可得到經由層間填充劑組成物之硬化接黏層8使半導體晶片2與半導體基板7接合的半導體元件10(圖2(d))。 2 is a view showing the manufacture of a semiconductor device by a pre-method. A perspective view of the method; on the semiconductor wafer 2 on which the plurality of solder bumps 1 composed of the pad terminal 1A and the solder 1B are formed, the interlayer filler composition 3 is supplied from the coating nozzle 4 (Fig. 2(a)) to form After the interlayer filler composition layer 5 (Fig. 2(b)), B-stage is performed as needed, and the semiconductor wafer 2 on which the interlayer filler composition layer 5 is formed is inverted, and placed on the thermocompression bonding apparatus. On the platform (not shown), the semiconductor substrate 7 on which the electrode pads 6 are formed is placed on the side of the interlayer filler composition layer 5, and is pressed by an indenter (not shown) (Fig. 2(c)). The semiconductor substrate 7 and the semiconductor wafer 2 are heated and pressurized between the indenter and the platform of the thermocompression bonding device, thereby hardening the interlayer filler composition layer, thereby obtaining hardening adhesion through the interlayer filler composition. The layer 8 is a semiconductor element 10 in which the semiconductor wafer 2 is bonded to the semiconductor substrate 7 (Fig. 2(d)).

積層型半導體裝置係重複此種步驟,在圖2(d)所示之半導體元件10之半導體晶片2(此時,於半導體晶片2之與硬化接黏層8相反側的面形成有電極墊)上,進一步接黏圖2(b)所示之形成了層間填充劑組成物層5之半導體晶片2,重複此步驟而予以製造。 In the laminated semiconductor device, the semiconductor wafer 2 of the semiconductor device 10 shown in FIG. 2(d) is repeated (in this case, an electrode pad is formed on the surface of the semiconductor wafer 2 opposite to the hardened adhesive layer 8). Further, the semiconductor wafer 2 on which the interlayer filler composition layer 5 is formed as shown in Fig. 2(b) is further bonded, and this step is repeated to manufacture.

[先前技術文獻] [Previous Technical Literature] [非專利文獻] [Non-patent literature]

非專利文獻1:Electronics安裝學會演講論文集(61-62頁,第23回,2009年) Non-Patent Document 1: Electronics Installation Society Lectures (61-62, 23rd, 2009)

於前置法之半導體元件的製造中,存在以下課題。 In the manufacture of the semiconductor device of the pre-method, there are the following problems.

(1)於硬化接黏層產生空隙(void)。空隙之發生認為係於接合步驟或硬化步驟的加熱條件下,層間填充劑組成物中之低分子成分等 揮發為其原因,若於硬化接黏層存在空隙,不僅損及電氣接合,溫度變化等之收縮差等變大,接黏面剝離或破裂,故損及半導體裝置之性能。 (1) A void is formed in the hardened adhesive layer. The occurrence of voids is considered to be due to the low molecular component of the interlayer filler composition under the heating conditions of the bonding step or the hardening step. Volatilization is the cause. If there is a void in the hardened adhesive layer, not only the electrical joint is damaged, but the shrinkage difference such as temperature change becomes large, and the adhesive surface is peeled off or broken, thereby impairing the performance of the semiconductor device.

(2)如圖2(a)所示,於形成了焊料凸塊1之半導體晶片2上,供給層間填充劑組成物3以形成層間填充劑組成物層時,由於層間填充劑組成物3未充分遍及焊料凸塊1、1間之狹窄間隙,而亦與上述(1)同樣地形成空隙之空隙部,發生與上述相同的問題。 (2) As shown in FIG. 2(a), when the interlayer filler composition 3 is supplied onto the semiconductor wafer 2 on which the solder bumps 1 are formed to form the interlayer filler composition layer, since the interlayer filler composition 3 is not The gap between the solder bumps 1 and 1 is sufficiently spread, and the void portion of the void is formed in the same manner as in the above (1), and the same problem as described above occurs.

如此,期望在半導體晶片-基板間、或半導體晶片-半導體晶片間的接合時,於硬化接黏層不產生空隙(void),而形成接合性、導通性優越的硬化接黏層。 As described above, it is desirable that a void is formed in the hardened adhesive layer between the semiconductor wafer-substrate or the semiconductor wafer-semiconductor wafer, and a cured adhesive layer having excellent adhesion and conductivity is formed.

本發明之課題在於提供一種於半導體元件之製造中,在半導體晶片-基板間、或半導體晶片-半導體晶片間的接合時,硬化接黏層不發生空隙(void),形成接合性、導通性優越之硬化接黏層,製造高品質且高可靠性的半導體元件的方法。 An object of the present invention is to provide a bond between a semiconductor wafer-substrate or a semiconductor wafer-semiconductor wafer in the production of a semiconductor device, and voids are formed in the cured adhesive layer, and the bonding property and the conductive property are excellent. A method of manufacturing a high-quality and highly reliable semiconductor device by hardening an adhesive layer.

本發明者為了解決上述課題而潛心研究,結果發現可解決上述課題,遂完全本發明。 The present inventors have diligently studied in order to solve the above problems, and as a result, have found that the above problems can be solved, and the present invention is completely invented.

亦即,本發明之要旨如以下。 That is, the gist of the present invention is as follows.

[1]一種半導體元件之製造方法,係將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,經由層間填充劑組成物,藉熱壓黏接合裝置進行熱壓黏接合,以製造半導體元件者;該熱壓黏接合裝置之壓頭及平台的溫度,係於以壓頭溫度為縱軸、以平台溫度為橫軸的圖表中,依成為由下述4個式所包圍之範圍內的溫度條件進行 接合;H+1.9S=590…式1 H+0.526S=310…式2 H+0.8S=580…式3 H+1.25S=725…式4(式1~4中,H表示接合時之壓頭溫度(℃),S表示接合時之平台溫度(℃))。 [1] A method of manufacturing a semiconductor device, wherein a semiconductor wafer having solder bumps and a semiconductor substrate having an electrode pad are thermally bonded by a thermocompression bonding device via an interlayer filler composition to fabricate a semiconductor device. The temperature of the indenter and the platform of the thermocompression bonding apparatus is in a graph in which the head temperature is the vertical axis and the platform temperature is the horizontal axis, and is within the range surrounded by the following four equations. Temperature condition Engagement; H+1.9S=590...Formula 1 H+0.526S=310...Formula 2 H+0.8S=580...Formula 3 H+1.25S=725...Formula 4 (in Equations 1-4, H represents the time of bonding) Indenter temperature (°C), S indicates the platform temperature (°C) at the time of bonding).

[2]一種半導體元件之製造方法,係將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,藉由具有可個別進行溫度調節之壓頭及平台的熱壓黏接合裝置,經由層間填充劑組成物進行熱壓黏接合,以製造半導體元件者;該熱壓黏接合裝置之壓頭及平台的溫度,係於以壓頭溫度為縱軸、以平台溫度為橫軸的圖表中,依成為由下述4個式所包圍之範圍內的溫度條件進行接合;H+1.9S=590…式1 H+0.526S=310…式2 H+0.8S=580…式3 H+1.25S=725…式4(式1~4中,H表示接合時之壓頭溫度(℃),S表示接合時之平台溫度(℃))。 [2] A method of manufacturing a semiconductor device, comprising: a semiconductor wafer having solder bumps and a semiconductor substrate having an electrode pad, and an interlayer bonding by means of a thermocompression bonding device having an indenter and a stage which can be individually temperature-adjusted The composition of the composition is thermocompression bonded to produce a semiconductor component; the temperature of the indenter and the platform of the thermocompression bonding device is in a graph in which the temperature of the indenter is the vertical axis and the temperature of the platform is the horizontal axis. It is joined by temperature conditions in the range surrounded by the following four formulas; H + 1.9S = 590... Formula 1 H + 0.526S = 310... Formula 2 H + 0.8S = 580... Equation 3 H + 1.25S = 725... Formula 4 (in the formulas 1 to 4, H represents the head temperature (°C) at the time of joining, and S represents the stage temperature (°C) at the time of joining).

[3]如上述[1]或[2]之半導體元件之製造方法,其中,上述層間填充劑組成物於130℃下的黏度為100Pa‧s以下。 [3] The method for producing a semiconductor device according to the above [1] or [2] wherein the interlayer filler composition has a viscosity at 130 ° C of 100 Pa ‧ or less.

[4]如上述[1]至[3]中任一項之半導體元件之製造方法,其中, 上述層間填充劑組成物係含有環氧樹脂(A)、硬化劑(B)、填料(C)及助焊劑(D)。 [4] The method of manufacturing a semiconductor device according to any one of the above [1] to [3] wherein The interlayer filler composition contains an epoxy resin (A), a hardener (B), a filler (C), and a flux (D).

[5]如上述[4]之半導體元件之製造方法,其中,上述層間填充劑組成物係進一步含有硬化促進劑(E)。 [5] The method for producing a semiconductor device according to the above [4], wherein the interlayer filler composition further contains a curing accelerator (E).

[6]如上述[4]或[5]之半導體元件之製造方法,其中,上述層間填充劑組成物係進一步含有分散劑(F)。 [6] The method for producing a semiconductor device according to the above [4] or [5] wherein the interlayer filler composition further contains a dispersant (F).

[7]如上述[4]至[6]中任一項之半導體元件之製造方法,其中,硬化劑(B)係於環氧樹脂(A)每100重量份中,為30~150重量份。 [7] The method for producing a semiconductor device according to any one of [4] to [6] wherein the curing agent (B) is 30 to 150 parts by weight per 100 parts by weight of the epoxy resin (A). .

[8]如上述[4]至[7]中任一項之半導體元件之製造方法,其中,硬化劑(B)係含有選自胺系硬化劑及酸酐系硬化劑之至少1種硬化劑。 [8] The method for producing a semiconductor device according to any one of the above [4], wherein the curing agent (B) contains at least one curing agent selected from the group consisting of an amine curing agent and an acid anhydride curing agent.

[9]如上述[8]之半導體元件之製造方法,其中,以硬化劑(B)中之官能基相對於環氧樹脂(A)中之環氧基的當量比計,硬化劑(B)為0.8~1.5之範圍。 [9] The method for producing a semiconductor device according to the above [8], wherein the hardener (B) is based on an equivalent ratio of the functional group in the hardener (B) to the epoxy group in the epoxy resin (A). It is in the range of 0.8~1.5.

[10]一種半導體元件之製造方法,係具有將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,經由層間填充劑組成物使用熱壓黏接合裝置進行接合的步驟者;在該熱壓黏接合裝置之壓頭或平台之僅任一者的溫度為120℃以上的狀態,使焊料凸塊與電極墊接觸,在焊料凸塊與電極墊接觸後,使壓頭或平台之於焊料凸塊與電極墊接觸時未滿120℃之側的溫度成為焊料融點以上。 [10] A method of manufacturing a semiconductor device, comprising: a step of bonding a semiconductor wafer having solder bumps and a semiconductor substrate having an electrode pad via an interlayer filler composition using a thermocompression bonding apparatus; The temperature of any one of the indenter or the platform of the adhesive bonding device is 120 ° C or higher, the solder bump is brought into contact with the electrode pad, and after the solder bump is in contact with the electrode pad, the indenter or the platform is applied to the solder bump. The temperature at the side less than 120 ° C when the block is in contact with the electrode pad becomes the melting point of the solder.

[11]如上述[10]之半導體元件之製造方法,其中,對設置於壓頭或平台之於焊料凸塊與電極墊接觸時未滿120℃之側的半導體晶 片或半導體基板,事先塗佈上述層間填充劑組成物後進行接合。 [11] The method of manufacturing a semiconductor device according to the above [10], wherein the semiconductor crystal is disposed on a side of the indenter or the platform which is less than 120 ° C when the solder bump is in contact with the electrode pad. The sheet or the semiconductor substrate is bonded by applying the interlayer filler composition in advance.

[12]如上述[10]或[11]之半導體元件之製造方法,其中,上述層間填充劑組成物於100℃下之黏度為0.1~10Pa‧s。 [12] The method for producing a semiconductor device according to the above [10] or [11] wherein the interlayer filler composition has a viscosity at 100 ° C of 0.1 to 10 Pa ‧ s.

[13]如上述[11]或[12]之半導體元件之製造方法,其中,上述層間填充劑組成物係含有環氧樹脂(A)、硬化劑(B)、填料(C)及助焊劑(D)。 [13] The method for producing a semiconductor device according to the above [11] or [12] wherein the interlayer filler composition contains an epoxy resin (A), a hardener (B), a filler (C), and a flux ( D).

[14]如上述[13]之半導體元件之製造方法,其中,上述層間填充劑組成物係含有硬化促進劑(E)。 [14] The method for producing a semiconductor device according to the above [13], wherein the interlayer filler composition contains a curing accelerator (E).

根據本發明,於半導體元件之製造中,在半導體晶片-基板間、或半導體晶片-半導體晶片間的接合時,硬化接黏層不發生空隙(void),可形成接合性、導通性優越的硬化接黏層,故可製造高品質且可靠性優越的半導體元件。 According to the present invention, in the manufacture of a semiconductor element, in the bonding between the semiconductor wafer-substrate or the semiconductor wafer-semiconductor wafer, the hardened adhesive layer does not have voids, and the bonding and the conductivity are excellent. By bonding the adhesive layer, it is possible to manufacture a semiconductor component of high quality and excellent reliability.

根據本發明,可達到積層型半導體裝置之更進一步的高速、高容量化。 According to the present invention, it is possible to achieve further high speed and high capacity of the laminated semiconductor device.

1‧‧‧焊料凸塊 1‧‧‧ solder bumps

1A‧‧‧焊盤端子 1A‧‧‧pad terminal

1B‧‧‧焊料 1B‧‧‧ solder

2‧‧‧半導體晶片 2‧‧‧Semiconductor wafer

3‧‧‧層間填充劑組成物 3‧‧‧Interlayer filler composition

4‧‧‧塗佈噴嘴 4‧‧‧ Coating nozzle

5‧‧‧層間填充劑組成物層 5‧‧‧Interlayer filler composition layer

6‧‧‧電極墊 6‧‧‧electrode pads

7‧‧‧半導體基板 7‧‧‧Semiconductor substrate

8‧‧‧硬化接黏層 8‧‧‧ hardened adhesive layer

10‧‧‧半導體元件 10‧‧‧Semiconductor components

11‧‧‧貫通電極(TSV) 11‧‧‧through electrode (TSV)

圖1為表示本發明之接合時之壓頭及平台之溫度區域的圖表。 BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a graph showing the temperature regions of the indenter and the platform at the time of joining of the present invention.

圖2為表示前置法之半導體元件之製造方法的立體圖。圖2(a)為表示在半導體晶片塗佈層間填充劑組成物之操作的圖。圖2(b)為表示具有層間填充劑組成物層之半導體晶片的圖。圖2(c)為表示將具有層間填充劑組成物層之半導體晶片藉熱壓黏接合裝置(未圖示)於半導體基板上進行加熱加壓接合的操作的圖。圖2(d)為經由層間填充劑組成物之硬化接黏層使半導體晶片與半導體基板接合的半 導體元件的圖。 2 is a perspective view showing a method of manufacturing a semiconductor device of a front method. Fig. 2(a) is a view showing the operation of a filler composition between coating layers in a semiconductor wafer. Fig. 2(b) is a view showing a semiconductor wafer having an interlayer filler composition layer. 2(c) is a view showing an operation of heat-and-pressure bonding a semiconductor wafer having a layer of an interlayer filler composition by a thermocompression bonding apparatus (not shown) on a semiconductor substrate. Figure 2 (d) is a half of a semiconductor wafer bonded to a semiconductor substrate via a hardened adhesive layer of an interlayer filler composition A diagram of a conductor element.

圖3(a)為實施例25所製造之半導體元件之外觀照片;圖3(b)為同者之剖面照片。 Fig. 3(a) is a photograph showing the appearance of the semiconductor device produced in the twenty-fifth embodiment; Fig. 3(b) is a cross-sectional photograph of the same.

以下說明本發明實施形態,但本發明並不限定於以下實施形態,在其要旨範圍內可實施各種變形。 The embodiments of the present invention are described below, but the present invention is not limited to the following embodiments, and various modifications can be made without departing from the spirit and scope of the invention.

以下,於本發明之半導體元件之製造方法中,有時將用於將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板的接合的層間填充劑組成物,稱為「層間填充劑組成物」。又,有時將本發明之「半導體晶片」與「半導體基板」合稱為「基板」。半導體晶片與半導體基板係由集成電路製造中通常可用於作為半導體用基板的任意材質所構成,將形成了焊料凸塊之基板稱為「半導體晶片」,將形成了與該焊料凸塊接合之電極墊者稱為「半導體基板」。於半導體晶片、及半導體基板,亦可形成貫通電極(以下有時簡記為TSV)、半導體元件電路等,於基板間係經由焊料凸塊與電極墊所連接。 Hereinafter, in the method of manufacturing a semiconductor device of the present invention, an interlayer filler composition for bonding a semiconductor wafer having solder bumps to a semiconductor substrate having an electrode pad may be referred to as an "interlayer filler composition". "." Further, the "semiconductor wafer" and the "semiconductor substrate" of the present invention may be collectively referred to as "substrate". The semiconductor wafer and the semiconductor substrate are generally formed of any material used as a substrate for a semiconductor in the manufacture of an integrated circuit, and a substrate on which a solder bump is formed is referred to as a "semiconductor wafer", and an electrode bonded to the solder bump is formed. The pad is called a "semiconductor substrate." A through electrode (hereinafter sometimes abbreviated as TSV) or a semiconductor element circuit may be formed on the semiconductor wafer and the semiconductor substrate, and the substrate may be connected to the electrode pad via a solder bump.

尚且,在使用於同一基板上具有焊料凸塊及電極墊之基板的情況,該基板可視為半導體晶片、亦可為半導體基板。然而,一個基板並不同時構成為「半導體晶片」及「半導體基板」。 Further, in the case of using a substrate having solder bumps and electrode pads on the same substrate, the substrate may be a semiconductor wafer or a semiconductor substrate. However, one substrate is not simultaneously configured as a "semiconductor wafer" or a "semiconductor substrate".

[半導體元件之製造方法] [Method of Manufacturing Semiconductor Element]

首先,說明本發明之半導體元件之製造方法。層間填充劑組成物將於後述。 First, a method of manufacturing the semiconductor device of the present invention will be described. The interlayer filler composition will be described later.

本發明之半導體元件之製造方法,係使用熱壓黏接合 裝置,經由後述之層間填充劑組成物,將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板進行加熱加壓接合;該熱壓黏接合裝置之壓頭及平台的溫度,如圖1所示以壓頭溫度為縱軸、以平台溫度為橫軸的圖表中,依成為由下述4個式所包圍之範圍內的溫度條件進行接合。於此,所謂壓頭溫度,係指熱壓黏接合裝置之壓頭之加熱器的溫度,平台溫度係指熱壓黏接合裝置之平台之加熱器的溫度。 The method of manufacturing a semiconductor device of the present invention uses thermocompression bonding The device heat-pressurizes the semiconductor wafer having the solder bumps and the semiconductor substrate having the electrode pads via an interlayer filler composition described later; the temperature of the indenter and the platform of the thermocompression bonding device is as shown in FIG. In the graph in which the head temperature is the vertical axis and the platform temperature is the horizontal axis, the bonding is performed under the temperature conditions in the range surrounded by the following four equations. Here, the temperature of the indenter refers to the temperature of the heater of the indenter of the thermocompression bonding device, and the temperature of the platform refers to the temperature of the heater of the platform of the thermocompression bonding device.

H+1.9S=590…式1 H+1.9S=590...Form 1

H+0.526S=310…式2 H+0.526S=310...Form 2

H+0.8S=580…式3 H+0.8S=580...Form 3

H+1.25S=725…式4 H+1.25S=725...4

其中,上式1~4中,H表示接合時之壓頭溫度(℃),S表示接合時之平台溫度(℃))。 In the above formulas 1 to 4, H represents the head temperature (°C) at the time of joining, and S represents the stage temperature (°C) at the time of joining.

本發明中,熱壓黏接合裝置之壓頭及平台的溫度係個別地調整,設為由上述4個式所包圍之範圍內的溫度條件進行接合。從而,與將欲接合之基板置入以高溫槽等為代表的爐等、對全體進行加熱般之接合方法有所區別。其中,經個別地溫度調整的結果,並未排除壓頭及平台之溫度為相同的情況。作為具有可個別地溫度調節之壓頭及平台的熱壓黏接合裝置,可使用後述實施例所使用之東麗Engineering公司製之熱壓黏接合裝置「Flip Chip Bonder(FC3000S)」等。 In the present invention, the temperature of the indenter and the stage of the thermocompression bonding apparatus are individually adjusted, and the bonding is performed under the temperature conditions in the range surrounded by the above four equations. Therefore, a method of joining the substrate to be bonded to a furnace represented by a high-temperature bath or the like and heating the whole is different. Among them, the results of individual temperature adjustments did not rule out that the temperature of the indenter and the platform were the same. As the thermocompression bonding apparatus having the indenter and the stage which can be individually temperature-adjusted, the Flip Chip Bonder (FC3000S) manufactured by Toray Engineering Co., Ltd., which is used in the later-described embodiment, can be used.

個別溫度調整之壓頭及平台的溫度,係基於可縮短此等升溫所需時間而提高生產效率,或減少升溫所需要之能量的理由,較佳係其中任一者之溫度較另一者低。其結果,較佳係壓頭之溫度與平台之溫度相異。 The temperature of the indenter and the platform for individual temperature adjustment is based on the reason that the time required for such temperature rise can be shortened to increase the production efficiency or reduce the energy required for the temperature rise, and it is preferred that the temperature of either one is lower than the other. . As a result, it is preferred that the temperature of the press head differs from the temperature of the stage.

根據本發明,藉由依上述式1~式4所包圍之溫度區域進行接合,可抑制硬化接黏層中之空隙發生,使具有焊料凸塊之半導體晶片與具有電極墊之半導體基板依良好的接合性及導通性進行接合。於由此式1~式4所包圍之溫度區域外,空隙發生多、且接合性亦劣化。 According to the present invention, by bonding in the temperature region surrounded by the above formulas 1 to 4, occurrence of voids in the cured adhesive layer can be suppressed, and the semiconductor wafer having the solder bumps and the semiconductor substrate having the electrode pads can be bonded well. Sexuality and continuity are joined. Outside of the temperature range surrounded by Formulas 1 to 4, voids are generated and the bondability is also deteriorated.

於上述由式1~式4所包圍之溫度區域內,更佳之溫度區域係由以下之式5~式8所包圍之範圍內,特佳溫度區域係由以下式5~式8所包圍之範圍內。 In the temperature range surrounded by the above formulas 1 to 4, a more preferable temperature region is surrounded by the following formulas 5 to 8, and the particularly preferable temperature region is surrounded by the following formulas 5 to 8. Inside.

H+1.774S=624…式5 H+1.774S=624... Equation 5

H+0.564S=352…式6 H+0.564S=352...Form 6

H+0.72S=550…式7 H+0.72S=550... Equation 7

H+1.39S=764…式8 H+1.39S=764...8

本發明中,在由熱壓黏接合裝置進行接合時,若採用上述溫度條件即可,但為了充分發揮層間材料所要求之機能,平台溫度較佳為70~500℃、更佳100~450℃、再更佳120~430℃;壓頭溫度較佳為70~500℃、更佳100~450℃、再更佳120~430℃。又,在確實進行電氣接合方面,壓頭及平台之溫度較佳係高至一定以上,較佳係至少任一者高於225℃、更佳230℃以上、特佳235℃以上。 In the present invention, when the bonding is performed by the thermocompression bonding apparatus, the above temperature conditions may be employed. However, in order to fully exert the functions required for the interlayer material, the stage temperature is preferably 70 to 500 ° C, more preferably 100 to 450 ° C. Further preferably 120 to 430 ° C; the head temperature is preferably 70 to 500 ° C, more preferably 100 to 450 ° C, and even more preferably 120 to 430 ° C. Further, in terms of electrical bonding, the temperature of the indenter and the stage is preferably higher than a certain level, and preferably at least one of them is higher than 225 ° C, more preferably 230 ° C or higher, and particularly preferably 235 ° C or higher.

依上述特定溫度條件之接合步驟中的加壓力,為0.1~50Kgf/cm2、特佳0.1~10Kgf/cm2。加熱加壓時間設為0.1~30秒、特佳0.5~10秒。 The pressing force in the joining step according to the above specific temperature conditions is 0.1 to 50 Kgf/cm 2 and particularly preferably 0.1 to 10 Kgf/cm 2 . The heating and pressing time is set to 0.1 to 30 seconds, and particularly preferably 0.5 to 10 seconds.

尚且,於此由熱壓黏接合裝置所進行之加熱加壓接合後,亦可暫時由裝置取下,冷卻至室溫後,進行加熱至100~200℃之硬化處 理。 Further, after the heat and pressure bonding by the thermocompression bonding device, the device may be temporarily removed by the device, cooled to room temperature, and then heated to a hardening position of 100 to 200 ° C. Reason.

本發明之半導體元件之製造方法,係除了個別調整熱壓黏接合裝置之壓頭及平台的溫度,採用上述溫度條件以外,可依常法進行具有焊料凸塊之半導體晶片與具有電極墊之半導體基板的接合。例如,如圖2(a)所示般,於形成了由焊盤端子1A與焊料1B所構成之複數焊料凸塊1的半導體基板(半導體晶片)2上,藉塗佈噴嘴4供給本發明之層間填充劑組成物3,如圖2(b)所示,形成層間填充劑組成物層5後,視需要進行B階段化。其後,將形成了層間填充劑組成物層5之半導體晶片2上下反轉,如圖2(c)所示,在被載置於熱壓黏接合裝置之平台(未圖示)上、形成了電極墊6之半導體基板7上,使層間填充劑組成物層5側相對向,並藉未圖示之壓頭進行按壓。於熱壓黏接合裝置之壓頭與平台之間,對半導體基板7與半導體晶片2依上述溫度條件進行加熱加壓,藉此使層間填充劑組成物硬化,如圖2(d)所示般,得到經由層間填充劑組成物之硬化接黏層8使半導體晶片2與半導體基板7接合的半導體元件10。 In the method for manufacturing a semiconductor device of the present invention, in addition to individually adjusting the temperature of the indenter and the stage of the thermocompression bonding apparatus, a semiconductor wafer having solder bumps and a semiconductor having an electrode pad can be subjected to a usual method in addition to the above temperature conditions. Bonding of the substrate. For example, as shown in FIG. 2(a), the semiconductor substrate (semiconductor wafer) 2 on which the plurality of solder bumps 1 composed of the pad terminal 1A and the solder 1B are formed is supplied to the present invention by the application nozzle 4. As shown in FIG. 2(b), the interlayer filler composition 3 is formed into an interlayer filler composition layer 5, and then B-staged as necessary. Thereafter, the semiconductor wafer 2 on which the interlayer filler composition layer 5 is formed is vertically inverted, and as shown in FIG. 2(c), is formed on a platform (not shown) of the thermocompression bonding apparatus. On the semiconductor substrate 7 of the electrode pad 6, the interlayer filler composition layer 5 side is opposed to each other, and is pressed by a embossing head (not shown). The semiconductor substrate 7 and the semiconductor wafer 2 are heated and pressurized according to the above temperature conditions between the indenter of the thermocompression bonding apparatus and the stage, thereby hardening the interlayer filler composition as shown in FIG. 2(d). The semiconductor element 10 in which the semiconductor wafer 2 and the semiconductor substrate 7 are bonded via the hardened adhesive layer 8 of the interlayer filler composition is obtained.

具有複數之半導體晶片2的積層型半導體裝置,係重複此種步驟,在圖2(d)所示之半導體元件10之半導體晶片2(此時,於半導體晶片2之與硬化接黏層8為相反側之面形成有電極墊)上進一步接黏圖2(b)所示之形成了層間填充劑組成物層5之半導體晶片2,重複此步驟可予以製造。此時,已接黏之第一半導體晶片、與於其上進一步積層之第二半導體晶片,係將第一半導體晶片視為本發明之半導體基板,將第二半導體晶片視為本發明之半導體晶片。 The laminated semiconductor device having a plurality of semiconductor wafers 2 is repeated in the semiconductor wafer 2 of the semiconductor device 10 shown in FIG. 2(d) (at this time, the semiconductor wafer 2 and the hardened adhesive layer 8 are The semiconductor wafer 2 on which the interlayer filler composition layer 5 is formed as shown in Fig. 2(b) is further bonded to the electrode pad on the opposite side, and this step can be repeated. At this time, the bonded first semiconductor wafer and the second semiconductor wafer further laminated thereon are regarded as the semiconductor substrate of the present invention, and the second semiconductor wafer is regarded as the semiconductor wafer of the present invention. .

本發明中之半導體晶片及半導體基板,通常可使用由 集成電路之製造中可使用作為半導體用基板的任意材質所構成的基板。其中,較佳為使用矽基板。作為矽基板,可依口徑配合的基板膜厚直接使用,亦可藉由背面蝕刻(Backside Etching)或背研磨(Back grinding)等之背面研磨,予以薄膜化為100μm以下後使用。 The semiconductor wafer and the semiconductor substrate in the present invention are generally usable by In the manufacture of an integrated circuit, a substrate made of any material as a substrate for a semiconductor can be used. Among them, it is preferred to use a tantalum substrate. The tantalum substrate can be used as it is, and can be used by back-graining such as backside etching or back grinding, and can be used to form a film thickness of 100 μm or less.

於焊料凸塊之形成時可使用細微之焊球,亦可於藉光刻形成開口部後,於開口部之基底直接、或形成了鎳或銅之柱後進行焊料鍍覆,去除阻焊材後,藉加熱處理而形成焊料凸塊。作為焊料之組成並無特別限定,較佳係考量電氣接合性及低溫接合性後,使用含有錫作為主要成分的焊料。 A fine solder ball may be used for forming the solder bump, or after the opening is formed by photolithography, solder plating may be performed directly on the base of the opening or after forming a pillar of nickel or copper to remove the solder resist. Thereafter, solder bumps are formed by heat treatment. The composition of the solder is not particularly limited, and it is preferable to use solder containing tin as a main component after considering electrical bonding properties and low-temperature bonding properties.

焊盤端子係於基板上使用PVD(Physical Vapor Deposition)等而形成薄膜後,藉由光刻進行之抗蝕膜形成、及乾式濕式蝕刻,將不需要之部分去除而可形成。作為焊盤端子之材料,若為可與焊料凸塊接合者則無特別限定,考量對焊料間之接合性及可靠性等,較佳可使用金、銅、鎳等。 The pad terminal is formed by forming a thin film on a substrate using PVD (Physical Vapor Deposition) or the like, and then forming a thin film by photolithography and dry-type wet etching to remove unnecessary portions. The material of the pad terminal is not particularly limited as long as it can be bonded to the solder bump, and it is preferable to use gold, copper, nickel or the like in consideration of the bonding property and reliability between the solders.

由前置法所得之層間填充劑組成物層,可藉由習知之形成法、例如浸塗法、旋塗法、噴塗法、刮塗法、其他任意方法所形成。層間填充劑組成物層係如圖2所示般,可形成於具有焊料凸塊之半導體晶片2側,亦可如後述實施例般,形成於具有電極墊之半導體基板7側,或亦可形成於此等雙方。 The interlayer filler composition layer obtained by the pre-formation method can be formed by a conventional formation method such as dip coating method, spin coating method, spray coating method, knife coating method, or any other method. The interlayer filler composition layer may be formed on the side of the semiconductor wafer 2 having the solder bumps as shown in FIG. 2, or may be formed on the side of the semiconductor substrate 7 having the electrode pads as in the embodiment described later, or may be formed. These two parties.

層間填充劑組成物對半導體晶片的供給量,係半導體晶片之每單位面積,為1~50mg/cm2、特佳2~30mg/cm2。在將層間填充劑組成物供給至半導體基板側的情況、或對半導體晶片與半導體基板之雙方供給層間填充劑組成物而形成層間填充劑組成物層的情況,若依此種程度之供給量塗佈層間填充劑組成物即可。 The amount of the interlayer filler composition to be supplied to the semiconductor wafer is 1 to 50 mg/cm 2 and particularly preferably 2 to 30 mg/cm 2 per unit area of the semiconductor wafer. When the interlayer filler composition is supplied to the semiconductor substrate side or the interlayer filler composition is supplied to both the semiconductor wafer and the semiconductor substrate to form an interlayer filler composition layer, the coating amount is applied to such a degree. The inter-layer filler composition can be used.

於半導體晶片(及/或半導體基板)上形成層間填充劑組成物層後,為了將層間填充劑組成物中所含之低分子量成分等去除,可依50~150℃之任意溫度、較佳60~130℃之任意溫度進行烘烤處理,進行B階段化處理。 After the interlayer filler composition layer is formed on the semiconductor wafer (and/or the semiconductor substrate), the low molecular weight component or the like contained in the interlayer filler composition may be removed at any temperature of 50 to 150 ° C, preferably 60. Baking treatment is carried out at any temperature of ~130 ° C for B-stage treatment.

此時,可於一定溫度下進行烘烤處理,但為了順利進行組成物中之揮發成分去除,亦可於減壓條件下進行烘烤處理。又,亦可在樹脂硬化不進行的範圍,依階段性升溫進行烘烤處理。例如,可首先於60℃、接著80℃、再120℃分別實施各5~90分鐘左右的烘烤處理。 At this time, the baking treatment may be performed at a constant temperature, but in order to smoothly remove the volatile component in the composition, the baking treatment may be performed under reduced pressure. Further, the baking treatment may be carried out in a stepwise temperature rise in a range in which the resin hardening is not performed. For example, baking treatment of about 5 to 90 minutes may be carried out first at 60 ° C, then 80 ° C, and then 120 ° C.

本發明所代表之、具有將具有焊料凸塊之半導體晶片、與具有電極墊之半導體基板,經由層間填充劑組成物並使用熱壓黏接合裝置進行接合之步驟的半導體元件之製造方法中,接合前階段之各步驟的條件,對於製造高品質之半導體元件而言亦獨立地具有重要性。當然,在使用熱壓黏接合裝置進行接合之步驟的條件、或接合前階段之各步驟的條件係兩者均為較佳條件的情況下,可製造特別高品質的半導體元件。 In the method of manufacturing a semiconductor device having a step of bonding a semiconductor wafer having solder bumps and a semiconductor substrate having an electrode pad via an interlayer filler composition and using a thermocompression bonding apparatus, the bonding method is as described in the present invention. The conditions of the various steps of the previous stage are also of independent importance for the manufacture of high quality semiconductor components. Of course, in the case where both the conditions of the step of bonding using the thermocompression bonding apparatus or the conditions of each step of the pre-bonding stage are preferable, a particularly high-quality semiconductor element can be manufactured.

更具體而言,在進行加熱加壓接合之前階段,焊料凸塊與電極墊雖然呈接觸,但在此接觸時,較佳係依熱壓黏接合裝置之壓頭或平台之僅任一者的溫度為120℃以上的狀態使焊料凸塊與電極墊接觸。而且,較佳係於該接觸後,將壓頭或平台之、於焊料凸塊與電極墊接觸時未滿120℃之側的溫度設為焊料之融點以上之溫度條件,進行加熱加壓接合。此時,更佳係將層間填充劑組成物事先塗佈於焊料凸塊與電極墊經接觸時未滿120℃之側所設置的晶片或基板上。此時,若層間填充劑組成物之黏度過高,有成為加熱 加壓接合時之阻礙的情形,故在焊料凸塊與電極墊經接觸時未滿120℃之側的溫度,較佳為40℃以上。 More specifically, the solder bumps are in contact with the electrode pads in the stage before the heat-and-pressure bonding, but in the case of contact, it is preferably any one of the indenters or the platforms of the thermocompression bonding device. The solder bump is brought into contact with the electrode pad in a state where the temperature is 120 ° C or higher. Further, after the contact, the temperature of the indenter or the platform on the side less than 120 ° C when the solder bump is in contact with the electrode pad is preferably a temperature condition equal to or higher than the melting point of the solder, and the heating and pressure bonding is performed. . At this time, it is more preferable to apply the interlayer filler composition in advance to the wafer or substrate provided on the side where the solder bumps are not more than 120 ° C when the electrode pads are brought into contact. At this time, if the viscosity of the interlayer filler composition is too high, it becomes heated. In the case of hindrance at the time of press bonding, the temperature on the side less than 120 ° C when the solder bump and the electrode pad are in contact with each other is preferably 40 ° C or higher.

亦可在形成了層間填充劑組成物層後,將接合對象之半導體晶片、與半導體晶片及/或半導體基板進行假接合。作為假接合之溫度,較佳係依80℃~150℃之溫度進行。在接合為複數層的情況,可依基板層數重複上述假接合,亦可在將基板重疊複數層後,進行加熱而共同進行假接合。假接合時,視需要較佳係對基板間施加1gf/cm2~50Kgf/cm2、更佳10gf/cm2~10Kgf/cm2之負重而實施。 Alternatively, after the interlayer filler composition layer is formed, the semiconductor wafer to be bonded and the semiconductor wafer and/or the semiconductor substrate may be dummy bonded. The temperature of the dummy joint is preferably from 80 ° C to 150 ° C. In the case where the bonding is a plurality of layers, the dummy bonding may be repeated depending on the number of substrate layers, or after the plurality of layers are stacked on the substrate, heating may be performed to perform dummy bonding. In the case of dummy bonding, it is preferably carried out by applying a load of 1 gf/cm 2 to 50 Kgf/cm 2 , more preferably 10 gf/cm 2 to 10 Kgf/cm 2 between the substrates as needed.

[層間填充劑組成物] [Interlayer filler composition]

本發明之層間填充劑組成物較佳係含有環氧樹脂(A)、硬化劑(B)、填料(C)及助焊劑(D),於130℃下之黏度(以下有時記載為「η130」)較佳為100Pa‧s以下。 The interlayer filler composition of the present invention preferably contains an epoxy resin (A), a curing agent (B), a filler (C), and a flux (D), and has a viscosity at 130 ° C (hereinafter sometimes referred to as "η" 130 ") is preferably 100 Pa‧s or less.

本發明之層間填充劑組成物較佳係進一步含有硬化促進劑(E)及分散劑(F)。 The interlayer filler composition of the present invention preferably further contains a hardening accelerator (E) and a dispersing agent (F).

[黏度] [viscosity]

本發明之層間填充劑組成物較佳係130℃下之黏度η130為100Pa‧s以下之低黏度。若層間填充劑組成物之η130高於100Pa‧s,則接合時層間填充劑組成物不易流動,有發生接合不良的情形。本發明之層間填充劑組成物之η130更佳為50Pa‧s以下、特佳10Pa‧s以下。其中,若此黏度過低,則難以形成填角(Fillet Formation),故本發明之層間填充劑組成物之η130較佳為0.1Pa‧s以上。 The interlayer filler composition of the present invention preferably has a viscosity η 130 at 130 ° C of a low viscosity of 100 Pa ‧ or less. When the η 130 of the interlayer filler composition is higher than 100 Pa ‧ s, the interlayer filler composition does not easily flow during bonding, and joint failure may occur. The η 130 of the interlayer filler composition of the present invention is more preferably 50 Pa‧s or less, and particularly preferably 10 Pa‧s or less. Among them, if the viscosity is too low, it is difficult to form Fillet Formation, and therefore the η 130 of the interlayer filler composition of the present invention is preferably 0.1 Pa ‧ or more.

為了調製此種黏度之層間填充劑組成物,若使用低黏 度者作為層間填充劑組成物所含之環氧樹脂(A),或調整硬化劑(B)或其他成分之調配組成即可。 In order to modulate the interlayer filler composition of such viscosity, if low viscosity is used The epoxy resin (A) contained in the interlayer filler composition or the adjustment curing agent (B) or other components may be blended.

尚且,本發明中,層間填充劑組成物之黏度係採用後述實施例項中記載的方法所測定之值。 Further, in the present invention, the viscosity of the interlayer filler composition is a value measured by the method described in the following examples.

[環氧樹脂(A)] [Epoxy Resin (A)]

本發明所使用之環氧樹脂(A),係為了提升本發明之層間填充劑組成物的玻璃轉移溫度,較佳為具有2個以上環氧基的化合物。又,為了使將本發明之層間填充劑組成物經熱硬化而成之硬化物的破壞靭性值K1c值設為較高,1分子中所含之環氧基之範圍較佳為1以上且8以下、更佳為2以上且3以下。 The epoxy resin (A) used in the present invention is preferably a compound having two or more epoxy groups in order to increase the glass transition temperature of the interlayer filler composition of the present invention. In addition, in order to set the value of the fracture toughness value K1c of the cured product obtained by thermally curing the interlayer filler composition of the present invention to be high, the range of the epoxy group contained in one molecule is preferably 1 or more and 8 The following is more preferably 2 or more and 3 or less.

為了提升本發明之層間填充劑組成物的熱傳導性,作為本發明所使用之環氧樹脂(A),較佳係使用具有雙酚A型骨架、雙酚F型骨架、或聯苯基骨架之芳香環的環氧化合物。 In order to enhance the thermal conductivity of the interlayer filler composition of the present invention, the epoxy resin (A) used in the present invention is preferably a bisphenol A type skeleton, a bisphenol F type skeleton, or a biphenyl skeleton. An aromatic ring epoxy compound.

更具體而言,可例示雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、聯苯型環氧樹脂、含萘環之環氧樹脂、具有二環戊二烯骨架之環氧樹脂、苯酚酚醛清漆型樹脂、甲酚酚醛清漆型環氧樹脂、三苯基甲烷型環氧樹脂、脂肪族系環氧樹脂、脂肪族系環氧樹脂與芳香族系環氧樹脂之共聚合體環氧樹脂等。此等之中,較佳為雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、聯苯型環氧樹脂或含萘環之環氧樹脂,更佳為使用雙酚A型環氧樹脂、雙酚F型環氧樹脂、含萘環之環氧樹脂或聯苯型環氧樹脂。 More specifically, a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, a bisphenol S type epoxy resin, a biphenyl type epoxy resin, a naphthalene ring-containing epoxy resin, and a dicyclopentane can be exemplified. Diene skeleton epoxy resin, phenol novolak type resin, cresol novolac type epoxy resin, triphenylmethane type epoxy resin, aliphatic epoxy resin, aliphatic epoxy resin and aromatic ring An epoxy resin copolymerized epoxy resin or the like. Among these, bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, biphenyl type epoxy resin or epoxy resin containing a naphthalene ring is preferable. A bisphenol A type epoxy resin, a bisphenol F type epoxy resin, a naphthalene ring-containing epoxy resin or a biphenyl type epoxy resin is used.

又,為了提升使層間填充劑組成物經熱硬化而成之硬 化物的破壞靭性,亦使用多官能環氧樹脂作為本發明所使用之環氧樹脂(A)。 Moreover, in order to improve the hardening of the interlayer filler composition by heat hardening As the fracture toughness of the compound, a polyfunctional epoxy resin is also used as the epoxy resin (A) used in the present invention.

作為多官能環氧樹脂,較佳為苯酚酚醛清漆樹脂、甲酚酚醛清漆樹脂、雙酚A酚醛清漆樹脂、二環戊二烯酚樹脂、苯酚芳烷基樹脂、萘酚酚醛清漆樹脂、聯苯酚醛清漆樹脂、萜酚樹脂、重質油改質酚樹脂等之酚類;或藉由酚類與羥基苯醛、巴豆醛、乙二醛等之醛類的縮合反應所得的多價酚樹脂等之各種酚系化合物、與表氯醇所製造的環氧樹脂等的環氧丙基醚型多官能環氧樹脂。 As the polyfunctional epoxy resin, a phenol novolak resin, a cresol novolak resin, a bisphenol A novolac resin, a dicyclopentadiene phenol resin, a phenol aralkyl resin, a naphthol novolac resin, a biphenol is preferable. a phenol such as an aldehyde varnish resin, a phenol resin, a heavy oil-modified phenol resin, or a polyvalent phenol resin obtained by a condensation reaction of a phenol with an aldehyde such as hydroxybenzaldehyde, crotonaldehyde or glyoxal Each of the phenolic compounds and a glycidyl ether type polyfunctional epoxy resin such as an epoxy resin produced from epichlorohydrin.

此等環氧樹脂(A)可單獨使用1種,亦可將2種以上依任意組合及比率混合使用。 These epoxy resins (A) may be used singly or in combination of two or more kinds in any combination and in any ratio.

[硬化劑(B)] [hardener (B)]

本發明所使用之硬化劑(B),係表示有助於環氧樹脂(A)之交聯基間之交聯反應的物質。 The curing agent (B) used in the present invention is a substance which contributes to the crosslinking reaction between the crosslinking groups of the epoxy resin (A).

作為硬化劑(B)並無特別限制,可使用一般已知之環氧樹脂硬化劑。可舉例如酚系硬化劑、脂肪族胺、聚醚胺、脂環式胺、芳香族胺等之胺系硬化劑,酸酐系硬化劑、醯胺系硬化劑、三級胺、咪唑或其衍生物、有機膦類、鏻鹽、四苯基硼鹽、有機酸二醯肼、鹵化硼胺錯合物、聚硫醇系硬化劑、異氰酸酯系硬化劑、嵌段異氰酸酯系硬化劑等。 The curing agent (B) is not particularly limited, and a generally known epoxy resin curing agent can be used. For example, an amine-based curing agent such as a phenolic curing agent, an aliphatic amine, a polyetheramine, an alicyclic amine or an aromatic amine, an acid anhydride-based curing agent, a guanamine-based curing agent, a tertiary amine, an imidazole or a derivative thereof may be mentioned. A compound, an organic phosphine, a phosphonium salt, a tetraphenylboronium salt, an organic acid diterpene, a boron halide amine complex, a polythiol-based curing agent, an isocyanate-based curing agent, a blocked isocyanate-based curing agent, and the like.

作為酚系硬化劑之具體例,可例示雙酚A、雙酚F、4,4'-二羥基二苯基甲烷、4,4'-二羥基二苯基醚、1,4-雙(4-羥基苯氧基)苯、1,3-雙(4-羥基苯氧基)苯、4,4'-二羥基二苯硫醚、4,4'-二羥基二苯基酮、4,4'-二羥基二苯基碸、4,4'-二羥基聯苯、2,2'-二羥基聯 苯、10-(2,5-二羥基苯基)-10H-9-氧雜-10-磷雜菲-10-氧化物、苯酚酚醛清漆、雙酚A酚醛清漆、鄰甲酚酚醛清漆、間甲酚酚醛清漆、對甲酚酚醛清漆、二甲苯酚醛清漆、聚對羥基苯乙烯、氫醌、間苯二酚、兒茶酚、第三丁基兒茶酚、第三丁基氫醌、氟乙醇胺、五倍子酚、第三丁基五倍子酚、烯丙基化五倍子酚、聚烯丙基化五倍子酚、1,2,4-苯三醇、2,3,4-三羥基二苯基酮、1,2-二羥基萘、1,3-二羥基萘、1,4-二羥基萘、1,5-二羥基萘、1,6-二羥基萘、1,7-二羥基萘、1,8-二羥基萘、2,3-二羥基萘、2,4-二羥基萘、2,5-二羥基萘、2,6-二羥基萘、2,7-二羥基萘、2,8-二羥基萘、上述二羥基萘之烯丙基化物或聚烯丙基化物、烯丙基化雙酚A、烯丙基化雙酚F、烯丙基化苯酚酚醛清漆、烯丙基化五倍子酚等。 Specific examples of the phenolic curing agent include bisphenol A, bisphenol F, 4,4'-dihydroxydiphenylmethane, 4,4'-dihydroxydiphenyl ether, and 1,4-bis (4). -hydroxyphenoxy)benzene, 1,3-bis(4-hydroxyphenoxy)benzene, 4,4'-dihydroxydiphenyl sulfide, 4,4'-dihydroxydiphenyl ketone, 4,4 '-Dihydroxydiphenyl hydrazine, 4,4'-dihydroxybiphenyl, 2,2'-dihydroxyl linkage Benzene, 10-(2,5-dihydroxyphenyl)-10H-9-oxa-10-phosphaphenanthrene-10-oxide, phenol novolac, bisphenol A novolac, o-cresol novolac, Cresol novolac, p-cresol novolac, xylenol varnish, poly-p-hydroxystyrene, hydroquinone, resorcinol, catechol, tert-butylcatechol, tert-butyl hydroquinone, fluorine Ethanolamine, gallic phenol, tert-butyl gallophenol, allylated quinopolol, polyallylated pentapeptide, 1,2,4-benzenetriol, 2,3,4-trihydroxydiphenyl ketone, 1,2-dihydroxynaphthalene, 1,3-dihydroxynaphthalene, 1,4-dihydroxynaphthalene, 1,5-dihydroxynaphthalene, 1,6-dihydroxynaphthalene, 1,7-dihydroxynaphthalene, 1, 8-Dihydroxynaphthalene, 2,3-dihydroxynaphthalene, 2,4-dihydroxynaphthalene, 2,5-dihydroxynaphthalene, 2,6-dihydroxynaphthalene, 2,7-dihydroxynaphthalene, 2,8- Dihydroxynaphthalene, allylate or polyallyl of dihydroxynaphthalene, allylated bisphenol A, allylated bisphenol F, allylated phenol novolac, allylated quinol Wait.

作為屬於胺系硬化劑之脂肪族胺類,可例示乙二胺、1,3-二胺基丙烷、1,4-二胺基丙烷、六亞甲基二胺、2,5-二甲基六亞甲基二胺、三甲基六亞甲基二胺、二伸乙基三胺、亞胺基雙丙胺、雙(六亞甲基)三胺、三伸乙基四胺、四伸乙基五胺、五伸乙基六胺、N-羥基乙基乙二胺、四(羥基乙基)乙二胺等。作為聚醚胺類,可例示:三乙二醇二胺、四乙二醇二胺、二乙二醇雙(丙胺)、聚氧丙烯二胺、聚氧丙烯三胺類等。作為脂環式胺類,可例示異佛爾酮二胺、薄荷烷二胺、N-胺基乙基哌、雙(4-胺基-3-甲基二環己基)甲烷、雙(胺基甲基)環己烷、3,9-雙(3-胺基丙基)-2,4,8,10-四氧雜螺(5,5)十一烷、降烯二胺等。作為芳香族胺類,可例示:四氯-對二甲苯二胺、間二甲苯二胺、對二甲苯二胺、間伸苯基二胺、鄰伸苯基二胺、對伸苯基二胺、2,4-二胺基苯甲醚、2,4-甲苯二胺、2,4-二胺基二苯基甲烷、4,4'-二胺基二苯基甲烷、4,4'-二胺基-1,2-二苯基乙烷、2,4- 二胺基二苯基碸、4,4'-二胺基二苯基碸、間胺基苯酚、間胺基苄基胺、苄基二甲基胺、2-(二甲基胺基甲基)苯酚、三乙醇胺、甲基苄基胺、α-(間胺基苯基)乙胺、α-(對胺基苯基)乙胺、二胺基二乙基二甲基二苯基甲烷、α,α'-雙(4-胺基苯基)-對二異丙基苯等。 Examples of the aliphatic amines belonging to the amine-based curing agent include ethylenediamine, 1,3-diaminopropane, 1,4-diaminopropane, hexamethylenediamine, and 2,5-dimethyl group. Hexamethylenediamine, trimethylhexamethylenediamine, diethylidenetriamine, iminodipropylamine, bis(hexamethylene)triamine, tris-ethyltetramine, tetrazide Pentylamine, pentaethylhexamine, N-hydroxyethylethylenediamine, tetrakis(hydroxyethyl)ethylenediamine, and the like. The polyetheramines may, for example, be triethylene glycol diamine, tetraethylene glycol diamine, diethylene glycol bis (propylamine), polyoxypropylene diamine or polyoxypropylene triamine. As the alicyclic amines, isophorone diamine, menthane diamine, and N-aminoethyl pipe can be exemplified. , bis(4-amino-3-methyldicyclohexyl)methane, bis(aminomethyl)cyclohexane, 3,9-bis(3-aminopropyl)-2,4,8,10 - tetraoxaspiro (5,5) undecane, descending Ene diamine and the like. Examples of the aromatic amines include tetrachloro-p-xylylenediamine, m-xylenediamine, p-xylenediamine, meta-phenylenediamine, o-phenylenediamine, and p-phenylenediamine. , 2,4-diaminoanisole, 2,4-toluenediamine, 2,4-diaminodiphenylmethane, 4,4'-diaminodiphenylmethane, 4,4'- Diamino-1,2-diphenylethane, 2,4-diaminodiphenylphosphonium, 4,4'-diaminodiphenylphosphonium, m-aminophenol, m-aminobenzylamine , benzyldimethylamine, 2-(dimethylaminomethyl)phenol, triethanolamine, methylbenzylamine, α-(m-aminophenyl)ethylamine, α-(p-aminophenyl) Ethylamine, diaminodiethyldimethyldiphenylmethane, α,α'-bis(4-aminophenyl)-p-diisopropylbenzene, and the like.

作為酸酐系硬化劑之具體例,可例示:十二烯基琥珀酸酐、聚己二酸酐、聚壬二酸酐、聚癸二酸酐、聚(乙基十八烷二酸)酐、聚(苯基十六烷二酸)酐、甲基四氫苯二甲酸酐、甲基六氫苯二甲酸酐、六氫苯二甲酸酐、甲基雙環庚烯二甲酸酐、四氫苯二甲酸酐、三烷基四氫苯二甲酸酐、甲基環己烯二羧酸酐、甲基環己烯四羧酸酐、鄰苯二甲酸酐、偏苯三酸酐、均苯四甲酸酐、二苯基酮四羧酸酐、乙二醇雙偏苯三酸二酐、氯橋酸酐、耐地酸酐(nadic anhydride)、甲基耐地酸酐、5-(2,5-二側氧基四氫-3-呋喃基)-3-甲基-3-環己烷-1,2-二羧酸酐、3,4-二甲基-6-(2-甲基-1-丙烯基)-4-環己烯-1,2-二羧酸酐、3,4-二羧基-1,2,3,4-四氫-1-萘基琥珀酸二酐、1-甲基-二羧基-1,2,3,4-四氫-1-萘基琥珀酸二酐等。 Specific examples of the acid anhydride-based curing agent include dodecenyl succinic anhydride, polyadipate anhydride, polysebacic anhydride, polysebacic anhydride, poly(ethyl octadecandioic acid) anhydride, and poly(phenyl). Hexadecanedioic acid anhydride, methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, hexahydrophthalic anhydride, methylbicycloheptylene anhydride, tetrahydrophthalic anhydride, three Alkyltetrahydrophthalic anhydride, methylcyclohexene dicarboxylic anhydride, methylcyclohexene tetracarboxylic anhydride, phthalic anhydride, trimellitic anhydride, pyromellitic anhydride, diphenylketone tetracarboxylic anhydride, B Glycol trimellitic acid dianhydride, chloro-bromic anhydride, nadic anhydride, methyl acid anhydride, 5-(2,5-di-s-oxytetrahydro-3-furanyl)-3- Methyl-3-cyclohexane-1,2-dicarboxylic anhydride, 3,4-dimethyl-6-(2-methyl-1-propenyl)-4-cyclohexene-1,2-di Carboxylic anhydride, 3,4-dicarboxy-1,2,3,4-tetrahydro-1-naphthyl succinic dianhydride, 1-methyl-dicarboxy-1,2,3,4-tetrahydro-1 - Naphthyl succinic dianhydride or the like.

作為醯胺系硬化劑,可例示:二氰基二醯胺、聚醯胺樹脂等。 The amide-based curing agent may, for example, be dicyanodiamine or a polyamide resin.

作為三級胺,可例示:1,8-二氮雙環(5,4,0)十一烯-7、三伸乙基二胺、苄基二甲胺、三乙醇胺、二甲胺基乙醇、參(二甲胺基甲基)苯酚等。 As the tertiary amine, 1,8-diazabicyclo(5,4,0)undecene-7, tri-ethylenediamine, benzyldimethylamine, triethanolamine, dimethylaminoethanol, Ginseng (dimethylaminomethyl) phenol and the like.

作為咪唑或其衍生物,可例示:1-氰乙基-2-苯基咪唑、2-苯基咪唑、2-乙基-4(5)-甲基咪唑、2-苯基-4-甲基咪唑、1-苄基-2-甲基咪唑、1-苄基-2-苯基咪唑、1-氰乙基-2-十一烷基咪唑、1-氰基-2-苯基咪唑、1-氰乙基-2-十一烷基咪唑偏苯三酸酯、1-氰乙基 -2-苯基咪唑鎓偏苯三酸酯、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三、2,4-二胺基-6-[2'-乙基-4'-甲基咪唑基-(1')]-乙基-均三、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三異三聚氰酸加成物、2-苯基咪唑異三聚氰酸加成物、2-苯基-4,5-二羥基甲基咪唑、2-苯基-4-甲基-5-羥基甲基咪唑、或環氧樹脂與上述咪唑類之加成物等。 As the imidazole or a derivative thereof, 1-cyanoethyl-2-phenylimidazole, 2-phenylimidazole, 2-ethyl-4(5)-methylimidazole, 2-phenyl-4-methyl can be exemplified Imidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-all three 2,4-Diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-all three 2,4-Diamino-6-[2'-methylimidazolyl-(1')]-ethyl-all three Iso-cyanuric acid adduct, 2-phenylimidazolium isocyanurate adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5- Hydroxymethylimidazole, or an adduct of an epoxy resin and the above imidazoles, and the like.

作為有機膦類,可例示:三丁基膦、甲基二苯基膦、三苯基膦、二苯基膦、苯基膦等。作為鏻鹽,可例示:四苯基鏻‧四苯基硼酸鹽、四苯基鏻‧乙基三苯基硼酸鹽、四丁基鏻‧四丁基硼酸鹽等。作為四苯基硼鹽,可例示:2-乙基-4-甲基咪唑‧四苯基硼酸鹽、N-甲基啉‧四苯基硼酸鹽等。 The organic phosphines may, for example, be tributylphosphine, methyldiphenylphosphine, triphenylphosphine, diphenylphosphine or phenylphosphine. The onium salt may, for example, be tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium, ethyltriphenylborate or tetrabutylphosphonium tetrabutylborate. As the tetraphenylboron salt, 2-ethyl-4-methylimidazole‧tetraphenylborate and N-methyl can be exemplified Porphyrin ‧ tetraphenyl borate and the like.

此等硬化劑(B)可單獨使用1種,亦可將2種以上依任意組合及比率混合使用。 These curing agents (B) may be used singly or in combination of two or more kinds in any combination and in any ratio.

層間填充劑組成物中之硬化劑(B)的含量,係於環氧樹脂(A)之每100重量份,較佳為30~150重量份、更佳50~120重量份。 The content of the hardener (B) in the interlayer filler composition is preferably from 30 to 150 parts by weight, more preferably from 50 to 120 parts by weight, per 100 parts by weight of the epoxy resin (A).

在硬化劑(B)為酚系硬化劑、胺系硬化劑、酸酐系硬化劑的情況,依硬化劑(B)中之官能基相對於環氧樹脂(A)中之環氧基的當量比計,較佳係依0.8~1.5之範圍使用、更佳係依0.8~1.2之範圍使用。若為此範圍外,有未反應之環氧基或硬化劑之官能基殘留,無法得到所需物性的情況。 When the curing agent (B) is a phenolic curing agent, an amine curing agent or an acid anhydride curing agent, the equivalent ratio of the functional group in the curing agent (B) to the epoxy group in the epoxy resin (A) Preferably, it is used in the range of 0.8 to 1.5, and more preferably in the range of 0.8 to 1.2. If it is outside this range, the functional group of the unreacted epoxy group or the hardener remains, and the desired physical property cannot be obtained.

又,在硬化劑(B)為醯胺系硬化劑、三級胺、咪唑或其衍生物、有機膦類、鏻鹽、四苯基硼鹽、有機二醯肼、鹵化硼胺錯合物、聚硫醇系硬化劑、異氰酸酯系硬化劑、嵌段異氰酸酯系硬化劑等的情況,相對於環氧樹脂(A)100重量份,較佳係依0.1~20 重量份之範圍使用,更佳係依0.5~10重量份之範圍使用。 Further, the curing agent (B) is a guanamine-based curing agent, a tertiary amine, an imidazole or a derivative thereof, an organic phosphine, a phosphonium salt, a tetraphenylboron salt, an organic dioxane, a boron halide amine complex, In the case of a polythiol-based curing agent, an isocyanate-based curing agent, a blocked isocyanate-based curing agent, etc., it is preferably 0.1 to 20 with respect to 100 parts by weight of the epoxy resin (A). It is used in the range of parts by weight, and more preferably in the range of 0.5 to 10 parts by weight.

又,在二氰二胺化合物的情況,相對於環氧樹脂(A)100重量份,較佳係依0.1~10重量份之範圍使用,更佳係依0.5~6重量份的範圍使用。 Further, in the case of the dicyandiamide compound, it is preferably used in an amount of 0.1 to 10 parts by weight, more preferably 0.5 to 6 parts by weight, based on 100 parts by weight of the epoxy resin (A).

[填料(C)] [Filler (C)]

填料(C)係以熱傳導性之提升與線膨脹係數之控制為目的所添加者,尤其以線膨脹係數之控制為主要目的。 The filler (C) is added for the purpose of improving the thermal conductivity and controlling the linear expansion coefficient, and in particular, the main purpose is to control the linear expansion coefficient.

作為填料(C),可舉例如從由金屬、碳、金屬碳化物、金屬氧化物及金屬氮化物所組成群選擇之至少1種之粒子。作為碳之例子,可舉例如碳黑、碳纖維、石墨、富勒烯、鑽石等。作為金屬碳化物之例子,可舉例如碳化矽、碳化鈦、碳化鎢等。作為金屬氧化物之例子,可舉例如氧化鎂、氧化鋁、氧化矽、氧化鈣、氧化鋅、氧化釔、氧化鋯、氧化鈰、氧化鐿、矽鋁氮氧化物(矽、鋁、氧、氮所構成的陶瓷)等。作為上述金屬氮化物,可舉例如氮化硼、氮化鋁、氮化矽等。 The filler (C) is, for example, at least one selected from the group consisting of metals, carbon, metal carbides, metal oxides, and metal nitrides. Examples of the carbon include carbon black, carbon fiber, graphite, fullerene, diamond, and the like. Examples of the metal carbide include tantalum carbide, titanium carbide, tungsten carbide, and the like. Examples of the metal oxide include magnesium oxide, aluminum oxide, cerium oxide, calcium oxide, zinc oxide, cerium oxide, zirconium oxide, cerium oxide, cerium oxide, lanthanum aluminum oxynitride (antimony, aluminum, oxygen, nitrogen). The ceramics formed) and the like. Examples of the metal nitride include boron nitride, aluminum nitride, and tantalum nitride.

填料(C)之形狀並無限制,可為粒子狀、晶鬚狀、纖維狀、板狀、或此等之凝集體。 The shape of the filler (C) is not limited, and may be a pellet, a whisker, a fiber, a plate, or the like.

於積層型半導體裝置用之層間填充劑組成物中,由於要求絕緣性之情況較多,故填料(C)中,較佳為氧化物或氮化物。作為此種填料(C),更具體可舉例如氧化鋁(Al2O3)、氮化鋁(AlN)、氮化硼(BN)、氮化矽(Si3N4)、二氧化矽(SiO2)等。其中,較佳為Al2O3、AlN、BN或SiO2,特佳為Al2O3、BN或SiO2In the interlayer filler composition for a laminated semiconductor device, since insulation is required, the filler (C) is preferably an oxide or a nitride. More specific examples of such a filler (C) include alumina (Al 2 O 3 ), aluminum nitride (AlN), boron nitride (BN), tantalum nitride (Si 3 N 4 ), and cerium oxide ( SiO 2 ) and the like. Wherein, preferably Al 2 O 3, AlN, BN, or SiO 2, particularly preferably Al 2 O 3, BN or SiO 2.

作為BN系填料,較佳為使用日本專利特開2013-241321號公 報所揭示者。 As the BN-based filler, it is preferred to use Japanese Patent Laid-Open No. 2013-241321 The reporter revealed.

此等填料(C)可單獨使用1種,或依任意組合及比率混合2種以上而使用。 These fillers (C) may be used singly or in combination of two or more kinds in any combination and in any ratio.

近年來,三維集成電路係為了更進一步提升高速化、高容量化等性能,而使各晶片間之距離變小至10~50μm左右,但於晶片間之層間填充層中,所調配之填料的最大粒徑較佳係設為層間填充層之厚度之1/3以下左右。 In recent years, in order to further improve the performance of high-speed, high-capacity, and the like, the distance between the wafers is reduced to about 10 to 50 μm, but in the interlayer filling layer between the wafers, the filler is prepared. The maximum particle diameter is preferably about 1/3 or less of the thickness of the interlayer filling layer.

若填料(C)之最大粒徑超過10μm,則於硬化後之層間填充層之表面突出填料(C),有層間填充層之表面形狀惡化的傾向。作為填料(C)之最大粒徑,較佳為5μm、更佳3μm。 When the maximum particle diameter of the filler (C) exceeds 10 μm, the filler (C) protrudes from the surface of the interlayer filling layer after curing, and the surface shape of the interlayer filling layer tends to deteriorate. The maximum particle diameter of the filler (C) is preferably 5 μm, more preferably 3 μm.

本發明之層間填充劑組成物之填料(C)的含量,係於環氧樹脂(A)及硬化劑(B)之總和每100重量份中,較佳為10~500重量份、更佳20~400重量份。填料(C)之含量係於環氧樹脂(A)及硬化劑(B)之總和每100重量份中,若未滿10重量份,則填料(C)之添加效果變小,有無法得到目標之線膨脹係數或熱傳導性的情形;若超過500重量份,有填料(C)之存在阻礙接合性的情形。 The content of the filler (C) of the interlayer filler composition of the present invention is preferably 10 to 500 parts by weight, more preferably 20 parts by weight per 100 parts by weight of the epoxy resin (A) and the hardener (B). ~400 parts by weight. The content of the filler (C) is based on the total of the epoxy resin (A) and the hardener (B) per 100 parts by weight, and if it is less than 10 parts by weight, the addition effect of the filler (C) is small, and the target is not obtained. In the case of a coefficient of linear expansion or thermal conductivity, if it exceeds 500 parts by weight, the presence of the filler (C) may hinder the bondability.

[助焊劑(D)] [flux (D)]

所謂助焊劑(D),具體而言係具有於金屬端子之焊接時,溶解去除焊料凸塊等金屬電氣訊號端子及焊盤(Land)之表面氧化膜、或提高焊料凸塊於焊盤表面之潤濕擴散性,進而防止焊料凸塊之金屬端子表面之再氧化等機能的化合物。 The flux (D) specifically includes a metal oxide signal terminal such as a solder bump and a surface oxide film of a land, or a solder bump on the surface of the pad, during soldering of the metal terminal. A compound that wets diffusivity and thus prevents reoxidation of the metal terminal surface of the solder bump.

作為本發明所使用之助焊劑(D),可舉例如:草酸、丙二酸、琥珀酸、戊二酸、己二酸、蘋果酸、酒石酸、檸檬酸、乳 酸、乙酸、丙酸、丁酸、油酸、硬脂酸等脂肪族羧酸;苯甲酸、水楊酸、鄰苯二甲酸、偏苯三甲酸、偏苯三甲酸酐、均苯三甲酸、苯四甲酸等芳香族羧酸或其酸酐;松香酸、松香等萜烯系羧酸等之有機羧酸;及使有機羧酸與烷基乙烯基醚類反應所轉化之半縮醛酯之有機羧酸酯;麩胺酸鹽酸鹽、苯胺鹽酸鹽、鹽酸肼、溴化鯨蠟基吡啶、鹽酸苯肼、四氯萘、甲基鹽酸肼、甲胺鹽酸鹽、乙胺鹽酸鹽、二乙胺鹽酸鹽、丁胺鹽酸鹽等有機鹵化合物;尿素、二乙三胺肼等胺類;乙二醇、二乙二醇、三乙二醇、四乙二醇、甘油等之多元醇類;鹽酸、氟酸、磷酸、氫氟硼酸等無機酸;氟化鉀、氟化鈉、氟化銨、氟化銅、氟化鎳、氟化鋅等氟化物;氯化鉀、氯化鈉、氯化亞銅、氯化鎳、氯化銨、氯化鋅、氯化亞錫等氯化物;溴化鉀、溴化鈉、溴化銨、溴化錫、溴化鋅等溴化物等。此等化合物可直接使用,另外亦可使用應用利用有機聚合物或無機化合物等之被覆劑而微膠囊化者。該等化合物可單獨使用1種、亦可以任意組合及比率混合使用2種以上。 Examples of the flux (D) used in the present invention include oxalic acid, malonic acid, succinic acid, glutaric acid, adipic acid, malic acid, tartaric acid, citric acid, and milk. An aliphatic carboxylic acid such as acid, acetic acid, propionic acid, butyric acid, oleic acid or stearic acid; benzoic acid, salicylic acid, phthalic acid, trimellitic acid, trimellitic anhydride, trimesic acid, benzene An aromatic carboxylic acid such as tetracarboxylic acid or an acid anhydride thereof; an organic carboxylic acid such as a terpene carboxylic acid such as rosin acid or rosin; and an organic carboxylic acid of a hemiacetal ester obtained by reacting an organic carboxylic acid with an alkyl vinyl ether. Acid ester; glutamine hydrochloride, aniline hydrochloride, guanidine hydrochloride, cetylpyridinium bromide, phenylhydrazine hydrochloride, tetrachloronaphthalene, methylguanidine hydrochloride, methylamine hydrochloride, ethylamine hydrochloride, Organic halogen compounds such as diethylamine hydrochloride and butylamine hydrochloride; amines such as urea and diethylenetriamine; ethylene glycol, diethylene glycol, triethylene glycol, tetraethylene glycol, glycerin, etc. Polyols; inorganic acids such as hydrochloric acid, hydrofluoric acid, phosphoric acid, hydrofluoroboric acid; fluorides such as potassium fluoride, sodium fluoride, ammonium fluoride, copper fluoride, nickel fluoride, and zinc fluoride; potassium chloride and chlorine Sodium chloride, cuprous chloride, nickel chloride, ammonium chloride, zinc chloride, stannous chloride, etc.; potassium bromide, sodium bromide, ammonium bromide, tin bromide, zinc bromide Bromide and so on. These compounds may be used as they are, or may be microencapsulated by using a coating agent such as an organic polymer or an inorganic compound. These compounds may be used alone or in combination of two or more kinds in any combination and in any ratio.

本發明之層間填充劑組成物中之助焊劑(D)之含量,係於環氧樹脂(A)及硬化劑(B)之總和每100重量份,較佳為0.1~10重量份,更佳為0.5~5重量份。若助焊劑(D)之含量於環氧樹脂(A)及硬化劑(B)之總和每100重量份中為未滿0.1重量份,則有因氧化膜去除性降低而導致焊料連接不良之虞,又,若超過10重量份,則出現因組成物之黏度上升而導致連接不良之虞。 The content of the flux (D) in the interlayer filler composition of the present invention is preferably 0.1 to 10 parts by weight, preferably 0.1 to 10 parts by weight, based on the total of the epoxy resin (A) and the hardener (B). It is 0.5 to 5 parts by weight. When the content of the flux (D) is less than 0.1 part by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), there is a problem that the solder joint is poor due to a decrease in the oxide film removal property. Further, when it exceeds 10 parts by weight, the viscosity of the composition rises and the connection failure occurs.

[硬化促進劑(E)] [hardening accelerator (E)]

本發明之層間填充劑組成物係為了使硬化溫度下降、縮短硬化 時間,亦可與硬化劑(B)一起含有硬化促進劑(E)。 The interlayer filler composition of the present invention is used to lower the hardening temperature and shorten the hardening. The hardening accelerator (E) may also be contained together with the hardener (B).

作為硬化促進劑(E)之例子,含有三級胺基之化合物、咪唑或其衍生物、有機膦類、二甲基尿素、使用應用利用有機聚合物或無機化合物等之被覆劑將上述化合物予以微膠囊化者等。 As an example of the hardening accelerator (E), a compound containing a tertiary amino group, imidazole or a derivative thereof, an organic phosphine, dimethyl urea, or a coating agent using an organic polymer or an inorganic compound, or the like is used to apply the above compound. Microencapsulators, etc.

作為含三級胺基之化合物,可例示1,8-二氮雙環(5,4,0)十一烯-7、三伸乙基二胺、苄基二甲胺、三乙醇胺、二甲胺基乙醇、參(二甲胺基甲基)苯酚等。 As the compound having a tertiary amino group, 1,8-diazabicyclo(5,4,0)undecene-7, tri-ethylenediamine, benzyldimethylamine, triethanolamine, dimethylamine can be exemplified. Ethanol, ginseng (dimethylaminomethyl) phenol, and the like.

作為咪唑或其衍生物,可例示:1-氰乙基-2-苯基咪唑、2-苯基咪唑、2-乙基-4(5)-甲基咪唑、2-苯基-4-甲基咪唑、1-苄基-2-甲基咪唑、1-苄基-2-苯基咪唑、1-氰乙基-2-十一烷基咪唑、1-氰基-2-苯基咪唑、1-氰乙基-2-十一烷基咪唑偏苯三酸酯、1-氰乙基-2-苯基咪唑鎓偏苯三酸酯、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三、2,4-二胺基-6-[2'-乙基-4'-甲基咪唑基-(1')]-乙基-均三、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三異三聚氰酸加成物、2-苯基咪唑異三聚氰酸加成物、2-苯基-4,5-二羥基甲基咪唑、2-苯基-4-甲基-5-羥基甲基咪唑、環氧樹脂與上述咪唑類之加成物、2-苯基-4,5-二羥基甲基咪唑、2-苯基-4-甲基-5-羥基甲基咪唑等。 As the imidazole or a derivative thereof, 1-cyanoethyl-2-phenylimidazole, 2-phenylimidazole, 2-ethyl-4(5)-methylimidazole, 2-phenyl-4-methyl can be exemplified Imidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6-[2'-methylimidazolyl-(1')]-ethyl-all three 2,4-Diamino-6-[2'-ethyl-4'-methylimidazolyl-(1')]-ethyl-all three 2,4-Diamino-6-[2'-methylimidazolyl-(1')]-ethyl-all three Iso-cyanuric acid adduct, 2-phenylimidazolium isocyanurate adduct, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5- Hydroxymethylimidazole, an epoxy resin and an adduct of the above imidazole, 2-phenyl-4,5-dihydroxymethylimidazole, 2-phenyl-4-methyl-5-hydroxymethylimidazole, and the like.

作為有機膦類,可例示:三丁基膦、甲基二苯基膦、三苯基膦、二苯基膦、苯基膦等。作為鏻鹽,可例示:四苯基鏻‧四苯基硼酸鹽、四苯基鏻‧乙基三苯基硼酸鹽、四丁基鏻‧四丁基硼酸鹽等。作為四苯基硼鹽,可例示:2-乙基-4-甲基咪唑‧四苯基硼酸鹽、N-甲基啉‧四苯基硼酸鹽等。 The organic phosphines may, for example, be tributylphosphine, methyldiphenylphosphine, triphenylphosphine, diphenylphosphine or phenylphosphine. The onium salt may, for example, be tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium, ethyltriphenylborate or tetrabutylphosphonium tetrabutylborate. As the tetraphenylboron salt, 2-ethyl-4-methylimidazole‧tetraphenylborate and N-methyl can be exemplified Porphyrin ‧ tetraphenyl borate and the like.

此等之中,由較長之貯存期(pot life)、於中溫區域下之高硬化性、硬化樹脂之高耐熱性等特徵而言,較佳係使用咪唑化 合物(咪唑或其衍生物)及應用利用有機聚合物或無機化合物等之被覆劑將上述化合物予以微膠囊化者。 Among these, imidization is preferred from the characteristics of a long pot life, a high hardenability in a medium temperature region, and a high heat resistance of a hardened resin. The compound (imidazole or a derivative thereof) and the application thereof are microencapsulated by using a coating agent such as an organic polymer or an inorganic compound.

此等硬化促進劑(E)可單獨使用1種,或將2種以上依任意組合及比率混合使用。 These hardening accelerators (E) may be used singly or in combination of two or more kinds in any combination and in any ratio.

在本發明之層間填充劑組成物中含有硬化促進劑(E)的情況,硬化促進劑(E)之含量係於環氧樹脂(A)及硬化劑(B)之總和每100重量份中,較佳為0.001~15重量份、更佳0.01~10重量份。若硬化促進劑(E)之含量為於環氧樹脂(A)及硬化劑(B)之總和每100重量份中未滿0.001重量份,則有硬化促進效果不足之虞;若超過15重量份,有觸媒硬化反應具支配性,有無法達成空隙減低的情形。 In the case where the interlayer filler composition of the present invention contains the hardening accelerator (E), the content of the hardening accelerator (E) is per 100 parts by weight of the total of the epoxy resin (A) and the hardener (B). It is preferably 0.001 to 15 parts by weight, more preferably 0.01 to 10 parts by weight. When the content of the hardening accelerator (E) is less than 0.001 part by weight per 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B), the curing promoting effect is insufficient; if more than 15 parts by weight There is a catalyst hardening reaction that is dominant, and there is no possibility of achieving a reduction in voids.

[分散劑(F)] [Dispersant (F)]

本發明之層間填充劑組成物係為了提高填料(C)之分散性,較佳為含有分散劑(F)。作為分散劑(F)並無特別限制,可使用作為調配於層間填充劑組成物之分散劑所公知之任意者。 The interlayer filler composition of the present invention preferably contains a dispersing agent (F) in order to improve the dispersibility of the filler (C). The dispersing agent (F) is not particularly limited, and any one known as a dispersing agent formulated in the interlayer filler composition can be used.

本發明之層間填充劑組成物中,分散劑(F)的含量若為可解決本發明課題者,則可為任意比率,在將上述填料(C)設為100重量份時,分散劑(F)較佳為0.1~4重量份、更佳0.1~2重量份。 In the interlayer filler composition of the present invention, the content of the dispersing agent (F) may be any ratio, and the dispersing agent (F) may be used in an amount of 100 parts by weight of the filler (C). It is preferably 0.1 to 4 parts by weight, more preferably 0.1 to 2 parts by weight.

[其他添加劑] [Other additives]

本發明之層間填充劑組成物中,以進一步提升其機能為目的,在不損及本發明效果之範圍內,亦可含有上述以外之各種添加劑。 In the interlayer filler composition of the present invention, for the purpose of further enhancing the function, various additives other than the above may be contained within a range not impairing the effects of the present invention.

作為添加劑之例子,可舉例如用於提升接合性或環氧樹脂(A)與填料(C)間之接合性的嵌合劑、用於提升保存穩定性之抗紫外線 劑、抗氧化劑、可塑劑、難燃劑、著色劑、流動性改良劑、與基材間之密黏性提升劑(例如熱可塑性之寡聚物類)等。 As an example of the additive, for example, a chimeric agent for improving the bondability or the bondability between the epoxy resin (A) and the filler (C), and ultraviolet rays for improving the storage stability can be mentioned. Agents, antioxidants, plasticizers, flame retardants, colorants, fluidity improvers, adhesion promoters to substrates (eg, thermoplastic oligomers).

此等其他添加劑可單獨使用任1種,亦可將2種以上依任意組合及比率混合使用。 These other additives may be used singly or in combination of two or more kinds in any combination and in any ratio.

其他添加劑的調配量並無特別限制,於得到所必要之機能性的程度,依通常之樹脂組成物的調配量使用;其他添加劑成分的調配量,係於環氧樹脂(A)及硬化劑(B)之總和每100重量份中,較佳為10重量份以下、特佳5重量份以下。 The blending amount of the other additives is not particularly limited, and is used in accordance with the usual amount of the resin composition to the extent that the necessary functionality is obtained; the blending amount of the other additive components is based on the epoxy resin (A) and the hardener ( The total of B) is preferably 10 parts by weight or less, particularly preferably 5 parts by weight or less per 100 parts by weight.

作為上述偶合劑,可舉例如矽烷偶合劑、鈦酸酯偶合劑等。 The coupling agent may, for example, be a decane coupling agent or a titanate coupling agent.

作為矽烷偶合劑,可舉例如γ-環氧丙氧基丙基三甲氧基矽烷、γ-環氧丙氧基丙基三乙氧基矽烷、β-(3,4-環氧環己基)乙基三甲氧基矽烷等之環氧基矽烷,γ-胺基丙基三乙氧基矽烷、N-β(胺基乙基)γ-胺基丙基三甲氧基矽烷、N-β(胺基乙基)γ-胺基丙基甲基二甲氧基矽烷、γ-胺基丙基三甲氧基矽烷、γ-脲丙基三乙氧基矽烷等之胺基矽烷,3-巰基丙基三甲氧基矽烷等之巰基矽烷,對苯乙烯基三甲氧基矽烷、乙烯基三氯矽烷、乙烯基參(β-甲氧基乙氧基)矽烷、乙烯基三甲氧基矽烷、乙烯基三乙氧基矽烷、γ-甲基丙烯醯氧基丙基三甲氧基矽烷等之乙烯基矽烷,再者有如環氧基系、胺基系、乙烯基系之高分子型的矽烷等。 Examples of the decane coupling agent include γ-glycidoxypropyltrimethoxydecane, γ-glycidoxypropyltriethoxydecane, and β-(3,4-epoxycyclohexyl)B. Epoxy decane such as trimethoxy decane, γ-aminopropyl triethoxy decane, N-β (aminoethyl) γ-aminopropyl trimethoxy decane, N-β (amino group) Ethyl) γ-aminopropylmethyldimethoxydecane, γ-aminopropyltrimethoxydecane, γ-ureidopropyltriethoxydecane, etc. Aminodecane, 3-mercaptopropyltrimethyl Tertyl decane such as oxydecane, p-styryl trimethoxy decane, vinyl trichloro decane, vinyl ginseng (β-methoxyethoxy) decane, vinyl trimethoxy decane, vinyl triethoxy A vinyl decane such as a decane or a γ-methacryloxypropyltrimethoxy decane may be used, for example, an epoxy group, an amine group or a vinyl polymer type decane.

作為鈦酸酯偶合劑,可舉例如三異硬脂醯基鈦酸異丙酯、三(N-胺基乙基‧胺基乙基)鈦酸異丙酯、雙(二辛基磷酸酯)鈦酸二異丙酯、雙(二辛基磷酸酯)鈦酸四異丙酯、四辛基雙(二(十三烷基)磷酸酯)鈦酸酯、四(2,2-二烯丙氧基甲基-1-丁基)雙(二(十三烷 基))磷酸鈦酸酯、雙(二辛基焦磷酸酯)氧基醋酸鈦酸鹽、雙(二辛基焦磷酸酯)伸乙基鈦酸鹽等。 Examples of the titanate coupling agent include isopropyl triisostearate isopropyl titanate, isopropyl tris(N-aminoethyl ‧ aminoethyl) titanate, and bis(dioctyl phosphate). Diisopropyl titanate, bis(dioctylphosphonate) tetraisopropyl titanate, tetraoctylbis(di(tridecyl)phosphate) titanate, tetrakis(2,2-diallyl) Oxymethyl-1-butyl) bis(di(tridecane) Base)) titanate phosphate, bis(dioctylpyrophosphate)oxyacetate titanate, bis(dioctylpyrophosphate)extended ethyl titanate, and the like.

此等偶合劑可單獨使用1種,亦可將2種以上依任意組合及比率混合使用。 These coupling agents may be used singly or in combination of two or more kinds in any combination and in any ratio.

在本發明之層間填充劑組成物含有偶合劑時,其含量係相對於層間填充劑組成物中之總固形份,較佳設為0.1~2.0重量%左右。若偶合劑之調配量較少,則無法充分獲得因調配偶合劑所造成之屬於基質樹脂之環氧樹脂(A)與填料(C)間之密黏性的提升效果;若過多,所有由所得硬化物滲出偶合劑的問題。 When the interlayer filler composition of the present invention contains a coupling agent, the content thereof is preferably about 0.1 to 2.0% by weight based on the total solid content in the interlayer filler composition. If the amount of the coupling agent is small, the effect of improving the adhesion between the epoxy resin (A) and the filler (C) which are caused by the coupling of the coupling agent cannot be sufficiently obtained; if too much, all the results are obtained. The problem of the hardened material oozing out of the coupling agent.

本發明之層間填充劑組成物係為了成形時之流動性改良及與基材間之密黏性提升,亦可含有熱可塑性之寡聚物類。作為熱可塑性之寡聚物類,可例示C5系或C9系石油樹脂、苯乙烯樹脂、茚樹脂、茚‧苯乙烯共聚合樹脂、茚‧苯乙烯‧酚共聚合樹脂、茚‧薰草酮共聚合樹脂、茚‧苯并噻吩共聚合樹脂等。此等可單獨使用1種,亦可混合使用2種以上。 The interlayer filler composition of the present invention may contain thermoplastic oligomers for the purpose of improving the fluidity during molding and improving the adhesion to the substrate. Examples of the thermoplastic oligomers include a C5-based or C9-based petroleum resin, a styrene resin, a ruthenium resin, a ruthenium styrene copolymer resin, a ruthenium styrene phenol composite resin, and a ruthenium ketone. A polymer resin, a ruthenium benzothiophene copolymer resin, or the like. These may be used alone or in combination of two or more.

在本發明之層間填充劑組成物含有此等熱可塑性寡聚物類的情況,其含量通常相對於環氧樹脂(A)100重量份,為2~30重量份、較佳5~20重量份。 In the case where the interlayer filler composition of the present invention contains such thermoplastic oligomers, the content thereof is usually 2 to 30 parts by weight, preferably 5 to 20 parts by weight, per 100 parts by weight of the epoxy resin (A). .

本發明之層間填充劑組成物亦可進一步含有界面活性劑、乳化劑、低彈性化劑、稀釋劑、消泡劑、離子捕捉劑等。 The interlayer filler composition of the present invention may further contain a surfactant, an emulsifier, a low-elasticity agent, a diluent, an antifoaming agent, an ion scavenger, and the like.

作為界面活性劑,可使用習知之陰離子系界面活性劑、非離子系界面活性劑及陽離子系界面活性劑的任一種。 As the surfactant, any of a conventional anionic surfactant, a nonionic surfactant, and a cationic surfactant can be used.

可舉例如聚氧乙烯烷基醚類、聚氧乙烯烷基芳基醚類、聚氧乙烯烷基酯類、山梨醇酐烷基酯類、單甘油酯烷基酯類、烷基苯磺酸 鹽類、烷基萘磺酸鹽類、烷基硫酸鹽類、烷基磺酸鹽類、磺酸基琥珀酸酯鹽類、烷基甜菜鹼類、胺基酸類等。 For example, polyoxyethylene alkyl ethers, polyoxyethylene alkyl aryl ethers, polyoxyethylene alkyl esters, sorbitan alkyl esters, monoglyceride alkyl esters, alkyl benzene sulfonic acids Salts, alkylnaphthalenesulfonates, alkyl sulfates, alkyl sulfonates, sulfonate succinates, alkyl betaines, amino acids, and the like.

此等界面活性劑中,較佳亦可使用C-H鍵結之一部分或全部成為C-F鍵結的氟界面活性劑。 Among these surfactants, it is preferred to use a fluorosurfactant in which a part or all of the C-H bond is a C-F bond.

在本發明之層間填充劑組成物含有此等界面活性劑的情況,其含量係相對於環氧樹脂(A)及硬化劑(B)之總和100重量份,為0.001~0.1重量份、較佳0.003~0.05重量份。 In the case where the interlayer filler composition of the present invention contains such a surfactant, the content thereof is 0.001 to 0.1 part by weight, preferably 0.001 to 0.1 part by weight, based on 100 parts by weight of the total of the epoxy resin (A) and the curing agent (B). 0.003~0.05 parts by weight.

本發明之層間填充劑組成物中,亦可進一步添加有機溶劑。 Further, an organic solvent may be further added to the interlayer filler composition of the present invention.

作為有機溶媒,可舉例如丙酮、甲基乙基酮(MEK)、甲基異丁基酮、甲基戊基酮、環己酮等之酮類,醋酸乙酯等之酯類,乙二醇單甲基醚等之醚類,N,N-二甲基甲醯胺、N,N-二甲基乙醯胺等之醯胺類,甲醇、乙醇等之醇類,己烷、環己烷等之烷類,甲苯、二甲苯等之芳香族類等。 Examples of the organic solvent include ketones such as acetone, methyl ethyl ketone (MEK), methyl isobutyl ketone, methyl amyl ketone, and cyclohexanone; esters such as ethyl acetate; and ethylene glycol. An ether such as monomethyl ether, an amine such as N,N-dimethylformamide or N,N-dimethylacetamide, an alcohol such as methanol or ethanol, hexane or cyclohexane. An alkane, an aromatic such as toluene or xylene.

其中,若考慮到樹脂之溶解性及有機溶媒之沸點等,較佳為甲基乙基酮或環己酮等之酮類、酯類或醚類,特佳為使用甲基乙基酮、環己酮等之酮類。 In particular, in view of the solubility of the resin and the boiling point of the organic solvent, ketones, esters or ethers such as methyl ethyl ketone or cyclohexanone are preferred, and methyl ethyl ketone and ring are particularly preferred. Ketones such as ketone.

此等有機溶媒可單獨使用1種、或依任意組合及比率混合2種以上而使用。 These organic solvents may be used singly or in combination of two or more kinds in any combination and in any ratio.

其中,若使用有機溶媒,由於在接合步驟中有機溶媒揮發而於硬化接黏層中容易形成空隙,故本發明之層間填充劑組成物較佳係不含有機溶媒。 Among them, when an organic solvent is used, since the organic solvent volatilizes in the bonding step and voids are easily formed in the cured adhesive layer, the interlayer filler composition of the present invention preferably does not contain an organic solvent.

[層間填充劑組成物之製造方法] [Method of Manufacturing Interlayer Filler Composition]

本發明之層間填充劑組成物通常係將環氧樹脂(A)、硬化劑(B)、填料(C)及助焊劑(D)、視需要所使用之硬化促進劑(E)、分散劑(F)及其他添加劑成分藉混合器等予以均勻混合後,藉加熱輥、捏合器等進行混練而製造。此等成分之調配順序並無特別限制。又,亦可於混練後使用壓製機等進行薄膜化。亦可於混練後進一步進行熔融混練物之粉碎,以進行粉化或顆粒化。 The interlayer filler composition of the present invention is usually an epoxy resin (A), a hardener (B), a filler (C), and a flux (D), a hardening accelerator (E) and a dispersing agent (optionally used) ( F) and other additive components are uniformly mixed by a mixer or the like, and then kneaded by a heating roll, a kneader or the like to be produced. The order in which these ingredients are formulated is not particularly limited. Further, it is also possible to form a film by a press or the like after kneading. Further, the pulverization of the melt kneaded material may be further carried out after the kneading to carry out pulverization or granulation.

[實施例] [Examples]

以下使用實施例更詳細說明本發明,但本發明係在不脫離其要旨之前提下,並不限定於以下實施例。 Hereinafter, the present invention will be described in more detail with reference to the preferred embodiments, but the present invention is not limited to the following examples.

[調配成分] [mixing ingredients]

以下實施例及比較例中,層間填充劑組成物之調製所使用的調配成分係如下述。 In the following examples and comparative examples, the formulation components used for the preparation of the interlayer filler composition are as follows.

<環氧樹脂(A)> <Epoxy Resin (A)>

環氧樹脂(A1):Daiso Chemical公司製,品名「LX-01」(雙酚A型環氧丙基醚環氧樹脂,環氧當量181g/當量,25℃下之黏度10Pa‧s) Epoxy resin (A1): manufactured by Daiso Chemical Co., Ltd. under the product name "LX-01" (bisphenol A type epoxy propyl ether epoxy resin, epoxy equivalent 181 g / equivalent, viscosity at 25 ° C 10 Pa‧ s)

環氧樹脂(A2):三菱化學公司製,品名「jER 1032H60」(參(羥苯基)甲烷型固形環氧樹脂,環氧當量169g/當量,融點56~62℃) Epoxy resin (A2): manufactured by Mitsubishi Chemical Corporation, product name "jER 1032H60" (paraben (hydroxyphenyl) methane type solid epoxy resin, epoxy equivalent 169g / equivalent, melting point 56 ~ 62 ° C)

<硬化劑(B)> <hardener (B)>

胺系硬化劑(B1):和歌山精化工業公司製,品名「SEIKACURE S」(胺價124g/當量,融點177℃) Amine hardener (B1): manufactured by Wakayama Seika Chemical Co., Ltd., product name "SEIKACURE S" (amine price 124g / equivalent, melting point 177 ° C)

胺系硬化劑(B2):IHARA CHEMICAL工業公司製,品名「ELASMER-250P」(聚四亞甲基氧基雙-4-胺基苯甲酸酯,胺價235g/當量,融點60℃,25℃之黏度為10Pa‧s) Amine-based hardener (B2): manufactured by IHARA CHEMICAL CORPORATION, under the product name "ELASMER-250P" (polytetramethyleneoxybis-4-aminobenzoic acid ester, amine price 235 g/eq, melting point 60 ° C, The viscosity at 25 ° C is 10 Pa ‧ s)

酸酐系硬化劑(B3):三菱化學公司製,品名「jER CURE YH306」(3,4-二甲基-6-(2-甲基-1-丙烯基)-4-環己烯-1,2-二羧酸酐,酸酐當量117g/當量,25℃之黏度為0.1Pa‧s) An acid anhydride hardener (B3): manufactured by Mitsubishi Chemical Corporation under the trade name "jER CURE YH306" (3,4-dimethyl-6-(2-methyl-1-propenyl)-4-cyclohexene-1, 2-dicarboxylic anhydride, anhydride equivalent 117 g / equivalent, viscosity at 25 ° C is 0.1 Pa ‧ s)

<填料(C)> <Filler (C)>

無機填料(C1):龍森公司製,品名「MUF-2BV」(熔融二氧化矽) Inorganic filler (C1): manufactured by Longsen Co., Ltd., product name "MUF-2BV" (melted cerium oxide)

無機填料(C2):龍森公司製,品名「TS-AP-9」 Inorganic filler (C2): manufactured by Longsen Company, the product name "TS-AP-9"

無機填料(C3):Admatechs公司製,品名「AE9104-SXE」 Inorganic filler (C3): Made by Admatechs, under the name "AE9104-SXE"

<助焊劑(D)> <flux (D)>

助焊劑(D1):日油公司製,品名「Santasiddo I」(單烷基乙烯基醚嵌段2官能羧酸) Flux (D1): manufactured by Nippon Oil Co., Ltd., under the name "Santasiddo I" (monoalkyl vinyl ether block difunctional carboxylic acid)

助焊劑(D2):和光純藥公司製,品名「庚二酸」 Flux (D2): manufactured by Wako Pure Chemical Co., Ltd., under the name "Pimelic Acid"

<硬化促進劑(E)> <hardening accelerator (E)>

硬化促進劑(E):旭化成E-Materials公司製,品名「NOVACURE HXA3792」(經微膠囊化之胺系硬化劑及雙酚A型液狀環氧樹脂的混合物) Hardening accelerator (E): Asahi Kasei E-Materials Co., Ltd., product name "NOVACURE HXA3792" (a mixture of microencapsulated amine-based hardener and bisphenol A-type liquid epoxy resin)

<分散劑(F)> <dispersant (F)>

分散劑(F):BYK-Chemie Japan公司製「BYK-2155」(具顏料親和性基之嵌段共聚物) Dispersant (F): "BYK-2155" (block copolymer with pigment affinity group) manufactured by BYK-Chemie Japan Co., Ltd.

[各種物性、特性之評價] [Evaluation of various physical properties and characteristics] (1)層間填充劑組成物之黏度 (1) Viscosity of interlayer filler composition

使用Anton Paar Japan公司製黏彈性測定裝置(Physica MCR102),如下述般測定層間填充劑組成物之黏度(動態黏彈性測定之複數黏度)。 The viscosity of the interlayer filler composition (complex viscosity of the dynamic viscoelasticity measurement) was measured using a viscoelasticity measuring apparatus (Physica MCR102) manufactured by Anton Paar Japan Co., Ltd. as follows.

首先,將屬於測定對象之層間填充劑組成物載置於平行板皿(Parallel Plate Dish)與平行板( 20mm)之間,進行動態黏彈性測定。 First, the interlayer filler composition belonging to the measurement object is placed on a parallel plate (Parallel Plate Dish) and a parallel plate ( Dynamic viscoelasticity measurements were made between 20 mm).

測定條件係對上述樣本賦予正弦波應變0.5%,其應變之頻率設為1(Hz),依1分鐘3℃的比例使其升溫,由40℃~200℃測定升溫過程中的黏度,求得130℃之黏度作為η130The measurement conditions were such that the sample was subjected to a sine wave strain of 0.5%, the strain frequency was set to 1 (Hz), and the temperature was raised at a ratio of 3 ° C for 1 minute, and the viscosity during the temperature rise was measured from 40 ° C to 200 ° C. The viscosity at 130 ° C is taken as η 130 .

(2)接合性之評價 (2) Evaluation of jointability

藉由數位萬用表以四端子法測定所製造之半導體元件內部的菊鍊(Daisy Chain)的電阻。相對於周邊部之外周之電阻值R1=70Ω、內周之電阻值R2=27Ω,將為±5%的情況評價為「○」,將超過±5%之情況評價為「×」。 The resistance of the Daisy Chain inside the manufactured semiconductor element was measured by a four-terminal method by a digital multimeter. The resistance value R1=70 Ω with respect to the outer periphery of the peripheral portion, and the resistance value R2=27 Ω of the inner circumference were evaluated as “○” when the value was ±5%, and “×” when the value exceeded ±5%.

(3)接合面內之空隙評價 (3) Evaluation of voids in the joint surface

針對所製造之半導體元件,使用日立Power Solutions公司製之超音波探查映像裝置(FS300III),觀察接合晶片間之凸塊與凸塊之間有無空隙。將空隙為10個以下的情況評價為「○」,將空隙為11 個以上者評價為「×」。 For the semiconductor element to be manufactured, an ultrasonic probe imaging device (FS300III) manufactured by Hitachi Power Solutions Co., Ltd. was used to observe whether or not there was a gap between the bump and the bump between the bonded wafers. The case where the gap is 10 or less is evaluated as "○", and the gap is 11 More than one is evaluated as "X".

[實施例1~18、比較例1~8] [Examples 1 to 18, Comparative Examples 1 to 8]

於150cc之攪拌容器,秤量環氧樹脂(A1)8.31g、胺系硬化劑(B1)2.26g、胺系硬化劑(B2)1.43g,於其中調配添加相對於填料(C)添加量為1重量份(0.18g)的分散劑(F),使用自公轉攪拌機(THINKY公司製,ARV-310)依2000rpm、1kPa攪拌2分鐘。接著,添加無機填料(C1)18.0g,使用自公轉攪拌機依2000rpm、1kPa攪拌3分鐘後,再依1600rpm、1kPa攪拌5分鐘。接著,相對於總樹脂量,添加0.5重量份(0.06g)之助焊劑(D1),依1600rpm、1kPa攪拌5分鐘,調製層間填充劑組成物。此層間填充劑組成物之η130為1Pa‧s以下。 In a 150 cc stirred vessel, 8.31 g of an epoxy resin (A1), 2.26 g of an amine hardener (B1), and 1.43 g of an amine hardener (B2) were weighed and added in an amount of 1 for the addition of the filler (C). The dispersing agent (F) in a weight part (0.18 g) was stirred at 2000 rpm and 1 kPa for 2 minutes using a self-rotating mixer (ARV-310, manufactured by THINKY Co., Ltd.). Next, 18.0 g of the inorganic filler (C1) was added, and the mixture was stirred at 2000 rpm and 1 kPa for 3 minutes using a self-rotating mixer, and then stirred at 1600 rpm and 1 kPa for 5 minutes. Next, 0.5 part by weight (0.06 g) of the flux (D1) was added to the total amount of the resin, and the mixture was stirred at 1600 rpm and 1 kPa for 5 minutes to prepare an interlayer filler composition. The η 130 of the interlayer filler composition is 1 Pa ‧ or less.

將層間填充劑組成物分別於WALTS公司製之中介層(IP80ModelI,10mm正方),一邊加熱至70℃、一邊塗佈約10mg(每有效面積約20mg/cm2)。 The interlayer filler composition was applied to an interposer (IP80 Model I, 10 mm square) manufactured by WALTS Co., Ltd., and heated to 70 ° C while applying about 10 mg (about 20 mg/cm 2 per effective area).

將此塗佈了層間填充劑組成物之中介層(IP80ModelI)置於平台側,將矽製焊料凸塊晶(CC80ModelI,7.3mm正方)置於壓頭側,使用東麗Engineering公司製之熱壓黏接合裝置「Flip Chip Bonder(FC3000S)」,依表1所示之壓頭及平台的溫度條件,以20N(3.8Kgf/cm2),依表1所示接合時間進行加熱壓黏接合。其後,以165℃使其加熱硬化2小時,製造半導體元件。 The interposer (IP80ModelI) coated with the interlayer filler composition was placed on the platform side, and the solder bump crystal (CC80 Model I, 7.3 mm square) was placed on the indenter side, and hot pressing was performed using Toray Engineering Co., Ltd. The adhesive bonding apparatus "Flip Chip Bonder (FC3000S)" was subjected to heat-pressure bonding at a bonding time shown in Table 1 at 20 N (3.8 Kgf/cm 2 ) according to the temperature conditions of the indenter and the stage shown in Table 1. Thereafter, the film was heat-hardened at 165 ° C for 2 hours to produce a semiconductor element.

[實施例19、20] [Examples 19, 20]

於150cc之攪拌容器,秤量環氧樹脂(A1)3.56g、環氧樹脂 (A2)3.56g、酸酐系硬化劑(B3)4.87g,於其中調配添加相對於填料(C)添加量為1重量份(0.18g)的分散劑(F),使用自公轉攪拌機(THINKY公司製,ARV-310)依2000rpm、1kPa攪拌2分鐘。接著,添加無機填料(C1)18.0g,使用自公轉攪拌機依2000rpm、1kPa攪拌3分鐘後,再依1600rpm、1kPa攪拌5分鐘。接著,添加硬化促進劑(E)1.8g,並相對於總樹脂量,添加0.5重量份(0.06g)之助焊劑(D1),依1600rpm、1kPa攪拌5分鐘,調製層間填充劑組成物。此層間填充劑組成物之η130為1Pa‧s以下。 In a 150 cc stirred vessel, weighed 3.56 g of epoxy resin (A1), 3.56 g of epoxy resin (A2), and 4.87 g of an acid anhydride hardener (B3), and the amount of addition was 1 weight relative to the filler (C). The dispersing agent (F) (0.18 g) was stirred at 2000 rpm and 1 kPa for 2 minutes using a self-rotating mixer (ARV-310, manufactured by THINKY Co., Ltd.). Next, 18.0 g of the inorganic filler (C1) was added, and the mixture was stirred at 2000 rpm and 1 kPa for 3 minutes using a self-rotating mixer, and then stirred at 1600 rpm and 1 kPa for 5 minutes. Next, 1.8 g of the hardening accelerator (E) was added, and 0.5 part by weight (0.06 g) of the flux (D1) was added to the total amount of the resin, and the mixture was stirred at 1600 rpm and 1 kPa for 5 minutes to prepare an interlayer filler composition. The η 130 of the interlayer filler composition is 1 Pa ‧ or less.

使用所調製之層間填充劑組成物,與實施例1同樣地,依表1所示接合條件進行加熱加壓接合,製造半導體元件。 In the same manner as in Example 1, the interlayer filler composition prepared was subjected to heat and pressure bonding in accordance with the bonding conditions shown in Table 1, to produce a semiconductor device.

針對實施例1~20、比較例1~8所得之半導體元件,進行接合性與空隙評價,結果整合示於表1。表1中,「Over」意指導通不良(電阻值為1MΩ以上)。 The semiconductor elements obtained in Examples 1 to 20 and Comparative Examples 1 to 8 were evaluated for adhesion and voids, and the results are shown in Table 1. In Table 1, "Over" means that the pass is poor (resistance value is 1 MΩ or more).

[實施例21~24、比較例9~10] [Examples 21 to 24, Comparative Examples 9 to 10]

於150cc之攪拌容器,秤量環氧樹脂(A1)1.78g、環氧樹脂(A2)1.78g、酸酐硬化劑(B3)2.85g,於其中調配添加相對於總填料添加量為1重量份(0.34g)的分散劑(F),使用自公轉攪拌機(THINKY 公司製,ARV-310)依2000rpm、1kPa攪拌5分鐘。接著,添加無機填料(C2)16.8g,使用自公轉攪拌機依1800rpm、1kPa攪拌5分鐘後,進而添加無機填料(C3)16.8g,依1800rpm、1kPa攪拌5分鐘。接著添加硬化促進劑(E)0.96g,以1800rpm、1kPa攪拌5分鐘,接著相對於總樹脂量,添加1重量份(0.06g)之助焊劑(D2),依1800rpm、1kPa攪拌5分鐘,得到層間填充劑組成物。此層間填充劑組成物之η130為1Pa‧s以下。 In a 150 cc stirred vessel, 1.78 g of epoxy resin (A1), 1.78 g of epoxy resin (A2), and 2.85 g of an acid anhydride hardener (B3) were weighed and added in an amount of 1 part by weight based on the total filler (0.34). The dispersing agent (F) of g) was stirred at 2000 rpm and 1 kPa for 5 minutes using a self-rotating mixer (manufactured by THINKY Co., Ltd., ARV-310). Then, 16.8 g of the inorganic filler (C2) was added, and the mixture was stirred at 1800 rpm and 1 kPa for 5 minutes using a revolving mixer, and then 16.8 g of an inorganic filler (C3) was further added thereto, and the mixture was stirred at 1800 rpm and 1 kPa for 5 minutes. Next, 0.96 g of a hardening accelerator (E) was added, and the mixture was stirred at 1800 rpm and 1 kPa for 5 minutes, and then 1 part by weight (0.06 g) of the flux (D2) was added to the total amount of the resin, and the mixture was stirred at 1800 rpm and 1 kPa for 5 minutes. Interlayer filler composition. The η 130 of the interlayer filler composition is 1 Pa ‧ or less.

將層間填充劑組成物分別於WALTS公司製之中介層(IP80ModelI,10mm正方),一邊加熱至70℃、一邊塗佈約10mg(每有效面積約20mg/cm2)。 The interlayer filler composition was applied to an interposer (IP80 Model I, 10 mm square) manufactured by WALTS Co., Ltd., and heated to 70 ° C while applying about 10 mg (about 20 mg/cm 2 per effective area).

將此塗佈了層間填充劑組成物之中介層(IP80ModelI)及矽製焊料凸塊晶(CC80ModelI,7.3mm正方),使用東麗Engineering公司製之熱壓黏接合裝置「Flip Chip Bonder(FC3000S)」,於表2所示側設置中介層,依表2所示之壓頭及平台的溫度條件,以加壓力20N(3.8Kgf/cm2),依加熱加壓時間5秒進行加熱壓黏接合。其後,以180℃使其加熱硬化2小時,製造半導體元件。 This was coated with an interposer (IP80ModelI) of interlayer filler composition and a solder bump crystal (CC80ModelI, 7.3 mm square), using a thermocompression bonding device "Flip Chip Bonder (FC3000S) manufactured by Toray Engineering Co., Ltd.). On the side shown in Table 2, an interposer is provided, and according to the temperature conditions of the indenter and the platform shown in Table 2, the pressure is 20 N (3.8 Kgf/cm 2 ), and the heating and pressing time is 5 seconds. . Thereafter, the film was heat-hardened at 180 ° C for 2 hours to produce a semiconductor element.

針對實施例21~24、比較例9~10所得之半導體元件,進行接合性與空隙評價,結果整合示於表2。 The semiconductor elements obtained in Examples 21 to 24 and Comparative Examples 9 to 10 were evaluated for adhesion and voids, and the results are shown in Table 2.

[實施例25] [Example 25]

將實施例1所使用之層間填充劑組成物,分別於WALTS公司製之中介層(IP80ModelI,10mm正方),一邊加熱至70℃、一邊塗佈約2mg(每有效面積約4mg/cm2)。 The interlayer filler composition used in Example 1 was applied to an interposer (IP80 Model I, 10 mm square) manufactured by WALTS Co., Ltd., and heated to 70 ° C while applying about 2 mg (about 4 mg/cm 2 per effective area).

將此塗佈了層間填充劑組成物之中介層(IP80ModelI)及矽製TSV晶片(CC80TSV-2,7.3mm正方),使用東麗Engineering公司製之熱壓黏接合裝置「Flip Chip Bonder(FC3000S)」,依壓頭溫度250℃、平台溫度250℃、接合時間5sec、接合壓力20N(3.8Kgf/cm2)進行加熱壓黏接合。 This was coated with an interposer (IP80ModelI) of an interlayer filler composition and a TSV wafer (CC80TSV-2, 7.3 mm square), using a thermocompression bonding device "Flip Chip Bonder (FC3000S) manufactured by Toray Engineering Co., Ltd.). The pressure-bonding was carried out by an indenter temperature of 250 ° C, a table temperature of 250 ° C, a bonding time of 5 sec, and a bonding pressure of 20 N (3.8 Kgf / cm 2 ).

其後,將層間填充劑組成物於上述所接合之基板上,一邊加熱至70℃、一邊塗佈約8mg(每有效面積約16mg/cm2),進而將矽製焊料凸塊晶片(CC80ModelI,7.3mm正方),依相同條件進行加熱壓黏接合。其後,以165℃使其加熱硬化2小時,製造半導體元件。 Thereafter, the interlayer filler composition was applied to the bonded substrate, and about 8 mg (about 16 mg/cm 2 per effective area) was applied while heating to 70° C., and a solder bump wafer (CC80ModelI, 7.3mm square), heated and bonded according to the same conditions. Thereafter, the film was heat-hardened at 165 ° C for 2 hours to produce a semiconductor element.

其結,無空隙且亦可確認到導通。將所得半導體元件之外觀形狀與剖面照片示於圖3。 The junction has no voids and can be confirmed to be conductive. The appearance and cross-sectional photograph of the obtained semiconductor element are shown in Fig. 3 .

[考察] [investigation]

由表1及實施例25,得知於本發明所規定之壓頭及平台溫度條件下,採用上述4個式所包圍之溫度區域,藉此可減低空隙,可得到良好的接合性、導通性。 It can be seen from Table 1 and Example 25 that the temperature regions surrounded by the above four equations are used under the conditions of the indenter and the platform temperature specified in the present invention, whereby the voids can be reduced, and good jointability and conductivity can be obtained. .

(產業上之可利用性) (industrial availability)

根據本發明之半導體元件之製造方法,可減低硬化接黏層之空隙,可得到良好的接合性、導通性,可實現可靠性優越之高品質的半導體元件。 According to the method for producing a semiconductor device of the present invention, it is possible to reduce voids in the cured adhesive layer, and it is possible to obtain good bonding properties and conductivity, and to realize a high-quality semiconductor device excellent in reliability.

尚且,將2014年10月10日申請之日本專利申請案2014-209100號及2015年8月31日申請之日本專利申請案2015-170906號說明書、請求項、圖式及摘要的所有內容引用於此,作為本發明說明書揭示內容。 The contents of the specification, the claims, the drawings and the abstract of the Japanese Patent Application No. 2014-209100, filed on Oct. 10, 2014, and the Japanese Patent Application No. 2015-170906, filed on Aug. 31, 2015, are hereby incorporated by reference. Thus, the disclosure of the present invention is disclosed.

1‧‧‧焊料凸塊 1‧‧‧ solder bumps

1A‧‧‧焊盤端子 1A‧‧‧pad terminal

1B‧‧‧焊料 1B‧‧‧ solder

2‧‧‧半導體晶片 2‧‧‧Semiconductor wafer

3‧‧‧層間填充劑組成物 3‧‧‧Interlayer filler composition

4‧‧‧塗佈噴嘴 4‧‧‧ Coating nozzle

5‧‧‧層間填充劑組成物層 5‧‧‧Interlayer filler composition layer

6‧‧‧電極墊 6‧‧‧electrode pads

7‧‧‧半導體基板 7‧‧‧Semiconductor substrate

8‧‧‧硬化接黏層 8‧‧‧ hardened adhesive layer

10‧‧‧半導體元件 10‧‧‧Semiconductor components

Claims (14)

一種半導體元件之製造方法,係將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,經由層間填充劑組成物,藉熱壓黏接合裝置進行熱壓黏接合,以製造半導體元件者;該熱壓黏接合裝置之壓頭及平台的溫度,係於以壓頭溫度為縱軸、以平台溫度為橫軸的圖表中,依成為由下述4個式所包圍之範圍內的溫度條件進行接合;H+1.9S=590…式1 H+0.526S=310…式2 H+0.8S=580…式3 H+1.25S=725…式4(上述式1~4中,H表示接合時之壓頭溫度(℃),S表示接合時之平台溫度(℃))。 A method of manufacturing a semiconductor device, wherein a semiconductor wafer having a solder bump and a semiconductor substrate having an electrode pad are thermally bonded by a thermocompression bonding device via an interlayer filler composition to fabricate a semiconductor device; The temperature of the indenter and the platform of the thermocompression bonding apparatus is set in a graph in which the temperature of the indenter is the vertical axis and the temperature of the platform is the horizontal axis, and the temperature conditions in the range surrounded by the following four equations are performed. Joining; H+1.9S=590...Formula 1 H+0.526S=310...Formula 2 H+0.8S=580...Formula 3 H+1.25S=725...Formula 4 (in the above formulas 1-4, H represents the joint The head temperature (°C), S indicates the platform temperature (°C) at the time of joining). 一種半導體元件之製造方法,係將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,藉由具有可個別進行溫度調節之壓頭及平台的熱壓黏接合裝置,經由層間填充劑組成物進行熱壓黏接合,以製造半導體元件者;該熱壓黏接合裝置之壓頭及平台的溫度,係於以壓頭溫度為縱軸、以平台溫度為橫軸的圖表中,依成為由下述4個式所包圍之範圍內的溫度條件進行接合;H+1.9S=590…式1 H+0.526S=310…式2 H+0.8S=580…式3 H+1.25S=725…式4 (式1~4中,H表示接合時之壓頭溫度(℃),S表示接合時之平台溫度(℃))。 A method of manufacturing a semiconductor device, comprising: a semiconductor wafer having solder bumps and a semiconductor substrate having an electrode pad, via a thermocompression bonding device having an indenter and a platform capable of individually adjusting temperature, via an interlayer filler composition The thermocompression bonding is performed to manufacture a semiconductor component; the temperature of the indenter and the platform of the thermocompression bonding device is in a graph in which the indenter temperature is the vertical axis and the platform temperature is the horizontal axis. The temperature conditions in the range surrounded by the four equations are joined; H+1.9S=590...Formula 1 H+0.526S=310...Formula 2 H+0.8S=580...Formula 3 H+1.25S=725... 4 (In the formulas 1 to 4, H represents the head temperature (°C) at the time of joining, and S represents the stage temperature (°C) at the time of joining). 如請求項1或2之半導體元件之製造方法,其中,上述層間填充劑組成物於130℃下的黏度為100Pa‧s以下。 The method for producing a semiconductor device according to claim 1 or 2, wherein the interlayer filler composition has a viscosity at 130 ° C of 100 Pa ‧ or less. 如請求項1至3中任一項之半導體元件之製造方法,其中,上述層間填充劑組成物係含有環氧樹脂(A)、硬化劑(B)、填料(C)及助焊劑(D)。 The method of manufacturing a semiconductor device according to any one of claims 1 to 3, wherein the interlayer filler composition contains an epoxy resin (A), a hardener (B), a filler (C), and a flux (D) . 如請求項4之半導體元件之製造方法,其中,上述層間填充劑組成物係進一步含有硬化促進劑(E)。 The method of producing a semiconductor device according to claim 4, wherein the interlayer filler composition further contains a curing accelerator (E). 如請求項4或5之半導體元件之製造方法,其中,上述層間填充劑組成物係進一步含有分散劑(F)。 The method of producing a semiconductor device according to claim 4 or 5, wherein the interlayer filler composition further contains a dispersant (F). 如請求項4至6中任一項之半導體元件之製造方法,其中,硬化劑(B)係於環氧樹脂(A)每100重量份中,為30~150重量份。 The method for producing a semiconductor device according to any one of claims 4 to 6, wherein the curing agent (B) is 30 to 150 parts by weight per 100 parts by weight of the epoxy resin (A). 如請求項4至7中任一項之半導體元件之製造方法,其中,硬化劑(B)係含有選自胺系硬化劑及酸酐系硬化劑之至少1種硬化劑。 The method for producing a semiconductor device according to any one of claims 4 to 7, wherein the curing agent (B) contains at least one curing agent selected from the group consisting of an amine curing agent and an acid anhydride curing agent. 如請求項8之半導體元件之製造方法,其中,以硬化劑(B)中之官能基相對於環氧樹脂(A)中之環氧基的當量比計,硬化劑(B)為0.8~1.5之範圍。 The method for producing a semiconductor device according to claim 8, wherein the hardener (B) is 0.8 to 1.5 in terms of an equivalent ratio of the functional group in the hardener (B) to the epoxy group in the epoxy resin (A). The scope. 一種半導體元件之製造方法,係具有將具有焊料凸塊之半導體晶片與具有電極墊之半導體基板,經由層間填充劑組成物使用熱壓黏接合裝置進行接合的步驟者;在該熱壓黏接合裝置之壓頭或平台之僅任一者的溫度為120℃以上的狀態,使焊料凸塊與電極墊接觸,在焊料凸塊與電極墊接觸後,使壓頭或平台之於焊料凸塊與電極墊接觸時未滿120℃之側的溫度成為焊料融點以上。 A method for manufacturing a semiconductor device, comprising: a step of bonding a semiconductor wafer having solder bumps and a semiconductor substrate having an electrode pad via an interlayer filler composition using a thermocompression bonding apparatus; and the thermocompression bonding apparatus The temperature of any of the indenter or the platform is 120 ° C or higher, the solder bump is brought into contact with the electrode pad, and after the solder bump is in contact with the electrode pad, the indenter or the platform is applied to the solder bump and the electrode. The temperature at the side less than 120 ° C at the time of pad contact becomes more than the melting point of the solder. 如請求項10之半導體元件之製造方法,其中,對設置於壓頭或平台之於焊料凸塊與電極墊接觸時未滿120℃之側的半導體晶片或半導體基板,事先塗佈上述層間填充劑組成物後進行接合。 The method of manufacturing a semiconductor device according to claim 10, wherein the interlayer filler is applied in advance to a semiconductor wafer or a semiconductor substrate provided on a side of the indenter or the substrate which is not more than 120 ° C when the solder bump is in contact with the electrode pad. The composition is joined after the composition. 如請求項10或11之半導體元件之製造方法,其中,上述層間填充劑組成物於100℃下之黏度為0.1~10Pa‧s。 The method of producing a semiconductor device according to claim 10 or 11, wherein the interlayer filler composition has a viscosity at 100 ° C of 0.1 to 10 Pa ‧ . 如請求項11或12之半導體元件之製造方法,其中,上述層間填充劑組成物係含有環氧樹脂(A)、硬化劑(B)、填料(C)及助焊劑(D)。 The method of producing a semiconductor device according to claim 11 or 12, wherein the interlayer filler composition contains an epoxy resin (A), a hardener (B), a filler (C), and a flux (D). 如請求項13之半導體元件之製造方法,其中,上述層間填充劑組成物係含有硬化促進劑(E)。 The method of producing a semiconductor device according to claim 13, wherein the interlayer filler composition contains a hardening accelerator (E).
TW104133242A 2014-10-10 2015-10-08 Method for making semiconductor device TW201625708A (en)

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