TW201616664A - Solar cell and method for manufacturing the same - Google Patents

Solar cell and method for manufacturing the same Download PDF

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TW201616664A
TW201616664A TW104143579A TW104143579A TW201616664A TW 201616664 A TW201616664 A TW 201616664A TW 104143579 A TW104143579 A TW 104143579A TW 104143579 A TW104143579 A TW 104143579A TW 201616664 A TW201616664 A TW 201616664A
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layer
back surface
boron
semiconductor substrate
passivation layer
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TW104143579A
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吳中瀚
陳奎伯
吳興華
林信成
歐乃天
黃桂武
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昱晶能源科技股份有限公司
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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    • Y02E10/50Photovoltaic [PV] energy

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Abstract

A solar cell includes a semiconductor substrate, a boron back surface field (BSF) layer, a passivation layer, a back electrode layer and an aluminum local BSF layer. The semiconductor substrate has a front surface and a back surface opposite to each other. The boron BSF layer is disposed beneath the back surface in the semiconductor substrate. The passivation layer is disposed over the boron BSF layer and has an opening through the passivation layer. The back electrode layer is disposed in the opening. The aluminum local BSF layer is disposed beneath the opening in the semiconductor substrate and in contact with the boron BSF layer and the back electrode layer.

Description

太陽能電池及其製造方法 Solar cell and method of manufacturing same

本發明是有關於一種矽基太陽能電池及其製造方法。 The present invention relates to a bismuth based solar cell and a method of fabricating the same.

太陽能電池是一種環保能源,可直接將太陽能轉換為電能。由於在發電過程中不產生二氧化碳等溫室氣體,因此不會對環境造成污染。當光照射在太陽能電池上時,利用其光電半導體的特性,使光子與導體或半導體中的自由電子作用而產生電流。目前現有的太陽能電池依據主體材料的不同可分為矽基半導體太陽能電池、染料敏化太陽能電池及有機材料太陽能電池。其中又以矽基半導體太陽能電池的光電轉換效率較佳,但仍有改善的空間。 Solar cells are an environmentally friendly source of energy that converts solar energy directly into electricity. Since no greenhouse gases such as carbon dioxide are generated during power generation, there is no environmental pollution. When light is irradiated on a solar cell, the characteristics of its optoelectronic semiconductor are utilized to cause photons to interact with free electrons in the conductor or semiconductor to generate a current. At present, existing solar cells can be classified into germanium-based semiconductor solar cells, dye-sensitized solar cells, and organic material solar cells depending on the main material. Among them, the photoelectric conversion efficiency of the germanium-based semiconductor solar cell is better, but there is still room for improvement.

矽基半導體太陽能電池通常具有全面的鋁背面場(back surface field,BSF)層。但此類矽基太陽能電池的鋁背面場層的複合速度太快,導致電池轉換效率下降。為了解決此問題,發展出一種具有局部背面場層的矽基太陽能電池。但此類矽基太陽能電池的背面導電度較差。因此,目 前亟需一種新穎的太陽能電池及其製造方法,以期能夠改善上述問題。 Silicon-based semiconductor solar cells typically have a comprehensive aluminum back surface field (BSF) layer. However, the recombination speed of the aluminum back field layer of such a ruthenium-based solar cell is too fast, resulting in a decrease in battery conversion efficiency. In order to solve this problem, a germanium-based solar cell having a partial back surface field layer has been developed. However, the conductivity of the back side of such bismuth-based solar cells is poor. Therefore, the purpose There is a need for a novel solar cell and a method of manufacturing the same in order to improve the above problems.

本發明之目的在於提供一種太陽能電池,包括硼背面場層、鋁局部背面場層以及鈍化層。硼背面場層及鋁局部背面場層可提昇背面導電度及有效增加載子的收集效率;鈍化層可提昇背面鈍化效果,進而提昇太陽能電池的電池轉換效率,而可全面解決先前技術所面臨的問題。 It is an object of the present invention to provide a solar cell comprising a boron back surface field layer, an aluminum partial back surface field layer, and a passivation layer. The boron back field layer and the aluminum partial back field layer can improve the back surface conductivity and effectively increase the collection efficiency of the carrier; the passivation layer can improve the back passivation effect, thereby improving the battery conversion efficiency of the solar cell, and comprehensively solving the problems faced by the prior art. problem.

本發明提供一種太陽能電池,包含半導體基材、硼背面場層、鈍化層、背面電極層及鋁局部背面場層。半導體基材具有一正面及一背面相對設置。硼背面場層位於背面下方之半導體基材內。鈍化層位於硼背面場層的上方,鈍化層具有一開口貫穿鈍化層。背面電極層位於開口內。鋁局部背面場層位於開口下方之半導體基材內,並接觸硼背面場層及背面電極層。 The invention provides a solar cell comprising a semiconductor substrate, a boron back surface field layer, a passivation layer, a back electrode layer and an aluminum partial back surface field layer. The semiconductor substrate has a front side and a back side oppositely disposed. The boron back surface layer is located within the semiconductor substrate below the back side. The passivation layer is over the boron back field layer and the passivation layer has an opening through the passivation layer. The back electrode layer is located within the opening. The aluminum partial back field layer is located within the semiconductor substrate below the opening and contacts the boron back surface layer and the back electrode layer.

根據本發明一實施例,背面電極層更覆蓋鈍化層。 According to an embodiment of the invention, the back electrode layer further covers the passivation layer.

根據本發明一實施例,鈍化層未被背面電極層完全覆蓋。 According to an embodiment of the invention, the passivation layer is not completely covered by the back electrode layer.

根據本發明一實施例,硼背面場層具有一開口,硼背面場層之開口大致對準鈍化層之開口。 In accordance with an embodiment of the invention, the boron back surface field layer has an opening, and the opening of the boron back surface field layer is substantially aligned with the opening of the passivation layer.

根據本發明一實施例,鈍化層包含第一鈍化層及第二鈍化層。第一鈍化層接觸硼背面場層,第一鈍化層包含氧化鋁、氧化矽、氮氧化矽或其組合。第二鈍化層位於第 一鈍化層的上方,第二鈍化層包含氮化矽。 According to an embodiment of the invention, the passivation layer comprises a first passivation layer and a second passivation layer. The first passivation layer contacts the boron back surface field layer, and the first passivation layer comprises aluminum oxide, cerium oxide, cerium oxynitride or a combination thereof. The second passivation layer is located at Above the passivation layer, the second passivation layer comprises tantalum nitride.

根據本發明一實施例,太陽能電池更包含第一摻雜層、第二摻雜層及正面電極層。第一摻雜層位於正面下方之半導體基材內。第二摻雜層位於正面下方之半導體基材內,並鄰接第一摻雜層。第一摻雜層及第二摻雜層之導電型相同,且第二摻雜層之摻質濃度大於第一摻雜層之摻質濃度。正面電極層接觸第二摻雜層。 According to an embodiment of the invention, the solar cell further includes a first doped layer, a second doped layer, and a front electrode layer. The first doped layer is located within the semiconductor substrate below the front side. The second doped layer is located within the semiconductor substrate below the front side and adjacent to the first doped layer. The first doped layer and the second doped layer have the same conductivity type, and the doping concentration of the second doped layer is greater than the doping concentration of the first doped layer. The front electrode layer contacts the second doped layer.

本發明另提供一種太陽能電池的製造方法,包含:提供一半導體基材,半導體基材具有一正面及一背面相對設置;形成一硼背面場層於背面下方之半導體基材內;形成一鈍化層於硼背面場層之上方;形成一開口貫穿鈍化層;設置鋁膠於開口內;以及燒結鋁膠,以形成一鋁局部背面場層於開口下方之半導體基材內。 The invention further provides a method for manufacturing a solar cell, comprising: providing a semiconductor substrate having a front surface and a back surface oppositely disposed; forming a boron back surface field layer in the semiconductor substrate under the back surface; forming a passivation layer Above the boron back field layer; forming an opening through the passivation layer; providing aluminum paste in the opening; and sintering the aluminum paste to form an aluminum partial back surface field layer in the semiconductor substrate below the opening.

根據本發明一實施例,形成硼背面場層於背面下方之半導體基材內步驟係透過擴散或離子佈植硼至背面下方之半導體基材內。 In accordance with an embodiment of the invention, the step of forming the boron back surface field layer in the semiconductor substrate below the back side is by diffusion or ion implantation of boron into the semiconductor substrate under the back side.

根據本發明一實施例,形成硼背面場層於背面下方之半導體基材內步驟包含:形成一含硼鈍化材料層於半導體基材之背面的上方,含硼鈍化材料層包含硼及鈍化材料;擴散含硼鈍化材料層之硼至背面下方之半導體基材內,以形成硼背面場層。 According to an embodiment of the invention, the step of forming a boron back surface field layer in the semiconductor substrate below the back surface comprises: forming a boron-containing passivation material layer over the back surface of the semiconductor substrate, the boron-containing passivation material layer comprising boron and a passivation material; The boron of the boron-containing passivation material layer is diffused into the semiconductor substrate under the back surface to form a boron back surface field layer.

根據本發明一實施例,擴散含硼鈍化材料層之硼至背面下方之半導體基材內步驟與燒結鋁膠步驟係同時進行。 In accordance with an embodiment of the invention, the step of diffusing the boron of the boron-containing passivation material layer to the underlying semiconductor substrate is performed simultaneously with the step of sintering the aluminum paste.

根據本發明一實施例,形成硼背面場層於背面下方之半導體基材內步驟包含:形成一硼來源層於半導體基材之背面的上方;擴散硼來源層之硼至背面下方之半導體基材內,以形成硼背面場層;以及去除硼來源層。 According to an embodiment of the invention, the step of forming a boron back surface field layer in the semiconductor substrate under the back surface comprises: forming a boron source layer over the back surface of the semiconductor substrate; diffusing boron of the boron source layer to the semiconductor substrate under the back surface Inside to form a boron back surface field; and to remove the boron source layer.

根據本發明一實施例,硼來源層包含硼膠、硼矽玻璃或其組合。 According to an embodiment of the invention, the boron source layer comprises borosilicate, borosilicate glass or a combination thereof.

根據本發明一實施例,製造方法更包含擴散磷至正面下方之半導體基材內。 In accordance with an embodiment of the invention, the method of fabrication further includes diffusing phosphorus into the semiconductor substrate below the front side.

根據本發明一實施例,擴散硼來源層之硼至背面下方之半導體基材內步驟及擴散磷至正面下方之半導體基材內步驟係於同一次熱處理程序中進行。 In accordance with an embodiment of the invention, the step of diffusing the boron of the boron source layer into the semiconductor substrate below the backside and the step of diffusing the phosphor to the semiconductor substrate below the front side are performed in the same heat treatment procedure.

110‧‧‧半導體基材 110‧‧‧Semiconductor substrate

110a‧‧‧正面 110a‧‧‧ positive

110b‧‧‧背面 110b‧‧‧Back

120‧‧‧硼背面場層 120‧‧ ‧ boron back field layer

120a‧‧‧開口 120a‧‧‧ openings

130‧‧‧鈍化層 130‧‧‧ Passivation layer

130a‧‧‧開口 130a‧‧‧ openings

132‧‧‧第一鈍化層 132‧‧‧First passivation layer

132a‧‧‧開口 132a‧‧‧ openings

134‧‧‧第二鈍化層 134‧‧‧second passivation layer

134a‧‧‧開口 134a‧‧‧ openings

140‧‧‧背面電極層 140‧‧‧Back electrode layer

142‧‧‧鋁膠 142‧‧‧Aluminum adhesive

150‧‧‧鋁局部背面場層 150‧‧‧Aluminum partial back field layer

160‧‧‧摻雜層 160‧‧‧Doped layer

162‧‧‧第一摻雜層 162‧‧‧First doped layer

164‧‧‧第二摻雜層 164‧‧‧Second doped layer

170‧‧‧正面電極層 170‧‧‧ front electrode layer

172‧‧‧銀膠 172‧‧‧Silver glue

180‧‧‧抗反射層 180‧‧‧Anti-reflective layer

BPL‧‧‧含硼鈍化材料層 BPL‧‧‧ boron-containing passivation material layer

BSL‧‧‧硼來源層 BSL‧‧‧ boron source layer

O‧‧‧開口 O‧‧‧ openings

第1圖係依照本發明一實施例之一種太陽能電池的剖面示意圖。 1 is a schematic cross-sectional view showing a solar cell according to an embodiment of the present invention.

第2圖係依照本發明另一實施例之一種太陽能電池的剖面示意圖。 2 is a schematic cross-sectional view showing a solar cell according to another embodiment of the present invention.

第3A-3F圖係繪示依照本發明一實施例之一種太陽能電池之製造方法之各製程階段的示意圖。 3A-3F are schematic views showing respective process stages of a method of manufacturing a solar cell according to an embodiment of the present invention.

第4A-4F圖係繪示依照本發明另一實施例之一種太陽能電池之製造方法之各製程階段的示意圖。 4A-4F are schematic views showing respective process stages of a method of fabricating a solar cell according to another embodiment of the present invention.

第5A-5F圖係繪示依照本發明又一實施例之一種太陽能電池之製造方法之各製程階段的示意圖。 5A-5F are schematic views showing respective process stages of a method of fabricating a solar cell according to still another embodiment of the present invention.

為了使本揭示內容的敘述更加詳盡與完備,下文針對了本發明的實施態樣與具體實施例提出了說明性的描述;但這並非實施或運用本發明具體實施例的唯一形式。以下所揭露的各實施例,在有益的情形下可相互組合或取代,也可在一實施例中附加其他的實施例,而無須進一步的記載或說明。 The description of the embodiments of the present invention is intended to be illustrative and not restrictive. The embodiments disclosed herein may be combined or substituted with each other in an advantageous manner, and other embodiments may be added to an embodiment without further description or description.

本文中所使用之「約」、「大約」或「大致」係用以修飾任何可些微變化的數量,但這種些微變化並不會改變其本質。於實施方式中若無特別說明,則代表以「約」、「大約」或「大致」所修飾之數值的誤差範圍一般是容許在百分之二十以內,較佳地是於百分之十以內,而更佳地則是於百分五之以內。 As used herein, "about", "about" or "roughly" is used to modify the amount of any slight change, but such slight changes do not alter its nature. In the embodiment, unless otherwise stated, the error range for the value modified by "about", "about" or "approximately" is generally allowed to be within 20%, preferably 10%. Within, and more preferably within five percent.

如先前技術所述,具有全面鋁背面場層的矽基太陽能電池因複合速度太快,導致電池轉換效率低,而具有局部背面場層的矽基太陽能電池的背面導電度較差。因此本發明提供一種太陽能電池,包括硼背面場層、鋁局部背面場層以及鈍化層。硼背面場層以及鋁局部背面場層可提昇背面導電度及有效增加載子的收集效率;鈍化層可提昇背面鈍化效果,進而提昇太陽能電池的電池轉換效率,從而全面解決先前技術所面臨的問題。 As described in the prior art, a germanium-based solar cell having a full aluminum back surface layer has a low composite conversion speed, resulting in low battery conversion efficiency, while a germanium-based solar cell having a partial back surface field layer has poor backside conductivity. The present invention therefore provides a solar cell comprising a boron back surface field layer, an aluminum partial back surface field layer, and a passivation layer. The boron back field layer and the aluminum partial back field layer can improve the back surface conductivity and effectively increase the collection efficiency of the carrier; the passivation layer can improve the back passivation effect, thereby improving the battery conversion efficiency of the solar cell, thereby comprehensively solving the problems faced by the prior art. .

第1圖係依照本發明一實施例之一種太陽能電池之剖面示意圖。太陽能電池包含半導體基材110、硼背面場 層120、鈍化層130、背面電極層140以及鋁局部背面場層150。 1 is a schematic cross-sectional view showing a solar cell according to an embodiment of the present invention. The solar cell comprises a semiconductor substrate 110 and a boron back field Layer 120, passivation layer 130, back electrode layer 140, and aluminum partial back surface field layer 150.

半導體基材110具有一正面110a及一背面110b相對設置。在本文中,第1圖所示之背面110b的下方定義為朝向半導體基材110的一側,背面110b的上方定義為背對半導體基材110的一側,以後續清楚定義硼背面場層120、鈍化層130、背面電極層140及鋁局部背面場層150的相對位置。 The semiconductor substrate 110 has a front surface 110a and a back surface 110b disposed opposite each other. Herein, the lower side of the back surface 110b shown in FIG. 1 is defined as a side facing the semiconductor substrate 110, and the upper side of the back surface 110b is defined as a side facing away from the semiconductor substrate 110, to clearly define the boron back surface field layer 120. The relative positions of the passivation layer 130, the back electrode layer 140, and the aluminum partial back surface field layer 150.

半導體基材110可為矽基材,例如單晶矽基材、多晶矽基材或非晶矽基材。在一實施例中,半導體基材110是P型矽基材。在一實施例中,半導體基材110的正面110a為粗化表面,以降低入射光的反射率。 The semiconductor substrate 110 can be a tantalum substrate, such as a single crystal germanium substrate, a polycrystalline germanium substrate, or an amorphous germanium substrate. In one embodiment, the semiconductor substrate 110 is a P-type germanium substrate. In one embodiment, the front side 110a of the semiconductor substrate 110 is a roughened surface to reduce the reflectivity of incident light.

硼背面場層120位於背面110b下方的半導體基材110內。在本實施例中,硼背面場層120具有開口120a貫穿硼背面場層120。當然,硼背面場層120可具有多個開口120a彼此分離並貫穿硼背面場層120。在一實施例中,硼背面場層120係利用高溫擴散或離子佈植方式形成。在一實施例中,硼背面場層120的摻質濃度為約1015原子/cm3至約5×1022原子/cm3。在一實施例中,硼背面場層120的電阻為約10歐姆/平方至約200歐姆/平方。 The boron back surface field layer 120 is located within the semiconductor substrate 110 below the back surface 110b. In the present embodiment, the boron back surface field layer 120 has an opening 120a extending through the boron back surface field layer 120. Of course, the boron back surface field layer 120 may have a plurality of openings 120a separated from each other and through the boron back surface field layer 120. In one embodiment, the boron back surface field layer 120 is formed using high temperature diffusion or ion implantation. In one embodiment, the boron back surface field layer 120 has a dopant concentration of from about 10 15 atoms/cm 3 to about 5×10 22 atoms/cm 3 . In one embodiment, the boron back surface field layer 120 has a resistance of from about 10 ohms/square to about 200 ohms/square.

鈍化層130位於硼背面場層120的上方。鈍化層130具有開口130a貫穿鈍化層130。當然,鈍化層130亦可具有多個開口130a彼此分離並貫穿鈍化層130。在本實施例中,鈍化層130的開口130a大致對準硼背面場層120 的開口120a。在一實施例中,鈍化層130的材料包含氧化矽、氮化矽、氮氧化矽、氧化鋁、其他適合的材料或上述之組合。 The passivation layer 130 is located above the boron back surface field layer 120. The passivation layer 130 has an opening 130a penetrating the passivation layer 130. Of course, the passivation layer 130 may also have a plurality of openings 130a separated from each other and penetrating the passivation layer 130. In the present embodiment, the opening 130a of the passivation layer 130 is substantially aligned with the boron back surface field layer 120. Opening 120a. In an embodiment, the material of the passivation layer 130 comprises hafnium oxide, tantalum nitride, hafnium oxynitride, aluminum oxide, other suitable materials, or a combination thereof.

在一實施例中,鈍化層130包含第一鈍化層132及第二鈍化層134。第一鈍化層132接觸硼背面場層120,第一鈍化層132包含氧化鋁、氧化矽或其組合。第二鈍化層134位於第一鈍化層132的上方,第二鈍化層134包含氮化矽。第一鈍化層132及第二鈍化層134可分別具有開口132a及開口134a,開口132a及開口134a構成開口130a。第二鈍化層134可用以保護第一鈍化層132,避免第一鈍化層132因接觸背面電極層140而變質或被腐蝕。此外,第二鈍化層134可具有光學反射的功能,例如可將長波長的光線反射回去。 In an embodiment, the passivation layer 130 includes a first passivation layer 132 and a second passivation layer 134. The first passivation layer 132 contacts the boron back surface field layer 120, and the first passivation layer 132 comprises aluminum oxide, tantalum oxide, or a combination thereof. The second passivation layer 134 is located above the first passivation layer 132, and the second passivation layer 134 includes tantalum nitride. The first passivation layer 132 and the second passivation layer 134 may have an opening 132a and an opening 134a, respectively, and the opening 132a and the opening 134a constitute an opening 130a. The second passivation layer 134 may be used to protect the first passivation layer 132 from deterioration or corrosion of the first passivation layer 132 due to contact with the back electrode layer 140. In addition, the second passivation layer 134 may have a function of optical reflection, for example, reflecting long-wavelength light back.

背面電極層140位於開口130a內。在本實施例中,背面電極層140位於開口130a及開口120a內。在一實施例中,背面電極層140包含任何合適的金屬材料,例如鋁。在一實施例中,背面電極層140由鋁膠燒結而得。值得注意的是,在本實施例中,鈍化層130未被背面電極層140完全覆蓋,而使太陽能電池具有較大的受光面積,可增加光線的吸收。 The back electrode layer 140 is located within the opening 130a. In the present embodiment, the back electrode layer 140 is located in the opening 130a and the opening 120a. In an embodiment, back electrode layer 140 comprises any suitable metallic material, such as aluminum. In one embodiment, the back electrode layer 140 is obtained by sintering aluminum paste. It should be noted that in the present embodiment, the passivation layer 130 is not completely covered by the back electrode layer 140, and the solar cell has a large light receiving area, which can increase the absorption of light.

鋁局部背面場層150位於開口120a下方的半導體基材110內,並接觸硼背面場層120及背面電極層140。在一實施例中,背面電極層140含鋁,而鋁離子在高溫下可與半導體基材110中的矽形成鋁矽合金,而形成鋁局部背 面場層150。在一實施例中,鋁局部背面場層150的摻質濃度大於硼背面場層120的摻質濃度。在一實施例中,鋁局部背面場層150的摻質濃度為約1015原子/cm3至約5×1022原子/cm3The aluminum partial back surface field layer 150 is located within the semiconductor substrate 110 below the opening 120a and contacts the boron back surface field layer 120 and the back electrode layer 140. In one embodiment, the back electrode layer 140 contains aluminum, and the aluminum ions can form an aluminum-bismuth alloy with germanium in the semiconductor substrate 110 at a high temperature to form an aluminum partial back surface field layer 150. In one embodiment, the dopant concentration of the aluminum partial back surface field layer 150 is greater than the dopant concentration of the boron back surface field layer 120. In one embodiment, the aluminum partial back surface field layer 150 has a dopant concentration of from about 10 15 atoms/cm 3 to about 5 x 10 22 atoms/cm 3 .

在本文中,半導體基材110之正面110a的下方定義為朝向半導體基材110的一側,半導體基材110之正面110a的上方定義為背對半導體基材110的一側。在一實施例中,太陽能電池更包含第一摻雜層162、第二摻雜層164及正面電極層170。第一摻雜層162位於正面110a下方的半導體基材110內。第二摻雜層164位於正面110a下方的半導體基材110內,並鄰接第一摻雜層162。第一摻雜層162及第二摻雜層164之導電型相同。在一實施例中,第一摻雜層162及第二摻雜層164的導電型與半導體基材110的導電型相反。在一實施例中,正面電極層170包含任何合適的金屬材料,例如銀。在一實施例中,正面電極層170由銀膠燒結而得。 Herein, the lower side of the front surface 110a of the semiconductor substrate 110 is defined as a side facing the semiconductor substrate 110, and the upper side of the front surface 110a of the semiconductor substrate 110 is defined as a side facing away from the semiconductor substrate 110. In an embodiment, the solar cell further includes a first doped layer 162, a second doped layer 164, and a front electrode layer 170. The first doped layer 162 is located within the semiconductor substrate 110 below the front side 110a. The second doped layer 164 is located within the semiconductor substrate 110 below the front side 110a and is adjacent to the first doped layer 162. The first doped layer 162 and the second doped layer 164 have the same conductivity type. In an embodiment, the conductivity patterns of the first doping layer 162 and the second doping layer 164 are opposite to those of the semiconductor substrate 110. In an embodiment, the front electrode layer 170 comprises any suitable metallic material, such as silver. In one embodiment, the front electrode layer 170 is obtained by sintering silver paste.

在一實施例中,第二摻雜層164之摻質濃度大於第一摻雜層162之摻質濃度。在一實施例中,第一摻雜層162的摻質濃度為約1015原子/cm3至約5×1022原子/cm3。在一實施例中,第二摻雜層164的摻質濃度為約1015原子/cm3至約5×1022原子/cm3。在一實施例中,第一摻雜層162的電阻為約10歐姆/平方至約200歐姆/平方。在一實施例中,第二摻雜層164的電阻為約10歐姆/平方至約200歐姆/平方。也就是說,第二摻雜層164的電阻低於第一摻雜層 162,因此正面電極層170可接觸第二摻雜層164,以降低接觸電阻。 In one embodiment, the dopant concentration of the second doped layer 164 is greater than the dopant concentration of the first doped layer 162. In one embodiment, the dopant concentration of the first doped layer 162 is from about 10 15 atoms/cm 3 to about 5×10 22 atoms/cm 3 . In one embodiment, the dopant concentration of the second doped layer 164 is from about 10 15 atoms/cm 3 to about 5×10 22 atoms/cm 3 . In one embodiment, the first doped layer 162 has a resistance of from about 10 ohms/square to about 200 ohms/square. In one embodiment, the second doped layer 164 has a resistance of from about 10 ohms/square to about 200 ohms/square. That is, the resistance of the second doping layer 164 is lower than that of the first doping layer 162, and thus the front electrode layer 170 may contact the second doping layer 164 to lower the contact resistance.

在一實施例中,太陽能電池更包含抗反射層180設置於第一摻雜層162及第二摻雜層164的上方,以降低入射光的反射率。在一實施例中,抗反射層180的材料包含氮化矽。 In an embodiment, the solar cell further includes an anti-reflection layer 180 disposed above the first doped layer 162 and the second doped layer 164 to reduce the reflectivity of the incident light. In an embodiment, the material of the anti-reflective layer 180 comprises tantalum nitride.

第2圖係依照本發明另一實施例之一種太陽能電池之剖面示意圖。第2圖與第1圖的差異在於,第2圖之太陽能電池的背面電極層140更覆蓋鈍化層130。換言之,背面電極層140全面覆蓋鈍化層130。 2 is a schematic cross-sectional view showing a solar cell according to another embodiment of the present invention. The difference between FIG. 2 and FIG. 1 is that the back electrode layer 140 of the solar cell of FIG. 2 further covers the passivation layer 130. In other words, the back electrode layer 140 completely covers the passivation layer 130.

以下將說明製造上述太陽能電池的數種方法。第3A-3F圖係繪示依照本發明一實施例之一種太陽能電池之製造方法之各製程階段的示意圖。首先,如第3A圖所示,提供一半導體基材110,半導體基材110具有一正面110a及一背面110b相對設置。 Several methods of manufacturing the above solar cell will be described below. 3A-3F are schematic views showing respective process stages of a method of manufacturing a solar cell according to an embodiment of the present invention. First, as shown in FIG. 3A, a semiconductor substrate 110 is provided. The semiconductor substrate 110 has a front surface 110a and a back surface 110b disposed opposite each other.

然後,如第3B圖所示,將硼利用擴散或離子佈植方式驅入至背面110b下方的半導體基材110內,以形成硼背面場層120。在擴散或離子佈植硼之前,可先形成遮罩(未繪示)覆蓋正面110a,以避免硼進入正面110a下方的半導體基材110內。在形成硼背面場層120之後,可將伴隨形成的硼矽玻璃(未繪示)及遮罩移除。 Then, as shown in FIG. 3B, boron is driven into the semiconductor substrate 110 under the back surface 110b by diffusion or ion implantation to form a boron back surface field layer 120. Before diffusion or ion implantation of boron, a mask (not shown) may be formed to cover the front surface 110a to prevent boron from entering the semiconductor substrate 110 under the front surface 110a. After the boron back surface field layer 120 is formed, the accompanying formed boron germanium glass (not shown) and the mask can be removed.

如第3C圖所示,對正面110a進行粗化製程,然後形成摻雜層160於正面110a下方的半導體基材110內。詳細而言,在進行粗化製程之前,可先形成遮罩(未繪示)覆蓋 背面110b,以保護硼背面場層120。隨後進行粗化製程,以形成粗糙的正面110a。再將摻質擴散至正面110a下方的半導體基材110內而形成摻雜層160。摻質可例如為磷或其他合適的摻質。 As shown in FIG. 3C, the front surface 110a is subjected to a roughening process, and then the doped layer 160 is formed in the semiconductor substrate 110 below the front surface 110a. In detail, a mask (not shown) may be formed before the roughening process. The back side 110b protects the boron back surface field layer 120. A roughening process is then performed to form a rough front surface 110a. The dopant is diffused into the semiconductor substrate 110 under the front surface 110a to form a doped layer 160. The dopant can be, for example, phosphorus or other suitable dopant.

如第3D圖所示,形成鈍化層130於硼背面場層120的上方。在本實施例中,依序形成第一鈍化層132及第二鈍化層134於硼背面場層120的上方。在一實施例中,第一鈍化層132包含氧化鋁、氧化矽或其組合,第二鈍化層134包含氮化矽,但不限於此。第一鈍化層132及第二鈍化層134可利用化學氣相沉積方式形成。另外,可形成抗反射層180於摻雜層160的上方,以降低入射光的反射率。在一實施例中,抗反射層180的材料包含氮化矽。 As shown in FIG. 3D, a passivation layer 130 is formed over the boron back surface field layer 120. In this embodiment, the first passivation layer 132 and the second passivation layer 134 are sequentially formed over the boron back surface field layer 120. In an embodiment, the first passivation layer 132 comprises aluminum oxide, tantalum oxide or a combination thereof, and the second passivation layer 134 comprises tantalum nitride, but is not limited thereto. The first passivation layer 132 and the second passivation layer 134 may be formed by chemical vapor deposition. In addition, an anti-reflection layer 180 may be formed over the doped layer 160 to reduce the reflectance of incident light. In an embodiment, the material of the anti-reflective layer 180 comprises tantalum nitride.

如第3E圖所示,形成開口O貫穿鈍化層130。詳細而言,開口O貫穿第一鈍化層132、第二鈍化層134及硼背面場層120。例如可利用雷射或其他合適的方式形成開口O。 As shown in FIG. 3E, the opening O is formed to penetrate the passivation layer 130. In detail, the opening O penetrates the first passivation layer 132, the second passivation layer 134, and the boron back surface field layer 120. For example, the opening O can be formed using a laser or other suitable means.

如第3F圖所示,設置鋁膠142於開口O內。亦可在形成鋁膠142之前或之後,形成銀膠172於抗反射層180上。最後,進行燒結步驟,燒結鋁膠142與銀膠172,以形成如第2圖所示之鋁局部背面場層150、背面電極層140與正面電極層170,而鋁局部背面場層150位於開口130a、120a下方的半導體基材110內。 As shown in FIG. 3F, an aluminum paste 142 is disposed in the opening O. Silver paste 172 may also be formed on anti-reflective layer 180 before or after aluminum paste 142 is formed. Finally, a sintering step is performed to sinter the aluminum paste 142 and the silver paste 172 to form an aluminum partial back surface field layer 150, a back electrode layer 140 and a front electrode layer 170 as shown in FIG. 2, and the aluminum partial back surface layer 150 is located at the opening. In the semiconductor substrate 110 under the 130a, 120a.

第4A-4F圖係繪示依照本發明一實施例之一種太陽能電池之製造方法之各製程階段的示意圖。首先,如第 4A圖所示,提供一半導體基材110,半導體基材110具有一正面110a及一背面110b相對設置。 4A-4F are schematic views showing respective process stages of a method of fabricating a solar cell according to an embodiment of the present invention. First, as in the first As shown in FIG. 4A, a semiconductor substrate 110 is provided. The semiconductor substrate 110 has a front surface 110a and a back surface 110b disposed opposite each other.

然後,如第4B圖所示,對正面110a進行粗化製程,再形成硼來源層(boron source layer)BSL於半導體基材110之背面110b的上方。在一實施例中,硼來源層BSL包含硼膠、硼矽玻璃或其組合。硼膠可利用塗佈或印刷方式形成。硼矽玻璃可利用化學氣相沉積方式形成,例如常壓化學氣相沉積(APCVD)。 Then, as shown in FIG. 4B, the front surface 110a is subjected to a roughening process, and a boron source layer BSL is formed over the back surface 110b of the semiconductor substrate 110. In an embodiment, the boron source layer BSL comprises borosilicate, borosilicate glass, or a combination thereof. Boron glue can be formed by coating or printing. Boron bismuth glass can be formed by chemical vapor deposition, such as atmospheric pressure chemical vapor deposition (APCVD).

接著,如第4B-4C圖所示,擴散硼來源層BSL的硼至背面110b下方的半導體基材110內,以形成硼背面場層120於背面110b下方的半導體基材110內。在形成硼背面場層120之後,移除硼來源層BSL。在一實施例中,擴散硼來源層BSL的硼至背面110b下方的半導體基材110內步驟與擴散磷至正面110a下方的半導體基材110內以形成摻雜層160步驟係於同一次熱處理程序中進行。如此一來,可減少製程步驟。具體而言,可將如第4B圖所示的結構置入高溫爐管中,再通入三氯氧磷(POCl3)與氧氣,以於正面110a下方的半導體基材110內形成摻雜層160,於背面110b下方的半導體基材110內形成硼背面場層120。最後,移除硼來源層BSL,以及擴散磷時所產生的磷矽玻璃(未繪示)。 Next, as shown in FIG. 4B-4C, the boron of the boron source layer BSL is diffused into the semiconductor substrate 110 under the back surface 110b to form the boron back surface field layer 120 in the semiconductor substrate 110 under the back surface 110b. After the boron back surface field layer 120 is formed, the boron source layer BSL is removed. In one embodiment, the step of diffusing the boron of the boron source layer BSL to the semiconductor substrate 110 under the back surface 110b and diffusing the phosphor to the semiconductor substrate 110 under the front surface 110a to form the doped layer 160 are subjected to the same heat treatment process. In progress. In this way, the process steps can be reduced. Specifically, the structure as shown in FIG. 4B can be placed in a high temperature furnace tube, and phosphorus oxychloride (POCl 3 ) and oxygen gas can be introduced to form a doped layer in the semiconductor substrate 110 under the front surface 110a. 160, a boron back surface field layer 120 is formed in the semiconductor substrate 110 under the back surface 110b. Finally, the boron source layer BSL is removed, as well as the phosphorous glass (not shown) produced when the phosphorus is diffused.

如第4D圖所示,形成鈍化層130於硼背面場層120的上方。在本實施例中,依序形成第一鈍化層132及第二鈍化層134於硼背面場層120的上方。另外,可形成抗反 射層180於摻雜層160的上方,以降低入射光的反射率。在一實施例中,抗反射層180包含氮化矽。 As shown in FIG. 4D, a passivation layer 130 is formed over the boron back surface field layer 120. In this embodiment, the first passivation layer 132 and the second passivation layer 134 are sequentially formed over the boron back surface field layer 120. In addition, it can form anti-reverse The shot layer 180 is over the doped layer 160 to reduce the reflectivity of the incident light. In an embodiment, the anti-reflective layer 180 comprises tantalum nitride.

如第4E圖所示,形成開口O貫穿鈍化層130。詳細而言,開口O貫穿第一鈍化層132、第二鈍化層134及硼背面場層120。例如可利用雷射或其他合適的方式形成開口O。 As shown in FIG. 4E, the opening O is formed to penetrate the passivation layer 130. In detail, the opening O penetrates the first passivation layer 132, the second passivation layer 134, and the boron back surface field layer 120. For example, the opening O can be formed using a laser or other suitable means.

如第4F圖所示,設置鋁膠142於開口O內。亦可形成銀膠172於抗反射層180上。最後,進行燒結步驟,燒結鋁膠142與銀膠172,以形成如第2圖所示之鋁局部背面場層150、背面電極層140與正面電極層170,而鋁局部背面場層150位於開口130a、120a下方的半導體基材110內。 As shown in FIG. 4F, an aluminum paste 142 is disposed in the opening O. Silver paste 172 may also be formed on the anti-reflective layer 180. Finally, a sintering step is performed to sinter the aluminum paste 142 and the silver paste 172 to form an aluminum partial back surface field layer 150, a back electrode layer 140 and a front electrode layer 170 as shown in FIG. 2, and the aluminum partial back surface layer 150 is located at the opening. In the semiconductor substrate 110 under the 130a, 120a.

第5A-5F圖係繪示依照本發明一實施例之一種太陽能電池之製造方法之各製程階段的示意圖。首先,如第5A圖所示,提供一半導體基材110,半導體基材110具有一正面110a及一背面110b相對設置。 5A-5F are schematic views showing respective process stages of a method of manufacturing a solar cell according to an embodiment of the present invention. First, as shown in FIG. 5A, a semiconductor substrate 110 is provided. The semiconductor substrate 110 has a front surface 110a and a back surface 110b disposed opposite each other.

然後,如第5B圖所示,對正面110a進行粗化製程,再形成摻雜層160於正面110a下方的半導體基材110內。例如可利用高溫擴散,將摻質擴散至正面110a下方的半導體基材110內,而形成摻雜層160。 Then, as shown in FIG. 5B, the front surface 110a is subjected to a roughening process, and the doped layer 160 is formed in the semiconductor substrate 110 below the front surface 110a. For example, the dopant layer 160 can be formed by diffusing the dopant into the semiconductor substrate 110 under the front surface 110a using high temperature diffusion.

如第5C圖所示,形成含硼鈍化材料層(boron-contained passivation layer)BPL於半導體基材110之背面110b的上方,然後形成第二鈍化層134於含硼鈍化材料層BPL的上方。含硼鈍化材料層BPL包含硼及鈍化材 料。在一實施例中,利用塗佈製程,如噴塗(spray coating)方式,形成含硼鈍化材料層BPL於背面110b的上方。在一實施例中,鈍化材料包含氧化鋁、氧化矽、氮氧化矽或其組合,但不限於此。在一實施例中,第二鈍化層134包含氮化矽。另外,可形成抗反射層180於摻雜層160的上方,以降低入射光的反射率。 As shown in FIG. 5C, a boron-contained passivation layer BPL is formed over the back surface 110b of the semiconductor substrate 110, and then a second passivation layer 134 is formed over the boron-containing passivation material layer BPL. Boron-containing passivation material layer BPL contains boron and passivation material material. In one embodiment, a boron-containing passivation material layer BPL is formed over the back surface 110b by a coating process, such as a spray coating method. In an embodiment, the passivation material comprises, but is not limited to, aluminum oxide, cerium oxide, cerium oxynitride or a combination thereof. In an embodiment, the second passivation layer 134 comprises tantalum nitride. In addition, an anti-reflection layer 180 may be formed over the doped layer 160 to reduce the reflectance of incident light.

如第5D圖所示,形成開口O貫穿第二鈍化層134及含硼鈍化材料層BPL。例如可利用雷射或其他合適的方式形成開口O。 As shown in FIG. 5D, the opening O is formed to penetrate the second passivation layer 134 and the boron-containing passivation material layer BPL. For example, the opening O can be formed using a laser or other suitable means.

如第5E圖所示,設置鋁膠142於開口O內。亦可形成銀膠172於抗反射層180上。然後,進行燒結步驟,燒結鋁膠142與銀膠172,以形成如第5F圖所示之鋁局部背面場層150、背面電極層140與正面電極層170,而鋁局部背面場層150位於開口O下方的半導體基材110內。值得注意的是,在燒結鋁膠142與銀膠172的時候,如第5E圖所示的含硼鈍化材料層BPL的硼會擴散至背面110b下方的半導體基材110內,而形成如第5F圖所示的硼背面場層120。在含硼鈍化材料層BPL的硼釋出之後,也就形成了如第5F圖所示的第一鈍化層132。也就是說,在本實施例中,不需另移除含硼鈍化材料層BPL,故可減少製程步驟。 As shown in FIG. 5E, an aluminum paste 142 is disposed in the opening O. Silver paste 172 may also be formed on the anti-reflective layer 180. Then, a sintering step is performed to sinter the aluminum paste 142 and the silver paste 172 to form an aluminum partial back surface field layer 150, a back electrode layer 140 and a front electrode layer 170 as shown in FIG. 5F, and the aluminum partial back surface layer 150 is located at the opening. Inside the semiconductor substrate 110 under O. It should be noted that when the aluminum paste 142 and the silver paste 172 are sintered, the boron of the boron-containing passivation material layer BPL as shown in FIG. 5E diffuses into the semiconductor substrate 110 under the back surface 110b to form a 5F. The boron back surface field layer 120 is shown. After the boron of the boron-containing passivation material layer BPL is released, the first passivation layer 132 as shown in FIG. 5F is formed. That is to say, in the present embodiment, the boron-containing passivation material layer BPL is not required to be removed, so that the process steps can be reduced.

根據上述可知,本發明之製造方法皆不需運用到半導體製程的微影蝕刻技術,即可製作出硼背面場層及鋁局部背面場層。因此相對於需運用到微影蝕刻技術形成太陽能電池的製造方法,本發明的製造方法可大幅降低製程成 本,極具有實用性。 According to the above, the manufacturing method of the present invention can produce the boron back surface field layer and the aluminum partial back surface field layer without using the lithography etching technology of the semiconductor process. Therefore, the manufacturing method of the present invention can greatly reduce the manufacturing process relative to the manufacturing method for forming a solar cell by using a lithography etching technique. This is extremely practical.

雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

110‧‧‧半導體基材 110‧‧‧Semiconductor substrate

110a‧‧‧正面 110a‧‧‧ positive

110b‧‧‧背面 110b‧‧‧Back

120‧‧‧硼背面場層 120‧‧ ‧ boron back field layer

120a‧‧‧開口 120a‧‧‧ openings

130‧‧‧鈍化層 130‧‧‧ Passivation layer

130a‧‧‧開口 130a‧‧‧ openings

132‧‧‧第一鈍化層 132‧‧‧First passivation layer

132a‧‧‧開口 132a‧‧‧ openings

134‧‧‧第二鈍化層 134‧‧‧second passivation layer

134a‧‧‧開口 134a‧‧‧ openings

140‧‧‧背面電極層 140‧‧‧Back electrode layer

150‧‧‧鋁局部背面場層 150‧‧‧Aluminum partial back field layer

160‧‧‧摻雜層 160‧‧‧Doped layer

162‧‧‧第一摻雜層 162‧‧‧First doped layer

164‧‧‧第二摻雜層 164‧‧‧Second doped layer

170‧‧‧正面電極層 170‧‧‧ front electrode layer

180‧‧‧抗反射層 180‧‧‧Anti-reflective layer

Claims (6)

一種太陽能電池,包含:一半導體基材,具有一正面及一背面相對設置;一硼背面場層,位於該背面下方之該半導體基材內;一鈍化層,位於該硼背面場層的上方,該鈍化層具有一開口貫穿該鈍化層;一背面電極層,位於該開口內;以及一鋁局部背面場層,位於該開口下方之該半導體基材內,並接觸該硼背面場層及該背面電極層。 A solar cell comprising: a semiconductor substrate having a front surface and a back surface opposite; a boron back surface layer in the semiconductor substrate below the back surface; a passivation layer over the boron back surface layer The passivation layer has an opening extending through the passivation layer; a back electrode layer is located in the opening; and an aluminum partial back surface field layer in the semiconductor substrate under the opening and contacting the boron back surface layer and the back surface Electrode layer. 如請求項1所述之太陽能電池,其中該背面電極層更覆蓋該鈍化層。 The solar cell of claim 1, wherein the back electrode layer further covers the passivation layer. 如請求項1所述之太陽能電池,其中該鈍化層未被該背面電極層完全覆蓋。 The solar cell of claim 1, wherein the passivation layer is not completely covered by the back electrode layer. 如請求項1所述之太陽能電池,其中該硼背面場層具有一開口,該硼背面場層之該開口大致對準該鈍化層之該開口。 The solar cell of claim 1, wherein the boron back surface field layer has an opening, the opening of the boron back surface field layer being substantially aligned with the opening of the passivation layer. 如請求項1所述之太陽能電池,其中該鈍化層包含:一第一鈍化層,接觸該硼背面場層,該第一鈍化層包含氧化鋁、氧化矽、氮氧化矽或其組合;以及一第二鈍化層,位於該第一鈍化層的上方,該第二鈍化層包含氮化矽。 The solar cell of claim 1, wherein the passivation layer comprises: a first passivation layer contacting the boron back surface field layer, the first passivation layer comprising aluminum oxide, cerium oxide, cerium oxynitride or a combination thereof; A second passivation layer is disposed above the first passivation layer, and the second passivation layer comprises tantalum nitride. 如請求項1所述之太陽能電池,更包含:一第一摻雜層,位於該正面下方之該半導體基材內;一第二摻雜層,位於該正面下方之該半導體基材內,並鄰接該第一摻雜層,該第一摻雜層及該第二摻雜層之導電型相同,且該第二摻雜層之摻質濃度大於該第一摻雜層之摻質濃度;以及一正面電極層,接觸該第二摻雜層。 The solar cell of claim 1, further comprising: a first doped layer in the semiconductor substrate under the front surface; a second doped layer in the semiconductor substrate under the front surface, and Adjacent to the first doped layer, the first doped layer and the second doped layer have the same conductivity type, and the second doped layer has a dopant concentration greater than a dopant concentration of the first doped layer; A front electrode layer contacts the second doped layer.
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