TW201615066A - Electronic package and method of manufacture - Google Patents
Electronic package and method of manufactureInfo
- Publication number
- TW201615066A TW201615066A TW103135624A TW103135624A TW201615066A TW 201615066 A TW201615066 A TW 201615066A TW 103135624 A TW103135624 A TW 103135624A TW 103135624 A TW103135624 A TW 103135624A TW 201615066 A TW201615066 A TW 201615066A
- Authority
- TW
- Taiwan
- Prior art keywords
- forming
- via hole
- insulating layer
- hole
- package
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1035—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1041—Special adaptations for top connections of the lowermost container, e.g. redistribution layer, integral interposer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW103135624A TWI571185B (zh) | 2014-10-15 | 2014-10-15 | 電子封裝件及其製法 |
CN201410729628.5A CN105655304A (zh) | 2014-10-15 | 2014-12-04 | 电子封装件及其制法 |
US14/862,457 US9899303B2 (en) | 2014-10-15 | 2015-09-23 | Electronic package and fabrication method thereof |
US15/866,144 US10403567B2 (en) | 2014-10-15 | 2018-01-09 | Fabrication method of electronic package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW103135624A TWI571185B (zh) | 2014-10-15 | 2014-10-15 | 電子封裝件及其製法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201615066A true TW201615066A (en) | 2016-04-16 |
TWI571185B TWI571185B (zh) | 2017-02-11 |
Family
ID=55749639
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW103135624A TWI571185B (zh) | 2014-10-15 | 2014-10-15 | 電子封裝件及其製法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US9899303B2 (zh) |
CN (1) | CN105655304A (zh) |
TW (1) | TWI571185B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI669785B (zh) * | 2017-03-15 | 2019-08-21 | 台灣積體電路製造股份有限公司 | 半導體封裝體及其形成方法 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI571185B (zh) * | 2014-10-15 | 2017-02-11 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
US10504841B2 (en) * | 2018-01-21 | 2019-12-10 | Shun-Ping Huang | Semiconductor package and method of forming the same |
TWI645527B (zh) * | 2018-03-06 | 2018-12-21 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
KR102586068B1 (ko) * | 2018-05-04 | 2023-10-05 | 삼성전기주식회사 | 인쇄회로기판 |
CN111106013B (zh) * | 2019-10-31 | 2022-03-15 | 广东芯华微电子技术有限公司 | Tmv结构的制备方法、大板扇出型异构集成封装结构及其制备方法 |
TWI830566B (zh) * | 2022-12-30 | 2024-01-21 | 恆勁科技股份有限公司 | 整合有電感線路結構之封裝載板及其製造方法 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1173399C (zh) * | 2001-01-04 | 2004-10-27 | 矽品精密工业股份有限公司 | 具溢胶防止装置的半导体封装件 |
JP2004179419A (ja) * | 2002-11-27 | 2004-06-24 | Toshiba Corp | 半導体装置及びその製造方法 |
JP4226428B2 (ja) * | 2003-09-29 | 2009-02-18 | パナソニック株式会社 | 導電性ペースト充填方法、導電性ペースト充填装置 |
JP5021216B2 (ja) * | 2006-02-22 | 2012-09-05 | イビデン株式会社 | プリント配線板およびその製造方法 |
KR101357569B1 (ko) * | 2006-08-03 | 2014-02-05 | 바젤 폴리올레핀 게엠베하 | 폴리올레핀 마무리가공 방법 |
JP5042591B2 (ja) * | 2006-10-27 | 2012-10-03 | 新光電気工業株式会社 | 半導体パッケージおよび積層型半導体パッケージ |
US7713866B2 (en) * | 2006-11-21 | 2010-05-11 | Infineon Technologies Ag | Semiconductor devices and methods of manufacture thereof |
US20100044089A1 (en) * | 2007-03-01 | 2010-02-25 | Akinobu Shibuya | Interposer integrated with capacitors and method for manufacturing the same |
US8476735B2 (en) * | 2007-05-29 | 2013-07-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Programmable semiconductor interposer for electronic package and method of forming |
US7666711B2 (en) * | 2008-05-27 | 2010-02-23 | Stats Chippac, Ltd. | Semiconductor device and method of forming double-sided through vias in saw streets |
US20100017118A1 (en) * | 2008-07-16 | 2010-01-21 | Apple Inc. | Parking & location management processes & alerts |
US8704350B2 (en) * | 2008-11-13 | 2014-04-22 | Samsung Electro-Mechanics Co., Ltd. | Stacked wafer level package and method of manufacturing the same |
TWI492349B (zh) * | 2010-09-09 | 2015-07-11 | 矽品精密工業股份有限公司 | 晶片尺寸封裝件及其製法 |
KR101719630B1 (ko) * | 2010-12-21 | 2017-04-04 | 삼성전자 주식회사 | 반도체 패키지 및 그를 포함하는 패키지 온 패키지 |
US8552485B2 (en) * | 2011-06-15 | 2013-10-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure having metal-insulator-metal capacitor structure |
US8765549B2 (en) * | 2012-04-27 | 2014-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Capacitor for interposers and methods of manufacture thereof |
CN103906370B (zh) * | 2012-12-27 | 2017-01-11 | 碁鼎科技秦皇岛有限公司 | 芯片封装结构、具有内埋元件的电路板及其制作方法 |
TWI571185B (zh) * | 2014-10-15 | 2017-02-11 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
-
2014
- 2014-10-15 TW TW103135624A patent/TWI571185B/zh active
- 2014-12-04 CN CN201410729628.5A patent/CN105655304A/zh active Pending
-
2015
- 2015-09-23 US US14/862,457 patent/US9899303B2/en active Active
-
2018
- 2018-01-09 US US15/866,144 patent/US10403567B2/en active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI669785B (zh) * | 2017-03-15 | 2019-08-21 | 台灣積體電路製造股份有限公司 | 半導體封裝體及其形成方法 |
US10529698B2 (en) | 2017-03-15 | 2020-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor packages and methods of forming same |
US11189603B2 (en) | 2017-03-15 | 2021-11-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor packages and methods of forming same |
Also Published As
Publication number | Publication date |
---|---|
US20160111359A1 (en) | 2016-04-21 |
CN105655304A (zh) | 2016-06-08 |
US10403567B2 (en) | 2019-09-03 |
US20180130727A1 (en) | 2018-05-10 |
US9899303B2 (en) | 2018-02-20 |
TWI571185B (zh) | 2017-02-11 |
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