TW201613020A - Semiconductor process carrier - Google Patents

Semiconductor process carrier

Info

Publication number
TW201613020A
TW201613020A TW104122781A TW104122781A TW201613020A TW 201613020 A TW201613020 A TW 201613020A TW 104122781 A TW104122781 A TW 104122781A TW 104122781 A TW104122781 A TW 104122781A TW 201613020 A TW201613020 A TW 201613020A
Authority
TW
Taiwan
Prior art keywords
substrate
manufacturing device
process carrier
semiconductor manufacturing
semiconductor process
Prior art date
Application number
TW104122781A
Other languages
Chinese (zh)
Other versions
TWI659488B (en
Inventor
Taro Itatani
Hiroyuki Ishii
Yoshiyuki Amano
Tsuneyuki Hayashi
Original Assignee
Nat Inst Of Advanced Ind Scien
Carrier Integration Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nat Inst Of Advanced Ind Scien, Carrier Integration Inc filed Critical Nat Inst Of Advanced Ind Scien
Publication of TW201613020A publication Critical patent/TW201613020A/en
Application granted granted Critical
Publication of TWI659488B publication Critical patent/TWI659488B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

Provided is a semiconductor process carrier with which, when using a semiconductor manufacturing device corresponding to a large diameter silicon substrate to perform the processes of a small substrate such as a sapphire substrate, the small substrate does not fall even if orientated in the vertical direction or the reverse rotation direction, due to the small substrate being fixed by suction onto an adapter plate that resolves the differences in the dimensions. To apply a sapphire substrate (4) to the semiconductor manufacturing device corresponding to a large diameter silicon substrate, an opening section (10) is drilled into a conveyance base section (1) comprising a large diameter silicon substrate, and the semiconductor process carrier is configured by adhering a polyimide film (2) to the reverse surface by bonding. With the semiconductor process carrier, it is possible to vacuum chuck and electrostatically chuck the sapphire substrate (4). At the exterior of the semiconductor manufacturing device, the sapphire substrate (4) is detachable from the opening section (10) of the conveyance base section (1), and the semiconductor manufacturing device is made suitable for conveyance and processes without being altered or the like.
TW104122781A 2014-07-14 2015-07-14 Semiconductor process carrier TWI659488B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014144065A JP5959069B2 (en) 2014-07-14 2014-07-14 Semiconductor process carrier
JP2014-144065 2014-07-14

Publications (2)

Publication Number Publication Date
TW201613020A true TW201613020A (en) 2016-04-01
TWI659488B TWI659488B (en) 2019-05-11

Family

ID=55078643

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104122781A TWI659488B (en) 2014-07-14 2015-07-14 Semiconductor process carrier

Country Status (3)

Country Link
JP (1) JP5959069B2 (en)
TW (1) TWI659488B (en)
WO (1) WO2016010158A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111668120A (en) * 2020-06-01 2020-09-15 杭州晶通科技有限公司 Fan-out type packaging structure of high-density chip and preparation method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5621142B2 (en) * 2013-04-02 2014-11-05 独立行政法人産業技術総合研究所 Semiconductor process carrier

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0727628Y2 (en) * 1989-11-20 1995-06-21 日本電信電話株式会社 Wafer holding jig
JPH10116760A (en) * 1996-10-08 1998-05-06 Nikon Corp Aligner and substrate holding device
JP3410366B2 (en) * 1998-06-19 2003-05-26 理学電機工業株式会社 X-ray fluorescence sample holder
JP3858669B2 (en) * 2001-11-06 2006-12-20 信越半導体株式会社 Same point measurement method using auxiliary jig for surface inspection
TWI327336B (en) * 2003-01-13 2010-07-11 Oc Oerlikon Balzers Ag Arrangement for processing a substrate
JP4544231B2 (en) * 2006-10-06 2010-09-15 パナソニック株式会社 Manufacturing method of semiconductor chip
TW200935506A (en) * 2007-11-16 2009-08-16 Panasonic Corp Plasma dicing apparatus and semiconductor chip manufacturing method
WO2014030699A1 (en) * 2012-08-23 2014-02-27 リンテック株式会社 Dicing sheet with protective film formation layer and method for producing chip
US9136173B2 (en) * 2012-11-07 2015-09-15 Semiconductor Components Industries, Llc Singulation method for semiconductor die having a layer of material along one major surface
JP5621142B2 (en) * 2013-04-02 2014-11-05 独立行政法人産業技術総合研究所 Semiconductor process carrier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111668120A (en) * 2020-06-01 2020-09-15 杭州晶通科技有限公司 Fan-out type packaging structure of high-density chip and preparation method thereof

Also Published As

Publication number Publication date
JP2016021465A (en) 2016-02-04
TWI659488B (en) 2019-05-11
WO2016010158A1 (en) 2016-01-21
JP5959069B2 (en) 2016-08-02

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