TW201611316A - Solar cell, solar cell module and method of manufacturing solar cells - Google Patents

Abstract

The present invention discloses a solar cell including a substrate, a first intrinsic amorphous semiconductor layer, a second intrinsic amorphous semiconductor layer and a silicon nitride layer. The substrate has a first surface and as second surface opposite to the first surface. The first intrinsic amorphous semiconductor layer is spaced apart from the second intrinsic amorphous semiconductor layer and both of which are disposed on the second surface. The silicon nitride layer is disposed between the first and the second intrinsic amorphous semiconductor layers and is in direct contact with the second surface.

Description

Solar cell, solar cell module and solar cell manufacturing method

The present invention relates to the field of heterojunction solar cells, and more particularly to a heterojunction solar cell having a back contact electrode, a solar module, and a method of fabricating the same.

With the depletion of consumable energy, the development of alternative energy sources such as solar energy has become an important development direction in the world. Most of the industry is committed to developing solar cells with high conversion efficiency and low production cost.

Among the many high-performance solar cells, especially the back-contact heterojunction back contact (HBC), solar cells are valued. In general, the structure of the back contact heterojunction tantalum solar cell includes at least an N-type crystalline germanium substrate, an intrinsic amorphous germanium layer, a P-type amorphous germanium layer, an N-type amorphous germanium layer, and an electrode layer. Specifically, the intrinsic amorphous germanium layer is respectively disposed on the front and back surfaces of the N-type crystalline germanium substrate, and the P-type amorphous germanium layer, the N amorphous germanium layer, and the electrode layer are all disposed on the N-type crystal.背面 The back side of the substrate. Since the interface between the crystalline germanium and the amorphous germanium layer is a heterojunction, and the opaque electrode layer is only disposed on the back side of the solar cell, the back contact type heterojunction solar cell can provide a large short-circuit current (Isc). ), thereby increasing the overall battery output.

However, there is still room for improvement in the above-mentioned back contact type heterojunction solar cells. For example, the intrinsic amorphous germanium layer disposed on the back side of the crystalline germanium substrate is generally a continuous layer, resulting in a junction. The carriers generated in the wafer substrate are susceptible to recombination in the intrinsic amorphous germanium layer, and the open circuit voltage of the solar cell is lowered. In addition, even if there is a built-in field in the crystallization substrate, the minority carriers in the substrate cannot effectively drift to the corresponding electrode during their lifetime, resulting in an increase in electron hole pairing. Probability and lead to a reduction in open circuit voltage.

In view of the above, it is necessary to provide a back contact type heterojunction solar cell to solve the drawbacks existing in the prior art.

It is an object of the present invention to provide a solar cell that addresses the deficiencies found in the prior art.

Another object of the present invention is to provide a solar cell module including an improved solar cell to address the deficiencies found in the prior art.

It is still another object of the present invention to provide a method of fabricating a solar cell that can produce an improved solar cell to address the deficiencies found in the prior art.

In accordance with the above objects, an embodiment of the present invention discloses a solar cell. The solar cell includes at least a substrate, a first intrinsic amorphous semiconductor layer, a second intrinsic amorphous semiconductor layer, and a tantalum nitride layer. The substrate has opposite first and second surfaces. The first intrinsic amorphous semiconductor layer and the second intrinsic amorphous semiconductor layer are separated from each other and are disposed on the second surface. The tantalum nitride layer is disposed between the first intrinsic amorphous semiconductor layer and the second intrinsic amorphous semiconductor layer, wherein the tantalum nitride layer directly contacts the second surface.

According to another embodiment of the present invention, a solar cell module is disclosed. The solar cell module includes at least a front plate, a back plate, a plurality of solar cells, and a frame. Front plate and back plate For the setting, the outer frame will be placed on the front panel and the periphery of the back panel. The solar cell is disposed between the front plate and the back plate, and each includes a substrate, a first intrinsic amorphous semiconductor layer, a second intrinsic amorphous semiconductor layer, and a tantalum nitride layer. Further, the substrate has opposite first and second surfaces. The first intrinsic amorphous semiconductor layer and the second intrinsic amorphous semiconductor layer are separated from each other and are disposed on the second surface. The tantalum nitride layer is disposed between the first intrinsic amorphous semiconductor layer and the second intrinsic amorphous semiconductor layer, wherein the tantalum nitride layer directly contacts the second surface.

According to still another embodiment of the present invention, a method of fabricating a solar cell is disclosed. The method of manufacturing a solar cell includes the steps of first providing a substrate having oppositely disposed first and second surfaces. An intrinsic amorphous semiconductor layer is then deposited on the second surface of the substrate. The intrinsic amorphous semiconductor layer is then etched to form trenches in the intrinsic amorphous semiconductor layer. Finally, a trench of tantalum nitride is filled in the trench, wherein the tantalum nitride layer directly contacts the second surface of the substrate.

100‧‧‧ solar cells

102‧‧‧Substrate

104‧‧‧ first surface

106‧‧‧second surface

107‧‧‧N type amorphous semiconductor layer

108‧‧‧First amorphous semiconductor layer

109‧‧‧P type amorphous semiconductor layer

110‧‧‧Second amorphous semiconductor layer

112‧‧‧Transparent conductive layer

114‧‧‧First electrode

116‧‧‧Second electrode

118‧‧‧ Essential amorphous semiconductor layer

120‧‧‧ Essential amorphous semiconductor layer

120a‧‧‧First Intrinsic Amorphous Semiconductor Layer

120b‧‧‧Second essential amorphous semiconductor layer

122‧‧‧layer of tantalum nitride

124‧‧‧Anti-reflective layer

126‧‧‧ interface

127‧‧‧positive charge accumulation zone

128‧‧‧ gap

129‧‧‧ trench

130‧‧‧ Conductive tape

132‧‧‧Front frame

140‧‧‧front board

142‧‧‧ Backplane

144‧‧‧ cladding

150‧‧‧Solar battery module

Figure 1 is a plan view of a solar cell in accordance with an embodiment of the present invention.

Fig. 2 is a cross-sectional view of the solar cell taken along the line tangential to Fig. 1A-A'.

Fig. 3 is a cross-sectional view showing a solar cell according to a tangential line of Fig. 1A-A' according to another embodiment of the present invention.

Fig. 4 is a cross-sectional view showing a solar cell according to a tangential line of Fig. 1A-A' according to still another embodiment of the present invention.

5 to 8 are views showing a method of fabricating a solar cell according to an embodiment of the present invention.

Figure 9 is a plan view of a solar cell module in accordance with an embodiment of the present invention.

Figure 10 is a partial cross-sectional view of the solar cell module of Figure 9.

In order to enable those skilled in the art to understand and practice the present invention, The solar cell, the solar cell module and the method for fabricating the solar cell of the present invention will be described in detail. It is to be noted that the scope of the present invention is defined by the scope of the appended claims, and is not limited to the embodiments disclosed herein. Therefore, changes and modifications may be made to the embodiments described below without departing from the spirit and scope of the invention. In addition, the same or similar components or devices are denoted by the same reference numerals, and some of the conventional structures and process details will not be disclosed below. It should be noted that the drawings are for illustrative purposes and are not drawn exactly according to the original dimensions.

Referring to FIG. 1 and FIG. 2, respectively, a top view and a cross-sectional view of a solar cell according to an embodiment of the present invention are shown, wherein FIG. 2 is depicted along a line A-A' of FIG. As shown in FIGS. 1 and 2, the solar cell 100 includes at least a substrate 102, an intrinsic amorphous semiconductor layer 120a, a second intrinsic amorphous semiconductor layer 120b, and a tantalum nitride layer 122. The substrate 102 has a first conductivity type, preferably an N type, and has a first surface 104 and a second surface 106 disposed opposite each other. The first intrinsic amorphous semiconductor layer 120a and the second intrinsically amorphous semiconductor layer 120b are both disposed on the second surface 106, separated from each other, and preferably exhibit an interdigitated layout as shown in FIG. The tantalum nitride layer 122 is preferably an amorphous silicon nitride (a-SiN) disposed between the first intrinsic amorphous semiconductor layer 120a and the second intrinsic amorphous semiconductor layer 120b and is in direct contact with each other. Second surface 106.

Specifically, the substrate 102 is a crystalline semiconductor substrate, for example, a polycrystalline germanium substrate or a III-V compound substrate, and is preferably a single crystal germanium substrate. The first surface 104 is the primary light receiving surface that receives sunlight. The main body of the first intrinsic amorphous semiconductor layer 120a and the second intrinsic amorphous semiconductor layer 120b may be an intrinsic semiconductor, preferably an intrinsic amorphous silicon, which is used to repair the presence on the second surface 106. Defects.

One of the features of the present invention resides in the first intrinsic amorphous semiconductor layer 120a and the second essential non- The crystalline semiconductor layers 120b are separated from each other. By virtue of this feature, once the carriers of different electrical properties are respectively drifted to the corresponding first intrinsic amorphous semiconductor layer 120a or the second intrinsically amorphous semiconductor layer 120b, the recombination is not performed again, and thus the open circuit of the solar cell 100 can be improved. Voltage. In addition, another feature of the present invention is that the amorphous tantalum nitride layer 122 will passivate a portion of the second surface 106, resulting in an interface 126 between the amorphous tantalum nitride layer 122 and the second surface 106, or a substrate adjacent to the interface 126. Within the 102 or amorphous tantalum nitride layer 122, there is a positive charge accumulation region 127. Since the charge electrical property in the positive charge accumulation region 127 is the same as that of the minority carriers in the N-type substrate 102, that is, the holes, it can not only repel the holes that drift toward the second surface 106, In order to prevent the holes from being caught by the defects on the second surface 106, it is also possible to simultaneously reduce the residence time of the holes in the N-type substrate 102, thereby increasing the open circuit voltage of the solar cell 100.

The solar cell 100 described above may further include other components. Still referring to FIG. 2, for example, the first amorphous semiconductor layer 120a may be selectively sequentially stacked with the first amorphous semiconductor layer 108, the transparent conductive layer 112, and the first electrode 114. The second amorphous semiconductor layer 110, the transparent conductive layer 112, and the second electrode 116 are selectively stacked on the second intrinsic amorphous semiconductor layer 120b. In this case, the amorphous tantalum nitride layer 122 may be disposed between the first amorphous semiconductor layer 108 and the second amorphous semiconductor layer 110, and the top surface of the amorphous tantalum nitride layer 122 is preferably a transparent conductive layer. 112 is closed, but not limited to this. Further, an intrinsic amorphous semiconductor layer 118 and an anti-reflective layer 124 are selectively stacked on the first surface 104 of the substrate 102 in sequence.

Specifically, the constituent bodies of the first amorphous semiconductor layer 108 and the second amorphous semiconductor layer 110 may each be an amorphous semiconductor, preferably an amorphous germanium, and the two have different conductive types, for example, respectively having a first conductive Type, for example, N type, and second conductivity type, such as P type, but are not limited thereto. Preferably, the first amorphous semiconductor layer 108 and the substrate 102 of the present embodiment have the same conductivity type, for example, an N type. The first electrode 114 and the second electrode 116 may be metal electrodes of better conductivity, such as aluminum electrodes or silver electrodes, and are electrically separated from each other to output the corresponding carriers to an external load. this In addition, the transparent conductive layer 112 may be selected from a transparent conductive oxide (TCO) or other suitable conductive inorganic substance to further reduce the series resistance. Similarly, for the intrinsic amorphous semiconductor layer 118 on the first surface 104, the body may also be an intrinsic amorphous semiconductor, preferably an amorphous germanium, which is used to passivate the first surface 104 to prevent the carrier from being first. Surface 104 is composite. The anti-reflection layer 124 can reduce the light reflectance of the first surface 104, and its composition is preferably the same as that of the amorphous tantalum nitride layer, for example, amorphous tantalum nitride, but is not limited thereto.

The solar cell of the present invention may include other variations in addition to the above-described embodiments. These variations will be described below. It is to be noted that since the structure of the following modifications is substantially similar to the above-described embodiments, the following description will be made only with respect to the main differences, and similar elements and structures may be referred to with reference.

Fig. 3 is a cross-sectional view showing a solar cell according to a tangential line of Fig. 1A-A' according to another embodiment of the present invention. As shown in FIG. 3, the main difference between the embodiment of FIG. 3 and the embodiment of FIG. 1 is that the amorphous tantalum nitride layer 122 of the present embodiment conforms to the first intrinsic amorphous semiconductor layer. The second surface 106 covered by the 120a and the second intrinsic amorphous semiconductor layer 120b, and the intrinsic amorphous semiconductor layer 120a, the second intrinsic amorphous semiconductor layer 120b, the first amorphous semiconductor layer 108, and the second amorphous semiconductor layer 110 And a sidewall of the transparent conductive layer 112. In other words, the amorphous tantalum nitride layer 122 of the present embodiment does not fill the trench (not shown) between the first amorphous semiconductor layer 108 and the second amorphous semiconductor layer 110. Even so, there will still be a positive charge accumulation region 127 near the interface 126 between the amorphous tantalum nitride layer 122 and the second surface 106. The solar cell 100 of the present embodiment is similar to the above embodiments except that the amorphous tantalum nitride layer 122 is compliant, and the features, arrangement locations, and material properties of the other components are not described herein.

Fig. 4 is a cross-sectional view showing a solar cell according to a tangential line of Fig. 1A-A' according to still another embodiment of the present invention. As shown in Fig. 4, the embodiment of Fig. 4 and the embodiment of Fig. 1 above The main difference is that the second surface 106 between the first intrinsic amorphous semiconductor layer 120a and the second intrinsic amorphous semiconductor layer 120b is not entirely in direct contact with the amorphous tantalum nitride layer 122. In other words, only a portion of the second surface 106 directly contacts the amorphous tantalum nitride layer 122. Specifically, a gap 128 exists between the second surface 106 and the amorphous tantalum nitride layer 122, so that the positive charge accumulation region 127 of the embodiment is slightly smaller than the positive charge accumulation region of the first FIG. 127. Preferably, the amorphous tantalum nitride layer 122 of the present embodiment still directly contacts the sidewalls of the portion of the first amorphous semiconductor layer 108 and the portion of the second amorphous semiconductor layer 110, but is not limited thereto. Further, regardless of the size of the gap 128, as long as the area in which the amorphous tantalum nitride layer 122 and the second surface 106 have direct contact are within the scope of the present embodiment. In addition to the gap 128 between the second surface 106 and the amorphous tantalum nitride layer 122, the solar cell 100 of the present embodiment has similar features, arrangement locations, and material properties to the above embodiments, and thus No longer.

In order to enable those skilled in the art to practice the invention, the method of making the solar cell of the present invention will be described in detail below with reference to the drawings.

5 to 8 are views showing a method of fabricating a solar cell according to an embodiment of the present invention. As shown in FIG. 5, a substrate 102, such as a polycrystalline germanium substrate or a III-V compound substrate, is preferably provided, preferably a single crystal germanium N-type substrate having a first surface 104 and a second surface 106 disposed opposite each other. Next, a chemical vapor deposition (CVD) process or other suitable process is performed to deposit an intrinsic amorphous semiconductor layer 118, 120, such as an intrinsic amorphous germanium layer, onto the first surface 104 and the second surface 106, respectively.

As shown in FIG. 6, the P-type amorphous semiconductor layer 109 is first entirely deposited on the second surface 106 by a chemical vapor deposition process or other suitable process, and then the P-type amorphous semiconductor layer 109 is patterned. Next, an N-type amorphous semiconductor layer 107 is deposited to cover the P-type amorphous semiconductor layer 109 and the intrinsic amorphous semiconductor layer 120. It should be noted here that the P-type amorphous semiconductor layers 109 and N The order of deposition of the amorphous semiconductor layer 107 is not limited thereto, and it may be reversed according to different process requirements. It is to be noted that this embodiment forms the P-type second amorphous semiconductor layer 109 and the N-type amorphous semiconductor layer 107 in a deposition manner, but the present invention is not limited thereto. For example, an intrinsic amorphous semiconductor layer may be formed on the second surface through a deposition process, and then an ion implantation process is performed on different regions of the intrinsic amorphous semiconductor layer to form a P-type amorphous semiconductor in the corresponding region. A layer and an N-type amorphous semiconductor layer.

Thereafter, the N-type amorphous semiconductor layer 107 is planarized and patterned, and a transparent conductive layer (not shown) is selectively deposited on the N-type amorphous semiconductor layer 107. Then, one or more etching processes, such as laser etching, chemical bath etching or photolithography etching, may be performed to sequentially etch the transparent conductive layer, the P-type amorphous semiconductor layer 109, the N-type amorphous semiconductor layer 107, and the non-essential The crystalline semiconductor layer 120 is formed into a trench in the intrinsic amorphous semiconductor layer 120, and a structure similar to that shown in Fig. 7 is produced. As shown in FIG. 7, the trench 129 is disposed between the first and second intrinsic amorphous semiconductor layers 120a, 120b, so that the first and second intrinsic amorphous semiconductor layers 120a, 120b have the same pattern as in FIG. The indication is a forked layout. Preferably, the sidewalls of the first and second intrinsic amorphous semiconductor layers 120a, 120b respectively align the sidewalls of the first and second amorphous semiconductor layers 108, 110, but the invention is not limited thereto.

As shown in FIG. 8, a deposition or coating process is performed to fill the tantalum nitride layer 122, preferably an amorphous tantalum nitride layer, into the trench 129, causing the amorphous tantalum nitride layer 122 to directly contact the first layer. The second surface 106 is formed. It should be noted that in order to prevent the dopant from being thermally diffused in the process, it is preferred to perform a low temperature deposition process at a temperature lower than 200 ° C to fill the amorphous tantalum nitride layer 122. Thereafter, an anti-reflective layer 124 can be selectively deposited on the first surface 104. It should be noted that the material of the anti-reflective layer 124 may be the same as the material of the amorphous tantalum nitride layer 122, for example, amorphous tantalum nitride, but is not limited thereto. Following the planarization process, the amorphous tantalum nitride layer 122 is etched into the transparent conductive layer 112. Finally, the first electrode 114 and the second electrode 116 are formed on the transparent conductive layer 112 by screen printing or other suitable means. At this time, since the first and second electrodes 114, 116 are respectively corresponding to the first sum Since the second intrinsic amorphous semiconductor layers 120a and 120b are provided, they also have an interdigitated layout as shown in Fig. 1. Similarly, after the amorphous tantalum nitride layer 122 is filled into the trench 129, a positive charge accumulation region 127 is spontaneously generated between the interface 126 between the amorphous tantalum nitride layer 122 and the second surface 106.

The invention also provides a solar cell module comprising the improved solar cell described above. In the following embodiments, the structure of the solar cell module will be described.

Please refer to FIG. 9 and FIG. 10, which are top and cross-sectional views, respectively, of a solar cell module according to an embodiment of the invention. As shown in FIGS. 9 and 10, the solar cell module 150 includes a front plate 140, a back plate 142, a plurality of solar cells 100, and an outer frame 132. The front plate 140 is disposed opposite to the back plate 142 and the solar cell 100 is disposed between the front plate 140 and the back plate 142. The outer frame 132 is disposed on the periphery of the front plate 140 and the back plate 142.

Specifically, each of the solar cells 100 is connected to each other in series and/or in parallel by a ribbon 130. A cover layer 144 is also disposed between the front plate 140 and the back plate 142 such that the front plate 140 is bonded to the back plate 142. The cladding layer 144 can also fix the solar cell 100 and the conductive strip 130 to prevent the solar cell 100 and the conductive strip 130 from coming into direct contact with the outside. The material of the coating layer 144 may be a polymer copolymer such as ethylene-vinyl acetate (EVA) or an ionomer, but is not limited thereto.

Similarly, the solar cell 100 within the solar cell module 150 has the same structure as the above embodiment. Specifically, each solar cell 100 includes at least a substrate 102, a first intrinsic amorphous semiconductor layer 120a, a second intrinsic amorphous semiconductor layer 120b, and a tantalum nitride layer 122. The substrate 102 has a first surface 104 and a second surface 106 disposed opposite each other. The first intrinsic amorphous semiconductor layer 120a and the second intrinsic amorphous semiconductor layer 120b are both disposed on the second surface 106, separated from each other, and preferably exhibit an interdigitated layout. The constituent body of the tantalum nitride layer 122 Preferably, the amorphous tantalum nitride is disposed between the first intrinsic amorphous semiconductor layer 120a and the second intrinsic amorphous semiconductor layer 120b and directly contacts the second surface 106. In addition, the first amorphous semiconductor layer 108, the transparent conductive layer 112, and the first electrode 114 may be selectively stacked on the first intrinsic amorphous semiconductor layer 120a. The second amorphous semiconductor layer 110, the transparent conductive layer 112, and the second electrode 116 are selectively stacked on the second intrinsic amorphous semiconductor layer 120b. Further, an intrinsic amorphous semiconductor layer 118 and an anti-reflective layer 124 are selectively stacked on the first surface 104 of the substrate 102 in sequence. In addition, in order to provide different output voltages and currents, each solar cell 100 in the solar cell module 150 may be suitably connected in series, in parallel, or a combination of the two.

It should be noted that the solar cell 100 of all the embodiments in the present invention is not limited to a single-sided type, which may also be a bifacial type.

In summary, the present invention provides a solar cell, a solar cell module, and a method of fabricating the same. The first essential amorphous semiconductor layer and the second intrinsically amorphous semiconductor layer of the solar cell are disposed apart from each other, and a positive charge accumulation region exists at an interface between the amorphous tantalum nitride layer and the second surface. According to the above feature, when carriers of different electrical properties are respectively shifted to the corresponding first intrinsic amorphous semiconductor layer or second intrinsic amorphous semiconductor layer, they are not recombined. In addition, the charge in the positive charge accumulation region can repel the holes that drift toward the second surface to prevent the holes from being trapped by the defects on the second surface, which at the same time can reduce the residence time of the holes in the substrate. Therefore, the open circuit voltage of the solar cell can be effectively increased, thereby improving the overall battery output.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

100‧‧‧ solar cells

102‧‧‧Substrate

104‧‧‧ first surface

106‧‧‧second surface

108‧‧‧First amorphous semiconductor layer

110‧‧‧Second amorphous semiconductor layer

112‧‧‧Transparent conductive layer

114‧‧‧First electrode

116‧‧‧Second electrode

118‧‧‧ Essential amorphous semiconductor layer

120a‧‧‧First Intrinsic Amorphous Semiconductor Layer

120b‧‧‧Second essential amorphous semiconductor layer

122‧‧‧layer of tantalum nitride

124‧‧‧Anti-reflective layer

126‧‧‧ interface

127‧‧‧positive charge accumulation zone

Claims (24)

A solar cell comprising: a substrate having a first surface and a second surface disposed oppositely; a first intrinsic amorphous semiconductor layer disposed on the second surface; and a second intrinsic amorphous semiconductor layer disposed On the second surface, wherein the second intrinsic amorphous semiconductor layer and the first intrinsic amorphous semiconductor layer are separated from each other; and a tantalum nitride layer disposed on the first intrinsic amorphous semiconductor layer and the second essence Between the amorphous semiconductor layers, wherein the tantalum nitride layer directly contacts the second surface. The solar cell of claim 1, wherein the substrate is a crystalline semiconductor substrate. The solar cell of claim 1, wherein the first intrinsic amorphous semiconductor layer and the second intrinsic amorphous semiconductor layer exhibit an interdigitated layout. The solar cell of claim 1, wherein the composition of the tantalum nitride layer comprises amorphous tantalum nitride. The solar cell of claim 1, further comprising a positive charge accumulation region disposed at an interface between the tantalum nitride layer and the second surface. The solar cell of claim 1, further comprising a first amorphous semiconductor layer and a second amorphous semiconductor layer respectively disposed on the first intrinsic amorphous semiconductor layer and the second intrinsic amorphous The first amorphous semiconductor layer and the second amorphous semiconductor layer have different conductivity types on the semiconductor layer. The solar cell of claim 6, wherein the substrate has the same conductivity type as the first amorphous semiconductor layer. The solar cell according to claim 6, wherein the tantalum nitride layer is disposed between the first amorphous semiconductor layer and the second amorphous semiconductor layer. The solar cell of claim 6, further comprising: a first electrode disposed on the first amorphous semiconductor layer; and a second electrode disposed on the second amorphous semiconductor layer Wherein the second electrode is electrically separated from the first electrode. The solar cell of claim 1, further comprising an intrinsic amorphous semiconductor layer disposed on the first surface. The solar cell of claim 1, further comprising an anti-reflective layer disposed on the first surface, wherein the anti-reflective layer and the tantalum nitride layer have the same composition. A solar cell module comprising: a front plate; a back plate disposed opposite the front plate; a plurality of solar cells disposed between the front plate and the back plate, each of the solar cells comprising: a substrate having Opposing one of the first surface and the second surface; a first intrinsic amorphous semiconductor layer disposed on the second surface; a second intrinsic amorphous semiconductor layer disposed on the second surface, wherein the The second amorphous semiconductor layer is separated from the first amorphous semiconductor layer; and a tantalum nitride layer is disposed between the first amorphous semiconductor layer and the second amorphous semiconductor layer, Wherein the tantalum nitride layer directly contacts the second surface; and an outer frame is disposed on the front plate and the periphery of the back plate. The solar cell module of claim 12, wherein the composition of the tantalum nitride layer comprises amorphous tantalum nitride. The solar cell module of claim 12, further comprising a positive charge accumulation region disposed at an interface between the amorphous tantalum nitride layer and the second surface. The solar cell module of claim 12, further comprising a first amorphous semiconductor layer and a second amorphous semiconductor layer respectively disposed on the first intrinsic amorphous semiconductor layer and the second essential non- On the crystalline semiconductor layer, the first amorphous semiconductor layer and the second amorphous semiconductor layer have different conductivity types. The solar module of claim 15, wherein the substrate has the same conductivity type as the first amorphous semiconductor layer. The solar cell module of claim 15, wherein the tantalum nitride layer is disposed between the first amorphous semiconductor layer and the second amorphous semiconductor layer. The solar cell of claim 12, further comprising an anti-reflective layer disposed on the first surface, wherein the anti-reflective layer and the tantalum nitride layer have the same composition. A solar cell manufacturing method comprising: providing a substrate having a first surface and a second surface disposed oppositely; depositing an amorphous semiconductor layer on the second surface; etching the intrinsic amorphous semiconductor layer to form a substrate a trench in the intrinsic amorphous semiconductor layer; A layer of tantalum nitride is filled into the trench, wherein the tantalum nitride layer directly contacts the second surface. The method of manufacturing a solar cell according to claim 19, wherein the composition of the tantalum nitride layer comprises amorphous tantalum nitride. The solar cell manufacturing method according to claim 19, wherein a low temperature deposition process is used to fill the tantalum nitride layer into the trench, and the temperature of the low temperature deposition process is lower than 200 °C. The solar cell manufacturing method of claim 19, wherein after filling the tantalum nitride layer to the trench, a positive charge is accumulated at an interface between the tantalum nitride layer and the second surface, and A positive charge accumulation region is generated at the interface. The solar cell manufacturing method according to claim 19, wherein after etching the intrinsic amorphous semiconductor layer, one of the first intrinsic amorphous semiconductor layer and the second intrinsic amorphous semiconductor layer are formed apart from each other. The solar cell manufacturing method of claim 19, further comprising forming a first amorphous semiconductor layer and a second amorphous semiconductor layer on the intrinsic amorphous semiconductor layer, wherein the first amorphous The semiconductor layer is electrically separated from the second amorphous semiconductor layer, and the first amorphous semiconductor layer and the second amorphous semiconductor layer have different conductivity types.