TW201610680A - 異構共用虛擬記憶體中的依須求可共用性轉換 - Google Patents

異構共用虛擬記憶體中的依須求可共用性轉換 Download PDF

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Publication number
TW201610680A
TW201610680A TW104123238A TW104123238A TW201610680A TW 201610680 A TW201610680 A TW 201610680A TW 104123238 A TW104123238 A TW 104123238A TW 104123238 A TW104123238 A TW 104123238A TW 201610680 A TW201610680 A TW 201610680A
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TW
Taiwan
Prior art keywords
processor
virtual memory
memory page
page
access
Prior art date
Application number
TW104123238A
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English (en)
Chinese (zh)
Inventor
雷希立克博胡斯拉夫
普戴馬傑森艾德華
格魯柏安德魯艾文
曾宗仁
馬正彪
Original Assignee
高通公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 高通公司 filed Critical 高通公司
Publication of TW201610680A publication Critical patent/TW201610680A/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/062—Securing storage systems
    • G06F3/0622—Securing storage systems in relation to access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0637—Permissions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/067—Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/152—Virtualized environment, e.g. logically partitioned system

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
TW104123238A 2014-07-18 2015-07-17 異構共用虛擬記憶體中的依須求可共用性轉換 TW201610680A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201462026319P 2014-07-18 2014-07-18
US14/510,804 US20160019168A1 (en) 2014-07-18 2014-10-09 On-Demand Shareability Conversion In A Heterogeneous Shared Virtual Memory

Publications (1)

Publication Number Publication Date
TW201610680A true TW201610680A (zh) 2016-03-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW104123238A TW201610680A (zh) 2014-07-18 2015-07-17 異構共用虛擬記憶體中的依須求可共用性轉換

Country Status (7)

Country Link
US (1) US20160019168A1 (enExample)
EP (1) EP3170086A1 (enExample)
JP (1) JP2017530436A (enExample)
KR (1) KR20170031697A (enExample)
CN (1) CN106575264A (enExample)
TW (1) TW201610680A (enExample)
WO (1) WO2016010704A1 (enExample)

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US10901738B2 (en) 2017-11-14 2021-01-26 International Business Machines Corporation Bulk store and load operations of configuration state registers
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CN112905243B (zh) * 2019-11-15 2022-05-13 成都鼎桥通信技术有限公司 一种同时运行双系统的方法和装置
US11782835B2 (en) 2020-11-30 2023-10-10 Electronics And Telecommunications Research Institute Host apparatus, heterogeneous system architecture device, and heterogeneous system based on unified virtual memory
US11593108B2 (en) * 2021-06-07 2023-02-28 International Business Machines Corporation Sharing instruction cache footprint between multiple threads
US11593109B2 (en) 2021-06-07 2023-02-28 International Business Machines Corporation Sharing instruction cache lines between multiple threads
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Also Published As

Publication number Publication date
EP3170086A1 (en) 2017-05-24
CN106575264A (zh) 2017-04-19
WO2016010704A1 (en) 2016-01-21
KR20170031697A (ko) 2017-03-21
US20160019168A1 (en) 2016-01-21
JP2017530436A (ja) 2017-10-12

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