TW201602609A - Magnetic field sensor arrangement, corresponding process for its production and operating method - Google Patents

Magnetic field sensor arrangement, corresponding process for its production and operating method Download PDF

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TW201602609A
TW201602609A TW104118855A TW104118855A TW201602609A TW 201602609 A TW201602609 A TW 201602609A TW 104118855 A TW104118855 A TW 104118855A TW 104118855 A TW104118855 A TW 104118855A TW 201602609 A TW201602609 A TW 201602609A
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hall sensor
magnetic field
region
sensor device
insulating layer
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TW104118855A
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Chinese (zh)
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阿奇美 布萊林
克里斯堤安 帕塔克
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羅伯特博斯奇股份有限公司
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Publication of TW201602609A publication Critical patent/TW201602609A/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00Arrangements or instruments for measuring magnetic variables
    • G01R33/0052Manufacturing aspects; Manufacturing of single devices, i.e. of semiconductor magnetic sensor chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • H10N52/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N52/00Hall-effect devices
    • H10N52/101Semiconductor Hall-effect devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N59/00Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00Arrangements or instruments for measuring magnetic variables
    • G01R33/02Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/0206Three-component magnetometers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00Arrangements or instruments for measuring magnetic variables
    • G01R33/02Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/06Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
    • G01R33/07Hall effect devices
    • G01R33/072Constructional adaptation of the sensor to specific applications

Abstract

The present invention relates to a magnetic field sensor arrangement, to a corresponding manufacturing method and to an operating method. The magnetic field sensor arrangement comprises an ASIC substrate (AC; AC') having a front face (VS) and a rear face (RS) and a hall sensor device (H; H'; H") which has a hall sensor region (HS; HS'; HS") that consists of a III-V semiconductor material, said region being embedded in an insulation layer arrangement (I0, I1, I2, I3; I0, I1, I2, I3, I4, I5) applied to the front face (VS). The hall sensor region (HS; HS'; HS") is electrically connected to a hall sensor evaluation circuit device (101) formed in the ASIC substrate (AC; AC'), via a conductor unit (L2) guided through the insulation layer arrangement (I0, I1, I2, I3; I0, I1, I2, I3, I4, I5).

Description

磁場感測器裝置,相關的製造方法及操作方法 Magnetic field sensor device, related manufacturing method and operation method

本發明係有關於一種磁場感測器裝置、一種相關的製造方法及一種操作方法。 The present invention relates to a magnetic field sensor device, a related manufacturing method, and an operating method.

DE 10 2008 042 800 A1公開過一種用於對磁場的方向及/或強度進行測量的裝置。此裝置係佈置在基板上。在基板之表面上佈置有霍爾感測器,其適於對沿z向的、大體垂直於基板表面起作用的磁場分量進行驗證。此外,設有兩個磁通門感測器,以便對基板之X-Y平面中的磁場分量進行驗證。在與霍爾感測器搭配使用的情況下,便能對沿所有三個空間方向的三個分量進行確定。 A device for measuring the direction and/or intensity of a magnetic field is disclosed in DE 10 2008 042 800 A1. This device is arranged on the substrate. A Hall sensor is disposed on the surface of the substrate that is adapted to verify magnetic field components acting in the z-direction that are substantially perpendicular to the surface of the substrate. In addition, two fluxgate sensors are provided to verify the magnetic field component in the X-Y plane of the substrate. In combination with a Hall sensor, three components along all three spatial directions can be determined.

在此裝置中,將霍爾感測器設置在矽基板上或矽基板中,另一方面則透過微機械構件分別製造兩個磁通門感測器,並將其固定在此矽基板的表面上。 In this device, the Hall sensor is disposed on the 矽 substrate or the 矽 substrate, and on the other hand, two fluxgate sensors are separately fabricated through the micromechanical member and fixed on the surface of the 矽 substrate on.

DE 10 2012 209 232 A1描述過一種磁場感測器,其包含用於沿第一測量方向對磁場進行測量的第一感測器磁芯,以及用於沿第二測量 方向對磁場進行測量的第二感測器磁芯,其中此第一感測器磁芯與第二感測器磁芯具有共同的磁各向異性。此等感測器芯部為Flipcore磁通門感測器的組成部分,Flipcore磁通門感測器適於對晶圓級中的磁場進行偵測。 DE 10 2012 209 232 A1 describes a magnetic field sensor comprising a first sensor core for measuring a magnetic field in a first measurement direction and for following a second measurement A second sensor core that measures the magnetic field in direction, wherein the first sensor core and the second sensor core have a common magnetic anisotropy. These sensor cores are part of a Flipcore fluxgate sensor that is suitable for detecting magnetic fields in the wafer level.

US 6,536,123 B1描述過一種包含兩個磁通門感測器及一個霍爾感測器的磁場感測器,其中使用混合式IC來對感測器訊號進行分析。 US 6,536,123 B1 describes a magnetic field sensor comprising two fluxgate sensors and a Hall sensor, wherein a hybrid IC is used to analyze the sensor signals.

眾所周知,可使用III-V族半導體材料來在基板上製造霍爾感測器。US 6,803,638公開過一種InSb霍爾感測器,其係透過分子束磊晶沈積在GaAs基板上。 It is well known that III-V semiconductor materials can be used to fabricate Hall sensors on substrates. No. 6,803,638 discloses an InSb Hall sensor which is deposited on a GaAs substrate by molecular beam epitaxy.

本發明提供一種如申請專利範圍第1項的磁場感測器裝置,一種相關的如申請專利範圍第11項的製造方法,以及一種如申請專利範圍第13項的操作方法。 The present invention provides a magnetic field sensor device according to claim 1 of the patent application, a related manufacturing method as in claim 11 of the patent application, and an operation method as in claim 13 of the patent application.

較佳改進方案參閱附屬項。 See the attached item for the preferred improvement.

本發明的基礎理念為,在ASIC基板上方設置至少一由III-V族半導體材料構成的霍爾感測器區域。 The basic idea of the invention is to provide at least one Hall sensor region composed of a III-V semiconductor material over the ASIC substrate.

藉由本發明的如申請專利範圍第1項之磁場感測器裝置及相關的如申請專利範圍第11項之製造方法,能夠將由III-V族半導體材料構成的霍爾感測器區域,特別是InSb(銻化銦)半導體區域直接沈積在ASIC晶圓基板上。如此便能將該III-V族半導體材料直接整合在該磁場感測器裝置之分析晶圓上。此方案有助於減小結構尺寸、減低成本、減小電流消耗以及增大資料速率。 A Hall sensor region composed of a III-V semiconductor material, in particular, a magnetic field sensor device according to claim 1 of the present invention and a related manufacturing method according to claim 11 of the present invention, in particular The InSb (indium antimonide) semiconductor region is deposited directly on the ASIC wafer substrate. Thus, the III-V semiconductor material can be directly integrated on the analysis wafer of the magnetic field sensor device. This solution helps to reduce the size of the structure, reduce the cost, reduce the current consumption and increase the data rate.

與整合在矽晶圓中的霍爾感測器區域相比,本發明之霍爾感 測器區域的性能大幅提昇。 The Hall sense of the present invention is compared to a Hall sensor region integrated in a germanium wafer The performance of the detector area has increased significantly.

透過整合其他感測器區域,例如用於磁通門感測器裝置的磁芯區域及磁線圈裝置,便能實現緊湊的、殼體尺寸較小的多維(特別是三維)磁場感測器裝置。 By integrating other sensor areas, such as the core area for magnetic fluxgate sensor devices and magnetic coil arrangements, a compact, multi-dimensional (especially three-dimensional) magnetic field sensor device with a small housing size can be realized. .

根據一種較佳實施方式,該霍爾感測器區域係由InSb構成。可透過濺鍍以控制性極佳的方式對此材料進行鍍覆。 According to a preferred embodiment, the Hall sensor region is comprised of InSb. This material can be plated in a highly controlled manner by sputtering.

根據另一較佳實施方式,該霍爾感測器區域具有一層序列,其包含具不同晶粒度的材料層。此方案有助於將該霍爾感測器區域黏合及附著在該基板上。 According to another preferred embodiment, the Hall sensor region has a sequence of layers comprising layers of material having different grain sizes. This solution helps to bond and attach the Hall sensor region to the substrate.

根據另一較佳實施方式,交替地構建有若干具第一晶粒度的第一層及若干具第二晶粒度的第二層,其中該第二晶粒度遠小於該第一晶粒度。藉此便能有利地實現該等層的嚙合。 According to another preferred embodiment, a plurality of first layers having a first grain size and a second layer having a second grain size are alternately constructed, wherein the second grain size is much smaller than the first grain degree. Thereby the engagement of the layers can be advantageously achieved.

根據另一較佳實施方式,在該鍍覆於正面上的絕緣層裝置中嵌有至少一磁通門感測器裝置,其具有一由鐵磁材料構成之磁芯區域及一磁線圈裝置,其中該磁芯區域及該磁線圈裝置係藉由穿過該絕緣層裝置的第二導電通路裝置與構建於ASIC基板中的磁通門感測器分析電路裝置建立起電連接。如此便能構建一複合式感測器裝置,例如一3D磁感測器。 According to another preferred embodiment, at least one fluxgate sensor device is embedded in the insulating layer device plated on the front surface, and has a magnetic core region composed of a ferromagnetic material and a magnetic coil device. The magnetic core region and the magnetic coil device are electrically connected to the fluxgate sensor analysis circuit device built in the ASIC substrate by a second conductive path device passing through the insulating layer device. This makes it possible to construct a composite sensor device, such as a 3D magnetic sensor.

根據另一較佳實施方式,該霍爾感測器裝置與該磁通門感測器裝置係嵌入在該絕緣層裝置的不同平面中。此方案有助於實現良好的絕緣以及提昇可操作性。 According to another preferred embodiment, the Hall sensor device and the fluxgate sensor device are embedded in different planes of the insulating layer device. This solution helps achieve good insulation and improved operability.

根據另一較佳實施方式,該霍爾感測器裝置係以與該磁芯區域之一末端鄰近的方式佈置於其上方或下方。如此便能實現改霍爾感測器 裝置的雙重功能,從而節省空間。 According to another preferred embodiment, the Hall sensor device is disposed above or below the end of one of the core regions. So that you can change the Hall sensor The dual function of the device saves space.

根據另一較佳實施方式,在該絕緣層裝置中以與該霍爾感測器區域鄰近的方式在其上方或下方嵌有一由鐵磁材料構成之磁場磁通集中區域。此方案有助於改善測量性能。 According to another preferred embodiment, in the insulating layer device, a magnetic field flux concentration region composed of a ferromagnetic material is embedded above or below the Hall sensor region. This solution helps to improve measurement performance.

根據另一較佳實施方式,該磁場磁通集中區域係實施為空心圓柱,其圓柱軸線大體垂直於該霍爾感測器區域。此方案能夠實現有利的場分佈。 According to another preferred embodiment, the magnetic field flux concentration region is embodied as a hollow cylinder having a cylinder axis that is substantially perpendicular to the Hall sensor region. This solution enables a favorable field distribution.

根據另一較佳實施方式,該磁芯區域及/或該磁通集中區域係由Ni/Fe/Al構成。可透過薄層工藝以施加控制的方式對此等材料進行處理。 According to another preferred embodiment, the core region and/or the flux concentration region are composed of Ni/Fe/Al. These materials can be processed in a controlled manner by a thin layer process.

AC‧‧‧ASIC基板 AC‧‧‧ASIC substrate

AC'‧‧‧ASIC基板 AC'‧‧‧ASIC substrate

E1‧‧‧末端 End of E1‧‧‧

E2‧‧‧末端 End of E2‧‧‧

F0‧‧‧磁通門感測器裝置 F0‧‧‧ Fluxgate sensor device

F1‧‧‧磁通門感測器裝置 F1‧‧‧ Fluxgate sensor device

F2‧‧‧磁通門感測器裝置 F2‧‧‧ fluxgate sensor device

FC0‧‧‧磁芯區域 FC0‧‧‧ magnetic core area

FC1‧‧‧磁芯區域 FC1‧‧‧Magnetic core area

FC2‧‧‧磁芯區域 FC2‧‧‧ magnetic core area

FLC‧‧‧磁場磁通集中區域 FLC‧‧‧Magnetic magnetic flux concentration area

H‧‧‧霍爾感測器裝置 H‧‧‧ Hall sensor device

H'‧‧‧霍爾感測器裝置 H'‧‧‧ Hall sensor device

H"‧‧‧霍爾感測器裝置 H"‧‧‧ Hall sensor device

HL‧‧‧空腔 HL‧‧‧ cavity

HS‧‧‧霍爾感測器區域 HS‧‧‧ Hall sensor area

HS'‧‧‧霍爾感測器區域 HS'‧‧‧ Hall sensor area

HS"‧‧‧霍爾感測器區域 HS"‧‧‧ Hall sensor area

I0‧‧‧絕緣層 I0‧‧‧Insulation

I1‧‧‧絕緣層 I1‧‧‧Insulation

I2‧‧‧絕緣層 I2‧‧‧Insulation

I3‧‧‧絕緣層 I3‧‧‧Insulation

I4‧‧‧絕緣層 I4‧‧‧Insulation

I5‧‧‧絕緣層 I5‧‧‧Insulation

L1‧‧‧第二導電通路裝置 L1‧‧‧Second conductive path device

L2‧‧‧第一導電通路裝置 L2‧‧‧First Conductive Path Device

RS‧‧‧背面 RS‧‧‧ back

S1‧‧‧第一層 S1‧‧‧ first floor

S2‧‧‧第一層 S2‧‧‧ first floor

S3‧‧‧第一層 S3‧‧‧ first floor

SE0‧‧‧磁線圈裝置 SE0‧‧‧ Magnetic coil device

SE1‧‧‧磁線圈裝置 SE1‧‧‧ Magnetic coil device

SE2‧‧‧磁線圈裝置 SE2‧‧‧ magnetic coil device

SS1‧‧‧第二層 SS1‧‧‧ second floor

SS2‧‧‧第二層 SS2‧‧‧ second floor

VS‧‧‧正面 VS‧‧‧ positive

100‧‧‧磁通門感測器分析電路裝置 100‧‧‧ Fluxgate sensor analysis circuit device

101‧‧‧霍爾感測器分析電路裝置 101‧‧‧ Hall sensor analysis circuit device

圖1為本發明之第一實施方式中的磁場感測器裝置的俯視圖;圖2為本發明之第一實施方式中的磁場感測器裝置的,沿圖1中之線A-A'的橫截面圖;圖3為本發明之第一實施方式中的磁場感測器裝置的霍爾感測器區域的橫截面放大圖;圖4為本發明之第二實施方式中的磁場感測器裝置的俯視圖;圖5a)為本發明之第三實施方式中的磁場感測器裝置的霍爾感測器區域的橫截面放大圖;及圖5b)為本發明之第三實施方式中的磁場感測器裝置的霍爾感測器區域的俯視圖。 1 is a plan view of a magnetic field sensor device in a first embodiment of the present invention; FIG. 2 is a magnetic field sensor device according to a first embodiment of the present invention, taken along line AA' of FIG. 3 is a cross-sectional enlarged view of a Hall sensor region of a magnetic field sensor device in a first embodiment of the present invention; and FIG. 4 is a magnetic field sensor in a second embodiment of the present invention. FIG. 5a is a cross-sectional enlarged view of a Hall sensor region of a magnetic field sensor device in a third embodiment of the present invention; and FIG. 5b) is a magnetic field in a third embodiment of the present invention A top view of the Hall sensor area of the sensor device.

下面結合附圖所示的實施例對本發明作進一步說明。 The invention will now be further described with reference to the embodiments shown in the drawings.

在此等附圖中,相同或功能相同的元件用相同的元件符號表示。 In the figures, identical or functionally identical elements are denoted by the same reference numerals.

圖1為本發明之第一實施方式中的磁場感測器裝置的俯視圖,以及,圖2為該實施方式中的磁場感測器裝置的沿圖1中之線A-A'的橫截面圖。 1 is a plan view of a magnetic field sensor device in a first embodiment of the present invention, and FIG. 2 is a cross-sectional view of the magnetic field sensor device in the embodiment taken along line AA' of FIG. .

在圖1及2中,元件符號AC表示ASIC基板,特別是包含正面VS及背面RS的晶圓基板。霍爾感測器裝置H係嵌入在鍍覆於正面VS上的絕緣層裝置中,該絕緣層裝置包含多個例如由氧化物構成的絕緣層I0、I1、I2、I3,該霍爾感測器裝置具有由III-V族半導體材料(在此為InSb,銻化銦)構成的霍爾感測器區域HS。 In FIGS. 1 and 2, the symbol AC indicates an ASIC substrate, particularly a wafer substrate including a front surface VS and a back surface RS. The Hall sensor device H is embedded in an insulating layer device plated on the front surface VS, the insulating layer device comprising a plurality of insulating layers I0, I1, I2, I3, for example, oxides, the Hall sensing The device has a Hall sensor region HS composed of a III-V semiconductor material (here InSb, indium antimonide).

如圖2所示,霍爾感測器區域HS係藉由穿過絕緣層裝置I0、I1、I2、I3之絕緣層I0、I1、I2的第一導電通路裝置L2,與構建於ASIC基板AC中的霍爾感測器分析電路裝置101建立起電連接。 As shown in FIG. 2, the Hall sensor region HS is formed on the ASIC substrate AC by the first conductive via device L2 passing through the insulating layers I0, I1, I2 of the insulating layer devices I0, I1, I2, I3. The Hall sensor analysis circuit device 101 in the middle establishes an electrical connection.

為此,在絕緣層裝置I0、I1、I2、I3內沈積(未繪示的)導電通路層並對其進行構造化,以及構建相應的貫穿接觸孔。 To this end, a conductive via layer (not shown) is deposited and structured in the insulating layer devices I0, I1, I2, I3, and corresponding through-contact holes are formed.

為清楚起見,圖1及2僅示意性示出導電通路裝置L2,其實際具有多個為霍爾感測器裝置H之功能所需的導電通路。 For the sake of clarity, Figures 1 and 2 only schematically illustrate a conductive path device L2 that actually has a plurality of conductive paths required for the function of the Hall sensor device H.

此外,在鍍覆於正面VS上的絕緣層裝置I0、I1、I2、I3中嵌有兩個磁通門感測器裝置F1及F2。 Further, two fluxgate sensor devices F1 and F2 are embedded in the insulating layer devices I0, I1, I2, I3 plated on the front surface VS.

在本示例中設有第一磁通門感測器裝置F1,其具有第一磁 芯區域FC1及第一磁線圈裝置SE1。與第一磁通門感測器裝置F1正交的第二磁通門感測器裝置F2具有第二磁芯區域FC2及第二磁線圈裝置SE2。磁線圈裝置SE1、SE2通常具有激發線圈及拾波線圈。 In the present example, a first fluxgate sensor device F1 is provided having a first magnetic Core region FC1 and first magnetic coil device SE1. The second fluxgate sensor device F2 orthogonal to the first fluxgate sensor device F1 has a second core region FC2 and a second magnetic coil device SE2. The magnetic coil devices SE1, SE2 usually have an excitation coil and a pickup coil.

如圖2所示,磁芯區域FC1、FC2及磁線圈裝置SE1、SE2係藉由穿過絕緣層裝置I0、I1、I2、I3之絕緣層I0、I1的第二導電通路裝置L1,與構建於ASIC基板AC中的磁通門感測器分析電路裝置100建立起電連接。 As shown in FIG. 2, the core regions FC1, FC2 and the magnetic coil devices SE1, SE2 are constructed by the second conductive path device L1 passing through the insulating layers I0, I1 of the insulating layer devices I0, I1, I2, I3. The fluxgate sensor analysis circuit device 100 in the ASIC substrate AC establishes an electrical connection.

導電通路裝置L1、L2例如由鋁構成。 The conductive path devices L1, L2 are made of, for example, aluminum.

因此,圖1及2所示磁場感測器裝置為三維磁場感測器,其中,磁通門感測器裝置F1、F2對沿x向及y向的磁場分量進行測量,而霍爾感測器裝置H則對沿z向的磁場分量進行測量。 Therefore, the magnetic field sensor device shown in FIGS. 1 and 2 is a three-dimensional magnetic field sensor in which the fluxgate sensor devices F1 and F2 measure magnetic field components along the x-direction and the y-direction, and Hall sensing The device H measures the magnetic field component along the z-direction.

在製造圖1及2所示的磁場感測器裝置時,ASIC基板AC為基礎。將例如由氧化矽或氮化矽構成的第一絕緣層I0鍍覆至ASIC基板AC。在隨後的處理步驟中,藉由薄層工藝將磁芯區域FC1、FC2之鐵磁材料,例如Ni/Fe/Al(鎳/鐵/鋁)鍍覆至第一絕緣層I0,並對該鐵磁材料進行構造化。隨後鍍覆第二絕緣層I1,藉此將該等經構造化的磁芯區域FC1、FC2嵌入。隨後透過濺鍍法對該用於霍爾感測器區域HS的III-V族半導體材料實施多層鍍覆,並對該半導體材料進行構造化。隨後將此霍爾感測器區域HS嵌入第三絕緣層I2,最後沈積第四絕緣層I3,其自上方將該構造絕緣。 When manufacturing the magnetic field sensor device shown in FIGS. 1 and 2, the ASIC substrate AC is based. A first insulating layer I0 composed of, for example, hafnium oxide or tantalum nitride is plated to the ASIC substrate AC. In a subsequent processing step, a ferromagnetic material of the core regions FC1, FC2, such as Ni/Fe/Al (nickel/iron/aluminum), is plated to the first insulating layer I0 by a thin layer process, and the iron is The magnetic material is structured. The second insulating layer I1 is then plated, whereby the structured core regions FC1, FC2 are embedded. The III-V semiconductor material for the Hall sensor region HS is then subjected to multi-layer plating by sputtering, and the semiconductor material is structured. This Hall sensor region HS is then embedded in the third insulating layer I2, and finally a fourth insulating layer I3 is deposited which insulates the structure from above.

就習知的用於構建導電通路平面、其他絕緣平面及通孔,以便構建導電通路裝置L1、L2的處理步驟,以及用於構建第一及第二線圈裝 置SE1、SE2的步驟而言,本文不對此等步驟進行繪示及描述。 Conventional steps for constructing conductive via planes, other insulating planes and vias for constructing conductive via devices L1, L2, and for constructing first and second coils For the steps of SE1 and SE2, the steps are not shown and described herein.

因此,霍爾感測器裝置H及磁通門感測器裝置F1、F2係嵌入在絕緣層裝置I0、I1、I2、I3的不同平面中,但視具體情形,並非必須採用此方案。 Therefore, the Hall sensor device H and the fluxgate sensor devices F1, F2 are embedded in different planes of the insulating layer devices I0, I1, I2, I3, but it is not necessary to adopt this scheme as the case may be.

圖3為本發明之第一實施方式中的磁場感測器裝置的霍爾感測器區域的橫截面放大圖。 3 is an enlarged cross-sectional view of a Hall sensor region of the magnetic field sensor device in the first embodiment of the present invention.

如圖3所示,在該實施方式中,透過具不同粒度的材料層,藉由濺鍍過程以層序列S1、SS1、S2、SS2、S3等構建霍爾感測器區域HS,其中特定言之,在濺鍍過程中透過溫度變化實現不同的粒度,以便獲得儘可能平滑的形態。 As shown in FIG. 3, in this embodiment, the Hall sensor region HS is constructed by layer processes S1, SS1, S2, SS2, S3, etc. through a sputtering process through a material layer having different particle sizes, wherein Different particle sizes are achieved through temperature changes during the sputtering process in order to obtain the smoothest possible morphology.

在本示例中,濺鍍溫度的典型變化範圍為250至450℃。其中在本示例中,在由InSb構成的起始層ST上交替構建若干具第一晶粒度的第一層S1、S2、S3,以及若干具第二晶粒度的第二層SS1、SS2,其中該第二晶粒度遠小於該第一晶粒度。該等第一層及第二層的典型晶粒度分別為5-50nm及500-1000nm。 In this example, the sputtering temperature typically varies from 250 to 450 °C. Wherein in the present example, a plurality of first layers S1, S2, S3 having a first grain size and a plurality of second layers SS1, SS2 having a second grain size are alternately constructed on the starting layer ST composed of InSb. Wherein the second grain size is much smaller than the first grain size. Typical grain sizes of the first and second layers are 5-50 nm and 500-1000 nm, respectively.

霍爾元件的此種平滑外形有助於改善後續處理平面的可操作性,因為校準標記保持可見,且電偏移有所減小。 This smooth shape of the Hall element helps to improve the operability of the subsequent processing plane because the calibration marks remain visible and the electrical offset is reduced.

圖4為本發明之第二實施方式中的磁場感測器裝置的俯視圖。 4 is a plan view of a magnetic field sensor device in a second embodiment of the present invention.

在圖4所示第二實施方式中,用元件符號AC'表示ASIC晶片。在該ASIC晶片之正面VS上嵌有單獨一個磁通門感測器裝置F0,其包含一由鐵磁材料構成之磁芯區域FC0及一磁線圈裝置SE0,該磁線圈裝置 包含單獨一個僅用於激發的磁線圈。霍爾感測器區域HS'係以與磁芯區域FC0之第一末端E1鄰近的方式佈置於上方或下方,其中第二末端係用元件符號E2表示。 In the second embodiment shown in Fig. 4, the ASIC wafer is indicated by the symbol AC'. A single fluxgate sensor device F0 is embedded on the front surface VS of the ASIC chip, and includes a core region FC0 composed of a ferromagnetic material and a magnetic coil device SE0. Contains a single magnetic coil for excitation only. The Hall sensor region HS' is arranged above or below the first end E1 of the core region FC0, wherein the second end is indicated by the symbol E2.

以與上述第一實施方式相似的方式,將霍爾感測器區域HS',以及將包含磁芯區域FC0及磁線圈裝置SE0的磁通門感測器裝置F0嵌入絕緣層I0、I1、I2、I3。 In a manner similar to the first embodiment described above, the Hall sensor region HS', and the fluxgate sensor device F0 including the core region FC0 and the magnetic coil device SE0 are embedded in the insulating layers I0, I1, I2. , I3.

在該第二實施方式中,磁通門感測器裝置F0毋需配設拾波線圈,因為在激發磁通門感測器裝置F0後,可使用霍爾感測器裝置H'來測定磁通變化。為此,特別是根據霍爾感測器裝置H'所測定的磁場沿z向的變化來對磁芯區域FC0的再磁化力矩進行偵測。 In the second embodiment, the fluxgate sensor device F0 is not required to be equipped with a pickup coil, because after the fluxgate sensor device F0 is activated, the Hall sensor device H' can be used to measure the magnetic field. Change through. For this purpose, in particular the remagnetization moment of the magnetic core region FC0 is detected as a function of the change in the z-direction of the magnetic field measured by the Hall sensor device H'.

當然,亦可以與磁芯區域FC0之第二末端E2鄰近的方式,在其上方或下方佈置另一霍爾感測器區域,從而提昇測量靈敏度及測量精度。 Of course, another Hall sensor region may be disposed above or below the second end E2 of the core region FC0 to improve measurement sensitivity and measurement accuracy.

此實施方式之優點在於,能夠減小該構件之構造。 An advantage of this embodiment is that the construction of the member can be reduced.

圖5a)為本發明之第三實施方式中的磁場感測器裝置的霍爾感測器區域的橫截面放大圖,以及,圖5b)為本發明之第三實施方式中的磁場感測器裝置的霍爾感測器區域的俯視圖。 5a) is a cross-sectional enlarged view of a Hall sensor region of a magnetic field sensor device in a third embodiment of the present invention, and FIG. 5b) is a magnetic field sensor in a third embodiment of the present invention A top view of the Hall sensor area of the device.

在圖5所示第三實施方式中,由鐵磁材料構成之磁場磁通集中區域FLC係以與霍爾感測器區域HS"鄰近的方式在其上方(或下方)嵌入絕緣層裝置I0、I1、I2、I3、I4、I5。磁通集中區域FLC係實施為帶有空腔HL的空心圓柱,其中該圓柱軸線大體垂直於霍爾感測器區域HS"。 In the third embodiment shown in FIG. 5, the magnetic field flux concentration region FLC composed of a ferromagnetic material is embedded above and below (or below) the insulating layer device I0 in a manner adjacent to the Hall sensor region HS". I1, I2, I3, I4, I5. The flux concentration region FLC is implemented as a hollow cylinder with a cavity HL, wherein the cylinder axis is substantially perpendicular to the Hall sensor region HS".

較佳透過薄層沈積,使用與製造磁通門感測器裝置之磁芯區 域SE1、SE2時相同的材料,即例如Ni/Fe/Al(鎳/鐵/鋁)來製造磁通集中區域FLC。 Preferably, the thin core layer is used to form and use a magnetic core region of the fluxgate sensor device The same material as in the domains SE1 and SE2, that is, for example, Ni/Fe/Al (nickel/iron/aluminum), is used to manufacture the magnetic flux concentration region FLC.

為此,在鍍覆於第三絕緣層上方的第四絕緣層I4中蝕刻出一孔洞,在該孔洞上方沈積一Ni/Fe/Al層並進行回蝕。在此,第五絕緣層I5自上方將該構造絕緣。 To this end, a hole is etched in the fourth insulating layer I4 plated over the third insulating layer, and a Ni/Fe/Al layer is deposited over the hole and etched back. Here, the fifth insulating layer I5 insulates the structure from above.

增設磁通集中區域FLC有助於增強霍爾感測器裝置H"之靈敏度,以及減小雜訊。 Adding a flux concentration area FLC helps to enhance the sensitivity of the Hall sensor device H" and reduce noise.

儘管上文結合若干較佳實施例對本發明進行了完整的描述,但本發明不僅限於此等實施例,而是能夠以各種方式得到修改。 Although the present invention has been fully described in connection with the preferred embodiments thereof, the invention is not limited to the embodiments, but can be modified in various ways.

當然,在該絕緣層裝置中可設置不止一個包含多個霍爾感測器區域的霍爾感測器裝置,以便減小封裝應力引起的偏移。亦可設置更多磁通門感測器裝置。 Of course, more than one Hall sensor device including a plurality of Hall sensor regions may be provided in the insulating layer device in order to reduce the offset caused by the package stress. More fluxgate sensor devices can also be provided.

儘管上述實施方式中的霍爾感測器區域大體平行於正面VS延伸,但亦可透過相應的構造化工藝將此等霍爾感測器區域設置在位於絕緣層疊堆內的傾斜平面上,使得霍爾感測器區域具備針對x、y平面中之磁場的靈敏度。 Although the Hall sensor regions in the above embodiments extend substantially parallel to the front surface VS, the Hall sensor regions may be disposed on an inclined plane in the insulating laminate stack through a corresponding structuring process, such that The Hall sensor region has sensitivity to the magnetic field in the x, y plane.

視具體要求,上述實施方式的,特別是該等霍爾感測器區域的幾何結構可發生變化。 Depending on the specific requirements, the geometry of the above embodiments, particularly the Hall sensor regions, may vary.

本發明亦不僅限於III-V族半導體材料InSb,亦可採用任意具有霍爾靈敏度的III-V族半導體材料。 The present invention is also not limited to the III-V semiconductor material InSb, and any III-V semiconductor material having Hall sensitivity can be used.

在第一實施方式中,磁線圈裝置SE1、SE2各自包括分別用於激發或拾波的第一線圈裝置及第二線圈裝置。但就該第一實施方式而 言,亦可僅設置一個既用於激發亦用於拾波的第一線圈。 In the first embodiment, the magnetic coil devices SE1, SE2 each include a first coil device and a second coil device for exciting or picking up, respectively. But as far as the first embodiment is concerned In other words, it is also possible to provide only one first coil for both excitation and pickup.

AC‧‧‧ASIC基板 AC‧‧‧ASIC substrate

FC2‧‧‧磁芯區域 FC2‧‧‧ magnetic core area

HS‧‧‧霍爾感測器區域 HS‧‧‧ Hall sensor area

I0‧‧‧絕緣層 I0‧‧‧Insulation

I1‧‧‧絕緣層 I1‧‧‧Insulation

I2‧‧‧絕緣層 I2‧‧‧Insulation

I3‧‧‧絕緣層 I3‧‧‧Insulation

L1‧‧‧第二導電通路裝置 L1‧‧‧Second conductive path device

L2‧‧‧第一導電通路裝置 L2‧‧‧First Conductive Path Device

RS‧‧‧背面 RS‧‧‧ back

SE2‧‧‧磁線圈裝置 SE2‧‧‧ magnetic coil device

VS‧‧‧正面 VS‧‧‧ positive

100‧‧‧磁通門感測器分析電路裝置 100‧‧‧ Fluxgate sensor analysis circuit device

101‧‧‧霍爾感測器分析電路裝置 101‧‧‧ Hall sensor analysis circuit device

Claims (15)

一種磁場感測器裝置,包含:ASIC基板(AC;AC'),其包含正面(VS)及背面(RS);以及霍爾感測器裝置(H;H';H"),其具有由III-V族半導體材料構成的霍爾感測器區域(HS;HS';HS"),該霍爾感測器區域係嵌入鍍覆於該正面(VS)上的絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)中;其中該霍爾感測器區域(HS;HS';HS")係藉由穿過該絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)的第一導電通路裝置(L2)與構建於該ASIC基板(AC;AC')中的霍爾感測器分析電路裝置(101)建立起電連接。 A magnetic field sensor device comprising: an ASIC substrate (AC; AC') comprising a front side (VS) and a back side (RS); and a Hall sensor device (H; H'; H") having Hall sensor region (HS; HS'; HS" composed of III-V semiconductor material, the Hall sensor region is embedded in an insulating layer device (I0, I1) plated on the front surface (VS) , I2, I3; I0, I1, I2, I3, I4, I5); wherein the Hall sensor region (HS; HS'; HS") passes through the insulating layer device (I0, I1, a first conductive path device (L2) of I2, I3; I0, I1, I2, I3, I4, I5) and a Hall sensor analysis circuit device (101) built in the ASIC substrate (AC; AC') Establish an electrical connection. 如申請專利範圍第1項之磁場感測器裝置,其中該霍爾感測器區域(HS;HS';HS")係由InSb(銻化銦)構成。 The magnetic field sensor device of claim 1, wherein the Hall sensor region (HS; HS'; HS") is composed of InSb (indium antimonide). 如申請專利範圍第1或2項之磁場感測器裝置,其中該霍爾感測器區域(HS;HS';HS")具有一層序列(S1,SS1,S2,SS2,S3),其包含若干具不同晶粒度的材料層。 The magnetic field sensor device of claim 1 or 2, wherein the Hall sensor region (HS; HS'; HS") has a sequence (S1, SS1, S2, SS2, S3) including A number of layers of material with different grain sizes. 如申請專利範圍第3項之磁場感測器裝置,其中交替地構建有若干具第一晶粒度的第一層(S1,S2,S3)及若干具第二晶粒度的第二層(SS1,SS2),其中該第二晶粒度遠小於該第一晶粒度。 A magnetic field sensor device according to claim 3, wherein a plurality of first layers (S1, S2, S3) having a first grain size and a second layer having a second grain size are alternately constructed ( SS1, SS2), wherein the second grain size is much smaller than the first grain size. 如申請專利範圍第1或2項之磁場感測器裝置,其中在該鍍覆於正面(VS)上的絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)中嵌有至少一磁通門感測器裝置(F1,F2;F0),其具有一由鐵磁材料構成之磁芯區域(FC1,FC2;FC0)及一磁線圈裝置(SE1,SE2;SE0); 且其中,該磁芯區域(FC1,FC2;FC0)與該磁線圈裝置(SE1,SE2;SE0)係藉由穿過該絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)的第二導電通路裝置(L1)與構建於該ASIC基板(AC;AC')中的磁通門感測器分析電路裝置(100)建立起電連接。 A magnetic field sensor device according to claim 1 or 2, wherein the insulating layer device (I0, I1, I2, I3; I0, I1, I2, I3, I4, which is plated on the front side (VS), I5) is embedded with at least one fluxgate sensor device (F1, F2; F0) having a core region (FC1, FC2; FC0) composed of a ferromagnetic material and a magnetic coil device (SE1, SE2) ;SE0); And wherein the magnetic core region (FC1, FC2; FC0) and the magnetic coil device (SE1, SE2; SE0) pass through the insulating layer device (I0, I1, I2, I3; I0, I1, I2, The second conductive path means (L1) of I3, I4, I5) is electrically connected to the fluxgate sensor analysis circuit means (100) built in the ASIC substrate (AC; AC'). 如申請專利範圍第5項之磁場感測器裝置,其中該霍爾感測器裝置(H;H';H")與該磁通門感測器裝置(F1,F2;F0)係嵌入在該絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)的不同平面中。 The magnetic field sensor device of claim 5, wherein the Hall sensor device (H; H'; H") and the fluxgate sensor device (F1, F2; F0) are embedded in The insulating layer devices (I0, I1, I2, I3; I0, I1, I2, I3, I4, I5) are in different planes. 如申請專利範圍第6項之磁場感測器裝置,其中該霍爾感測器區域(HS')係以與該磁芯區域(FC0)之末端(E1)鄰近的方式佈置於其上方或下方。 The magnetic field sensor device of claim 6, wherein the Hall sensor region (HS') is disposed above or below the end of the core region (FC0) adjacent to the end (E1) of the core region (FC0) . 如申請專利範圍第1或2項之磁場感測器裝置,其中在該絕緣層裝置(I0,I1,I2,I3,I4,I5)中以與該霍爾感測器區域(HS")鄰近的方式在其上方或下方嵌有一由鐵磁材料構成之磁場磁通集中區域(FLC)。 A magnetic field sensor device according to claim 1 or 2, wherein the insulating layer device (I0, I1, I2, I3, I4, I5) is adjacent to the Hall sensor region (HS") The magnetic flux concentration region (FLC) composed of a ferromagnetic material is embedded above or below it. 如申請專利範圍第8項之磁場感測器裝置,其中磁場磁通集中區域(FLC)係實施為空心圓柱,其圓柱軸線(ZA)大體垂直於該霍爾感測器區域(HS")。 The magnetic field sensor device of claim 8, wherein the magnetic field flux concentration region (FLC) is implemented as a hollow cylinder having a cylinder axis (ZA) substantially perpendicular to the Hall sensor region (HS"). 如申請專利範圍第5項之磁場感測器裝置,其中該磁芯區域(FC1,FC2;FC0)及/或該磁通集中區域(FLC)係由Ni/Fe/Al(鎳/鐵/鋁)構成。 The magnetic field sensor device of claim 5, wherein the magnetic core region (FC1, FC2; FC0) and/or the magnetic flux concentration region (FLC) is made of Ni/Fe/Al (nickel/iron/aluminum) ) constitutes. 一種磁場感測器裝置的製造方法,包含以下步驟:提供一具有正面(VS)及背面(RS)的ASIC基板(AC;AC'),其包含構建於該ASIC基板(AC;AC')中的霍爾感測器分析電路裝置(101); 將由III-V族半導體材料構成的霍爾感測器區域(HS;HS';HS")嵌入鍍覆於該正面(VS)上的絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)中;以及藉由穿過該絕緣層裝置(I0,I1,I2,I3;I0,I1,I2,I3,I4,I5)的第一導電通路裝置(L2),為該霍爾感測器區域(HS;HS';HS")與構建於該ASIC基板(AC;AC')中的霍爾感測器分析電路裝置(101)建立電連接。 A method of manufacturing a magnetic field sensor device, comprising the steps of: providing an ASIC substrate (AC; AC') having a front side (VS) and a back side (RS), the ASIC substrate (AC; AC') being built in the ASIC substrate (AC; AC') Hall sensor analysis circuit device (101); A Hall sensor region (HS; HS'; HS" composed of a III-V semiconductor material is embedded in an insulating layer device (I0, I1, I2, I3; I0, I1) plated on the front surface (VS) , I2, I3, I4, I5); and a first conductive path device (L2) passing through the insulating layer device (I0, I1, I2, I3; I0, I1, I2, I3, I4, I5) The Hall sensor region (HS; HS'; HS" is electrically connected to the Hall sensor analysis circuit device (101) built into the ASIC substrate (AC; AC'). 如申請專利範圍第11項之製造方法,其中沈積一包含若干具不同晶粒度之材料層的層序列(S1,SS1,S2,SS2,S3),隨後對該層序列進行構造化,從而構建該霍爾感測器區域(HS;HS';HS")。 The manufacturing method of claim 11, wherein a layer sequence (S1, SS1, S2, SS2, S3) comprising a plurality of material layers having different grain sizes is deposited, and then the layer sequence is structured to construct The Hall sensor area (HS; HS'; HS"). 如申請專利範圍第11或12項之製造方法,其中透過濺鍍法構建該霍爾感測器區域(HS;HS';HS")。 The manufacturing method of claim 11 or 12, wherein the Hall sensor region (HS; HS'; HS") is constructed by sputtering. 如申請專利範圍第11或12項之製造方法,其中用InSb(銻化銦)構建該霍爾感測器區域(HS;HS';HS")。 The manufacturing method of claim 11 or 12, wherein the Hall sensor region (HS; HS'; HS") is constructed using InSb (indium antimonide). 一種針對如申請專利範圍第7項之磁場感測器裝置的操作方法,其中在激發該磁通門感測器裝置(F1,F2;F0)後,使用該霍爾感測器裝置(H;H';H")來對磁通變化進行測定。 A method of operating a magnetic field sensor device according to claim 7 wherein the Hall sensor device (H1) is used after exciting the fluxgate sensor device (F1, F2; F0); H';H") to measure the flux change.
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