TW201507562A - Printed circuit board and method for manufacturing same - Google Patents

Abstract

A printed circuit board includes a first dielectical layer, a first trace layer , a metal bump, and a second dielectical layer. The first dielectrical layer connects with the second dilelctrical layer. The first dielectical layer includes a first surface far away the first dielectrical layer. The first trace layer is formed between the first dielectrical layer and the second dielectrical layer. The metal bump connects with and extends from the first trace layer, and run through the first surface of the first dielectical layer. The present disclosure also provides a method for manufacturing the same.

Description

Circuit board and manufacturing method thereof

The present invention relates to the field of circuit board manufacturing, and in particular to a circuit board having metal bumps and a manufacturing method thereof.

When assembling a circuit board with other electronic components, it is usually necessary to make metal bumps on the outer conductive line side of the circuit board. The metal bumps are corresponding to the electrical contact pads of the electronic component, and the circuit board and the electronic component are assembled by soldering. In the prior art, the method for manufacturing the metal bump includes the steps of: first covering the outer layer A first opening is formed in the solder resist layer of the surface of the conductive trace such that the electrical contact pads in the conductive trace layer are exposed. Then, a photoresist pattern layer is formed on the surface of the solder resist layer, and a second opening corresponding to the first opening is formed in the photoresist pattern layer. In order to enable the second opening to fully expose the first opening, the size of the second opening needs to be larger than the size of the first opening. Finally, a conductive metal is filled in the first opening and the second opening in a similar manner to the fabrication of the conductive trace. After the photoresist pattern layer is removed, the fill metal protrudes from the solder resist layer to form metal bumps.

Then, the above method is required for secondary alignment, and the gap of the metal bumps is difficult to be reduced, which is disadvantageous for the fabrication of densely arranged metal bumps. In addition, since the electrical contact pads of the conductive lines and the metal bumps are formed separately, they are not integrally formed. Thus, after the package is completed, stress tends to concentrate at the structural interface, which will cause the electrical contact pads and the metal bumps to separate from each other.

Therefore, it is necessary to provide a circuit board and a method thereof, and a circuit board having densely distributed metal bumps can be obtained.

A circuit board includes a first dielectric layer, a first conductive circuit layer, a metal bump, and a second dielectric layer, wherein the first dielectric layer and the second dielectric layer are connected to each other, the first dielectric layer Having a first surface away from the second dielectric layer, the first conductive circuit layer is formed between the first dielectric layer and the second dielectric layer, the metal bumps are integrally connected by the first conductive circuit layer And protruding from the first surface of the first dielectric layer.

A method for manufacturing a circuit board, comprising the steps of: providing a carrier board; pressing a first dielectric layer on a surface of the carrier board to obtain a multi-layer substrate; forming a first blind hole in the multi-layer substrate, the first blind a hole penetrating through the first dielectric layer and extending into the carrier; forming a metal bump in the first blind hole, and forming a first conductive circuit layer on a surface of the first dielectric layer, the metal The bump is integrally formed with the first conductive circuit layer; the second dielectric layer is pressed on the side of the first conductive circuit layer; and the carrier is removed to obtain a circuit board.

A method of manufacturing a circuit board, comprising the steps of: providing a carrier plate and a first copper foil, the first copper foil being formed on one surface of the carrier plate, the carrier plate for supporting the first copper foil; Forming a first dielectric layer on the surface of the first copper foil to obtain a multilayer substrate; forming a first blind via in the multilayer substrate, the first blind via penetrating the first dielectric layer and the first copper foil Extending into the carrier; forming a metal bump in the first blind via, and forming a first conductive circuit layer on a surface of the first dielectric layer, the metal bump and the first conductive circuit layer being integrally formed And pressing the second dielectric layer on one side of the first conductive circuit layer; and removing the carrier and the first copper foil to obtain a circuit board.

The circuit board provided by the technical solution and the manufacturing method thereof, the metal bumps are fabricated simultaneously with the first conductive circuit layer by electroplating. In this way, more metal bumps can be placed in the same board area, which makes the circuit board distribution more dense. Moreover, since the metal bumps are integrally formed with the first conductive circuit layer, the metal bumps are closely connected to the first conductive circuit layer, and the metal bumps due to stress during the packaging process are prevented from being separated from the first conductive circuit layer.

100‧‧‧ boards

110‧‧‧ Carrier Board

120‧‧‧First copper foil

130‧‧‧First dielectric layer

140‧‧‧Multilayer substrate

141‧‧‧ first blind hole

142‧‧‧Metal bumps

150‧‧‧First conductive circuit layer

160‧‧‧Second dielectric layer

162‧‧‧ second blind hole

161‧‧‧ Conductive blind holes

170‧‧‧Second conductive circuit layer

171‧‧‧Electrical contact pads

180‧‧‧ solder mask

181‧‧‧ openings

190‧‧‧Protective layer

101‧‧‧ first surface

102‧‧‧ second surface

1 is a schematic cross-sectional view of a first copper foil and a carrier plate provided by an embodiment of the present technical solution.

2 is a schematic cross-sectional view showing the surface of the first copper foil of FIG. 1 with a dielectric layer laminated to form a multilayer substrate.

3 is a schematic cross-sectional view showing the first blind via hole formed in the multilayer substrate of FIG. 2.

4 is a cross-sectional view showing the formation of a metal bump in the first blind via hole of FIG. 3 and forming a first conductive wiring layer on the surface of the first dielectric layer.

FIG. 5 is a cross-sectional view showing the second dielectric layer being pressed on the side of the first conductive wiring layer of FIG. 4. FIG.

6 is a schematic cross-sectional view showing the formation of a first blind via in the second dielectric layer of FIG. 5.

FIG. 7 is a schematic cross-sectional view showing the second conductive wiring layer formed on the surface of the second dielectric layer of FIG. 6. FIG.

FIG. 8 is a schematic cross-sectional view showing the surface of the second conductive wiring layer of FIG. 7 after the solder resist layer is formed.

FIG. 9 is a cross-sectional view of FIG. 8 after removing the carrier and the first copper foil.

FIG. 10 is a schematic cross-sectional view of a circuit board fabricated by the present technical solution.

The circuit board manufacturing method provided by the technical solution includes the following steps:

In the first step, referring to FIG. 1, the carrier 110 and the first copper foil 120 are provided.

The carrier 110 is used to support the first copper foil 120. The first copper foil 120 is a thin copper foil, and the first copper foil 120 has a thickness of 2 micrometers to 5 micrometers. The carrier 110 is made of a metal material different from the material of the first copper foil 120 or made of a non-metal material. The metal carrier 110 has sufficient mechanical strength to support the first copper foil 120.

In the second step, referring to FIG. 2, the first dielectric layer 130 is pressed on the surface of the first copper foil 120. The carrier 110, the first copper foil 120 and the first dielectric layer 130 together form a multilayer substrate. 140.

The first dielectric layer 130 may be formed by pre-curing a film on the surface of the first copper foil 120.

In the third step, referring to FIG. 3, a plurality of first blind holes 141 are formed in the multilayer substrate 140.

In this embodiment, the carrier 110 is made of aluminum. The first blind hole 141 may be formed by laser ablation. The first blind hole 141 extends from the side of the first dielectric layer 130 of the multilayer substrate 140 to the inside of the carrier 110. That is, the first blind via 141 penetrates through the first dielectric layer 130, the first copper foil 120, and a portion of the carrier 110. In this embodiment, since the plurality of first blind holes 141 are formed by laser ablation, the cross-sectional area of the first blind hole 141 on the open end of the first dielectric layer 130 is larger than that located inside the carrier 110. The cross-sectional area of the bottom end. The shape of the longitudinal section of the first blind hole 141 is trapezoidal.

In the fourth step, referring to FIG. 4, a metal bump 142 is formed in the first blind via 141, and a first conductive trace layer 150 is formed on the surface of the first dielectric layer 130. The metal bump 142 is The first conductive wiring layer 150 electrically connected thereto is integrally formed.

The metal bumps 142 and the first conductive wiring layer 150 may be fabricated by a semi-additive method. Specifically, the plating seed layer may be formed on the inner wall of the first blind via 141 and the surface of the first dielectric layer 130 by electroless plating or the like. Then, a photoresist pattern layer is formed on the surface of the plating seed layer such that each of the first blind vias 141 is exposed, and a surface of the plating seed layer of the first dielectric layer 130 is formed and first conductive The shape of the circuit layer 150 is complementary to the photoresist pattern. Next, each of the first blind vias 141 is completely filled to form the metal bumps 142 by electroplating, and the first conductive wiring layer 150 is formed in the voids of the photoresist pattern. Finally, the photoresist pattern is removed and the electroplated seed layer covered by the photoresist pattern is removed by etching.

Since the first conductive wiring layer 150 is formed simultaneously with the metal bumps 142, the metal bumps 142 are integrally formed with the first conductive wiring layer 150 connected thereto.

In the fifth step, referring to FIG. 5, the second dielectric layer 160 is pressed on the side of the first conductive circuit layer 150.

This step can form the second dielectric layer 160 in the same manner as the second step.

In the sixth step, referring to FIG. 6 and FIG. 7, a second conductive circuit layer 170 is formed on the surface of the second dielectric layer 160.

In this step, a conductive via hole 161 is also formed in the second dielectric layer 160 such that the first conductive wiring layer 150 and the second conductive wiring layer 170 are in electrical communication with each other. This step can be specifically accomplished by the following methods:

First, a plurality of second blind vias 162 are formed in the second dielectric layer 160.

The second blind hole 162 may be formed by laser ablation.

Then, in the same manner as the fabrication of the metal bumps 142 and the first conductive wiring layer 150, the conductive vias are filled in the second blind vias 162 to form conductive vias 161, and a second surface is formed on the surface of the second dielectric layer 160. The conductive circuit layer 170, the first conductive circuit layer 150 and the second conductive circuit layer 170 are electrically connected to each other through the conductive blind vias 161.

In the seventh step, referring to FIG. 8, a solder resist layer 180 is formed on the surface of the second conductive wiring layer 170.

In this step, the solder resist layer 180 can be formed by printing liquid solder resist ink. A plurality of openings 181 are formed in the solder resist layer 180, and the conductive lines in the portion of the second conductive wiring layer 170 are exposed from the openings 181 to form the electrical contact pads 171.

In the eighth step, please refer to FIG. 9 together to remove the carrier 110 and the first copper foil 120.

In this embodiment, the carrier 110 is made of aluminum. In this step, the carrier 110 can be removed by chemical etching.

When the carrier 110 is made of a non-metallic material such as a resin or the like, it can be removed by dissolution with a chemical solvent.

After the carrier 110 is removed, the first copper foil 120 may be removed by etching. Since the thickness of the first copper foil 120 is small, the first copper foil 120 can be removed with a shorter etching time, while the metal bumps 142 remove only a small portion.

When the carrier 110 is removed, the metal bumps 142 partially protrude from the first dielectric layer 130.

In the ninth step, referring to FIG. 10, a protective layer 190 is formed on the surface of the metal bump 142 and the surface of the electrical contact pad 171 to obtain the circuit board 100.

The protective layer 190 may be an organic solder mask (OSP) or a nickel gold layer or a nickel palladium gold layer.

It can be understood that only the carrier 110 can be provided in this step without providing the first copper foil 120. Since the first copper foil 120 only plays a more favorable conductive role in the subsequent electroplating process, if the first copper foil 120 is not provided, the formed metal seed layer can function as a conductive. When the first copper foil 120 is not formed on the surface of the carrier 110 in the first step, the first dielectric layer 130 may be directly formed on the surface of the carrier 110. Then, the formed first blind via 141 penetrates through the first dielectric layer 130 and extends into the carrier 110. Also, in the eighth step, it is not necessary to remove the first copper foil 120.

Referring to FIG. 10 , the technical solution further provides a circuit board 100 . The circuit board 100 includes a first dielectric layer 130 , a metal bump 142 , a second dielectric layer 160 , and a first conductive circuit layer 150 .

The first dielectric layer 130 and the second dielectric layer 160 are connected to each other. The first conductive wiring layer 150 is located between the first dielectric layer 130 and the second dielectric layer 160. The first dielectric layer 130 has a first surface 101 away from the second dielectric layer 160 , and the second dielectric layer 160 has a second surface 102 remote from the first dielectric layer 130 . The metal bumps 142 are electrically connected to the first conductive circuit layer 150 and integrally formed, and the metal bumps 142 penetrate the first dielectric layer 130 and protrude from the first surface 101.

The circuit board may further include a second conductive wiring layer 170 and a conductive blind via 161. The second conductive circuit layer 170 is formed on the second surface 102. The conductive via hole 161 is formed in the second dielectric layer 160, and the first conductive circuit layer 150 and the second conductive circuit layer 170 pass through the conductive layer. The blind holes 161 are electrically connected to each other.

The circuit board 100 may further include a solder resist layer 180 formed on the surface of the second conductive wiring layer 170 and the second surface 102. An opening 181 is formed in the solder resist layer 180. A conductive line of a portion of the second conductive wiring layer 170 is exposed from the opening 181 to form an electrical contact pad 171.

The circuit board 100 may further include a protective layer 190 formed on the surface of the electrical contact pads 171 and the metal bumps 142.

When packaged with other electronic components, the metal bumps 142 can be used for soldering with other electronic components through solder balls.

The circuit board provided by the technical solution and the manufacturing method thereof, the metal bumps are fabricated simultaneously with the first conductive circuit layer by electroplating. In this way, more metal bumps can be placed in the same board area, which makes the circuit board distribution more dense. Moreover, since the metal bumps are integrally formed with the first conductive wiring layer, the metal bumps are closely connected to the first conductive wiring layer. After the package is completed, the stress is likely to concentrate on the boundary between the metal bump and the first conductive line, and the metal bump is separated from the first conductive circuit layer.

It can be understood that the circuit board manufacturing method of the present technical solution can be applied to the fabrication of a high density interconnect circuit board (HDI).

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

no

100‧‧‧ boards

130‧‧‧First dielectric layer

142‧‧‧Metal bumps

150‧‧‧First conductive circuit layer

160‧‧‧Second dielectric layer

170‧‧‧Second conductive circuit layer

171‧‧‧Electrical contact pads

180‧‧‧ solder mask

190‧‧‧Protective layer

101‧‧‧ first surface

102‧‧‧ second surface

Claims (10)

A circuit board includes a first dielectric layer, a first conductive circuit layer, a metal bump, and a second dielectric layer, wherein the first dielectric layer and the second dielectric layer are connected to each other, the first dielectric layer Having a first surface away from the second dielectric layer, the first conductive circuit layer is formed between the first dielectric layer and the second dielectric layer, and the metal bumps are integrally connected by the first conductive circuit layer And protruding from the first surface of the first dielectric layer. The circuit board of claim 1, further comprising a second conductive circuit layer, the second dielectric layer having a second surface away from the first dielectric layer, the second conductive circuit layer Formed on the second surface. The circuit board of claim 2, further comprising a conductive via hole, the conductive via hole being formed in the second dielectric layer, wherein the first conductive circuit layer and the second conductive circuit layer pass through The conductive blind holes are electrically connected to each other. The circuit board of claim 2, wherein the second conductive circuit layer and the second surface are formed with a solder resist layer, the solder resist layer has an opening therein, and a portion of the second conductive circuit layer is from the opening Exposed to form an electrical contact pad. The circuit board of claim 4, wherein the surface of the electrical contact pad and the surface of the metal bump are formed with a protective layer. A circuit board manufacturing method includes the steps of:
Providing a carrier board;
Pressing a first dielectric layer on a surface of the carrier to obtain a multilayer substrate;
Forming a first blind via in the multilayer substrate, the first blind via extending through the first dielectric layer and extending into the carrier;
Forming a metal bump in the first blind hole, and forming a first conductive circuit layer on a surface of the first dielectric layer, the metal bump being integrally formed with the first conductive circuit layer;
Pressing a second dielectric layer on one side of the first conductive circuit layer; and removing the carrier to obtain a circuit board. The method of fabricating a circuit board according to claim 6, wherein after the second dielectric layer is pressed on the side of the first conductive circuit layer, the second dielectric layer is further away from the first dielectric layer. The surface forms a second conductive wiring layer. The method of fabricating a circuit board according to claim 7, wherein, when the second conductive circuit layer is formed, a conductive via hole is formed in the second dielectric layer, the first conductive circuit layer and the second conductive layer The conductive circuit layers are in electrical communication with each other through the conductive vias. A circuit board manufacturing method includes the steps of:
Providing a carrier plate and a first copper foil, the first copper foil being formed on one surface of the carrier plate, the carrier plate for supporting the first copper foil;
Pressing the first dielectric layer on the surface of the first copper foil to obtain a multilayer substrate;
Forming a first blind via in the multi-layer substrate, the first blind via extending through the first dielectric layer and the first copper foil and extending into the carrier;
Forming a metal bump in the first blind hole, and forming a first conductive circuit layer on a surface of the first dielectric layer, the metal bump being integrally formed with the first conductive circuit layer;
Pressing the second dielectric layer on one side of the first conductive circuit layer; and removing the carrier and the first copper foil to obtain a circuit board. The method of fabricating a circuit board according to claim 9, wherein after the second dielectric layer is pressed on the side of the first conductive circuit layer, the second dielectric layer is further away from the first dielectric layer. Forming a second conductive circuit layer on the surface, and forming a conductive blind hole in the second dielectric layer, wherein the first conductive circuit layer and the second conductive circuit layer are electrically connected to each other through the conductive blind hole.