TW201506409A - Probe card for circuit-testing - Google Patents

Abstract

A probe card for circuit-testing includes a testing PCB; a probe head having a plurality of probes provided with a fine pitch arrangement and held inside; and a silicon interposer substrate for conveying signals between said probes and said test PCB. Wherein the interconnection of said silicon interposer substrate is formed by utilizing the through-silicon via process; a plurality of upper terminals and a plurality of lower terminals are respectively array-arranged on the top surface and the bottom surface of said silicon interposer substrate; the pitch between the upper terminals is larger than the pitch between the lower terminals; and the pitch between adjacent lower terminals is equal to the fine pitch of the arrangement of probes.

Description

Circuit test probe card

The present invention relates to an integrated circuit testing device, and more particularly to a circuit testing probe card structure.

In the manufacturing process of semiconductor products, wafer testing refers to the technology of circuit testing semiconductor integrated circuits on a wafer to ensure the normal operation of the circuit and to know the yield of the product. Among them, automatic test equipment (ATE) is used to form a temporary electrical connection between the integrated circuits on the wafer to verify the normal electrical characteristics of the integrated circuit. In the wafer test, the probe card device is used to transmit signals to the integrated circuit.

A conventional circuit test probe card includes a printed circuit board (PCB), a substrate, and a probe head. The test needle set includes a plurality of test probes having elasticity thereon, and the substrate is used to electrically connect the plurality of test probes to the PCB. In general, the substrate can be classified into a multi-layer organic (MLO) or multi-layer ceramic (MLC) interconnect substrate. The test probe is in electrical contact with an electrical connection (or die contact pad) of a device on the wafer.

In the probe card, a plurality of electrical contacts between the electrical contacts on the substrate are used to convert very small pitches (usually in the test needle set) into larger pitches, so that the PCB in the assembly It can be manufactured with this large spacing.

However, with the continuous improvement of semiconductor technology, how to reduce the size of the wafer and increase its computing and storage functions is the main goal of future development, but it is allowed to use with this trend. For smaller pitches, probe testing requirements will face ultra fine pitch, area array testing, high pin counts, high touchdown, and low cost ( Low cost) and other challenges. For example, depending on current MLO or MLC interconnect substrate fabrication techniques, it may not be possible to keep up with the corresponding advances if more electrical contacts are to be placed in a smaller space. Therefore, as the minimum spacing is reduced, the technology to be achieved and the cost to be paid are relatively increased.

In order to solve the above problems, one of the objects of the present invention is to provide a circuit test probe card having a tantalum interposer having an interconnect structure formed by a through-pass boring process, so that the pitch can be effectively connected by the circuit board. The pitch of the dots is directly reduced to a fine pitch.

A circuit test probe card according to an embodiment of the invention includes: a test circuit board; a probe head fixed to the bottom side of the test circuit board and the probe head having a plurality of fine pitches The probe is held therein; an interposer substrate is used to transmit signals between the plurality of probes and the test circuit board. Wherein, the interconnection of the interposer substrate is formed by a through-silicon via (TSV) process; a plurality of upper contacts and a plurality of lower contacts are respectively arranged in an array. The upper surface and the lower surface of the substrate; the spacing between the plurality of upper contacts is greater than the spacing between the plurality of lower contacts; and the spacing between adjacent plurality of lower contacts corresponds to a fine pitch of the plurality of probes; And a circuit board is disposed on the lower surface of the test circuit board for electrically connecting the 矽 interposer substrate and the test circuit board, wherein an anisotropic conductive film is used for electrically connecting the 矽 interposer substrate and the sub-substrate board.

The purpose, technical contents, features, and effects achieved by the present invention will become more apparent from the detailed description of the appended claims.

The detailed description is as follows, and the preferred embodiment is not intended to limit the invention.

Referring to FIG. 1 , a circuit test probe card according to an embodiment of the present invention mainly includes a test circuit board 100 , a probe head 110 , and a silicon interposer substrate 120 . The probe 112 can be used to make electrical connections to a plurality of contact pads or terminals on a semiconductor wafer on a wafer for access to the test. The probe head 110 is fixed to the bottom side of the test circuit board 100 and the probe head 110 has a plurality of probes 112 disposed therein at a fine pitch. The interposer substrate 120 is used to transmit signals between the probe 112 and the test circuit board 100. In the present invention, the interconnection of the germanium interposer 120 is formed by a through-silicon via (TSV) process, thereby supporting the fabrication of a probe 112 that can be matched to a fine pitch. Then, the interposer substrate 120.

Following the above description, referring to FIG. 1 and FIG. 2A simultaneously, a plurality of upper contacts 122 and a plurality of lower contacts 124 are respectively arrayed on the upper surface and the lower surface of the interposer substrate 120. The spacing (H) between the upper contacts 122 is greater than the spacing (h) between the lower contacts 124. The spacing (h) between adjacent lower contacts 124 corresponds to the fine pitch of the probes 122. In one embodiment, each spacing between adjacent upper contacts 122 is greater than each spacing between adjacent lower contacts 124.

As shown in FIG. 2A, in an embodiment, the germanium interposer substrate 120 includes a germanium substrate 121 and a redistribution layer (RDL) 125. The germanium substrate 121 is formed by using a semiconductor TSV process to form a via hole therein and filling a conductive material to complete the via via conductive structure 123. The rewiring layer 125 is disposed on the upper surface of the ruthenium substrate 121, and the upper contact 122 is disposed on the upper surface of the rewiring layer 125. The upper contact 122 and the through-via via conductive structure 123 are electrically connected through the rewiring layer 125. In this embodiment, the upper contact 122 and the lower contact 124 of the germanium interposer 120 are a metal pad, and the metal pad is transmitted through the through-hole via conductive structure 123 and the rewiring layer of the germanium interposer 120 exposed to the surface. 125 electrical connection.

Referring to FIG. 2B , in an embodiment, the germanium interposer 120 includes a germanium substrate 121 and a re-wiring layer 127 . The rewiring layer 127 is disposed on the lower surface of the ruthenium substrate 121, and the lower contact 124 is disposed on the lower surface of the rewiring layer 127. The lower contact 124 and the through-via via conductive structure 123 are electrically connected through the rewiring layer 127. It can be understood that, as shown in FIG. 2C, the rewiring layers 125, 127 can be respectively disposed on the upper surface and the lower surface of the ruthenium substrate 121 according to different needs. The upper contact 122 and the lower contact 124 are electrically connected to the through-via via conductive structure 123 of the germanium substrate 121 through the rewiring layers 125 and 127.

As shown in FIG. 3, the tantalum substrate 120 (such as a tantalum wafer) can be formed by using a tantalum perforation and filling a conductive material to form a through-perforated conductive structure 123. It can be understood that the filling of the conductive material is not limited to the filling method, but can be applied and matched with various semiconductor processes, such as metal chemical vapor deposition, electroplating, grinding and the like. Thereafter, a rewiring layer 125 is formed on the upper surface of the germanium substrate 121. The rewiring layer 125 is formed using a semiconductor process such as deposition, photolithography, etching, etc. to form the rewiring layer 125 and the conductive traces 129 therein. The invention can produce an interconnect structure of the 矽 interposer substrate 120 according to the requirements of the semiconductor bulk volume circuit (3D-IC) process technology. Those skilled in the art should be able to understand that the fabrication methods and processes for forming interconnects, rewiring layers and contacts using TSV technology include many semiconductor-related process technologies, and the process variations are not so much described here.

In an embodiment, as shown in FIG. 1 , the electrical connection between the germanium interposer 120 and the test circuit board 100 can be performed by placing a plurality of solder balls 130 or a plurality of bumps on the contacts 122 of the germanium interposer 120 . Used to electrically connect to the test circuit board 100. In another embodiment, the electrical connection between the germanium interposer 120 and the test circuit board 100 can be further used to electrically connect the test circuit board 100 and the germanium interposer 120, as shown in FIG. 4A. .

Continuing, please refer to FIG. 4B. In an embodiment, the electrical connection between the cymbal substrate 120 and the test circuit board 100 can be electrically connected to the test circuit board 100 by using a pogo-pin connector 133. Interposer substrate 120. The pogo-pin connector 133 is basically a socket connector composed of a housing 134 and a plurality of pogo-pins 135. The cymbal substrate 120 is inserted into the socket structure of the housing 134 of the spring connector 133, and is electrically connected to the test circuit board 100 through the electrical contact of the spring probe 135.

In an embodiment, a sub-PCB 111 may be additionally disposed between the test circuit board 100 of the circuit test probe card and the interposer substrate 120 for electrically connecting the test circuit board 100 and the interposer. The substrate 120 is as shown in FIG. 5A. A plurality of solder balls 136 or a plurality of bumps are disposed on the upper surface of the interposer substrate 120 for electrically connecting with the sub-substrate board 111, as shown in FIG. 5A. Shown. Moreover, in an embodiment, the secondary circuit board 111 and the germanium interposer 120 can be electrically connected by an anisotropic conductive film 138, as shown in FIG. 5B.

Referring to the above description, please refer to FIG. 6A and FIG. 6B. In an embodiment, the spring-type connector 133' can also electrically connect the test circuit board 100 to the secondary circuit board 111. The secondary circuit board 111 is inserted into the socket structure of the housing 134' of the spring type connector 133', and is electrically connected to the test circuit board 100 through the electrical contact of the spring probe 135'. The electrical connection between the secondary circuit board 111 and the germanium interposer 120 can be electrically connected by solder balls 137, bumps or anisotropic conductive films 139, as shown in FIGS. 6A and 6B.

The use of the secondary circuit board 111 is optional. The spacing of the plurality of contacts adjacent to the upper surface of the secondary circuit board 111 is greater than the spacing of the plurality of contacts corresponding to the lower surface of the secondary circuit board 111, as shown in FIG. 6A. Figure 6B shows. It can be understood that the spacing of the plurality of contacts adjacent to the upper surface of the secondary circuit board 111 can also be equal to the spacing of the plurality of contacts corresponding to the lower surface of the secondary circuit board 111 (not shown). As such, when the contact pitch between the test board 100 of the predetermined specification and the interposer substrate 120 is difficult to match or other requirements, the secondary circuit board 111 can be used as an intermediary between the test circuit board 100 and the interposer substrate 120. Substrate. Alternatively, when the selection of the spring-type connector (133, 133') of a predetermined specification cannot match the size of the cymbal substrate 120, the secondary circuit board 111 can also serve as a spring-type connector (133, 133'). A bridge of the substrate 120.

In the present invention, the 矽 interposer substrate is used to transmit signals between the probe and the test circuit board. As the wafer test point spacing on the wafer continues to shrink to fine pitch, the probe settings are quickly reduced to fine pitch. The pitch of the pads of a typical multilayer organic or multilayer ceramic interconnect substrate has its limits and cannot be achieved. The invention utilizes a through-silicon via (TSV) process to form a tantalum interposer which can effectively respond to the trend of matching the spacing.

Referring to FIG. 7, in an embodiment, the circuit test probe card of the present invention may be provided with a fixing ring 140 for fixing the probe head 110 to the bottom side of the test circuit board 100 in response to different structural designs. In an embodiment, a reinforcing pad 150 may also be provided to stabilize and increase the strength of the circuit board to prevent deformation in a high temperature or external force environment. In one embodiment, the probe head 110 includes a fixing portion 114 for holding the probe 112.

In the present invention, since the germanium interposer is fabricated by applying semiconductor technology, the main material of the germanium interposer is germanium or other semiconductor wafer material. The material of the secondary circuit board may be a ceramic material or a related material applied to the circuit board, such as FR-4, FR-5 or BP.

According to the above description, the present invention is characterized in that the tantalum interposer fabricated by TSV can effectively reduce the pitch from the pitch range of the board contacts to the fine pitch. Therefore, when the test point spacing of the object to be tested is continuously reduced, the interposer substrate of the present invention can be matched to allow the circuit probe test card to test the test points after the pitch is reduced. Therefore, in combination with the above description, the circuit test probe card of the present invention can effectively solve the problem of correspondence when the test points of the object to be tested are reduced, and provide a circuit test probe card which can test the test points of the reduced pitch.

The embodiments described above are merely illustrative of the technical spirit and the features of the present invention, and the objects of the present invention can be understood by those skilled in the art, and the scope of the present invention cannot be limited thereto. That is, the equivalent variations or modifications made by the spirit of the present invention should still be included in the scope of the present invention.

100‧‧‧Test circuit board
111‧‧‧Secondary circuit board
110‧‧‧ probe head
112‧‧‧Probe
114‧‧‧ fixed department
120‧‧‧矽Intermediate substrate
121‧‧‧矽 substrate
122‧‧‧Contacts
123‧‧‧through through-hole perforated conductive structure
124‧‧‧Contacts
125‧‧‧Rewiring layer
127‧‧‧Rewiring layer
129‧‧‧Wire line
130‧‧‧ solder balls
132‧‧‧ anisotropic conductive film
133‧‧‧Spring type connector
133'‧‧‧Spring Connector
134‧‧‧shell
134'‧‧‧Shell
135‧‧ ‧spring probe
135'‧‧‧ Spring Probe
136‧‧‧ solder balls
137‧‧‧ solder balls
138‧‧‧ anisotropic conductive film
139‧‧‧ anisotropic conductive film
140‧‧‧Fixed ring
150‧‧‧Enhanced mat
H‧‧‧ spacing
H‧‧‧ spacing

Figure 1 is a schematic illustration of an embodiment of the invention. 2A, 2B and 2C are schematic views of different embodiments of the present invention. Figure 3 is a schematic illustration of an embodiment of the invention. 4A and 4B are schematic views of different embodiments of the present invention. 5A and 5B are schematic views of different embodiments of the present invention. 6A and 6B are schematic views of different embodiments of the present invention. Figure 7 is a schematic illustration of an embodiment of the invention.

100‧‧‧Test circuit board

110‧‧‧ probe head

112‧‧‧Probe

120‧‧‧矽Intermediate substrate

122‧‧‧Contacts

124‧‧‧Contacts

130‧‧‧ solder balls

Claims (8)

A circuit test probe card comprising: a test circuit board; a probe head fixed to a bottom side of the test circuit board and having a plurality of probes held at a fine pitch The interposer substrate is used to transmit signals between the plurality of probes and the test circuit board, wherein the interconnecting of the interposer substrate is through-silicon via (through-silicon) Via, TSV) process; a plurality of upper contacts and a plurality of lower contacts are respectively arrayed on the upper surface and the lower surface of the cymbal interposer; the spacing between the plurality of upper contacts is greater than the plurality The spacing between the lower contacts; and the spacing between the adjacent plurality of lower contacts is equivalent to the fine pitch of the plurality of probes; and the primary circuit board is disposed on the lower surface of the test circuit board for electrical Connecting the cymbal interposer substrate and the test circuit board, wherein an anisotropic conductive film is used to electrically connect the cymbal interposer substrate and the secondary circuit board. The circuit test probe card of claim 1, wherein the germanium interposer comprises: a germanium substrate having a turn-per-hole conductive structure; and a redistribution layer disposed on the upper surface of the germanium substrate, wherein the plurality of upper layers A contact is disposed on the upper surface of the rewiring layer. The circuit test probe card of claim 1, wherein the germanium interposer comprises: a germanium substrate having a turn-per-hole conductive structure; and a redistribution layer disposed on the lower surface of the germanium substrate, wherein the plurality of lower layers The contacts are disposed on the lower surface of the rewiring layer. The circuit test probe card of claim 1, wherein the germanium interposer comprises: a germanium substrate having a turn-perforated conductive structure; and two re-wiring layers respectively disposed on the upper surface and the lower surface of the germanium substrate, wherein The plurality of upper contacts and the plurality of lower contacts are respectively disposed on an upper surface and a lower surface of the rewiring layer. The circuit test probe card of claim 1, wherein each of the adjacent plurality of upper contacts is greater than each of the adjacent ones of the plurality of lower contacts. The circuit test probe card of claim 1, further comprising a fixing ring for fixing the probe head to the bottom side of the test circuit board. The circuit test probe card of claim 1 further comprising a reinforcing pad for stabilizing the test circuit board. The circuit test probe card of claim 1, wherein the probe head further comprises a fixing portion for holding the plurality of probes.