TW201438085A - Wafer processing method - Google Patents

Wafer processing method Download PDF

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TW201438085A
TW201438085A TW103104580A TW103104580A TW201438085A TW 201438085 A TW201438085 A TW 201438085A TW 103104580 A TW103104580 A TW 103104580A TW 103104580 A TW103104580 A TW 103104580A TW 201438085 A TW201438085 A TW 201438085A
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Taiwan
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wafer
electrodes
dividing
backside
exposed
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TW103104580A
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Chinese (zh)
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TWI595547B (en
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Hiroshi Morikazu
Yohei Yamashita
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Disco Corp
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Abstract

On the back of a wafer having a front side formed thereon a plurality of elements and a backside exposed therefrom electrodes connected with the elements, there is provided a wafer processing method capable of mounting a chip having electrodes corresponding to the exposed electrodes and dicing the wafer along the scribe lines easily. To solve the problem, a wafer processing method is provided, which comprises forming elements in a plurality of regions divided by grid-shaped scribe lines arranged on the front side, exposing electrodes connected with the elements on the wafer backside, mounting a chip provided with electrodes corresponding to the exposed electrodes, and dicing the wafer mounted with chip along the scribe lines. The wafer processing method is characterized by comprising the following processes: a process of forming scribe grooves for forming scribe grooves having a depth equivalent to the complete thickness of the elements along the scribe lines from the side surface of the wafer; a plate bonding process for bonding a plate surface through an adhesive layer to the wafer surface that has been treated by the scribe grooves forming process; a backside-grinding process for grinding the wafer backside that has been treated by the plate bonding process, so that the wafer is formed to have a complete thickness to expose the scribe grooves on the backside, thereby dicing the wafer into individual elements; a chip mounting process with which the chip having electrodes corresponding to those electrodes exposed from the backside of the wafer that has been treated by the backside-grinding process is bonded/mounted to the exposed electrodes; a wafer support process for adhering a dicing tape to the chip side of the wafer backside that has been treated by the chip mounting process, and supporting the periphery of the dicing tape through a ring frame; and a plate stripping process for peeling off the plate bonded to the surface of the wafer that has been treated by the wafer support process.

Description

晶圓之加工方法(四) Wafer processing method (4) 發明領域 Field of invention

本發明是關於一種將於表面形成有複數個元件的晶圓之背面研磨而形成預定厚度的晶圓加工方法。 The present invention relates to a wafer processing method in which a back surface of a wafer having a plurality of elements formed on a surface thereof is ground to form a predetermined thickness.

發明背景 Background of the invention

本導體元件製造程序中,在為大致圓板形狀之半導體晶圓之背面藉由排列為格子狀之稱為分割線之分割預定線區劃複數個區域,並於該經區劃的區域形成IC、LSI等元件。並且,將半導體晶圓沿著分割線切斷藉此分割形成有元件之區域而製造各個半導體元件。這樣被分割的晶圓在沿著分割線切斷之前會藉由研磨裝置研磨而加工成預定厚度。 In the conductor element manufacturing process, a plurality of regions are divided by a predetermined dividing line called a dividing line arranged in a lattice shape on the back surface of a substantially circular disk-shaped semiconductor wafer, and ICs and LSIs are formed in the divided regions. And other components. Further, the semiconductor wafer is cut along the dividing line to divide the region where the element is formed, thereby manufacturing each semiconductor element. The thus-divided wafer is processed to a predetermined thickness by grinding by a polishing device before being cut along the dividing line.

又,伴隨著半導體裝置之大容量化、高密度化提案有將複數個元件積層而構成之積層形半導體套組(例如參考專利文獻2)。 In addition, a multilayer semiconductor package in which a plurality of elements are laminated is proposed in order to increase the capacity and density of the semiconductor device (for example, refer to Patent Document 2).

【先行技術文獻】 [First technical literature]

【專利文獻】 [Patent Literature]

【專利文獻1】特開2002-76167號公報 [Patent Document 1] JP-A-2002-76167

發明概要 Summary of invention

然而,當將晶圓之背面研磨形成為預定厚度並於露出於背面之電極接合元件晶片之電極後,實施沿著分割線分割晶圓之分割程序,但是實施分割程序前要將接合於晶圓之背面之複數個元件晶片側透過切割膠帶支持於環狀框。在於該切割膠帶黏著接合於晶圓之背面的複數個元件晶片側時,或是搬送透過切割膠帶支持於環狀框的晶圓時,有晶圓會破損的問題。又,由於晶圓之外周存在成為端材之大致三角形狀之△晶片,因此沿著切割線加工晶圓時則該△晶片會飛散。因此,為了使△晶片不要飛散會在△晶片的下側安裝暫時性的元件晶片,而有生產性惡化的問題。 However, when the back surface of the wafer is ground to a predetermined thickness and exposed to the electrodes of the electrode bonding element wafer on the back surface, the dividing process of dividing the wafer along the dividing line is performed, but the bonding process is performed before bonding to the wafer. The plurality of component wafer sides on the back side are supported by the ring-shaped frame through the dicing tape. When the dicing tape is adhered to the plurality of element wafer sides on the back surface of the wafer, or when the wafer supported by the dicing tape is supported by the ring frame, the wafer may be damaged. Further, since the Δ wafer having a substantially triangular shape of the end material exists in the outer periphery of the wafer, the Δ wafer is scattered when the wafer is processed along the dicing line. Therefore, in order to prevent the Δ wafer from scattering, a temporary element wafer is mounted on the lower side of the Δ wafer, which has a problem of deterioration in productivity.

本發明是有鑑於上述事實,主要之課題是提供一種晶圓加工方法,可於表面形成有複數個元件且背面露出與該元件連接之電極的晶圓的背面,安裝具有與該電極對應之電極的晶片,並且將晶圓沿著分割線輕易地分割。 The present invention has been made in view of the above circumstances, and a main object of the present invention is to provide a wafer processing method in which a back surface of a wafer having a plurality of elements on its surface and an electrode connected to the surface is exposed on the back surface, and an electrode having the electrode corresponding thereto is mounted. The wafer is easily divided along the dividing line.

為了解決前述主要之技術之課題,根據本發明,提供一種晶圓之加工方法,是在表面藉由排列成格子狀之分割線區劃的複數個區域形成元件,並於背面露出與該元件連接之電極的晶圓的背面,安裝具有與該電極對應之電極的晶片,並且將晶圓沿著分割線分割,該晶圓之加工方 法之特徵在於包含有以下程序:分割溝形成程序,由晶圓之表面側沿著分割線形成深度相當於元件之完成厚度的分割溝;平板接合程序,將平板之表面透過黏著層接合於已實施了該分割溝形成程序之晶圓之表面;背面研磨程序,研磨已實施該平板接合程序之晶圓之背面,將晶圓形成為完成厚度,並且使該分割溝露出於背面,而將晶圓分割成各個元件;晶片安裝程序,將具有與露出於已實施該背面研磨程序之晶圓之背面之該電極對應的電極的晶片與該諸電極接合安裝;晶圓支持程序,於安裝在實施了該晶片安裝程序之晶圓之背面的晶片側,黏著切割膠帶並藉由環狀框支持切割膠帶之外周部;及平板剝離程序,將接合於已實施該晶圓支持程序之晶圓之表面的平板剝離。 In order to solve the problems of the above-mentioned main technology, according to the present invention, a method for processing a wafer is provided in which a plurality of regions are formed on a surface by dividing lines arranged in a lattice shape, and are exposed on the back surface to be connected to the device. a wafer having an electrode corresponding to the electrode is mounted on the back surface of the electrode of the electrode, and the wafer is divided along the dividing line, and the wafer is processed The method includes the following procedure: a dividing groove forming process, wherein a dividing groove having a depth corresponding to a completed thickness of the element is formed along a dividing line from a surface side of the wafer; and a flat bonding process is used to bond the surface of the flat plate to the surface through the adhesive layer a surface of the wafer on which the dividing groove forming process is performed; a back grinding process of polishing the back surface of the wafer on which the flat bonding process is performed, forming the wafer to a completed thickness, and exposing the dividing groove to the back surface, and crystallizing The wafer is divided into individual components; the wafer mounting process is to bond the wafer having the electrode corresponding to the electrode exposed on the back surface of the wafer on which the back grinding process has been performed, and the electrodes; the wafer support program is installed in the implementation The wafer side of the wafer on the back side of the wafer mounting process, the dicing tape is adhered and the outer periphery of the dicing tape is supported by the annular frame; and the flat stripping process is bonded to the surface of the wafer on which the wafer support program has been implemented The flat stripped.

前述分割溝形成程序是藉由以切削刀片沿著切割線切削而形成分割溝。 The dividing groove forming process is to form a dividing groove by cutting the cutting blade along the cutting line.

又,前述分割溝形成程序是藉由沿著切割線照射雷射光線而形成分割溝。 Further, the dividing groove forming program forms the dividing groove by irradiating the laser beam along the cutting line.

本發明之晶圓加工方法中,由於包含有:分割溝形成程序,由晶圓之表面側沿著分割線形成深度相當於元件之完成厚度的分割溝;平板接合程序,將平板之表面透 過黏著層接合於已實施了該分割溝形成程序之晶圓之表面;背面研磨程序,研磨已實施該平板接合程序之晶圓之背面,將晶圓形成為完成厚度之厚度,並且使該分割溝露出於背面,而將晶圓分割成各個元件;晶片安裝程序,將具有與露出於已實施該背面研磨程序之晶圓之背面之電極對應的電極的晶片與該諸電極接合安裝;晶圓支持程序,於安裝在實施了該分割程序之晶圓之晶片側黏著切割膠帶並藉由環狀框支持切割膠帶之外周部;及平板剝離程序,將接合於已實施該晶圓支持程序之晶圓之表面的平板剝離,因此由於晶圓是在黏著於切割膠帶前以接合於平面的狀態藉由研磨背面露出分割溝來分割為各個元件,因此可消除黏著於切割膠帶時破損的問題。 In the wafer processing method of the present invention, since the dividing groove forming process is included, a dividing groove having a depth corresponding to the completed thickness of the element is formed along the dividing line from the surface side of the wafer; and the surface of the flat plate is transparent through the flat bonding process. The over-adhesive layer is bonded to the surface of the wafer on which the dividing groove forming process has been performed; the back grinding process is performed to polish the back surface of the wafer on which the flat bonding process has been performed, the wafer is formed to have a thickness of the finished thickness, and the division is performed The trench is exposed on the back side, and the wafer is divided into individual components; the wafer mounting process is to bond the wafer having the electrode corresponding to the electrode exposed on the back surface of the wafer on which the back grinding process has been performed, and the electrodes; a supporting program for attaching a dicing tape to a wafer side mounted on a wafer on which the dividing process is performed and supporting a peripheral portion of the dicing tape by a ring frame; and a flat stripping process to be bonded to the crystal having implemented the wafer supporting program Since the flat surface of the round surface is peeled off, since the wafer is bonded to the flat surface before being bonded to the dicing tape, the dividing groove is formed by polishing the back surface to be divided into the respective elements, so that the problem of breakage when the dicing tape is adhered can be eliminated.

又,藉由研磨晶圓之背面露出分割溝而將晶圓分割成各個元件之背面研磨程序,由於是在晶圓之表面接合於平板之狀態下實施,因此分割之時△晶片不會飛散,故沒有必要安裝暫時性之元件晶片而可提高生產性。 Further, since the back surface polishing process for dividing the wafer into individual elements by exposing the division grooves on the back surface of the wafer is performed by bonding the surface of the wafer to the flat surface, the Δ wafer does not scatter at the time of division. Therefore, it is not necessary to install a temporary component wafer to improve productivity.

2‧‧‧半導體晶圓 2‧‧‧Semiconductor wafer

2a‧‧‧半導體晶圓之表面 2a‧‧‧ Surface of semiconductor wafer

2b‧‧‧半導體晶圓之背面 2b‧‧‧Back of semiconductor wafer

3‧‧‧切削裝置 3‧‧‧Cutting device

4‧‧‧雷射加工裝置 4‧‧‧ Laser processing equipment

5‧‧‧平板 5‧‧‧ tablet

5a‧‧‧平板之表面 5a‧‧‧ Surface of the plate

5b‧‧‧平板之背面 5b‧‧‧The back of the tablet

6‧‧‧研磨裝置 6‧‧‧ grinding device

7‧‧‧晶片安裝裝置 7‧‧‧ wafer mounting device

8‧‧‧環狀框 8‧‧‧ ring frame

9‧‧‧元件分離裝置 9‧‧‧Component separation device

21‧‧‧切割線 21‧‧‧ cutting line

22‧‧‧元件 22‧‧‧ components

23、251‧‧‧電極 23, 251‧‧‧ electrodes

25‧‧‧晶片 25‧‧‧ wafer

31‧‧‧切削裝置之夾頭台 31‧‧‧Clamping device chuck

32‧‧‧切削手段 32‧‧‧ Cutting means

33‧‧‧拍攝手段 33‧‧‧Photographing means

41‧‧‧夾頭台 41‧‧‧ chuck table

42‧‧‧雷射光線照射手段 42‧‧‧Laser light exposure

43‧‧‧拍攝手段 43‧‧‧Photographing means

50‧‧‧黏著層 50‧‧‧Adhesive layer

61‧‧‧夾頭台 61‧‧‧ chuck table

62‧‧‧研磨手段 62‧‧‧ grinding means

71‧‧‧晶片安裝裝置之夾頭台 71‧‧‧Clamping station for wafer mounting device

80‧‧‧切割膠帶 80‧‧‧ cutting tape

91‧‧‧框保持手段 91‧‧‧ box keeping means

92‧‧‧膠帶擴張手段 92‧‧‧ Tape expansion means

93‧‧‧拾取器 93‧‧‧ Picker

210‧‧‧分割溝 210‧‧‧dividing trench

321‧‧‧主軸套 321‧‧‧Spindle sleeve

322‧‧‧旋轉主軸 322‧‧‧Rotating spindle

323‧‧‧切削刀片 323‧‧‧Cutting inserts

422‧‧‧集光器 422‧‧‧ concentrator

621‧‧‧主軸套 621‧‧‧Spindle sleeve

622‧‧‧旋轉主軸 622‧‧‧Rotating spindle

623‧‧‧安裝件 623‧‧‧Installation

624‧‧‧研磨輪 624‧‧‧ grinding wheel

625‧‧‧基台 625‧‧‧Abutment

626‧‧‧研磨砥石 626‧‧‧ grinding diamonds

627‧‧‧緊固螺栓 627‧‧‧ fastening bolts

911‧‧‧框保持構件 911‧‧‧ frame holding member

911a‧‧‧載置面 911a‧‧‧Loading surface

912‧‧‧夾鉗 912‧‧‧ clamp

921‧‧‧擴張鼓輪 921‧‧‧Expanding drum

922‧‧‧支持凸緣 922‧‧‧Support flange

923‧‧‧之持手段 923‧‧‧ means

923a‧‧‧汽缸 923a‧‧ ‧ cylinder

923b‧‧‧活塞桿 923b‧‧‧ piston rod

61a、624a、624b、634b、322a、 61a, 624a, 624b, 634b, 322a,

X、Y‧‧‧箭頭 X, Y‧‧‧ arrows

P‧‧‧集光點 P‧‧‧Light spot

S‧‧‧間隙 S‧‧‧ gap

圖1(a)、(b)是做為以本發明之晶圓加工方法所分割之晶圓的半導體晶圓的透視圖。 1(a) and 1(b) are perspective views of a semiconductor wafer as a wafer divided by the wafer processing method of the present invention.

圖2(a)、(b)是顯示本發明之晶圓之加工方法中之分割溝形成程序之說明圖。 2(a) and 2(b) are explanatory views showing a dividing groove forming program in the method of processing a wafer of the present invention.

圖3(a)、(b)是顯示本發明之晶圓之加工方法中之分割溝形成程序之其他實施型態之說明圖。 3(a) and 3(b) are explanatory views showing other embodiments of the dividing groove forming program in the method of processing a wafer of the present invention.

圖4(a)、(b)是顯示本發明之晶圓加工方法中之平板接合 程序的說明圖。 4(a) and 4(b) are diagrams showing the bonding of the wafer in the wafer processing method of the present invention. An illustration of the program.

圖5(a)~(c)是顯示本發明之晶圓加工方法中之背面研磨程序的說明圖。 5(a) to 5(c) are explanatory views showing a back grinding process in the wafer processing method of the present invention.

圖6(a)、(b)是顯示本發明之晶圓加工方法中之晶片安裝程序的說明圖。 6(a) and 6(b) are explanatory views showing a wafer mounting procedure in the wafer processing method of the present invention.

圖7是顯示本發明之晶圓加工方法中之晶片支持程序之說明圖。 Fig. 7 is an explanatory view showing a wafer supporting program in the wafer processing method of the present invention.

圖8(a)、(b)是顯示本發明之晶圓加工方法中之平板剝離程序的說明圖。 8(a) and 8(b) are explanatory views showing a flat stripping procedure in the wafer processing method of the present invention.

圖9是用以實施本發明之晶圓加工方法中之元件分離程序之元件分離裝置的透視圖。 Figure 9 is a perspective view of a component separating device for carrying out the component separation process in the wafer processing method of the present invention.

圖10(a)~(c)是本發明之晶圓加工方法中元件分離程序之說明圖。 10(a) to (c) are explanatory views of a component separation process in the wafer processing method of the present invention.

較佳實施例之詳細說明 Detailed description of the preferred embodiment

以下,就本發明中晶圓之加工方法之較佳實施形態,參考附加圖式詳細說明。 Hereinafter, preferred embodiments of the method for processing a wafer in the present invention will be described in detail with reference to additional drawings.

圖1(a)及(b)是顯示依循本發明所加工之做為晶圓之半導體晶圓的透視圖。圖1(a)及(b)所示之半導體晶圓2是由厚度例如為600μm的矽晶圓所形成,於表面2a將複數條切割線21形成為格子狀,並且於藉由該複數條切割線21所區劃之複數個區域形成IC、LSI等元件22。並且,於晶圓2之背面2b露出連接於各元件22之電極23。然而,也有電極23沒有露出於背面2b之晶圓。以下,就於該半導體晶圓2之 背面2b安裝後述之晶片,並且沿著切割線21分割成各個元件的晶圓加工方法加以說明。 1(a) and (b) are perspective views showing a semiconductor wafer processed as a wafer in accordance with the present invention. The semiconductor wafer 2 shown in FIGS. 1(a) and 1(b) is formed of a tantalum wafer having a thickness of, for example, 600 μm, and a plurality of cut lines 21 are formed in a lattice shape on the surface 2a, and by the plurality of strips A plurality of regions, which are divided by the dicing lines 21, form elements 22 such as ICs and LSIs. Further, the electrode 23 connected to each element 22 is exposed on the back surface 2b of the wafer 2. However, there is also a wafer in which the electrode 23 is not exposed on the back surface 2b. Hereinafter, the semiconductor wafer 2 is A wafer processing method in which a wafer to be described later is mounted on the back surface 2b and divided into individual elements along the dicing line 21 will be described.

首先,實施分割溝形成程序,該分割溝形成程序 是由半導體晶圓2之表面側沿著切割線21形成深度相當於元件22完成之厚度的分割溝。且該分割溝形成程序是使用圖示之實施形態中圖2(a)所示之切削裝置3來實施。圖2(a)所示之切削裝置3具有保持被加工物之夾頭台31、用以切削保持在該夾頭台31之被加工物的切削手段32、及用以拍攝保持於該夾頭台31之被加工物的拍攝手段33。夾頭台31構成為可吸引保持被加工物,藉由未圖示之切削進送機構使其朝圖2(a)中以箭頭X所示之切削進送方向移動,並且藉由未圖示之分度進送機構使其朝以箭頭Y所示之分度進送方向移動。 First, a dividing groove forming program is implemented, and the dividing groove forming program A dividing groove having a depth corresponding to the thickness of the element 22 is formed along the cutting line 21 from the surface side of the semiconductor wafer 2. The dividing groove forming program is carried out using the cutting device 3 shown in Fig. 2(a) in the illustrated embodiment. The cutting device 3 shown in Fig. 2(a) has a chuck table 31 for holding a workpiece, a cutting means 32 for cutting and holding a workpiece on the chuck table 31, and a photographing and holding unit 32 for holding and holding the workpiece. The photographing means 33 of the workpiece of the stage 31. The chuck table 31 is configured to be capable of sucking and holding a workpiece, and is moved in a cutting feed direction indicated by an arrow X in FIG. 2(a) by a cutting feed mechanism (not shown), and is not shown. The indexing feed mechanism moves in the indexing feed direction indicated by the arrow Y.

前述切削手段32包含有大致水平配置的主軸套 321、可自由旋轉地支持於該主軸套321之旋轉主軸322、及安裝於該旋轉主軸322之前端部的切削刀片323,旋轉主軸322是形成為藉由配設於主軸套321內之未圖示之伺服馬達朝以箭頭322a所示之方向旋轉。前述拍攝手段33安裝於主軸套321之前端部,包含有照明被加工物之照明手段、捕捉已藉由該照明手段照明之區域的光學系統、及拍攝已藉由該光學系統捕捉之圖像的拍攝零件(CCD)等,並將已拍攝之圖像訊號送至未圖示之控制手段。 The aforementioned cutting means 32 includes a spindle sleeve having a substantially horizontal arrangement a rotating spindle 322 rotatably supported by the spindle sleeve 321 and a cutting insert 323 attached to a front end of the rotating spindle 322. The rotating spindle 322 is formed by being disposed in the spindle sleeve 321 The servo motor is shown rotating in the direction indicated by arrow 322a. The photographing means 33 is attached to the front end of the spindle sleeve 321 and includes an illumination means for illuminating the workpiece, an optical system for capturing an area illuminated by the illumination means, and an image captured by the optical system. Take a part (CCD), etc., and send the captured image signal to a control unit not shown.

使用前述之切削裝置3實施分割溝形成程序,如 圖2(a)所示於夾頭台31上載置已接合於半導體晶圓2之之背 面2b側,並藉由作動未圖示之吸引手段將半導體晶圓2保持於夾頭台31上。因此,保持於夾頭台31之半導體晶圓2,其表面2a會成為上側。如此,將吸引保持半導體晶圓2之夾頭台31藉由未圖示之切削進送機構定位於拍攝手段33之正下方。 The dividing groove forming process is carried out using the cutting device 3 described above, such as FIG. 2(a) shows the back of the semiconductor wafer 2 placed on the chuck table 31. On the side of the surface 2b, the semiconductor wafer 2 is held on the chuck stage 31 by a suction means (not shown). Therefore, the surface 2a of the semiconductor wafer 2 held by the chuck stage 31 becomes the upper side. In this manner, the chuck table 31 that sucks and holds the semiconductor wafer 2 is positioned directly under the photographing means 33 by a cutting feed mechanism (not shown).

當將夾頭台31定位於拍攝手段33之正下方時,則 實施藉由拍攝手段33及未圖示之控制手段檢測半導體晶圓2之應沿著切割線21形成分割溝之切削區域的校準程序。亦即,拍攝手段33及未圖示之控制手段會實施與形成於半導體晶圓2之預定方向之切割線21對應之區域、以及用以進行與切削刀片323對位之圖案配對等之圖像處理,而執行切削刀片623之切削區域的校準(校準程序)。又,對於朝相對於形成於半導體晶圓2之前述預定方向正交之方向延伸之切割線21,也同樣執行切削區域之切削位置之校準。 When the chuck table 31 is positioned directly below the photographing means 33, then A calibration procedure for detecting a cutting region of the semiconductor wafer 2 along which the dividing groove is to be formed along the cutting line 21 is performed by the imaging means 33 and a control means (not shown). In other words, the imaging means 33 and the control means (not shown) perform an image corresponding to the cutting line 21 formed in the predetermined direction of the semiconductor wafer 2, and an image for matching the pattern with the cutting blade 323. Processing, and calibration of the cutting area of the cutting insert 623 (calibration procedure) is performed. Further, the cutting position of the cutting region is also calibrated in the same manner with respect to the cutting line 21 extending in the direction orthogonal to the predetermined direction formed in the semiconductor wafer 2.

若已如同上述進行了檢測保持於夾頭台31上之 半導體晶圓2之切割區域的校準,則使保持半導體晶圓2之夾頭台31朝切削區域之切削開始位置移動。並且,將切削刀片323由如圖2(a)中以箭頭322a所示之方向一面旋轉一面朝下方實施切入進送。該切入進送位置是設定為使切削刀片323之外周緣由半導體晶圓2之表面至相當於元件之完成厚度的深度位置(例如50μm)。如此,若已實施了切削刀片323之切入進送,藉由一面旋轉切削刀片323,一面將夾頭台31朝圖2(a)中以箭頭X所示之方向切削進送,如圖2(b)所示沿著切割線21形成分割溝210(分割溝形成程序)。 If it has been detected as described above and held on the chuck table 31 The alignment of the dicing region of the semiconductor wafer 2 moves the chuck table 31 holding the semiconductor wafer 2 toward the cutting start position of the cutting region. Further, the cutting insert 323 is cut and fed downward by rotating in the direction indicated by an arrow 322a in Fig. 2(a). The cutting-in feeding position is set such that the outer periphery of the cutting insert 323 is from the surface of the semiconductor wafer 2 to a depth position (for example, 50 μm) corresponding to the finished thickness of the element. Thus, if the cutting and feeding of the cutting insert 323 has been carried out, the chuck table 31 is cut and fed in the direction indicated by the arrow X in Fig. 2(a) while rotating the cutting insert 323, as shown in Fig. 2 (Fig. 2 b) The division groove 210 is formed along the cutting line 21 (the division groove forming program).

接著,就分割溝形成程序的其他實施形態加以說 明。分割溝形成程序之其他實施形態是使用圖3(a)所示之雷射加工裝置4實施。圖3(a)所示之雷射加工裝置4包含有保持被加工物之夾頭台41、對保持於該夾頭台41上之被加工物照射雷射光線的雷射光線照射手段42、及拍攝保持於夾頭台41上之被加工物的拍攝手段43。夾頭台41構成為可吸引保持被加工物,且藉由未圖示之加工進送手段朝圖3(a)中以箭頭X所示之加工進送方向移動,並且藉由未圖示之分度進送手段朝圖3(a)中以箭頭Y所示之分度進送方向移動。 Next, another embodiment of the dividing groove forming program will be described. Bright. Another embodiment of the dividing groove forming program is implemented using the laser processing apparatus 4 shown in Fig. 3(a). The laser processing apparatus 4 shown in Fig. 3(a) includes a chuck table 41 for holding a workpiece, and a laser beam irradiation means 42 for irradiating a laser beam to the workpiece held on the chuck table 41, And a photographing means 43 for photographing the workpiece held on the chuck table 41. The chuck table 41 is configured to be capable of sucking and holding the workpiece, and is moved in the processing feed direction indicated by an arrow X in FIG. 3(a) by a processing feed means (not shown), and is not shown. The index feeding means moves in the index feeding direction indicated by an arrow Y in Fig. 3 (a).

前述雷射光線照射手段42包含實質上水平配置 之圓筒形狀之殼體421。殼體421內配設有包含有未圖示之脈衝雷射光線振盪器或反覆頻率設定手段的雷射光線振盪手段。前述殼體421之前端部安裝有用以將由脈衝雷射光線振盪手段振盪之脈衝雷射光線加以集光之集光器422。而,雷射光線照射手段42具有用以調整以集光器422集光之脈衝雷射光線的集光點位置的集光點位置調整手段(未圖示)。 The aforementioned laser beam illumination means 42 comprises a substantially horizontal arrangement A cylindrical housing 421. A laser beam oscillating means including a pulsed laser ray oscillator (not shown) or a reverse frequency setting means is disposed in the casing 421. The front end of the casing 421 is provided with a concentrator 422 for collecting the pulsed laser light oscillated by the pulsed laser ray oscillating means. Further, the laser beam irradiation means 42 has a light collecting point position adjusting means (not shown) for adjusting the position of the light collecting point of the pulsed laser light collected by the light collector 422.

安裝於構成前述雷射光線照射手段42之殼體421 之前端部的拍攝手段43具有照明被加工物之照明手段、捕捉以該照明手段照明之區域的光學系統、及拍攝以該光學系統捕捉之圖像的拍攝零件(CCD)等,並將所拍攝之圖像訊號送至未圖示之控制手段。 Mounted in a housing 421 constituting the aforementioned laser beam irradiation means 42 The imaging means 43 at the front end has an illumination means for illuminating the workpiece, an optical system for capturing an area illuminated by the illumination means, and an imaging part (CCD) for capturing an image captured by the optical system, and the like. The image signal is sent to a control device not shown.

使用前述之雷射加工裝置4,於實施分割程序時,如圖3(a)所示於夾頭台41上載置接合於半導體晶圓2之輩面 2b側,並藉由作動未圖示之吸引手段將半導體晶圓2保持於夾頭台41上。因此,保持於夾頭台41之半導體晶圓2,其表面2a會成為上側。如此,將吸引保持了半導體晶圓2之夾頭台41以未圖示之切削進送機構定位於拍攝手段43之正下方。 When the division processing is performed by using the laser processing apparatus 4 described above, the bonding surface of the semiconductor wafer 2 is placed on the chuck stage 41 as shown in FIG. 3(a). On the 2b side, the semiconductor wafer 2 is held on the chuck stage 41 by an attraction means (not shown). Therefore, the surface 2a of the semiconductor wafer 2 held by the chuck stage 41 becomes the upper side. In this manner, the chuck stage 41 that sucks and holds the semiconductor wafer 2 is positioned directly below the imaging means 43 by a cutting feed mechanism (not shown).

當將夾頭台41定位於拍攝手段43之正下方時,則 實行藉由拍攝手段43及未圖示之控制手段檢測半導體晶圓2之應進行雷射加工的加工區域的校準作業。亦即,拍攝手段43及未圖示之控制手段,會實行圖案配對等圖像處理並且執行雷射光線照射位置之校準(校準程序),該圖案配對是用以進行形成於半導體晶圓2之預定方向之切割線21、與沿著該切割線21照射雷射光線之雷射光線照射手段42之集光器422之對位。又,對形成於半導體晶圓2與前述預定方向正交之方向的切割線21也同樣會執行雷射光線照射位置之校準。 When the chuck table 41 is positioned directly below the photographing means 43, A calibration operation of the processing area of the semiconductor wafer 2 to be subjected to laser processing is detected by the imaging means 43 and a control means (not shown). That is, the photographing means 43 and the control means (not shown) perform image processing such as pattern matching and perform calibration (calibration procedure) of the laser beam irradiation position for forming the semiconductor wafer 2 The cutting line 21 in the predetermined direction is aligned with the concentrator 422 of the laser beam irradiation means 42 that irradiates the laser beam along the cutting line 21. Further, the calibration of the laser beam irradiation position is performed similarly to the cutting line 21 formed in the direction in which the semiconductor wafer 2 is orthogonal to the predetermined direction.

若實施了前述校準程序,將保持了半導體晶圓2 之夾頭台41移動至切削區域之切削開始位置。並且,移動至照射雷射光線的雷射光線照射手段42之集光器422所位在之雷射光線照射區域,將預定之切割線21定位於集光器422之正下方。接著,一面由雷射光線照射手段42之集光器422對半導體晶圓2照射具有吸收性波長之脈衝雷射光線,一面將夾頭台41朝圖3(a)中以箭頭X所示之方向進行加工進送,藉此如圖3(b)所示沿著分割線21形成分割溝210(分割溝形成程序)。然而,由雷射光線照射手段42之集光器422 照射之脈衝雷射光線之輸出,設定為可由半導體晶圓2之表面形成深度相當於元件之完成厚度(例如,50μm)的分割溝210的輸出。 If the aforementioned calibration procedure is implemented, the semiconductor wafer 2 will be maintained. The chuck table 41 is moved to the cutting start position of the cutting area. Further, the illuminator 422 of the laser beam irradiation means 42 that is irradiated with the laser beam is positioned in the laser beam irradiation area, and the predetermined cutting line 21 is positioned directly below the concentrator 422. Next, the semiconductor wafer 2 is irradiated with pulsed laser light having an absorptive wavelength by the concentrator 422 of the laser beam irradiation means 42, and the chuck table 41 is indicated by an arrow X in FIG. 3(a). The machining is carried out in the direction, whereby the dividing groove 210 (dividing groove forming program) is formed along the dividing line 21 as shown in Fig. 3(b). However, the concentrator 422 of the laser light illuminating means 42 The output of the irradiated pulsed laser light is set such that an output of the dividing groove 210 having a depth corresponding to the completed thickness of the element (for example, 50 μm) can be formed from the surface of the semiconductor wafer 2.

若已實施了前述分割溝形成程序,為了保護形成 於半導體晶圓2之表面2a之元件22,會實施透過黏著層於半導體晶圓2之表面2a接合平板之表面的平板接合程序。亦即,如圖4(a)及(b)所示於半導體晶圓2之表面2a透過黏著層50接合平板5之表面5a(平板接合程序)。因此,透過黏著層50接合於半導體晶圓2之表面2a的平板5會成為背面5b露出的狀態。而平板5於圖示之實施形態中是以厚度為例如1mm之玻璃板形成,黏著劑50是使用照射紫外線黏著力會降低之黏著劑。 If the aforementioned dividing groove forming procedure has been implemented, in order to protect the formation The element 22 on the surface 2a of the semiconductor wafer 2 is subjected to a flat bonding process of bonding the surface of the flat surface 2a of the semiconductor wafer 2 through the adhesive layer. That is, as shown in FIGS. 4(a) and 4(b), the surface 5a of the flat plate 5 is bonded to the surface 2a of the semiconductor wafer 2 through the adhesive layer 50 (plate bonding process). Therefore, the flat plate 5 bonded to the front surface 2a of the semiconductor wafer 2 through the adhesive layer 50 is in a state in which the back surface 5b is exposed. On the other hand, in the embodiment shown in the figure, the flat plate 5 is formed of a glass plate having a thickness of, for example, 1 mm, and the adhesive 50 is an adhesive which is lowered in adhesion by irradiation with ultraviolet rays.

若實施了前述平板接合程序,則實施背面研磨工 程,該背面研磨工程是研磨半導體晶圓2之背面2b將半導體晶圓2形成為完成厚度並且使前述分割溝210露出,將半導體晶圓2分割為各個元件。該背面研磨工程是使用圖5(a)所示之研磨裝置6實施。圖5(a)所示之研磨裝置6具有保持被加工物夾頭台61、研磨保持於該夾頭台61之被加工物的研磨手段62。夾頭台61構成為可於為保持面之上面吸引保持被加工物,且藉由未圖示之旋轉驅動機構朝圖5(a)中以箭頭61a所示之方向旋轉。研磨手段62包含有:主軸套621、自由旋轉地支持於該主軸套621且藉由未圖示之旋轉驅動機構旋轉之旋轉主軸622、安裝於該旋轉主軸622之下端之安裝件623、及安裝於該安裝件623之下面的研磨輪624。該研 磨輪624是由基台625、及呈環狀安裝於該基台625之下面之研磨砥石626所形成,基台625是藉由緊固螺栓627安裝於安裝件623之下面。 If the aforementioned flat bonding process is implemented, the back grinding machine is implemented. In the back grinding process, the back surface 2b of the semiconductor wafer 2 is polished to form the semiconductor wafer 2 to a thickness and expose the division trench 210, and the semiconductor wafer 2 is divided into individual elements. This back grinding process is carried out using the polishing apparatus 6 shown in Fig. 5 (a). The polishing apparatus 6 shown in Fig. 5 (a) has a polishing means 62 for holding a workpiece chuck stage 61 and a workpiece to be polished and held by the chuck table 61. The chuck table 61 is configured to be capable of sucking and holding a workpiece on the upper surface of the holding surface, and is rotated in a direction indicated by an arrow 61a in Fig. 5(a) by a rotation driving mechanism (not shown). The polishing means 62 includes a main shaft sleeve 621, a rotating main shaft 622 rotatably supported by the main shaft sleeve 621 and rotated by a rotation driving mechanism (not shown), a mounting member 623 attached to the lower end of the rotating main shaft 622, and mounting A grinding wheel 624 below the mounting member 623. The research The grinding wheel 624 is formed by a base 625 and a grinding stone 626 which is annularly mounted on the lower surface of the base 625. The base 625 is attached to the lower surface of the mounting member 623 by a fastening bolt 627.

使用前述之研磨裝置6實施前述背面研磨程序, 如圖5(a)所示,在夾頭台61之上面(保持面)載置實施了前述平板接合程序之半導體晶圓2之平板5側。並且,藉由作動未圖示之吸引手段將半導體晶圓2透過平板5吸附保持於夾頭台61上(晶圓保持程序)。因此,保持於夾頭台61上之半導體晶圓2其背面2b會在上側。若已這樣將半導體晶圓2透過平板5吸引保持於夾頭台61上,則一面將夾頭台61朝圖5(a)中以箭頭61a所示的方向以例如300rpm旋轉,一面將研磨手段62之研磨輪624朝圖5(a)中以箭頭624a所示的方向以例如6000rpm旋轉,使研磨砥石626與為被加工面之半導體晶圓2之背面2b接觸研磨,且如圖5(b)所示研磨至分割溝210露出於背面2b為止。藉由如此研磨至分割溝210露出為止,如圖5(c)所示將半導體晶圓2分割為各個元件22。而經分割之複數個元件22由於其表面接合於平面5,因此不會分散而可維持半導體晶圓2之形態。如此,於背面2b被研磨而形成元件之完成厚度(例如50μm)之半導體晶圓2之背面2b,於實施背面研磨程序之前電極23未露出於背面2b的晶圓中,使電極23露出。 Performing the aforementioned back grinding process using the aforementioned polishing apparatus 6, As shown in FIG. 5(a), the flat surface 5 side of the semiconductor wafer 2 on which the above-described flat bonding process is performed is placed on the upper surface (holding surface) of the chuck table 61. Then, the semiconductor wafer 2 is adsorbed and held by the chuck 5 through the flat plate 5 by a suction means (not shown) (wafer holding program). Therefore, the semiconductor wafer 2 held on the chuck stage 61 has its back surface 2b on the upper side. When the semiconductor wafer 2 is sucked and held by the flat plate 5 by the flat plate 5 as described above, the chucking table 61 is rotated at a direction of, for example, 300 rpm in the direction indicated by an arrow 61a in FIG. 5(a). The grinding wheel 624 of 62 is rotated at a direction of, for example, 6000 rpm in the direction indicated by an arrow 624a in FIG. 5(a) to cause the grinding vermiculite 626 to be in contact with the back surface 2b of the semiconductor wafer 2 to be processed, and as shown in FIG. 5(b). The polishing is shown until the dividing groove 210 is exposed to the back surface 2b. By thus polishing until the division trench 210 is exposed, the semiconductor wafer 2 is divided into the respective elements 22 as shown in FIG. 5(c). The plurality of divided elements 22 are bonded to the plane 5 by their surfaces, so that the semiconductor wafer 2 can be maintained without being dispersed. As described above, the back surface 2b of the semiconductor wafer 2 on which the back surface 2b is polished to have a completed thickness (for example, 50 μm) is formed, and the electrode 23 is not exposed on the wafer of the back surface 2b before the back surface polishing process is performed, and the electrode 23 is exposed.

如同以上研磨半導體晶圓2之背面而露出分割溝210,藉此將半導體晶圓2分割為各個元件22的背面研磨工程,由於是在半導體晶圓2的表面2a接合於平板5的狀態下實施, 因此分割時△晶片不會飛散,故沒有必要安裝暫時性之元件晶片,而可提升生產性。 The back surface polishing process in which the semiconductor wafer 2 is divided into the respective elements 22 is performed by polishing the back surface of the semiconductor wafer 2 as described above, and the surface 2a of the semiconductor wafer 2 is bonded to the flat plate 5. , Therefore, the Δ wafer does not scatter during the division, so that it is not necessary to mount a temporary component wafer, and productivity can be improved.

接著,實施接合諸電極而安裝晶片的晶片安裝程 序,該晶片具有與露出於已實施背面研磨程序的半導體晶圓2之背面2b的電極23對應的電極。也就是說,如圖6(a)所示將接合於已實施了背面研磨程序的半導體晶圓2之表面的平板5側載置於晶片安裝裝置7之夾頭台71上,並藉由作動未圖示之吸引手段,透過平板5吸引保持半導體晶圓2。 因此,透過平板5保持於夾頭台71上之半導體晶圓2,其背面2b會成為上側。如此將諸電極接合而安裝晶片25,該晶片25具有與於透過平板5保持在夾頭台71之半導體晶圓2之背面2b露出的電極23對應的電極251。並且,如圖6(b)所示與形成於半導體晶圓2之所有元件22對應安裝晶片25。 Next, a wafer mounting process of bonding the electrodes to mount the wafer is performed In this order, the wafer has electrodes corresponding to the electrodes 23 exposed on the back surface 2b of the semiconductor wafer 2 on which the back grinding process has been performed. That is, as shown in FIG. 6(a), the side of the flat plate 5 bonded to the surface of the semiconductor wafer 2 on which the back grinding process has been performed is placed on the chuck stage 71 of the wafer mounting device 7, and is actuated by The attraction means (not shown) sucks and holds the semiconductor wafer 2 through the flat plate 5. Therefore, the semiconductor wafer 2 held by the flat plate 5 on the chuck stage 71 has the back surface 2b as the upper side. The electrodes 25 are bonded to each other, and the wafer 25 has an electrode 251 corresponding to the electrode 23 exposed on the back surface 2b of the semiconductor wafer 2 held by the chuck table 71 through the flat plate 5. Further, as shown in FIG. 6(b), the wafer 25 is mounted corresponding to all the elements 22 formed on the semiconductor wafer 2.

若實施了前述之晶片安裝程序,則實施於安裝在 半導體晶圓2之背面2b之晶片25黏貼切割膠帶,並藉由環狀框支持切割膠帶之外周部的晶圓支持程序。例如,如圖7所示,於安裝在外周部之切割膠帶80之表面黏著安裝於半導體晶圓2之背面2b之晶片25側以覆蓋環狀框8的內側開口部。 因此,黏著於切割膠帶80之表面的半導體晶圓2,其接合於表面2a之平板5會成為上側。而切割膠帶80是於例如厚度100μm之聚乙烯薄膜之表面塗布黏著劑。而,於圖7所示之實施形態中,顯示在安裝於環狀框8之外周部之切割膠帶80之表面黏著安裝在半導體晶圓2之背面2b之晶片25的例子,但在於安裝在半導體晶圓2之背面2b之晶片25黏著切割膠 帶80時同時將切割膠帶80之外周部安裝於環狀框8亦可。如此,由於晶圓支持程序是在藉由研磨前述半導體晶圓2之背面露出分割溝210來將半導體晶圓2分割為各個元件22之背面研磨程序實施後才實施,因此可解除將半導體晶圓2黏著於切割膠帶時破損之問題。 If the aforementioned wafer mounting procedure is implemented, it is implemented in The wafer 25 on the back surface 2b of the semiconductor wafer 2 is adhered to the dicing tape, and the wafer support program outside the dicing tape is supported by the ring frame. For example, as shown in FIG. 7, the surface of the dicing tape 80 attached to the outer peripheral portion is adhered to the side of the wafer 25 on the back surface 2b of the semiconductor wafer 2 so as to cover the inner opening portion of the annular frame 8. Therefore, the semiconductor wafer 2 adhered to the surface of the dicing tape 80 is bonded to the flat surface 5 of the surface 2a. The dicing tape 80 is applied with an adhesive on the surface of, for example, a polyethylene film having a thickness of 100 μm. In the embodiment shown in FIG. 7, an example in which the wafer 25 attached to the back surface 2b of the semiconductor wafer 2 is adhered to the surface of the dicing tape 80 attached to the outer peripheral portion of the annular frame 8 is provided in the semiconductor. The wafer 25 on the back side 2b of the wafer 2 is adhered to the cutting glue When the belt 80 is used, the outer peripheral portion of the dicing tape 80 may be attached to the annular frame 8 at the same time. In this manner, since the wafer supporting program is implemented by polishing the back surface of the semiconductor wafer 2 by exposing the dividing trench 210 to divide the semiconductor wafer 2 into the respective elements 22, the semiconductor wafer can be released. 2 The problem of damage when sticking to the cutting tape.

接著,實施平板剝離程序,該平板剝離程序是將 接合於實施了前述晶圓支持程序的半導體晶圓2之表面2a的平板5剝離的程序。該平板剝離程序中,如圖8(a)所示是透過切割膠帶80由接合在支持於環狀框8之半導體晶圓2之表面2a的平板5之背面5b側照射紫外線。結果,由於接合半導體晶圓2之表面2a與平板5之表面5a的黏著層50是使用照射紫外線黏著力會降低的黏著劑,因此黏著力會被降低。 因此,接合於半導體晶圓2之表面2a的平板5,會如圖8(b)所示可容易進行剝離。此時,半導體晶圓2之未形成有元件22之外周部會在接合於平板5之狀態下被去除。因此,安裝於環狀框8之切割膠帶80會成為黏著有接合在晶圓22之背面之晶片25之狀態。 Next, a flat stripping procedure is performed, and the flat stripping procedure is A process of bonding the flat plate 5 bonded to the surface 2a of the semiconductor wafer 2 on which the wafer support process is performed. In the flat stripping process, as shown in FIG. 8(a), ultraviolet rays are irradiated from the back surface 5b side of the flat plate 5 bonded to the surface 2a of the semiconductor wafer 2 supported by the annular frame 8 through the dicing tape 80. As a result, since the adhesive layer 50 that bonds the surface 2a of the semiconductor wafer 2 to the surface 5a of the flat plate 5 is an adhesive that is lowered by the ultraviolet ray adhesive force, the adhesive force is lowered. Therefore, the flat plate 5 bonded to the front surface 2a of the semiconductor wafer 2 can be easily peeled off as shown in Fig. 8(b). At this time, the outer peripheral portion of the semiconductor wafer 2 on which the element 22 is not formed is removed in a state of being bonded to the flat plate 5. Therefore, the dicing tape 80 attached to the ring frame 8 is in a state in which the wafer 25 bonded to the back surface of the wafer 22 is adhered.

如同上述,當實施了晶片支持程序及平板剝離程 序時,實施元件分離程序,該元件分離程序是將半導體晶圓2所黏著之切割膠帶80擴張沿著切割線21將半導體晶圓2分離成安裝有晶片25之各個元件22。該元件分離程序是使用如圖9所示之元件分離裝置9來實施。圖9所示之元件分離裝置9具有保持前述環狀框8的框保持手段91、用以擴張安裝於保持在該框保持手段91的環狀框8的切割膠帶80的膠 帶擴張手段92、及拾取夾頭93。框保持手段91是由環狀框保持構件911、配設於該框保持構件911之外周之作為固定手段的複數個夾鉗912所形成。框保持構件911之上面形成載置環狀框8的載置面911a,且於該載置面911a上載置環狀框8。並且,載置於載置面911a上之環狀框8是藉由夾鉗912固定於框保持構件911。如此構成之框保持手段91可藉由膠帶擴張手段92支持成可朝上下方向進退。 As mentioned above, when the wafer support program and the flat stripping process were implemented In the sequence, a component separation process is performed in which the dicing tape 80 adhered to the semiconductor wafer 2 is expanded to separate the semiconductor wafer 2 along the dicing line 21 into the respective elements 22 on which the wafer 25 is mounted. This component separation procedure is carried out using the component separation device 9 as shown in FIG. The component separating device 9 shown in Fig. 9 has a frame holding means 91 for holding the above-mentioned annular frame 8, and a glue for expanding the dicing tape 80 attached to the annular frame 8 held by the frame holding means 91. The belt expanding means 92 and the picking chuck 93 are provided. The frame holding means 91 is formed by a plurality of clamps 912 as fixing means disposed on the outer circumference of the frame holding member 911. The mounting surface 911a on which the annular frame 8 is placed is formed on the upper surface of the frame holding member 911, and the annular frame 8 is placed on the mounting surface 911a. Further, the annular frame 8 placed on the mounting surface 911a is fixed to the frame holding member 911 by a clamp 912. The frame holding means 91 thus constructed can be supported by the tape expanding means 92 so as to be able to advance and retreat in the up and down direction.

膠帶擴張手段92具有配設於前述環狀框保持構 件911之內側之擴張鼓輪921。該擴張鼓輪921具有較環狀框8之內徑小且較黏著於安裝在環狀框8之切割膠帶80的半導體晶圓2之外徑大的內徑及外徑。又,擴張鼓輪921於下端具有支持凸緣922。圖示之實施形態中膠帶擴張手段92具有可將前述環狀框保持構件911支撐為可朝上下方向進退之支持手段923。該支持手段923是由配設於前述支持凸緣922上之複數個汽缸923a所形成,該活塞桿923b連結於前述環狀框保持構件911之下面。如此使由複數個汽缸923a形成之支撐手段923,如圖10(a)所示使環狀框保持構件911朝上下方向移動於使載置面911a與擴張鼓輪921之上端大致相同高度之基準位置、及如圖10(b)所示較擴張鼓輪921之上端為預定量下方之擴張位置之間。 The tape expansion means 92 has a ring frame holding structure The expansion drum 921 on the inner side of the piece 911. The expansion drum 921 has an inner diameter and an outer diameter which are smaller than the inner diameter of the annular frame 8 and which are larger than the outer diameter of the semiconductor wafer 2 attached to the dicing tape 80 of the annular frame 8. Further, the expansion drum 921 has a support flange 922 at the lower end. In the embodiment shown in the drawing, the tape expanding means 92 has a supporting means 923 for supporting the annular frame holding member 911 so as to be able to advance and retreat in the vertical direction. The support means 923 is formed by a plurality of cylinders 923a disposed on the support flange 922, and the piston rod 923b is coupled to the lower surface of the annular frame holding member 911. As shown in FIG. 10(a), the support means 923 formed of the plurality of cylinders 923a moves the annular frame holding member 911 in the vertical direction to a height at which the mounting surface 911a and the upper end of the expanding drum 921 are substantially the same height. The position is as shown in Fig. 10(b) between the upper end of the expansion drum 921 and the expansion position below the predetermined amount.

就使用如同以上所構成之元件分離裝置9實施之 元件分離程序參考圖10加以說明。亦即,將半導體晶圓2所黏著之切割膠帶80所安裝之環狀框8,如圖10(a)所示載置於構成框保持手段91之框保持構件911之載置面911a上,並藉 由夾鉗912固定於框保持構件911(框保持程序)。此時,框保持構件911定位於圖10(a)所示之基準位置。接著,作動構成膠帶擴張手段92之作為支持手段923的複數個汽缸923a,使環狀框保持構件911下降至圖10(b)所示之擴張位置。因此,由於固定於框保持構件911之載置面911a上之環狀框8也會下降,因此如圖10(b)所示,安裝於環狀框8的切割膠帶80會切於擴張鼓輪921之上端緣且擴張(膠帶擴張程序)。結果,由於對黏著於切割膠帶80之半導體晶圓2放射狀地作用拉張力,分離為安裝有晶片25之各個元件22並且於元件間形成間隔S。 It is implemented using the element separating device 9 constructed as above. The component separation procedure will be described with reference to FIG. In other words, the annular frame 8 to which the dicing tape 80 to which the semiconductor wafer 2 is attached is placed on the mounting surface 911a of the frame holding member 911 constituting the frame holding means 91 as shown in Fig. 10(a). And borrow It is fixed to the frame holding member 911 by the clamp 912 (frame holding program). At this time, the frame holding member 911 is positioned at the reference position shown in FIG. 10(a). Next, a plurality of cylinders 923a as the supporting means 923 constituting the tape expanding means 92 are actuated, and the annular frame holding member 911 is lowered to the expanded position shown in FIG. 10(b). Therefore, since the annular frame 8 fixed to the mounting surface 911a of the frame holding member 911 is also lowered, as shown in FIG. 10(b), the dicing tape 80 attached to the annular frame 8 is cut to the expansion drum. The upper edge of 921 is expanded and expanded (tape expansion procedure). As a result, since the tensile force is applied to the semiconductor wafer 2 adhered to the dicing tape 80 radially, the respective elements 22 to which the wafer 25 is mounted are separated and a space S is formed between the elements.

接著,如圖10(c)所示作動拾取器93吸附安裝有 晶片25之元件22,將其由切割膠帶80剝離並拾取,搬送至未圖示之托盤或者晶片結合程序。而,於拾取程序中,由於如前所述使安裝有黏著於切割膠帶80之晶片25的各個元件22間之間隙S變寬,因此不會與相鄰之元件22接觸而可輕易拾取。 Next, as shown in FIG. 10(c), the actuating picker 93 is affixed and mounted. The component 22 of the wafer 25 is peeled off from the dicing tape 80 and picked up, and transferred to a tray or wafer bonding program (not shown). On the other hand, in the picking up procedure, since the gap S between the respective elements 22 to which the wafer 25 adhered to the dicing tape 80 is attached is widened as described above, it can be easily picked up without coming into contact with the adjacent elements 22.

2‧‧‧半導體晶圓 2‧‧‧Semiconductor wafer

5‧‧‧平板 5‧‧‧ tablet

7‧‧‧晶片安裝裝置 7‧‧‧ wafer mounting device

23、251‧‧‧電極 23, 251‧‧‧ electrodes

25‧‧‧晶片 25‧‧‧ wafer

71‧‧‧晶片安裝裝置之夾頭台 71‧‧‧Clamping station for wafer mounting device

Claims (3)

一種晶圓之加工方法,是在表面藉由排列成格子狀之分割線區劃的複數個區域形成元件,並於背面露出與該元件連接之電極的晶圓的背面,安裝具有與該電極對應之電極的晶片,並且將晶圓沿著分割線分割,該晶圓之加工方法之特徵在於包含有以下程序:分割溝形成程序,由晶圓之表面側沿著分割線形成深度相當於元件之完成厚度的分割溝;平板接合程序,將平板之表面透過黏著層接合於已實施了該分割溝形成程序之晶圓之表面;背面研磨程序,研磨已實施該平板接合程序之晶圓之背面,將晶圓形成為完成厚度,並且使該分割溝露出於背面,而將晶圓分割成各個元件;晶片安裝程序,將具有與露出於已實施該背面研磨程序之晶圓之背面之該電極對應的電極的晶片與該諸電極接合安裝;晶圓支持程序,於安裝在實施了該晶片安裝程序之晶圓之背面的晶片側,黏著切割膠帶並藉由環狀框支持切割膠帶之外周部;及平板剝離程序,將接合於已實施該晶圓支持程序之晶圓之表面的平板剝離。 A method for processing a wafer, wherein a surface of a wafer is formed by a plurality of regions arranged in a lattice-shaped dividing line, and a back surface of a wafer on which an electrode connected to the device is exposed on a back surface is mounted on the back surface of the wafer. a wafer of electrodes, and dividing the wafer along a dividing line, the method of processing the wafer includes the following procedure: dividing the groove forming process, forming a depth from the surface side of the wafer along the dividing line to be equivalent to the completion of the component a dividing groove of a thickness; a flat bonding process of bonding the surface of the flat plate to the surface of the wafer on which the dividing groove forming process has been performed through an adhesive layer; and a back grinding process for grinding the back surface of the wafer on which the flat bonding process is performed, The wafer is formed to have a completed thickness, and the dividing trench is exposed on the back surface to divide the wafer into individual components; the wafer mounting process has a corresponding to the electrode exposed on the back side of the wafer on which the back grinding process has been performed. a wafer of electrodes is mounted in engagement with the electrodes; a wafer support program is mounted on the back side of the wafer on which the wafer mounting process is implemented Sheet side, and adhesive dicing tape supported by an annular frame portion outside the periphery of the dicing tape; release and tablet procedures, the embodiment has been joined to the flat surface of the wafer the release of the wafer support Procedure. 如請求項1之晶圓之加工方法,其中該分割溝形成程序是藉由以切削刀片沿著切割線切削來形成分割溝。 The method of processing a wafer according to claim 1, wherein the dividing groove forming process is to form a dividing groove by cutting the cutting blade along the cutting line. 如請求項1之晶圓之加工方法,其中該分割溝形成程序是沿著切割線照射雷射光線來形成分割溝。 The method of processing a wafer according to claim 1, wherein the dividing groove forming process irradiates the laser beam along the cutting line to form a dividing groove.
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