TW201414149A - High voltage ratio interleaved converter with soft-switching - Google Patents

High voltage ratio interleaved converter with soft-switching Download PDF

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TW201414149A
TW201414149A TW101134141A TW101134141A TW201414149A TW 201414149 A TW201414149 A TW 201414149A TW 101134141 A TW101134141 A TW 101134141A TW 101134141 A TW101134141 A TW 101134141A TW 201414149 A TW201414149 A TW 201414149A
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electrically connected
circuit
main
auxiliary
switch
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TW101134141A
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TWI462449B (en
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Kuei-Hsiang Chao
Long-Yi Chang
Tsang-Chih Chang
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Nat Univ Chin Yi Technology
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

A high voltage ratio interleaved converter with soft-switching includes a soft-switching circuit and an interleaving circuit. The interleaving circuit includes a first step-up circuit and a second step-up circuit. The soft-switching circuit includes a first auxiliary circuit and a second auxiliary circuit. The first auxiliary circuit is electrically connected to the first step-up circuit. The first auxiliary circuit includes a first resonant capacitor, a first resonant inductor, a first auxiliary switch, and a first auxiliary diode. The second auxiliary circuit is electrically connected to the second step-up circuit. The second auxiliary circuit includes a second resonant capacitor, a second resonant inductor, a second auxiliary switch, and a second auxiliary diode. There may be a signal circuit included as well in the high voltage ratio interleaved converter with soft-switching, to control switches to achieve soft switching.

Description

交錯式高升壓比軟開關式轉換器 Interleaved high step-up ratio soft-switching converter

本發明是有關於一種交錯式高升壓比轉換器,且特別是有關於一種交錯式高升壓比軟開關式轉換器。 This invention relates to an interleaved high step-up ratio converter and, more particularly, to an interleaved high step-up ratio soft-switching converter.

近年來由於全球性能源危機以及環保意識提升,因此找尋替代能源即成為一個重要的課題。許多替代能源如太陽能、風能、水力、生質能與燃料電池等皆是相當有潛力的綠色能源。其中燃料電池是一種乾淨無污染的能源,如常被採用的質子交換膜燃料電池,但因其有活化損失、歐姆極化以及濃度損失的影響,導致輸出電壓隨負載增加而使得輸出電壓下降,即燃料電池隨著加載時輸出功率增加,使得輸出電壓逐漸下降,同時輸出電流卻逐漸上升,是屬於低電壓、高電流輸出之裝置。其他綠色能源也都具有輸出電壓較低的特性,使得後端應用範圍受限。 In recent years, due to the global energy crisis and environmental awareness, finding alternative energy has become an important issue. Many alternative energy sources such as solar energy, wind energy, hydropower, biomass and fuel cells are quite potential green energy sources. Among them, the fuel cell is a clean and pollution-free energy source, such as the proton exchange membrane fuel cell, which is often used, but due to its activation loss, ohmic polarization and concentration loss, the output voltage decreases with the load, which causes the output voltage to drop. As the output power of the fuel cell increases with loading, the output voltage gradually decreases, and the output current gradually rises, which is a device of low voltage and high current output. Other green energy sources also have lower output voltage characteristics, which limits the range of back-end applications.

因此發展出目前習知的交錯式高升壓比轉換器,可以將能源所輸出之低電壓升壓至高電壓再送至直流鏈(DC Link),以適用更廣後端應用範圍。然而目前交錯式高升壓比轉換器大多採取硬式切換,導致開關以及二極體切換損失大,電路效率低,且使得其損失功率累積在開關及二極體而容易發熱。 Therefore, the conventional interleaved high step-up ratio converter has been developed to boost the low voltage output from the energy source to a high voltage and then to the DC link for a wider range of back end applications. However, most of the interleaved high-boost ratio converters are hard-switched, resulting in large switching and diode switching losses, low circuit efficiency, and loss of power accumulated in the switches and diodes, which is prone to heat.

少數嘗試採用軟開關式的交錯式高升壓比轉換器,雖可改善切換損失問題,但為達成軟開關特性而需使用複雜 電路,使得成本高昂,實現不易。 A few attempts to use a soft-switching interleaved high step-up ratio converter can improve the switching loss problem, but it is complicated to achieve soft switching characteristics. The circuit makes the cost high and the implementation is not easy.

因此,本發明提供架構簡單的一種交錯式高升壓比軟開關式轉換器,包含一軟開關電路與一交錯升壓電路電性連接。其中交錯升壓電路至少包含一第一升壓電路及一第二升壓電路,第二升壓電路與第一升壓電路電性連接;軟開關電路則相對應交錯升壓電路至少包含一第一輔電路與第一升壓電路電性連接,及一第二輔電路與第二升壓電路電性連接,第一輔電路與第二輔電路亦電性連接;第一輔電路包含一第一共振電容與第一升壓電路電性連接、一第一共振電感與第一升壓電路及第一共振電容電性連接、一第一輔開關,其藉由與第一共振電感電性連接而與第一升壓電路電性連接,及一第一輔二極體與第一共振電感及第一輔開關電性連接;第二輔電路則包含一第二共振電容與第二升壓電路電性連接、一第二共振電感與第二升壓電路及該第二共振電容電性連接、一第二輔開關,其藉由與第二共振電感電性連接而與第二升壓電路電性連接,及一第二輔二極體與第二共振電感及該第二輔開關電性連接。 Therefore, the present invention provides an interleaved high step-up ratio soft-switching converter having a simple structure, comprising a soft switching circuit electrically connected to an interleaving boosting circuit. The interleaved boosting circuit includes at least a first boosting circuit and a second boosting circuit, and the second boosting circuit is electrically connected to the first boosting circuit; and the soft switching circuit corresponding to the interleaved boosting circuit includes at least one An auxiliary circuit is electrically connected to the first boosting circuit, and a second auxiliary circuit is electrically connected to the second boosting circuit, and the first auxiliary circuit and the second auxiliary circuit are also electrically connected; the first auxiliary circuit includes a first a resonant capacitor is electrically connected to the first boosting circuit, a first resonant inductor is electrically connected to the first boosting circuit and the first resonant capacitor, and a first auxiliary switch is electrically connected to the first resonant inductor The first auxiliary diode is electrically connected to the first boosting diode, and the first auxiliary diode is electrically connected to the first resonant inductor and the first auxiliary switch; the second auxiliary circuit includes a second resonant capacitor and a second boosting circuit. An electrical connection, a second resonant inductor is electrically connected to the second boosting circuit and the second resonant capacitor, and a second auxiliary switch is electrically connected to the second boosting circuit by being electrically connected to the second resonant inductor Sex connection, and a second secondary diode and a second resonant And the second auxiliary switch is electrically connected.

依據本發明之一實施方式,其中第一升壓電路包含一第一儲能電感與第二升壓電路電性連接,及一第一主開關與第一儲能電感電性連接;而第二升壓電路包含一第二儲能電感與第一升壓電路電性連接,及一第二主開關與第二儲能電感電性連接。而交錯升壓電路更可包含一第一主二 極體與第一升壓電路電性連接、一第二主二極體與第二升壓電路及第一主二極體電性連接、一箝位電容與第一主二極體及第二主二極體電性連接,及一負載組與第二主二極體電性連接;負載組包含一輸出電容與第二主二極體電性連接,及一輸出電阻與該輸出電容電性連接。 According to an embodiment of the present invention, the first boosting circuit includes a first energy storage inductor electrically connected to the second boosting circuit, and a first main switch electrically connected to the first energy storage inductor; and a second The boosting circuit includes a second energy storage inductor electrically connected to the first boosting circuit, and a second main switch electrically connected to the second energy storage inductor. The interleaved boost circuit can further include a first main two The pole body is electrically connected to the first boosting circuit, the second main diode is electrically connected to the second boosting circuit and the first main diode, the clamping capacitor and the first main diode and the second The main diode is electrically connected, and a load group is electrically connected to the second main diode; the load group includes an output capacitor electrically connected to the second main diode, and an output resistor and the output capacitor are electrically connected connection.

依據本發明之一實施方式,交錯式高升壓比軟開關式轉換器更可包含一信號電路與交錯升壓電路電性連接。信號電路包含一原始信號裝置、一第一觸發器、一第一及閘、一第二觸發器及一第二及閘。其中原始信號裝置包含一原始信號端可產生一原始信號,及一相位移端可產生原始信號之一相位移信號;第一觸發器電性連接於原始信號端,第一觸發器具有一第一輸出端及一第一反相端,第一輸出端可輸出一第一輔信號;第一及閘電性連接於第一反相端及原始信號端,第一及閘具有一第二輸出端可輸出一第一主信號;第二觸發器電性連接於相位移端,第二觸發器具有一第三輸出端及一第二反相端,第三輸出端可輸出一第二輔信號;第二及閘電性連接於第二反相端及相位移端,第二及閘並具有一第四輸出端可輸出一第二主信號。其中第一輸出端、第二輸出端、第三輸出端及第四輸出端分別電性連接於第一輔開關、第一主開關、第二輔開關及第二主開關。其中相位移信號可為原始信號180度之相位移。 According to an embodiment of the present invention, the interleaved high step-up ratio soft-switching converter may further include a signal circuit electrically connected to the interleaved boosting circuit. The signal circuit comprises an original signal device, a first trigger, a first gate, a second trigger and a second gate. The original signal device includes an original signal end to generate an original signal, and a phase shift end generates a phase shift signal of the original signal; the first flip-flop is electrically connected to the original signal end, and the first flip-flop has a first output. And a first inverting end, the first output end can output a first auxiliary signal; the first and the second gate are electrically connected to the first inverting end and the original signal end, and the first gate has a second output end Outputting a first main signal; the second flip-flop is electrically connected to the phase shifting end, the second flip-flop has a third output end and a second inverting end, and the third output end can output a second auxiliary signal; The gate is electrically connected to the second inverting terminal and the phase shifting end, and the second gate has a fourth output terminal for outputting a second main signal. The first output terminal, the second output terminal, the third output terminal, and the fourth output terminal are electrically connected to the first auxiliary switch, the first main switch, the second auxiliary switch, and the second main switch, respectively. The phase shift signal can be a phase shift of 180 degrees of the original signal.

由以上可得,透過信號電路可產生一延遲時間,在此延遲時間內可使軟開關電路之第一輔開關或第二輔開關先行導通,促使第一共振電感、第一共振電容、第二共振電 感及第二振電容形成共振回路,使第一主開關或第二主開關兩端電壓先降至為零,再使第一輔助開關或第二輔助開關截止後,進行第一主開關或第二主開關之觸發導通,達到零電壓切換之軟開關特性;又因第一主開關可與第一共振電容並聯,而第二主開關可與第二共振電容並聯,使得第一主開關及第二主開關之電壓無法瞬間變化,此時進行之第一主開關或第二主開關之觸發導通,可達到零電壓切換;且在共振回路中將第一共振電感或第二共振電感之多餘儲能能量,以第一輔助二極體或第二輔助二極體所導通形成之回路釋放能量至負載組,達到能量回收再利用之優點。 According to the above, the signal circuit can generate a delay time, in which the first auxiliary switch or the second auxiliary switch of the soft switching circuit can be turned on first, and the first resonant inductor, the first resonant capacitor, and the second are caused. Resonance Sense and the second vibration capacitor form a resonance circuit, so that the voltage between the first main switch or the second main switch first drops to zero, and then the first auxiliary switch or the second auxiliary switch is turned off, and then the first main switch or the first The triggering of the two main switches is turned on to achieve the soft switching characteristic of zero voltage switching; and the first main switch can be connected in parallel with the first resonant capacitor, and the second main switch can be connected in parallel with the second resonant capacitor, so that the first main switch and the first The voltage of the two main switches cannot be changed instantaneously. At this time, the triggering of the first main switch or the second main switch is performed, and zero voltage switching can be achieved; and the first resonant inductor or the second resonant inductor is stored in the resonant circuit. The energy energy, the circuit formed by the conduction of the first auxiliary diode or the second auxiliary diode, releases energy to the load group, thereby achieving the advantages of energy recovery and reuse.

綜合上述可知應用本發明之交錯式高升壓比軟開關式轉換器,不僅可使主開關元件之切換損失減少,進而提升轉換器之轉換效率,降低開關元件之切換應力及導通損失。並且模組化的結構,使得軟開關電路容易應用於交錯升壓電路上。本發明不僅提供簡單的交錯式高升壓比軟開關式轉換器的解決方案,更提出了簡單的信號電路,大幅降低了交錯式高升壓比軟開關式轉換器的使用複雜度。 In summary, it can be seen that the interleaved high step-up ratio soft-switching converter to which the present invention is applied can not only reduce the switching loss of the main switching element, but also improve the conversion efficiency of the converter and reduce the switching stress and conduction loss of the switching element. And the modular structure makes the soft switching circuit easy to apply to the interleaved boost circuit. The invention not only provides a simple interleaved high step-up ratio soft-switching converter solution, but also proposes a simple signal circuit, which greatly reduces the complexity of the use of the interleaved high-boost ratio soft-switching converter.

請參照第1圖,其繪示依照本發明一實施方式之交錯式高升壓比軟開關式轉換器的電路圖。包含一交錯升壓電路100與一軟開關電路200電性連接。其中交錯升壓電路100包含一第一升壓電路110及一第二升壓電路120,第二 升壓電路120與第一升壓電路110電性連接;軟開關電路200包含一第一輔電路210及一第二輔電路220,第一輔電路210與第二輔電路220電性連接;第一輔電路210包含一第一共振電容211與第一升壓電路110電性連接、一第一共振電感212與第一升壓電路110及第一共振電容211電性連接、一第一輔開關213,其藉由與第一共振電感212電性連接而與第一升壓電路110電性連接,及一第一輔二極體214與第一共振電感212及第一輔開關213電性連接;第二輔電路220包含一第二共振電容221與第二升壓電路120電性連接、一第二共振電感222與第二升壓電路120及該第二共振電容221電性連接、一第二輔開關223,其藉由與第二共振電感222電性連接而與第二升壓電路120電性連接,及一第二輔二極體224與第二共振電感222及該第二輔開關223電性連接。其中第一輔開關213可為一金氧半場效電晶體,且可並聯一第一輔背接二極體215,第一輔開關213具有一第一輔信號接點216;第二輔開關223可為一金氧半場效電晶體,且可並聯一第二輔背接二極體225,第二輔開關223具有一第二輔信號接點226。 Please refer to FIG. 1 , which is a circuit diagram of an interleaved high step-up ratio soft-switching converter according to an embodiment of the invention. An interleaved boost circuit 100 is electrically coupled to a soft switching circuit 200. The interleaved boost circuit 100 includes a first boost circuit 110 and a second boost circuit 120, and a second The boosting circuit 120 is electrically connected to the first boosting circuit 110. The soft switching circuit 200 includes a first auxiliary circuit 210 and a second secondary circuit 220. The first auxiliary circuit 210 is electrically connected to the second auxiliary circuit 220. The auxiliary circuit 210 includes a first resonant capacitor 211 electrically connected to the first boosting circuit 110, a first resonant inductor 212 electrically connected to the first boosting circuit 110 and the first resonant capacitor 211, and a first auxiliary switch. 213 is electrically connected to the first booster circuit 110 by being electrically connected to the first resonant inductor 212, and electrically connected to the first auxiliary inductor 212 and the first auxiliary switch 213 by a first auxiliary diode 214. The second auxiliary circuit 220 includes a second resonant capacitor 221 electrically connected to the second boosting circuit 120, and a second resonant inductor 222 electrically connected to the second boosting circuit 120 and the second resonant capacitor 221, The second auxiliary switch 223 is electrically connected to the second boosting circuit 120 by being electrically connected to the second resonant inductor 222, and the second auxiliary diode 224 and the second resonant inductor 222 and the second auxiliary switch 223 electrical connection. The first auxiliary switch 213 can be a gold-oxygen half-field effect transistor, and can be connected in parallel with a first auxiliary back-connecting diode 215. The first auxiliary switch 213 has a first auxiliary signal contact 216; the second auxiliary switch 223 It can be a gold-oxygen half-field effect transistor, and can be connected in parallel with a second auxiliary back-up diode 225, and the second auxiliary switch 223 has a second auxiliary signal contact 226.

而第一升壓電路110可包含一第一儲能電感111與第二升壓電路120電性連接,及一第一主開關112與第一儲能電感111電性連接,其中第一主開關112可為一金氧半場效電晶體,且可並聯一第一主背接二極體113;而第二升壓電路120包含一第二儲能電感121與第一升壓電路110電性連接,及一第二主開關122與第二儲能電感121電性 連接,其中第二主開關122可為一金氧半場效電晶體,且可並聯一第二主背接二極體123。 The first booster circuit 110 can include a first energy storage inductor 111 electrically coupled to the second booster circuit 120, and a first main switch 112 electrically coupled to the first energy storage inductor 111, wherein the first main switch The second booster circuit 120 includes a second energy storage inductor 121 electrically connected to the first booster circuit 110. The second booster circuit 120 includes a second energy storage inductor 121 electrically connected to the first booster circuit 110. And a second main switch 122 and the second energy storage inductor 121 are electrically The connection, wherein the second main switch 122 can be a MOS field effect transistor, and a second main back contact diode 123 can be connected in parallel.

其交錯升壓電路100更可包含一第一主二極體130與第一升壓電路110電性連接,一第二主二極體140與第二升壓電路120及第一主二極體130電性連接,一箝位電容150與第一主二極體130及第二主二極體140電性連接,及一負載組160與第二主二極體140電性連接;負載組160可包含一輸出電容161與第二主二極體140電性連接,及一輸出電阻162與該輸出電容161電性連接。 The interleaved boosting circuit 100 further includes a first main diode 130 electrically connected to the first boosting circuit 110, a second main diode 140 and a second boosting circuit 120, and a first main diode. 130 is electrically connected, a clamp capacitor 150 is electrically connected to the first main diode 130 and the second main diode 140, and a load group 160 is electrically connected to the second main diode 140; the load group 160 An output capacitor 161 can be electrically connected to the second main diode 140, and an output resistor 162 is electrically connected to the output capacitor 161.

依照本實施方式之一實施例,第一儲能電感111及第二儲能電感121可選用260微亨利(μH)之電感器,箝位電容150可選用470微法拉(μF)之電容器,輸出電容161可選用180微法拉(μF)之電容器;第一主開關112、第二主開關122、第一輔開關213及第二輔開關223可選用型號MOSFET IRFP460之金氧半場效電晶體;第一共振電容211及第二共振電容221因此可使用來自第一主開關112及第二主開關122之型號MOSFET IRFP460本身的雜散電容,其為870微微法拉(pF);第一共振電感212及第二共振電感222可採用50微亨利(μH)之電感器。當本實施例應用於燃料電池輸出電壓之升壓時,則燃料電池之輸出電壓即本實施例之輸入電壓V i ,其可為22至50伏特(V),則跨輸出電阻162之輸出電壓V o 可為300伏特(V),最大輸出功率可為400瓦特(W),輸出功率可為400瓦特以下而大於0瓦特,開關切換頻率為15仟赫芝(kHz),輸出電 阻162為225歐姆(Ω)。 In accordance with one embodiment of the capacitor of the present embodiment, the first inductor 111 and second inductor 121 may be selected 260 micro Henry H) of the inductor, the clamp capacitance 470 microfarads 150 optional F) of The output capacitor 161 can be selected from a capacitor of 180 microfarads ( μ F); the first main switch 112, the second main switch 122, the first auxiliary switch 213 and the second auxiliary switch 223 can be selected from the type MOSFET IRFP460 The first resonant capacitor 211 and the second resonant capacitor 221 can thus use the stray capacitance of the model MOSFET IRFP460 from the first main switch 112 and the second main switch 122, which is 870 picofarads (pF); the first resonance The inductor 212 and the second resonant inductor 222 can employ a 50 microhenry (μH) inductor. When the embodiment is applied to the boosting of the fuel cell output voltage, the output voltage of the fuel cell is the input voltage V i of the embodiment, which may be 22 to 50 volts (V), and the output voltage across the output resistor 162. V o can be 300 volts (V), the maximum output power can be 400 watts (W), the output power can be less than 400 watts and greater than 0 watts, the switching frequency is 15 Hz (kHz), and the output resistance 162 is 225. Ohm (Ω).

請參照第2A圖,其繪示依照本發明一實施方式之信號電路300的示意圖。信號電路300包含一原始信號裝置310、一第一觸發器330、一第一及閘350、一第二觸發器340及一第二及閘360。其中原始信號裝置310包含一原始信號端311可產生一原始信號PWM1,及一相位移端312可產生原始信號PWM1之一相位移信號PWM2;第一觸發器330以接點1B電性連接於原始信號端311,第一觸發器330具有一第一輸出端1Q及一第一反相端1,第一輸出端1Q可輸出一第一輔信號S r1 ;第一及閘350電性連接於第一反相端1及原始信號端311,第一及閘350具有一第二輸出端351可輸出一第一主信號S 1 ;第二觸發器340以接點2B電性連接於相位移端312,第二觸發器340具有一第三輸出端2Q及一第二反相端2,第三輸出端2Q可輸出一第二輔信號S r2 ;第二及閘360電性連接於第二反相端2及相位移端312,第二及閘360並具有一第四輸出端361可輸出一第二主信號S 2 。其中第一觸發器330具有接點1A為接地,第一觸發器330並具有一接點1R/C、一接點1C及一接點1與一電容C、一可變電阻R及一電源5V形成電性連接;第二觸發器340具有接點2A為接地,第二觸發器340並具有一接點2R/C、一接點2C及一接點2與一電容C、一可變電阻R及電源5V形成電性連接。 Please refer to FIG. 2A, which illustrates a schematic diagram of a signal circuit 300 in accordance with an embodiment of the present invention. The signal circuit 300 includes an original signal device 310, a first flip-flop 330, a first AND gate 350, a second flip-flop 340, and a second AND gate 360. The original signal device 310 includes an original signal terminal 311 for generating an original signal PWM1, and a phase shift terminal 312 for generating a phase shift signal PWM2 of the original signal PWM1; the first flip-flop 330 is electrically connected to the original by the contact 1B. The signal terminal 311 has a first output terminal 1Q and a first inversion terminal 1 The first output terminal 1Q can output a first auxiliary signal S r1 ; the first AND gate 350 is electrically connected to the first inverting terminal 1 And the original signal terminal 311, a first AND gate 350 having a second output terminal 351 may output a first main signal S 1; second flip-flop 340 is electrically connected to the contacts 2B phase shift end 312, a second flip-flop 340 has a third output terminal 2Q and a second inverter terminal 2 The third output terminal 2Q can output a second auxiliary signal S r2 ; the second AND gate 360 is electrically connected to the second inverting terminal 2 And the phase shift terminal 312, the second gate 360 and a fourth output terminal 361 can output a second main signal S 2 . The first flip-flop 330 has a contact 1A as a ground, and the first flip-flop 330 has a contact 1R/C, a contact 1C and a contact 1 Forming an electrical connection with a capacitor C, a variable resistor R, and a power source 5V; the second flip-flop 340 has a contact 2A for grounding, and the second flip-flop 340 has a contact 2R/C, a contact 2C, and One contact 2 It is electrically connected to a capacitor C, a variable resistor R and a power source 5V.

請同時參照第1圖與第2A圖,其中第一輸出端1Q、第二輸出端351、第三輸出端2Q及第四輸出端361分別電 性連接於第一輔信號接點216、第一主信號接點114、第二輔信號接點226及第二主信號接點124。 Please refer to FIG. 1 and FIG. 2A simultaneously, wherein the first output terminal 1Q, the second output terminal 351, the third output terminal 2Q, and the fourth output terminal 361 are respectively powered. The first auxiliary signal contact 216, the first main signal contact 114, the second auxiliary signal contact 226 and the second main signal contact 124 are connected.

依照本實施方式之一實施例,信號電路300中第一觸發器330及第二觸發器340可選用單穩態觸發器,其型號可為74LS123;第一及閘350及第二及閘360可選用及閘型號IC7408;原始信號裝置310可選用一PIC微控制器型號PIC18F8720,可同時產生原始信號PWM1及相位移信號PWM2,其中經程式設定,相位移信號PWM2可為原始信號PWM1之180度相位移。 According to an embodiment of the present embodiment, the first flip-flop 330 and the second flip-flop 340 in the signal circuit 300 can be selected as a monostable flip-flop, and the model can be 74LS123; the first gate 350 and the second gate 360 can be The gate type IC7408 is selected; the original signal device 310 can be selected with a PIC microcontroller model PIC18F8720, which can simultaneously generate the original signal PWM1 and the phase shift signal PWM2, wherein the phase shift signal PWM2 can be the 180 degree phase of the original signal PWM1. Displacement.

請參照第2B圖與第2A圖,第2B圖係繪示依照本發明一實施方式之信號電路300所產生訊號的波形示意圖。其中當原始信號端311產生原始信號PWM1波形如第2B圖所示,則由上述可得知如第2B圖所示之相位移信號PWM2波形、第一輸出端1Q輸出訊號波形即第一輔信號S r1 波形、第三輸出端2Q之輸出訊號波形即第二輔信號S r2 波形、第一反相端1之輸出訊號波形、第二反相端2之輸出訊號波形、第二輸出端351之輸出訊號波形即第一主信號S 1 波形,及第四輸出端361之輸出訊號波形即第二主信號S 2 波形。若電容C之電容值為C,可變電阻R之電阻值為R,則延遲時間t sd 為: 又一般延遲時間t sd 設計為原始信號PWM1切換控制信號週期之5%~10%,依照本實施方式之一實施例,選用延遲時 間t sd 為6.67微秒(μs)。 Please refer to FIG. 2B and FIG. 2A. FIG. 2B is a schematic diagram showing waveforms of signals generated by the signal circuit 300 according to an embodiment of the present invention. When the original signal terminal 311 generates the original signal PWM1 waveform as shown in FIG. 2B, the phase shift signal PWM2 waveform as shown in FIG. 2B and the first output terminal 1Q output signal waveform, that is, the first auxiliary signal, can be obtained from the above. The output signal waveform of the S r1 waveform and the third output terminal 2Q is the waveform of the second auxiliary signal S r2 and the first inverting terminal 1 Output signal waveform, second inverting terminal 2 The waveform of the output signal, the output signal waveform of the second output terminal 351 of the first main i.e. waveform signals S 1, and the output signal waveform of the fourth output terminal 361 of the primary signal S 2 that is a second waveform. If the capacitance value of the capacitor C is C and the resistance value of the variable resistor R is R , the delay time t sd is: Further, the general delay time t sd is designed to be 5% to 10% of the period of the original signal PWM1 switching control signal. According to an embodiment of the present embodiment, the delay time t sd is selected to be 6.67 microseconds ( μ s).

請參照第3圖,其繪示依照本發明一實施方式之交錯式高升壓比軟開關式轉換器操作於一週期的主要元件之波形示意圖。以下說明採用幾點假設,以使說明更清楚簡明: Referring to FIG. 3, a waveform diagram of main components of an interleaved high step-up ratio soft-switching converter operating in one cycle according to an embodiment of the present invention is shown. The following notes use a few assumptions to make the description clearer and more concise:

1.假設各開關元件包含第一主開關112、第一輔開關213、第二主開關122及第二輔開關223,與各二極體元件包含第一主二極體130、第二主二極體140、第一輔二極體214、第二輔二極體224、第一主背接二極體113、第二主背接二極體123、第一輔背接二極體215、第二輔背接二體225皆視為理想元件,即無導通壓降,且導通電阻及截止電流皆可忽略不計。 1. It is assumed that each switching element includes a first main switch 112, a first auxiliary switch 213, a second main switch 122, and a second auxiliary switch 223, and each of the diode elements includes a first main diode 130 and a second main unit The pole body 140, the first auxiliary diode 214, the second auxiliary diode 224, the first main backing diode 113, the second main backing diode 123, the first auxiliary backing diode 215, The second auxiliary backing body 225 is regarded as an ideal component, that is, there is no conduction voltage drop, and the on-resistance and the off current are negligible.

2.第一共振電容211為第一主開關112之寄生電容及其外加之電容的總值;第二共振電容221為第二主開關122之寄生電容及其外加之電容的總值。 2. The first resonant capacitor 211 is the total value of the parasitic capacitance of the first main switch 112 and its applied capacitance; the second resonant capacitor 221 is the total value of the parasitic capacitance of the second main switch 122 and its applied capacitance.

3.假設開關切換時間及共振時間,相對於第一儲能電感111電流i L1 、第二儲能121電感電流i L2 、箝位電容150電壓v C1 及輸出電容161電壓v o 的變化而言是極其短暫的,所以在切換週期T內,可將第一儲能電感111電流i L1 、第二儲能電感121電流i L2 、箝位電容150電壓v C1 及輸出電容161電壓v o ,分別視為常數值,即i L1 =I L1 i L2 =I L2 v C1 =V C1 v o =V o 3. Assume that the switching time and the resonance time are relative to the change of the first energy storage inductor 111 current i L1 , the second energy storage 121 inductor current i L2 , the clamp capacitor 150 voltage v C1 , and the output capacitor 161 voltage v o . It is extremely short, so in the switching period T , the first energy storage inductor 111 current i L1 , the second energy storage inductor 121 current i L2 , the clamp capacitor 150 voltage v C1 and the output capacitor 161 voltage v o , respectively Treated as a constant value, ie i L1 = I L1 , i L2 = I L2 , v C1 = V C1 , v o = V o .

以下依據各開關切換及各二極體導通及截止狀態,將本實施方式操作於一週期T之狀態分為14個操作模式,分別為模式1至模式14,以說明各主要元件之訊號波形: 在模式1之前,即當時間t為時間點t 0 之前,此時第一主開關112與第一輔開關213皆為截止,而第二主開關122與第一主二極體130為導通狀態,可知跨於第一主開關112之電壓v ds1 及跨於第一共振電容211之電壓為V o /2。 In the following, according to the switching of each switch and the on and off states of the diodes, the state in which the present embodiment operates in one cycle T is divided into 14 operating modes, which are mode 1 to mode 14, respectively, to illustrate the signal waveforms of the main components: Before the mode 1, that is, before the time t is the time point t 0 , the first main switch 112 and the first auxiliary switch 213 are both turned off, and the second main switch 122 and the first main diode 130 are turned on. It can be seen that the voltage v ds1 across the first main switch 112 and the voltage across the first resonant capacitor 211 are V o /2.

模式1為當時間t介於時間點t 0 至時間點t 1 之間,此時第一主二極體130仍為導通狀態,而第一主開關112延遲導通,由第一輔開關213先行導通,第一共振電感212上電壓之為V o /2,第一共振電感212之電流i Lr1由初始值零呈直線上升,可得: 當第一共振電感212之電流i Lr1持續上升至I L1時,第一主二極體130之電流i D1開始逐漸下降至零,因此第一主二極體130由導通進入至截止狀態,且具有零電流切換特性(Zero-current switching,ZCS)。在模式1中第一共振電容211之電壓v Cr1v Cr1(t)=V o /2,且流過第一主二極體130之電流i D1 為: 模式1終止於當時間t為時間點t 1 時,時間點t 0 距時間點t 1 之時間間距T 1 為: Mode 1 is when the time t is between the time point t 0 and the time point t 1 , at which time the first main diode 130 is still in the on state, and the first main switch 112 is delayed in conduction, and is preceded by the first auxiliary switch 213 . Turning on, the voltage on the first resonant inductor 212 is V o /2, and the current i Lr 1 of the first resonant inductor 212 rises linearly from the initial value of zero, and can obtain: When the current i Lr 1 of the first resonant inductor 212 continues to rise to I L 1 , the current i D 1 of the first main diode 130 begins to gradually decrease to zero, so the first main diode 130 is turned on and off. State with Zero-current switching (ZCS). In mode 1, the voltage v Cr 1 of the first resonant capacitor 211 is v Cr 1 ( t )= V o /2, and the current i D1 flowing through the first main diode 130 is: When the mode 1 terminates at time t is the time point t 1, the time point t 0 of time from the time point t 1 pitch T 1 is:

模式2為當時間t介於時間點t 1 至時間點t 2 之間,此期間第一共振電感212之電流i Lr1上升至I L1,第一共振電容211之電壓v Cr1v Cr1(t)=V o /2,第一主二極體130開始進入截止,第一輔開關213持續導通,第一共振電感212與第一共振電容211形成共振回路,此時第一共振電感212之電流i Lr1持續上升,第一共振電容211之電壓v Cr1下降,可得: 其中共振阻抗Zo1;共振頻率ω o1;模式2結束於當v Cr1V o /2持續下降至零時,此時時間t為時間點t 2 ,此時第一共振電感212之電流i Lr1為: 則時間點t 1 距時間點t 2 之時間間距T 2 為: Mode 2 is when the time t is between the time point t 1 and the time point t 2 during which the current i Lr 1 of the first resonant inductor 212 rises to I L 1 , and the voltage v Cr 1 of the first resonant capacitor 211 is v Cr 1 ( t )= V o /2, the first main diode 130 begins to enter and the first auxiliary switch 213 is continuously turned on, and the first resonant inductor 212 forms a resonant circuit with the first resonant capacitor 211, and the first resonance The current i Lr 1 of the inductor 212 continues to rise, and the voltage v Cr 1 of the first resonant capacitor 211 decreases, and it is obtained: Wherein the resonance impedance Z o1 is ; resonance frequency ω o1 is Mode 2 ends when v Cr 1 continues to decrease from V o /2 to zero, at which time time t is time point t 2 , at which time the current i Lr 1 of the first resonant inductor 212 is: T. 1 from the time point of time t 2 T 2 spacing is:

模式3為當時間t介於時間點t 2 至時間點t 3 之間,在模式3中,第一共振電容211之電壓v Cr1承接模式2持續下降至零,甚至為微小負電壓,使得第一主背接二極體113順向導通,此時第一主開關112之電壓v ds1為零;於時間t 等於時間點t 3 時模式3終止,同時可開始觸發第一主開關112以達成零電壓切換,且此時可將第一輔開關213由導通狀態切換至截止狀態。可得此時第一共振電感212電流i Lr1 及第一主開關112電流i s1為: 為使第一主開關112能達到零電壓切換(Zero-voltage switching,ZVS),可得一主開關112之延遲時間t sd 至少須滿足: 依據本實施方式之一實施例,此處第一儲能電成111電流i L1採用其峰值即I L1,max,又考慮一餘裕時間t r 後,可採用第一主開關112之延遲時間t sd 滿足下式: Mode 3 is when the time t is between the time point t 2 and the time point t 3 , in the mode 3, the voltage v Cr 1 of the first resonant capacitor 211 continues to fall to zero, even a slight negative voltage, so that The first main backing diode 113 is turned on, and the voltage v ds 1 of the first main switch 112 is zero; when the time t is equal to the time point t 3 , the mode 3 is terminated, and the first main switch 112 can be started to be triggered. In order to achieve zero voltage switching, the first auxiliary switch 213 can be switched from the on state to the off state at this time. At this time, the first resonant inductor 212 current i Lr1 and the first main switch 112 current i s 1 are: In order to enable the first main switch 112 to achieve zero-voltage switching (ZVS), the delay time t sd of a main switch 112 can be at least satisfied: According to an embodiment of the present embodiment, the first energy storage circuit 111 current i L 1 adopts a peak value thereof, I L 1,max , and after considering a margin time t r , the delay of the first main switch 112 can be adopted. The time t sd satisfies the following formula:

模式4為當時間t介於時間點t 3 至時間點t 4 之間,進入模式4時第一主開關112導通,第一輔開關213截止;第二主開關122導通,第二輔開關223截止,此時儲存至第一共振電感212之能量,藉由第一輔二極體214導通將能量釋放至負載。在第一輔二極體214導通時,第一輔開關213兩側電壓為V o ,第一共振電感212之端電壓為-V o ,因此可得第一共振電感212之電流i Lr1 於模式4期間,第一共振電感212經由第一輔二極體214釋放能量,所以第一共振電感212之電流i Lr1呈線性下降,此時第一輔二極體214之電流i Dr1等於第一共振電感212之電流i Lr1,第一主開關112之電流i S1開始呈線性上升。於時間t等於時間點t 4時,第一共振電感212電流i Lr1釋能至零,同時第一主開關112之電流i S1上升至I L1,第一輔二極體214隨之截止,第一輔開關213之電壓v Sr1變至零,此時模式4結束。則時間點t 3 距時間點t 4 之時間間距T 4 為: Mode 4 is when time t is between time point t 3 and time point t 4 . When entering mode 4, first main switch 112 is turned on, first auxiliary switch 213 is turned off; second main switch 122 is turned on, and second auxiliary switch 223 is turned on. At this time, the energy stored to the first resonant inductor 212 is released, and the first secondary diode 214 is turned on to release the energy to the load. When the first auxiliary diode 214 is turned on, the voltage of the first auxiliary switch 213 is V o , and the voltage of the first resonant inductor 212 is -V o , so the current i Lr 1 of the first resonant inductor 212 can be obtained: During mode 4, the first resonant inductor 212 releases energy via the first auxiliary diode 214, so the current i Lr 1 of the first resonant inductor 212 decreases linearly, and the current i Dr 1 of the first secondary diode 214 Equal to the current i Lr 1 of the first resonant inductor 212, the current i S 1 of the first main switch 112 begins to rise linearly. When the time t is equal to the time point t 4 , the first resonant inductor 212 current i Lr 1 is released to zero, and the current i S 1 of the first main switch 112 rises to I L 1 , and the first auxiliary diode 214 follows. As a result, the voltage v Sr 1 of the first auxiliary switch 213 changes to zero, and mode 4 ends. The point of time t from the point of time t. 3 of 4 T 4 at the pitch:

模式5為當時間t介於時間點t 4 至時間點t 5 之間,此期間第一主開關112導通,第一輔開關213截止;第二主開關122導通,第二輔開關223截止,此時第一主開關112電流i S1 、第二主開關122電流i S2 、第一共振電容211電壓v Cr1 及第二共振電容221電壓v Cr2 分別為:i S1=I L1,i S2=I L2,v Cr1(t)=0,v Cr2(t)=0,t 4 t t 5;當第二主開關122截止時,時間t為時間點t 5 ,此時模式5結束。 Mode 5 is when the time t is between the time point t 4 and the time point t 5 , during which the first main switch 112 is turned on, the first auxiliary switch 213 is turned off, the second main switch 122 is turned on, and the second auxiliary switch 223 is turned off. At this time, the first main switch 112 current i S1 , the second main switch 122 current i S2 , the first resonant capacitor 211 voltage v Cr1 and the second resonant capacitor 221 voltage v Cr2 are respectively: i S 1 = I L 1 , i S 2 = I L 2 , v Cr 1 ( t )=0, v Cr 2 ( t )=0, t 4 t t 5 ; When the second main switch 122 is turned off, the time t is the time point t 5 , at which time the mode 5 ends.

模式6為當時間t介於時間點t 5 至時間點t 6 之間。當進入模式6時,第一主開關112導通,第一輔開關213截止;第二主開關122截止,第二輔開關223也截止,此時對第二共振電容221充電,第二共振電容221之電壓v Cr2 呈直線上升,第二主二極體140電壓v D2V o /2呈直線下降,可得第二共振電容221之電壓v Cr2 為: 第二共振電容221之電壓v Cr 2呈直線上升至V o /2時,模式6結束,此時第二主二極體140開始由截止進入導通狀態且具有零電壓切換性質。時間點t 5 距時間點t 6 之時間間距T 6 為: 模式7為當時間t介於時間點t 6 至時間點t 7 之間。模式7期間,第一主開關112導通,第一輔開關213截止;第二主開關122截止,第二輔開關223也截止,第二儲能電感121與箝位電容150之能量同時釋放至輸出電容161與負載,此時可得第一主開關112電流i S1 、第二主開關122電流i S2 及箝位電容150電流i C1 、第二主二極體140電流i D2 、第一共振電容211電壓i Cr1 及第二共振電容221電壓v Cr2 為: 當第二輔開關223導通時,時間t為時間點t 7 ,模式7結束。 Mode 6 is when time t is between time point t 5 and time point t 6 . When entering mode 6, the first main switch 112 is turned on, the first auxiliary switch 213 is turned off; the second main switch 122 is turned off, and the second auxiliary switch 223 is also turned off. At this time, the second resonant capacitor 221 is charged, and the second resonant capacitor 221 is charged. The voltage v Cr2 rises linearly, and the voltage v D 2 of the second main diode 140 decreases linearly from V o /2, and the voltage v Cr2 of the second resonant capacitor 221 is obtained as follows: When the voltage v Cr 2 of the second resonant capacitor 221 rises linearly to V o /2, mode 6 ends, at which time the second main diode 140 begins to be turned off and has a zero voltage switching property. From the time point t. 5 points of time t 6 and T 6 is spacing: Mode 7 is when time t is between time point t 6 and time point t 7 . During mode 7, the first main switch 112 is turned on, the first auxiliary switch 213 is turned off; the second main switch 122 is turned off, the second auxiliary switch 223 is also turned off, and the energy of the second energy storage inductor 121 and the clamp capacitor 150 is simultaneously released to the output. The capacitor 161 and the load, at this time, the first main switch 112 current i S1 , the second main switch 122 current i S2 and the clamp capacitor 150 current i C1 , the second main diode 140 current i D2 , the first resonant capacitor 211 voltage i Cr1 and second resonance capacitor 221 voltage v Cr2 are: When the second sub-switch 223 is turned on, the time t is the time point t 7 and the mode 7 ends.

模式8為當時間t介於時間點t 7 至時間點t 8 之間。進入模式8時,第一主開關112導通,第一輔開關213截止;第二主開關122進入截止,第二輔開關223導通,跨於第 二主開關122、第二共振電容221及箝位電容150之電壓均為Vo/2。於模式8期間,第二主二極體140仍然為導通狀態,第二主開關122延遲導通,由第二輔開關223先行導通,第二共振電感222上之電壓為Vo/2,第二共振電感222之電流i Lr2由零呈直線上升,於是可得第二共振電感222電流為: 當第二共振電感222之電流i Lr2 於時間點t 7 至時間點t 8 期間持續上升至I L2 時,第二主二極體140之電流i D2開始逐漸下降至零,因此第二主二極體140由導通進入至截止狀態時具有零電流切換性質。在模式8期間,第二共振電容221之電壓v Cr2(t)=V o /2,且流過第二主二極體140之電流i D2 為: 當時間t為時間點t 8 時,模式8終止。時間點t 7 距時間點t 8 之時間間距T 8 為: Mode when the time t 8 to time t between time t between the point 7 to 8. When entering mode 8, the first main switch 112 is turned on, the first auxiliary switch 213 is turned off; the second main switch 122 is turned off, and the second auxiliary switch 223 is turned on, across the second main switch 122, the second resonant capacitor 221, and the clamp The voltage of the capacitor 150 is Vo/2 . During the mode 8, the second main diode 140 is still in the on state, the second main switch 122 is delayed in conduction, and the second auxiliary switch 223 is turned on first, and the voltage on the second resonant inductor 222 is Vo/2 , the second resonance The current i Lr 2 of the inductor 222 rises linearly from zero, so that the current of the second resonant inductor 222 is: When the current i Lr2 of the second resonant inductor 222 continues to rise to I L2 during the time point t 7 to the time point t 8 , the current i D 2 of the second main diode 140 begins to gradually decrease to zero, so the second main The diode 140 has a zero current switching property from the conduction to the off state. During mode 8, the voltage v Cr 2 ( t ) of the second resonant capacitor 221 = V o /2, and the current i D2 flowing through the second main diode 140 is: When time t is time point t 8 , mode 8 is terminated. T. 7 from the time point of time t 8 to the pitch T 8:

模式9為當時間t介於時間點t 8 至時間點t 9 之間。於模式9期間,第二共振電感222之電流i Lr2繼續上升,第二共振電容221之電壓v Cr2v Cr2(t)=V o /2,第二主二極體140截止,第二輔開關223持續導通,第二共振電感222與第二共振電容221形成共振回路,此時第二共振電感222之 電流i Lr2持續上升,第二共振電容221之電壓v Cr2下降。因共振阻抗Z o2 ,共振頻率ω o2 ;則可得第二共振電感222之電流i Lr2及第二共振電容221之電壓v Cr2分別為: 當第二共振電容221之電壓v Cr2Vo/2持續下降至零時,此模式9結束。模式9結束時時間t為時間點t 9 ,此時第二共振電感222之電流i Lr2為: 時間點t 8 距時間點t 9 之時間間距T 9 為: Mode 9 is when time t is between time point t 8 and time point t 9 . During mode 9, the current i Lr 2 of the second resonant inductor 222 continues to rise, the voltage v Cr 2 of the second resonant capacitor 221 is v Cr 2 ( t )= V o /2, and the second main diode 140 is turned off. The second auxiliary switch 223 is continuously turned on, and the second resonant inductor 222 and the second resonant capacitor 221 form a resonant circuit. At this time, the current i Lr 2 of the second resonant inductor 222 continues to rise, and the voltage v Cr 2 of the second resonant capacitor 221 decreases. Due to the resonance impedance Z o2 , the resonance frequency ω o2 is The current i Lr 2 of the second resonant inductor 222 and the voltage v Cr 2 of the second resonant capacitor 221 are respectively: This mode 9 ends when the voltage v Cr 2 of the second resonant capacitor 221 continues to drop from Vo/2 to zero. At the end of mode 9, time t is time point t 9 , at which time the current i Lr 2 of the second resonant inductor 222 is: From the point of time t time t. 8 9 9 as the pitch T:

模式10為當時間t介於時間點t 9 至時間點t 10 之間。於模式10期間,承接模式9第二共振電容221之電壓V Cr2持續下降至微小負電壓,使得第二主背接二極體123順向導通,此時第二主開關122之電壓V ds2為零。於時間t為時間點t 10 時,模式10終止,同時開始觸發第二主開關122使其達成零電壓切換,同時第二輔開關223由導通狀態切換至截止狀態。可得第二共振電感222之電流i Lr2 及第二主開關122之電流i S2 為: 為使第二主開關122達成零電壓切換,可得延遲時間t sd 至少須滿足下式: 又為確保能達到零電壓切換,依據本實施方式之一實施例,此處選用第二儲能電感121之電流I L2的最大值,即滿載時i L2之峰值I L2,max以計算延遲時間t sd ,因延遲時間t sd 通常選擇為切換週期T之5%~10%,因延遲時間t sd 時間甚短,故對交錯升壓電路影響不大,考慮到第二主開關122可以完全進入導通及第二輔開關223進入截止之恢復過程,而考慮一餘裕時間t r ,以獲得更可靠之延遲時間t sd ,以確保上式條件滿足。所以採用第二主開關122之延遲時間t sd 為: Mode when the time t 10 to time t between time t between the points 9 to 10. During the mode 10, the voltage V Cr 2 of the second resonant capacitor 221 of the receiving mode 9 continues to drop to a slight negative voltage, so that the second main backing diode 123 is turned on, and the voltage of the second main switch 122 is V ds. 2 is zero. When the time t is the time point t 10 , the mode 10 is terminated, and at the same time, the second main switch 122 is started to be triggered to achieve zero voltage switching, and the second auxiliary switch 223 is switched from the on state to the off state. The current i Lr2 of the second resonant inductor 222 and the current i S2 of the second main switch 122 are: In order for the second main switch 122 to achieve zero voltage switching, the delay time t sd can be at least satisfied by: In order to ensure zero voltage switching, according to an embodiment of the present embodiment, the maximum value of the current I L 2 of the second energy storage inductor 121 is selected, that is, the peak value I L 2,max of i L 2 at full load is The delay time t sd is calculated. Since the delay time t sd is usually selected as 5% to 10% of the switching period T, since the delay time t sd is very short, the influence on the interleaved boost circuit is not large, considering the second main switch 122 The recovery process can be fully entered and the second auxiliary switch 223 enters the cutoff, and a margin time t r is considered to obtain a more reliable delay time t sd to ensure that the above condition is satisfied. Therefore, the delay time t sd of the second main switch 122 is:

模式11為當時間t介於時間點t 10 至時間點t 11 之間。進入模式11時,第一主開關112導通,第一輔開關213截止;第二主開關122導通,第二輔開關223截止,此時儲存至第二共振電感222之能量,藉由第二輔二極體224導通將能量釋放至負載。在第二輔二極體224導通時,第二輔開關223兩端電壓為Vo,第二共振電感222之端電壓為-Vo。可得第二共振電感222電流i Lr2 為: 於模式11期間,第二共振電感222經由第二輔二極體224釋放能量,故第二共振電感222之電流i Lr2呈線性下降,此時第二輔二極體224之電流i Dr2等於第二共振電感222之電流i Lr2,第二主開關122之電流i S2開始呈線性上升。當時間t為時間點t 11 時,第二共振電感222之電流i Lr2釋能至零,同時第二主開關122之電流i S2上升至I L2,第二輔二極體224隨之截止,第二輔開關223之電壓V Sr2降為零,此時模式11結束。時間點t 10 距時間點t 11 之時間間距T 11 為: Mode 11 is when time t is between time point t 10 and time point t 11 . When entering mode 11, the first main switch 112 is turned on, the first auxiliary switch 213 is turned off; the second main switch 122 is turned on, and the second auxiliary switch 223 is turned off, and the energy stored to the second resonant inductor 222 is stored by the second auxiliary Diode 224 conducts to release energy to the load. When the second auxiliary diode 224 is turned on, the voltage across the second auxiliary switch 223 is Vo , and the voltage at the end of the second resonant inductor 222 is - Vo . The second resonant inductor 222 current i Lr2 is obtained as follows: During mode 11, the second resonant inductor 222 releases energy via the second auxiliary diode 224, so that the current i Lr 2 of the second resonant inductor 222 decreases linearly, and the current i Dr 2 of the second secondary diode 224 Equal to the current i Lr 2 of the second resonant inductor 222, the current i S 2 of the second main switch 122 begins to rise linearly. When the time t is the time point t 11 , the current i Lr 2 of the second resonant inductor 222 is released to zero, and the current i S 2 of the second main switch 122 rises to I L 2 , and the second auxiliary diode 224 follows At the end, the voltage V Sr 2 of the second auxiliary switch 223 is reduced to zero, at which time the mode 11 ends. 10 from the point of time t time t 11 T 11 is the spacing:

模式12為當時間t介於時間點t 11 至時間點t 12 之間。於模式12時,第一主開關112導通,第一輔開關213截止;第二主開關122導通,第二輔開關223截止,此時可得第一主開關112電流i S1 、第二主開關122電流i S2 、第一共振電容211電壓v Cr1 及第二共振電容221電壓v Cr2 為:i S1=I L1,i S2=I L2,v Cr1(t)=0,v Cr2(t)=0,t 11 t t 12;當第一主開關112截止時,時間t為時間點t 12 ,模式12終止。 Mode 12 is when time t is between time point t 11 and time point t 12 . In mode 12, the first main switch 112 is turned on, the first auxiliary switch 213 is turned off; the second main switch 122 is turned on, and the second auxiliary switch 223 is turned off. At this time, the first main switch 112 current i S1 and the second main switch are obtained. 122 current i S2 , first resonant capacitor 211 voltage v Cr1 and second resonant capacitor 221 voltage v Cr2 are: i S 1 = I L 1 , i S 2 = I L 2 , v Cr 1 ( t )=0, v Cr 2 ( t )=0, t 11 t t 12 ; When the first main switch 112 is turned off, the time t is the time point t 12 and the mode 12 is terminated.

模式13為當時間t介於時間點t 12 至時間點t 13 之間。進入模式13時第一主開關112截止,第一輔開關213截止;第二主開關122持續導通,第二輔開關223截止,此時對第一共振電容211充電,第一共振電容211之電壓v C r1呈直線上升,第一主二極體130電壓v D1 Vo/2呈直線下降,可得第一共振電容211之電壓v Cr1 為: 第一共振電容211之電壓v Cr 1呈直線上升至Vo/2時,模式13結束,同時第一主二極體130開始由截止進入導通狀態且具有零電壓切換性質。時間點t 12 距時間點t 13 之時間間距T 13 為: Mode 13 is when time t is between time point t 12 and time point t 13 . When the mode 13 is entered, the first main switch 112 is turned off, the first auxiliary switch 213 is turned off, the second main switch 122 is continuously turned on, and the second auxiliary switch 223 is turned off. At this time, the first resonant capacitor 211 is charged, and the voltage of the first resonant capacitor 211 is turned on. v C r1 rises in a straight line, and the voltage v D1 of the first main diode 130 decreases linearly from Vo/2, and the voltage v Cr1 of the first resonant capacitor 211 is obtained as follows: When the voltage v Cr 1 of the first resonant capacitor 211 rises linearly to Vo/2 , the mode 13 ends, and the first main diode 130 starts to enter the on state from the off state and has a zero voltage switching property. 12 is a time point t 13 from the point of time t as the spacing T 13:

模式14為當時間t介於時間點t 13 至時間點t 14 之間。其中當時間t為時間點t 14 時,電路組態又回復為相同於時間t為時間點t 0 時之電路組態,意即從模式1至模式14即完成一週期之操作。於模式14期間,第一主開關112截止,第一輔開關213截止;第二主開關122導通,第二輔開關223截止。又此期間第一主二極體130導通,將第一儲能電感111之能量釋放給箝位電容150,對箝位電容150進行充電,此時第一共振電容211之電壓為Vo/2,第一主二極體130之電流i D1i D1(t)=I L1。當時間t為時間點t 14 時,可得第一主開關112電流i S1 、第二主開關122電流i S2 、第一共振電容211電壓v Cr1 、第二共振電容221電壓v Cr2 為: 當時間t為時間點t 14 時,模式14結束,並且此時電路組態相同於時間t為時間點t 0 時之電路組態。 Mode 14 is when time t is between time point t 13 and time point t 14 . When the time t is the time point t 14 , the circuit configuration returns to the same circuit configuration as the time t is the time point t 0 , that is, the operation from the mode 1 to the mode 14 is completed. During mode 14, the first main switch 112 is turned off, the first sub-switch 213 is turned off, the second main switch 122 is turned on, and the second sub-switch 223 is turned off. During this period, the first main diode 130 is turned on, and the energy of the first energy storage inductor 111 is released to the clamp capacitor 150 to charge the clamp capacitor 150. At this time, the voltage of the first resonant capacitor 211 is Vo/2 . The current i D 1 of the first main diode 130 is i D 1 (t)= I L 1 . When the time t is the time point t 14 , the first main switch 112 current i S1 , the second main switch 122 current i S2 , the first resonant capacitor 211 voltage v Cr1 , and the second resonant capacitor 221 voltage v Cr2 are: When the time t is the time point t 14 , the mode 14 ends, and the circuit configuration at this time is the same as the circuit configuration when the time t is the time point t 0 .

由以上各模式之分析可得知依照本實施方式之交錯式 高升壓比軟開關式轉換器,第一主開關112、第二主開關122、第一輔開關213、第二輔開關223、第一主二極體130、第二主二極體140、第一輔二極體214及第二輔二極體224之軟開關特性如下:第一主開關112及第二主開關122於導通時具有零電壓切換及零電流切換性質;第一主開關112及第二主開關122於截止時具有零電壓切換性質;第一主二極體130及第二主二極體140於導通時具有零電壓切換性質;第一主二極體130及第二主二極體140於截止時具有零電流切換性質;第一輔開關213及第二輔開關223於導通時具有零電流切換性質;第一輔二極體214及第二輔二極體224於導通時具有零電壓切換及零電流切換性質;第一輔二極體214及第二輔二極體224於截止時亦具有零電壓切換及零電流切換性質。 The interleaving according to the present embodiment can be known from the analysis of the above modes. a high step-up ratio soft-switching converter, a first main switch 112, a second main switch 122, a first auxiliary switch 213, a second auxiliary switch 223, a first main diode 130, a second main diode 140, The soft switching characteristics of the first auxiliary diode 214 and the second auxiliary diode 224 are as follows: the first main switch 112 and the second main switch 122 have zero voltage switching and zero current switching properties when turned on; the first main switch 112 And the second main switch 122 has zero voltage switching property when turned off; the first main diode 130 and the second main diode 140 have zero voltage switching property when turned on; the first main diode 130 and the second main The diode 140 has zero current switching property when turned off; the first auxiliary switch 213 and the second auxiliary switch 223 have zero current switching property when turned on; the first auxiliary diode 214 and the second auxiliary diode 224 are turned on. The utility model has zero voltage switching and zero current switching properties; the first auxiliary diode 214 and the second auxiliary diode 224 also have zero voltage switching and zero current switching properties when turned off.

上述之第一共振電容211可為第一主開關112之寄生電容或外加式電容,第二共振電容221可為第二主開關122之寄生電容或外加式電容。 The first resonant capacitor 211 may be a parasitic capacitor or an external capacitor of the first main switch 112, and the second resonant capacitor 221 may be a parasitic capacitor or an external capacitor of the second main switch 122.

又上述依照本發明之實施方式可將軟開關電路200及信號電路300獨立於交錯升壓電路100之外,成為模組化結構,而使軟開關電路200可獨立電性連接並運作於習知之硬式切換的交錯式高升壓比轉換器,再以信號電路300施以控制,使得習用之硬式切換的交錯式高升壓比轉換器可以在低成本、延用原有電路架構的前提下,應用本發明所提出之架構,進而享有應用本發明所具有之優點。 In addition, according to the embodiment of the present invention, the soft switching circuit 200 and the signal circuit 300 can be independent of the interleaved boosting circuit 100 to form a modular structure, and the soft switching circuit 200 can be electrically connected and operated independently. The hard-switched interleaved high-boost ratio converter is controlled by the signal circuit 300, so that the conventional hard-switching interleaved high-boost ratio converter can be implemented at a low cost and using the original circuit architecture. The architecture proposed by the present invention is applied to further enjoy the advantages of applying the present invention.

又上述依照本發明之實施方式不限於本實施方式所述之二級架構,當交錯升壓電路100具備更多主開關元件時,軟開關電路200亦相對具備更多輔開關元件、共振電容元件及共振電感元件,而延遲時間t sd 之計算方式亦可延用上述說明而求得,進而可得相應之信號電路300。 The embodiment of the present invention is not limited to the secondary architecture described in this embodiment. When the interleaved booster circuit 100 has more main switching components, the soft switching circuit 200 also has more auxiliary switching components and resonant capacitive components. And the resonant inductor element, and the calculation method of the delay time t sd can also be obtained by using the above description, and the corresponding signal circuit 300 can be obtained.

由上述本發明實施方式可知,應用本發明具有下列優點: It can be seen from the above embodiments of the present invention that the application of the present invention has the following advantages:

1.使主開關元件之切換損失減少,進而提升轉換器之轉換效率。 1. Reduce the switching loss of the main switching element, thereby improving the conversion efficiency of the converter.

2.降低開關元件之切換應力及導通損失。 2. Reduce the switching stress and conduction loss of the switching elements.

3.提供模組化的結構,使易於實現交錯式高升壓比軟開關式轉換器,且易於改善習用之硬式切換交錯式高升壓比轉換器成為交錯式高升壓比軟開關式轉換器。 3. Provide modular structure, easy to implement interleaved high step-up ratio soft-switching converter, and easy to improve the conventional hard-switching interleaved high-boost ratio converter to become interleaved high-boost ratio soft-switching conversion Device.

4.所提出之電路架構簡單,大幅使實現交錯式高升壓比軟開關式轉換器更為簡易。 4. The proposed circuit architecture is simple, and it is much easier to implement an interleaved high step-up ratio soft-switching converter.

雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.

100‧‧‧交錯升壓電路 100‧‧‧Interleaved boost circuit

110‧‧‧第一升壓電路 110‧‧‧First booster circuit

111‧‧‧第一儲能電感 111‧‧‧First energy storage inductor

112‧‧‧第一主開關 112‧‧‧First main switch

113‧‧‧第一主背接二極體 113‧‧‧The first main backing diode

114‧‧‧第一主信號接點 114‧‧‧First main signal contact

120‧‧‧第二升壓電路 120‧‧‧second boost circuit

121‧‧‧第二儲能電感 121‧‧‧Second energy storage inductance

122‧‧‧第二主開關 122‧‧‧Second main switch

123‧‧‧第二主背接二極體 123‧‧‧Second main backing diode

124‧‧‧第二主信號接點 124‧‧‧second main signal contact

130‧‧‧第一主二極體 130‧‧‧First main diode

140‧‧‧第二主二極體 140‧‧‧Second main diode

150‧‧‧箝位電容 150‧‧‧Clamp Capacitor

160‧‧‧負載組 160‧‧‧Load group

161‧‧‧輸出電容 161‧‧‧Output capacitor

162‧‧‧輸出電阻 162‧‧‧Output resistance

200‧‧‧軟開關電路 200‧‧‧Soft Switching Circuit

210‧‧‧第一輔電路 210‧‧‧First auxiliary circuit

211‧‧‧第一共振電容 211‧‧‧First Resonance Capacitor

212‧‧‧第一共振電感 212‧‧‧First Resonance Inductance

213‧‧‧第一輔開關 213‧‧‧First auxiliary switch

214‧‧‧第一輔二極體 214‧‧‧First secondary diode

215‧‧‧第一輔背接二極體 215‧‧‧First auxiliary backing diode

216‧‧‧第一輔信號接點 216‧‧‧First auxiliary signal contact

220‧‧‧第二輔電路 220‧‧‧second secondary circuit

221‧‧‧第二共振電容 221‧‧‧Second resonant capacitor

222‧‧‧第二共振電感 222‧‧‧Second resonant inductor

223‧‧‧第二輔開關 223‧‧‧Second auxiliary switch

224‧‧‧第二輔二極體 224‧‧‧Second secondary diode

225‧‧‧第二輔背接二極體 225‧‧‧Second auxiliary backing diode

226‧‧‧第二輔信號接點 226‧‧‧second secondary signal contact

300‧‧‧信號電路 300‧‧‧Signal circuit

310‧‧‧原始信號裝置 310‧‧‧original signalling device

311‧‧‧原始信號端 311‧‧‧ original signal end

312‧‧‧相位移端 312‧‧‧ phase shift end

330‧‧‧第一觸發器 330‧‧‧First trigger

340‧‧‧第二觸發器 340‧‧‧second trigger

350‧‧‧第一及閘 350‧‧‧First Gate

351‧‧‧第二輸出端 351‧‧‧second output

360‧‧‧第二及閘 360‧‧‧Second Gate

361‧‧‧第四輸出端 361‧‧‧ fourth output

i D1 ‧‧‧第一主二極體之電流 i D1 ‧‧‧The current of the first main diode

i D2 ‧‧‧第二主二極體之電流 i D2 ‧‧‧second main diode current

i Lr1 ‧‧‧第一共振電感之電流 i Lr1 ‧‧‧The current of the first resonant inductor

i Lr2 ‧‧‧第二共振電感之電流 i Lr2 ‧‧‧second resonant inductor current

i S1 ‧‧‧第一主開關之電流 i S1 ‧‧‧The current of the first main switch

i S2 ‧‧‧第二主開關之電流 i S2 ‧‧‧second main switch current

i Sr1 ‧‧‧第一輔開關之電流 i Sr1 ‧‧‧The current of the first auxiliary switch

i Sr2 ‧‧‧第二輔開關之電流 i Sr2 ‧‧‧second auxiliary switch current

v ds1 ‧‧‧第一主開關之電壓 v ds1 ‧‧‧voltage of the first main switch

v ds2 ‧‧‧第二主開關之電壓 v ds2 ‧‧‧voltage of the second main switch

v D1 ‧‧‧第一主二極體之電壓 v D1 ‧‧‧The voltage of the first main diode

v D2 ‧‧‧第二主二極體之電壓 v D2 ‧‧‧Voltage of the second main diode

v Sr1 ‧‧‧第一輔開關之電壓 v Sr1 ‧‧‧The voltage of the first auxiliary switch

v Sr2 ‧‧‧第二輔開關之電壓 v Sr2 ‧‧‧ voltage of the second auxiliary switch

S 1 ‧‧‧第一主信號 S 1 ‧‧‧first main signal

S 2 ‧‧‧第二主信號 S 2 ‧‧‧second main signal

S r1 ‧‧‧第一輔信號 S r1 ‧‧‧first auxiliary signal

S r2 ‧‧‧第二輔信號 S r2 ‧‧‧second secondary signal

t‧‧‧時間 t ‧‧‧Time

t 0 -t 14 ‧‧‧時間點 t 0 -t 14 ‧‧‧ time

V i ‧‧‧輸入電壓 V i ‧‧‧ input voltage

V o ‧‧‧輸出電壓 V o ‧‧‧output voltage

PWM1‧‧‧原始信號 PWM1‧‧‧ original signal

PWM2‧‧‧相位移信號 PWM2‧‧‧ phase shift signal

1Q‧‧‧第一輸出端 1Q‧‧‧ first output

1‧‧‧第一反相端 1 ‧‧‧first inverting end

2Q‧‧‧第三輸出端 2Q‧‧‧ third output

2‧‧‧第二反相端 2 ‧‧‧Second inverting end

1A、1B、1R/C、1C、1、1Q、1、2A、2B、2R/C、2C、2、2Q、2‧‧‧接點 1A, 1B, 1R/C, 1C, 1 , 1Q, 1 , 2A, 2B, 2R/C, 2C, 2 , 2Q, 2 ‧‧‧contact

SV‧‧‧電壓源 SV‧‧‧ voltage source

C‧‧‧電容 C‧‧‧ capacitor

R‧‧‧可變電阻 R‧‧‧Variable resistor

為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:第1圖係繪示依照本發明一實施方式之交錯式高升壓 比軟開關式轉換器的電路圖。 The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; A circuit diagram of a softer switching converter.

第2A圖係繪示依照本發明一實施方式之信號電路的示意圖。 2A is a schematic diagram showing a signal circuit in accordance with an embodiment of the present invention.

第2B圖係繪示依照本發明一實施方式之信號電路所產生訊號的波形示意圖。 FIG. 2B is a schematic diagram showing the waveform of a signal generated by a signal circuit according to an embodiment of the present invention.

第3圖係繪示依照本發明一實施方式之交錯式高升壓比軟開關式轉換器操作於一週期的主要元件之波形示意圖。 3 is a waveform diagram showing main components of an interleaved high step-up ratio soft-switching converter operating in one cycle according to an embodiment of the present invention.

100‧‧‧交錯升壓電路 100‧‧‧Interleaved boost circuit

110‧‧‧第一升壓電路 110‧‧‧First booster circuit

111‧‧‧第一儲能電感 111‧‧‧First energy storage inductor

112‧‧‧第一主開關 112‧‧‧First main switch

113‧‧‧第一主背接二極體 113‧‧‧The first main backing diode

114‧‧‧第一主信號接點 114‧‧‧First main signal contact

120‧‧‧第二升壓電路 120‧‧‧second boost circuit

121‧‧‧第二儲能電感 121‧‧‧Second energy storage inductance

122‧‧‧第二主開關 122‧‧‧Second main switch

123‧‧‧第二主背接二極體 123‧‧‧Second main backing diode

124‧‧‧第二主信號接點 124‧‧‧second main signal contact

130‧‧‧第一主二極體 130‧‧‧First main diode

140‧‧‧第二主二極體 140‧‧‧Second main diode

150‧‧‧箝位電容 150‧‧‧Clamp Capacitor

160‧‧‧負載組 160‧‧‧Load group

161‧‧‧輸出電容 161‧‧‧Output capacitor

162‧‧‧輸出電阻 162‧‧‧Output resistance

200‧‧‧軟開關電路 200‧‧‧Soft Switching Circuit

210‧‧‧第一輔電路 210‧‧‧First auxiliary circuit

211‧‧‧第一共振電容 211‧‧‧First Resonance Capacitor

212‧‧‧第一共振電感 212‧‧‧First Resonance Inductance

213‧‧‧第一輔開關 213‧‧‧First auxiliary switch

214‧‧‧第一輔二極體 214‧‧‧First secondary diode

215‧‧‧第一輔背接二極體 215‧‧‧First auxiliary backing diode

216‧‧‧第一輔信號接點 216‧‧‧First auxiliary signal contact

220‧‧‧第二輔電路 220‧‧‧second secondary circuit

221‧‧‧第二共振電容 221‧‧‧Second resonant capacitor

222‧‧‧第二共振電感 222‧‧‧Second resonant inductor

223‧‧‧第二輔開關 223‧‧‧Second auxiliary switch

224‧‧‧第二輔二極體 224‧‧‧Second secondary diode

225‧‧‧第二輔背接二極體 225‧‧‧Second auxiliary backing diode

226‧‧‧第二輔信號接點 226‧‧‧second secondary signal contact

V i ‧‧‧輸入電壓 V i ‧‧‧ input voltage

V o ‧‧‧輸出電壓 V o ‧‧‧output voltage

Claims (10)

一種交錯式高升壓比軟開關式轉換器,其包含:一交錯升壓電路,其包含:一第一升壓電路,及一第二升壓電路,其與該第一升壓電路電性連接;以及一軟開關電路,其與該交錯升壓電路電性連接,該軟開關電路包含:一第一輔電路,其包含:一第一共振電容,其與該第一升壓電路電性連接;一第一共振電感,其與該第一升壓電路及該第一共振電容電性連接;一第一輔開關,其藉由與該第一共振電感電性連接而與該第一升壓電路電性連接;及一第一輔二極體,其與該第一共振電感及該第一輔開關電性連接;以及一第二輔電路,其包含:一第二共振電容,其與該第二升壓電路電性連接;一第二共振電感,其與該第二升壓電路及該第二共振電容電性連接;一第二輔開關,其藉由與該第二共振電感電 性連接而與該第二升壓電路電性連接;及一第二輔二極體,其與該第二共振電感及該第二輔開關電性連接。 An interleaved high step-up ratio soft-switching converter comprising: an interleaved boost circuit comprising: a first boost circuit, and a second boost circuit electrically coupled to the first boost circuit And a soft switching circuit electrically connected to the interleaved boosting circuit, the soft switching circuit comprising: a first auxiliary circuit comprising: a first resonant capacitor electrically coupled to the first boosting circuit a first resonant inductor electrically connected to the first boosting circuit and the first resonant capacitor; a first auxiliary switch electrically connected to the first resonant inductor and the first rising The voltage circuit is electrically connected; and a first auxiliary diode electrically connected to the first resonant inductor and the first auxiliary switch; and a second auxiliary circuit comprising: a second resonant capacitor, and The second boosting circuit is electrically connected; a second resonant inductor is electrically connected to the second boosting circuit and the second resonant capacitor; and a second auxiliary switch is electrically connected to the second resonant inductor The second booster circuit is electrically connected to the second booster circuit, and is electrically connected to the second resonant inductor and the second auxiliary switch. 如請求項1之交錯式高升壓比軟開關式轉換器,其中該第一升壓電路包含:一第一儲能電感,其與該第二升壓電路電性連接;及一第一主開關,其與該第一儲能電感電性連接。 The interleaved high step-up ratio soft-switching converter of claim 1, wherein the first boosting circuit comprises: a first energy storage inductor electrically connected to the second boosting circuit; and a first main And a switch electrically connected to the first energy storage inductor. 如請求項1之交錯式高升壓比軟開關式轉換器,其中該第二升壓電路包含:一第二儲能電感,其與該第一升壓電路電性連接;及一第二主開關,其與該第二儲能電感電性連接。 The interleaved high step-up ratio soft-switching converter of claim 1, wherein the second boosting circuit comprises: a second energy storage inductor electrically connected to the first boosting circuit; and a second main And a switch electrically connected to the second energy storage inductor. 如請求項1之交錯式高升壓比軟開關式轉換器,其中該交錯升壓電路更包含:一第一主二極體,其與該第一升壓電路電性連接;一第二主二極體,其與該第二升壓電路及該第一主二極體電性連接;一箝位電容,其與該第一主二極體及該第二主二極體電性連接;以及一負載組,其與該第二主二極體電性連接,該負載組包含: 一輸出電容,其與該第二主二極體電性連接;及一輸出電阻,其與該輸出電容電性連接。 The interleaved high step-up ratio soft-switching converter of claim 1, wherein the interleaved boosting circuit further comprises: a first main diode, electrically connected to the first boosting circuit; and a second main a diode, electrically connected to the second booster circuit and the first main diode; a clamp capacitor electrically connected to the first main diode and the second main diode; And a load group electrically connected to the second main diode, the load group comprising: An output capacitor electrically connected to the second main diode; and an output resistor electrically connected to the output capacitor. 如請求項1之交錯式高升壓比軟開關式轉換器,其中更包含一信號電路,其與該交錯升壓電路電性連接,該信號電路包含:一原始信號裝置,其包含:一原始信號端,其可輸出一原始信號;及一相位移端,其可輸出該原始信號之一相位移信號;一第一觸發器,其電性連接於該原始信號端,該第一觸發器具一第一輸出端及一第一反相端;一第一及閘,其電性連接於該第一反相端及該原始信號端,該第一及閘具一第二輸出端;一第二觸發器,其電性連接於該相位移端,該第二觸發器具一第三輸出端及一第二反相端;及一第二及閘,其電性連接於該第二反相端及該相位移端,該第二及閘具一第四輸出端;其中該第一輸出端、第二輸出端、第三輸出端及第四輸出端分別電性連接於該第一輔開關、該第一主開關、該第二輔開關及該第二主開關。 The interleaved high step-up ratio soft-switching converter of claim 1, further comprising a signal circuit electrically coupled to the interleaved boosting circuit, the signal circuit comprising: an original signal device comprising: an original a signal end, which can output an original signal; and a phase shift end, which can output a phase shift signal of the original signal; a first flip-flop electrically connected to the original signal end, the first trigger has a a first output end and a first inverting end; a first AND gate electrically connected to the first inverting end and the original signal end, the first and the second side of the brake device; a second a trigger is electrically connected to the phase shifting end, the second trigger has a third output end and a second inverting end, and a second gate is electrically connected to the second inverting end and The second output end, the second output end, the third output end, and the fourth output end are electrically connected to the first auxiliary switch, respectively a first main switch, the second auxiliary switch, and the second main switch. 如請求項5之交錯式高升壓比軟開關式轉換器,其中該原始信號裝置為一PIC微控制器。 The interleaved high step-up ratio soft-switching converter of claim 5, wherein the original signal device is a PIC microcontroller. 如請求項5之交錯式高升壓比軟開關式轉換器,其中該第一觸發器及該第二觸發器為單穩態觸發器。 The interleaved high step-up ratio soft-switching converter of claim 5, wherein the first flip-flop and the second flip-flop are monostable flip-flops. 如請求項1之交錯式高升壓比軟開關式轉換器,其中該第一共振電容為外加式電容或第一主開關之雜散電容,該第二共振電容為外加式電容或第二主開關之雜散電容。 The interleaved high step-up ratio soft-switching converter of claim 1, wherein the first resonant capacitor is an external capacitor or a stray capacitance of the first main switch, and the second resonant capacitor is an external capacitor or a second main The stray capacitance of the switch. 如請求項1之交錯式高升壓比軟開關式轉換器,其中該第一輔開關及該第二輔開關為金氧半場效電晶體。 The interleaved high step-up ratio soft-switching converter of claim 1, wherein the first auxiliary switch and the second auxiliary switch are gold-oxygen half field effect transistors. 如請求項9之交錯式高升壓比軟開關式轉換器,其中該第一輔開關及該第二輔開關各自並聯一背接二極體。 The interleaved high step-up ratio soft-switching converter of claim 9, wherein the first auxiliary switch and the second auxiliary switch are each connected in parallel with a diode.
TW101134141A 2012-09-18 2012-09-18 High voltage ratio interleaved converter with soft-switching TWI462449B (en)

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CN105656296A (en) * 2014-11-17 2016-06-08 艾默生网络能源有限公司 Soft switch auxiliary circuit, two-phase or three-phase input PFC circuit and control method
CN113346751A (en) * 2021-07-21 2021-09-03 南通大学 Dual-input-inductor soft-switching high-gain converter and control method thereof

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TW200836050A (en) * 2007-02-16 2008-09-01 Lead Year Entpr Co Ltd Soft switching circuit of power supply
TWM426947U (en) * 2011-12-08 2012-04-11 Nat Univ Chin Yi Technology Interleaved dc-dc converter

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105656296A (en) * 2014-11-17 2016-06-08 艾默生网络能源有限公司 Soft switch auxiliary circuit, two-phase or three-phase input PFC circuit and control method
CN105656296B (en) * 2014-11-17 2019-05-10 维谛技术有限公司 Sofe Switch auxiliary circuit, two-phase or three-phase input pfc circuit and control method
CN113346751A (en) * 2021-07-21 2021-09-03 南通大学 Dual-input-inductor soft-switching high-gain converter and control method thereof
CN113346751B (en) * 2021-07-21 2022-04-22 南通大学 Dual-input-inductor soft-switching high-gain converter and control method thereof

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