TW201413853A - Manufacturing device and manufacturing method of semiconductor device - Google Patents

Manufacturing device and manufacturing method of semiconductor device Download PDF

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TW201413853A
TW201413853A TW102129174A TW102129174A TW201413853A TW 201413853 A TW201413853 A TW 201413853A TW 102129174 A TW102129174 A TW 102129174A TW 102129174 A TW102129174 A TW 102129174A TW 201413853 A TW201413853 A TW 201413853A
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wafer
sheet
attached
manufacturing
semiconductor device
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TW102129174A
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TWI549211B (en
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Yoshifumi Sugisawa
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Toshiba Kk
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Abstract

This invention provides a manufacturing device of semiconductor device capable of reducing the position deviation of an adhesive layer in relation to a semiconductor chip of thinner thickness. The manufacturing device of this invention includes a supply unit used to provide sheet material in cylinder shape, and an adhesive unit used to have the pulled part from the sheet material adhere to a wafer and have the unused part of the sheet material around the wafer adhere to a ring for prolonging the sheet material. The sheet material includes a substrate, a peeling-assistant layer on the substrate, and an adhesive layer on the peeling-assistant layer. The adhesive unit perform adhesion in a manner that the angle between the basic direction of a direction recognition mark on the wafer and the direction of pulling the sheet material out is 15 to 75 degree.

Description

半導體裝置之製造裝置及半導體裝置之製造方法 Manufacturing device of semiconductor device and method of manufacturing semiconductor device 相關申請案Related application

本申請案享有將日本專利申請案2012-218800號(申請日:2012年9月28日)及日本專利申請案2013-94679號(申請日:2013年4月26日)作為基礎申請案之優先權。本申請案藉由參照該等基礎申請案而包含基礎申請案之全部內容。 This application has the priority of applying the Japanese Patent Application No. 2012-218800 (application date: September 28, 2012) and Japanese Patent Application No. 2013-94679 (application date: April 26, 2013) as the basic application. right. This application contains the entire contents of the basic application by reference to these basic applications.

本發明係關於一種半導體裝置之製造裝置及半導體裝置之製造方法。 The present invention relates to a manufacturing apparatus of a semiconductor device and a method of manufacturing the semiconductor device.

於晶圓之一面形成有多個半導體裝置之電路。於晶圓之另一面形成接著劑層。 A circuit of a plurality of semiconductor devices is formed on one side of the wafer. An adhesive layer is formed on the other side of the wafer.

有如下半導體裝置之製造方法:於使用切割刀片將晶圓分割成各個半導體晶片時,自半導體晶圓側與晶圓一併亦分割接著劑層。該製造方法可減小半導體晶片與接著劑層之位置偏移。 There is a method of manufacturing a semiconductor device in which a wafer is divided into individual semiconductor wafers by using a dicing blade, and an adhesive layer is also divided from the wafer side and the wafer. This manufacturing method can reduce the positional shift of the semiconductor wafer and the adhesive layer.

另一方面,有如下通稱為先切割後研磨(Dicing Before Grinding)之半導體裝置之製造方法:於將晶圓分割成各個半導體晶片時,使用切割刀片於晶圓形成槽,其後自晶圓之未形成電路之背面起至到達槽之厚度為止進行研磨。該製造方法可使半導體晶片之厚度變薄。 On the other hand, there is a manufacturing method of a semiconductor device which is generally referred to as Dicing Before Grinding: when a wafer is divided into individual semiconductor wafers, a dicing blade is used to form a groove in the wafer, and thereafter, from the wafer. Grinding is performed until the thickness of the groove is reached from the back surface of the circuit. This manufacturing method can make the thickness of the semiconductor wafer thin.

先切割後研磨係於進行背面研磨時分割成半導體晶片,故而無法預先在晶圓之背面設置接著劑層。由於無法組合上述2種製造方法,故而難以減小接著劑層相對於厚度較薄之半導體晶片之位置偏 移。 Since the dicing is performed after the dicing is performed to divide the semiconductor wafer into the back surface, it is not possible to provide an adhesive layer on the back surface of the wafer in advance. Since the above two manufacturing methods cannot be combined, it is difficult to reduce the positional deviation of the adhesive layer with respect to the semiconductor wafer having a small thickness. shift.

本發明提供一種可減小接著劑層相對於厚度較薄之半導體晶片之位置偏移的半導體裝置之製造裝置、半導體裝置之製造方法。 The present invention provides a semiconductor device manufacturing apparatus and a method of manufacturing a semiconductor device which can reduce the positional deviation of an adhesive layer with respect to a thin semiconductor wafer.

一實施形態之半導體裝置之製造裝置之特徵在於包括:供給部,其用以供給被捲繞成滾筒狀之片材;及貼附部,其於上述供給部之自被捲繞成滾筒狀之上述片材拉出之部分貼附晶圓,且於上述片材之位於上述晶圓之周圍之空白部分貼附用以拉長上述片材之環;上述片材包含基材及接著劑層,且上述貼附部係以將設置於上述晶圓之方向識別部作為基準之方向、與滾筒狀之上述片材之拉出方向所成之角成為15~75度之方式進行貼附。 A manufacturing apparatus for a semiconductor device according to an embodiment of the present invention includes: a supply unit for supplying a sheet wound into a roll shape; and an attaching portion which is wound into a roll shape at the supply portion a portion of the sheet that is pulled out is attached to the wafer, and a ring for stretching the sheet is attached to a blank portion of the sheet around the wafer; the sheet includes a substrate and an adhesive layer. Further, the attaching portion is attached so that the angle formed by the direction in which the direction of the wafer is set as the reference and the direction in which the sheet is pulled out is 15 to 75 degrees.

一實施形態之半導體裝置之製造方法之特徵在於:其係自被捲繞成滾筒狀之片材拉出上述片材,於上述片材之被拉出之部分貼附設置有複數個半導體晶片之晶圓,且於上述片材之位於上述晶圓之周圍之空白部分貼附環,將上述晶圓置於平台,且於上述晶圓之貼附於上述片材之面方向上擴大上述平台與上述環之距離,藉此將上述片材之接著劑分離成與上述半導體晶片相對應之形狀,將各個上述半導體晶片與上述接著劑層一併自上述片材剝離;且上述片材包含基材、設置於上述基材上之剝離促進層、及設置於剝離促進層上之接著劑層。 A method of manufacturing a semiconductor device according to the embodiment is characterized in that the sheet is drawn from a sheet wound into a roll shape, and a plurality of semiconductor wafers are attached to a portion of the sheet that is pulled out. And attaching a ring to the blank portion of the sheet around the wafer, placing the wafer on the platform, and expanding the platform in a direction in which the wafer is attached to the surface of the wafer a distance between the rings, whereby the adhesive of the sheet is separated into a shape corresponding to the semiconductor wafer, and each of the semiconductor wafer and the adhesive layer are peeled off from the sheet; and the sheet comprises a substrate And a release promoting layer provided on the substrate and an adhesive layer provided on the release promoting layer.

100‧‧‧晶圓 100‧‧‧ wafer

101‧‧‧刀片 101‧‧‧blade

102‧‧‧槽 102‧‧‧ slots

103‧‧‧保護片材 103‧‧‧Protected sheet

104‧‧‧研磨工具 104‧‧‧ grinding tools

105‧‧‧DAF 105‧‧‧DAF

105-2‧‧‧多餘DAF 105-2‧‧‧Excess DAF

106‧‧‧膠帶 106‧‧‧ Tape

107‧‧‧環 107‧‧‧ Ring

108‧‧‧基材 108‧‧‧Substrate

109‧‧‧剝離促進層 109‧‧‧ peeling promotion layer

110‧‧‧平台 110‧‧‧ platform

111‧‧‧晶片 111‧‧‧ wafer

112‧‧‧框架 112‧‧‧Frame

113‧‧‧供給構件 113‧‧‧Supply components

113-2‧‧‧多餘供給構件 113-2‧‧‧Excess supply components

114‧‧‧拉出方向 114‧‧‧ Pull out direction

115‧‧‧載置部 115‧‧‧Loading Department

116‧‧‧方向識別部 116‧‧‧ Direction Identification Department

117‧‧‧高彈性模數膠帶 117‧‧‧High elastic modulus tape

117‧‧‧方向 117‧‧‧ Direction

201‧‧‧供給部 201‧‧‧Supply Department

202‧‧‧貼附部 202‧‧‧ Attachment

203‧‧‧回收部 203‧‧Recycling Department

204‧‧‧支持部 204‧‧‧Support Department

Ex‧‧‧距離 Ex‧‧‧distance

圖1係表示半導體裝置之製造方法之流程圖。 1 is a flow chart showing a method of manufacturing a semiconductor device.

圖2係表示半導體裝置之製造過程之立體圖。 2 is a perspective view showing a manufacturing process of a semiconductor device.

圖3係表示半導體裝置之製造過程之立體圖。 3 is a perspective view showing a manufacturing process of a semiconductor device.

圖4係表示半導體裝置之製造過程之立體圖。 4 is a perspective view showing a manufacturing process of a semiconductor device.

圖5係表示半導體裝置之製造過程之立體圖。 Fig. 5 is a perspective view showing a manufacturing process of the semiconductor device.

圖6係表示半導體裝置之製造過程之立體圖。 Fig. 6 is a perspective view showing a manufacturing process of the semiconductor device.

圖7係表示半導體裝置之製造過程之立體圖。 Fig. 7 is a perspective view showing a manufacturing process of the semiconductor device.

圖8係表示半導體裝置之製造過程之剖面圖。 Fig. 8 is a cross-sectional view showing the manufacturing process of the semiconductor device.

圖9係表示半導體裝置之製造過程之立體圖。 Fig. 9 is a perspective view showing a manufacturing process of the semiconductor device.

圖10係表示半導體裝置之製造過程之剖面圖。 Figure 10 is a cross-sectional view showing the manufacturing process of the semiconductor device.

圖11係表示半導體裝置之製造過程之立體圖。 Fig. 11 is a perspective view showing a manufacturing process of the semiconductor device.

圖12係表示製造裝置之圖。 Fig. 12 is a view showing a manufacturing apparatus.

圖13係供給構件之剖面構造圖。 Figure 13 is a cross-sectional structural view of a supply member.

圖14係表示供給構件之製造過程之圖。 Fig. 14 is a view showing a manufacturing process of the supply member.

圖15係表示製造裝置之圖。 Fig. 15 is a view showing a manufacturing apparatus.

圖16係表示製造裝置之圖。 Figure 16 is a view showing a manufacturing apparatus.

圖17係表示製造裝置之圖。 Figure 17 is a view showing a manufacturing apparatus.

圖18係供給構件之伸長率與拉伸強度之關係圖。 Figure 18 is a graph showing the relationship between the elongation of the supply member and the tensile strength.

圖19係距離與角度之關係圖。 Figure 19 is a plot of distance versus angle.

以下,參照圖1至圖11對半導體裝置之製造方法及應用該製造方法之製造裝置之一實施形態進行說明。再者,於各實施形態中,對實質上相同之構成部位標註相同之符號,並省略說明。然而,圖式係模式性地表示者,厚度與平面尺寸之關係、各層之厚度之比率等與現實者不同。又,說明中之表示上下等方向之用語係指示將下述半導體基板之電路形成面側設為上之情形時之相對之方向,存在與以重力加速度方向為基準之現實方向不同之情形。 Hereinafter, an embodiment of a method of manufacturing a semiconductor device and a manufacturing apparatus using the same will be described with reference to FIGS. 1 to 11. In the respective embodiments, the same components are denoted by the same reference numerals, and the description thereof will not be repeated. However, the drawings are schematically represented, and the relationship between the thickness and the plane size, the ratio of the thicknesses of the layers, and the like are different from those of the actual one. In addition, the term indicating the direction of the up-and-down direction indicates that the direction in which the circuit formation surface side of the semiconductor substrate described below is set to the upper side is different from the actual direction based on the direction of the gravitational acceleration.

首先,對本實施形態之半導體裝置之製造方法進行說明。於圖1中表示半導體裝置之製造方法。於圖2至圖11中表示半導體裝置之製造過程。 First, a method of manufacturing the semiconductor device of the present embodiment will be described. A method of manufacturing a semiconductor device is shown in FIG. The manufacturing process of the semiconductor device is shown in FIGS. 2 to 11.

首先,如圖2所示,沿著形成有複數個積體電路之晶圓100之於各積體電路間確保之切割道(Dicing Street),使用刀片101於晶圓100形成槽102(切割步驟1)。此時,自較晶圓100之厚度淺、且形成有積體電路之面(正面)側形成槽102。即,於切割步驟1之階段中,各積體電路雖由槽分隔,但成為分別於與正面相反之側之面(背面)側連接之狀態。 First, as shown in FIG. 2, a groove 102 is formed on the wafer 100 using the blade 101 along a dicing line secured between the integrated circuits of the wafer 100 in which a plurality of integrated circuits are formed (cutting step) 1). At this time, the groove 102 is formed from the side (front side) side of the wafer 100 which is shallow in thickness and on which the integrated circuit is formed. In other words, in the stage of the dicing step 1, the integrated circuits are separated by grooves, but are connected to each other on the side (back surface) side opposite to the front surface.

其次,如圖3所示,於形成有槽102之晶圓100之正面設置保護片材103。保護片材103係為了保護積體電路使其不受研磨屑等灰塵污染而設置。又,保護片材103係為了保持於下述背面研磨後經分離之各積體電路之各者之位置而設置。保護片材可使用兼具良好之接著性與良好之剝離性之膜,該膜用以防止例如以氯乙烯或聚烯烴為主成分之污染物質之侵入。 Next, as shown in FIG. 3, a protective sheet 103 is provided on the front surface of the wafer 100 on which the grooves 102 are formed. The protective sheet 103 is provided to protect the integrated circuit from dust contamination such as grinding debris. Moreover, the protective sheet 103 is provided in order to be held in the position of each of the integrated circuits which are separated after the back surface polishing. As the protective sheet, a film which has both good adhesion and good peelability can be used, and the film is used to prevent intrusion of a contaminant such as vinyl chloride or polyolefin as a main component.

繼而,如圖4所示,使用旋轉之磨石或供給有漿料之研磨墊等研磨工具104,對晶圓100之背面進行研磨(背面研磨步驟2)。晶圓100之研磨係進行至晶圓100之剩餘厚度至少達到切割步驟1中所形成之槽102之深度為止。被研磨至達到槽102之深度之晶圓100係如圖5所示般成為各積體電路之各者分離之狀態。 Then, as shown in FIG. 4, the back surface of the wafer 100 is polished using the grinding tool 104 such as a rotating grindstone or a polishing pad to which the slurry is supplied (back grinding step 2). The polishing of the wafer 100 proceeds until the remaining thickness of the wafer 100 reaches at least the depth of the trench 102 formed in the cutting step 1. As shown in FIG. 5, the wafer 100 polished to the depth of the groove 102 is in a state in which each of the integrated circuits is separated.

如圖6所示,將成為各積體電路之各者分離之狀態之晶圓100載置於在正面設置有晶片黏著膜(Die Attach Film)(DAF105)之膠帶106(晶圓安裝步驟3)。於膠帶106之位於晶圓100之周圍之空白部分載置用以支持並搬送晶圓100之環107。DAF105於晶圓安裝步驟3中,成為貼附於晶圓100之背面側之狀態。DAF105可使用例如以環氧樹脂或聚醯亞胺、丙烯酸系樹脂為主成分之黏著片材。膠帶106可使用於例如以氯乙烯或聚烯烴為主成分之易於伸長之基材108上設置剝離促進層(RL)109而成之積層膜,該剝離促進層(RL)109使用聚四氟乙烯等氟樹脂或照射紫外線時硬化而變得易於剝離之以環氧樹脂為主成分之紫 外線硬化樹脂等。 As shown in FIG. 6, the wafer 100 in a state in which each of the integrated circuits is separated is placed on a tape 106 having a die attach film (DAF 105) provided on the front surface (wafer mounting step 3). . A ring 107 on the periphery of the wafer 100 of the tape 106 carries a ring 107 for supporting and transporting the wafer 100. In the wafer mounting step 3, the DAF 105 is attached to the back side of the wafer 100. As the DAF 105, for example, an adhesive sheet mainly composed of an epoxy resin, a polyimide, or an acrylic resin can be used. The tape 106 can be used as a laminated film obtained by providing a peeling-promoting layer (RL) 109 on a substrate 108 which is easily elongated, such as vinyl chloride or polyolefin as a main component, and the peeling-promoting layer (RL) 109 is made of polytetrafluoroethylene. A fluororesin or an epoxy resin-based violet that hardens when exposed to ultraviolet light and becomes easily peeled off. External hardening resin, etc.

如圖7所示,自載置於膠帶106之晶圓100去除保護片材103。去除保護片材103後之晶圓100成為其正面側露出且背面側貼附有DAF105之狀態。再者,於該階段中,如圖8所示,晶圓100雖成為各積體電路之各者分離之狀態,但DAF105並未分離成與各積體電路相對應之形狀,而成為與晶圓100整體之外形大致相同之形狀。 As shown in FIG. 7, the protective sheet 103 is removed from the wafer 100 loaded on the tape 106. The wafer 100 after the protective sheet 103 is removed is in a state in which the front side is exposed and the DAF 105 is attached to the back side. Further, at this stage, as shown in FIG. 8, the wafer 100 is in a state in which each of the integrated circuits is separated, but the DAF 105 is not separated into a shape corresponding to each integrated circuit, and becomes a crystal. The shape of the circle 100 is substantially the same as the shape of the whole.

如圖8及圖9、圖10所示,將載置於膠帶106之晶圓100之背面側、即基材108面側載置於平台110。於將晶圓100載置於平台110後,使環107相對於晶圓100沿向背面側相對地離開距離Ex之方向移動(延伸步驟4)。若於將晶圓100載置於平台110之狀態下使環107移動,則對膠帶106施加張力,從而膠帶106以各積體電路彼此之距離變大之方式伸長。 As shown in FIGS. 8 and 9 and 10, the back surface side of the wafer 100 placed on the tape 106, that is, the surface side of the substrate 108 is placed on the stage 110. After the wafer 100 is placed on the stage 110, the ring 107 is moved relative to the wafer 100 in a direction away from the back side by a distance Ex (extension step 4). When the ring 107 is moved while the wafer 100 is placed on the stage 110, tension is applied to the tape 106, and the tape 106 is elongated in such a manner that the distance between the integrated circuits becomes larger.

若對膠帶106施加張力,則亦會對一面貼附於膠帶106之DAF105施加張力。DAF105貼附於晶圓100。此處,晶圓100係使用矽或藍寶石、砷化鎵等半導體材料。該等半導體材料與膠帶106或DAF105相比,若彈性模數為10倍以上,則對張力而言不易伸長。即,施加至DAF105之張力之大部分作用於各積體電路間之切割道部分之伸長。其結果,於環107之移動超過某個固定限度時,DAF105會於切割道部分斷裂,而分離為與由切割道劃分而成之部分(下述晶片111)大致相同(嚴格而言為相對於由切割道劃分而成之部分略大些之相似形狀)之形狀。 If tension is applied to the tape 106, tension is also applied to the DAF 105 attached to the tape 106. The DAF 105 is attached to the wafer 100. Here, the wafer 100 is made of a semiconductor material such as germanium or sapphire or gallium arsenide. When the elastic modulus is 10 times or more, the semiconductor material is less likely to be stretched than the tape 106 or the DAF 105. That is, most of the tension applied to the DAF 105 acts on the elongation of the scribe line portion between the integrated circuits. As a result, when the movement of the ring 107 exceeds a certain fixed limit, the DAF 105 is partially broken at the scribe line and separated into substantially the same portion (the wafer 111 described below) divided by the scribe line (strictly speaking, relative to The shape of a slightly larger similar shape divided by the cutting path.

於上述延伸步驟4時,較佳為DAF105之斷裂伸度較佳為130%以下,更佳為50%以下。其原因在於,將半導體晶片分割為邊長20 mm之正方形之Φ300 mm晶圓100以貼附於附有DAF105之膠帶106之狀態延伸30 mm(使環107向背面側移動Ex=30 mm)之情形時,算出30 μm之切口寬度(半導體晶片間之距離)擴大至130%。此時,假定膠帶106 均等地伸展。進而,若考慮延伸步驟4後之藉由晶圓自動搬送裝置對晶圓100之搬送性,則延伸(使環107向背面側移動)之距離Ex較佳為設為12 mm以下。其原因在於,此時,上述假定中之切割線之擴展係50%。然而,於斷裂伸度未達1%之情形時,於利用供給部201沿拉出方向114拉出時DAF105斷裂之可能性變高,故而並不合適。 In the above extension step 4, it is preferred that the elongation at break of the DAF 105 is preferably 130% or less, more preferably 50% or less. The reason for this is that the Φ300 mm wafer 100 in which the semiconductor wafer is divided into squares having a side length of 20 mm is extended by 30 mm in a state of being attached to the tape 106 with the DAF 105 (the ring 107 is moved to the back side by Ex = 30 mm). In the case, the slit width (distance between semiconductor wafers) of 30 μm was calculated to be expanded to 130%. At this point, assume tape 106 Stretch equally. Further, in consideration of the conveyance of the wafer 100 by the automatic wafer transfer apparatus after the step 4, the distance Ex (the movement of the ring 107 to the back side) is preferably 12 mm or less. The reason for this is that at this time, the expansion of the cutting line in the above assumption is 50%. However, when the elongation at break is less than 1%, the possibility that the DAF 105 is broken when the supply portion 201 is pulled out in the drawing direction 114 becomes high, which is not suitable.

圖12係表示製造裝置之圖。藉由對膠帶106之半導體晶圓100之周圍賦予高彈性模數膠帶117,而防止晶圓100外周優先被拉長,從而可於晶圓100面內均勻地擴大半導體元件間。此時之高彈性模數膠帶117之尺寸較佳為內徑大於Φ305 mm,外徑設為340 mm以下。彈性模數較佳為高於DAF105與膠帶106之合成彈性模數(積層體之視彈性模數)之彈性模數。 Fig. 12 is a view showing a manufacturing apparatus. By providing a high elastic modulus tape 117 to the periphery of the semiconductor wafer 100 of the tape 106, the outer circumference of the wafer 100 is prevented from being preferentially elongated, so that the semiconductor elements can be uniformly enlarged in the plane of the wafer 100. The high elastic modulus tape 117 at this time preferably has an inner diameter of more than Φ305 mm and an outer diameter of 340 mm or less. The modulus of elasticity is preferably higher than the modulus of elasticity of the synthetic elastic modulus of DAF 105 and tape 106 (the apparent elastic modulus of the laminate).

於DAF105被分離後,將針對各積體電路之每一個而分離之晶圓100之各單片(晶片111)與DAF105以1組為單位自膠帶106剝離,並介隔DAF105將晶片111貼附於框架112(安裝步驟5)。於將晶片111貼附於框架112後,使用烘箱或加熱板對框架112進行加熱,從而將晶片111與框架112牢固地固著。 After the DAF 105 is separated, each of the wafers 100 (wafer 111) separated from each of the integrated circuits for each of the integrated circuits and the DAF 105 are peeled off from the tape 106 in units of one set, and the wafer 111 is attached via the DAF 105. In frame 112 (installation step 5). After attaching the wafer 111 to the frame 112, the frame 112 is heated using an oven or a heating plate to firmly fix the wafer 111 and the frame 112.

根據上述半導體裝置之製造方法,即便於在背面研磨步驟2之前先進行切割步驟1之情形時,亦可將DAF105以與晶片111之外形大致相同之形狀設置於晶片111之背面。又,關於DAF105相對於晶片111之位置,由於在將DAF105貼附於晶圓100之狀態下沿著切割道自行對準地分離,故而精度較高。又,為了以較高之位置精度設置DAF105而特別需要之步驟僅為延伸步驟4。延伸步驟4係對晶圓100僅進行1次即可。例如,於在每一片晶圓設置300個晶片111,且於延伸步驟中花費3秒之情形時,必須追加之特殊步驟所花費之時間為平均每一片晶片111僅0.01 sec,量產性較高。 According to the method of manufacturing the semiconductor device described above, even when the dicing step 1 is performed before the back surface polishing step 2, the DAF 105 may be provided on the back surface of the wafer 111 in substantially the same shape as the outer shape of the wafer 111. Further, since the position of the DAF 105 with respect to the wafer 111 is separated by self-alignment along the dicing street in a state where the DAF 105 is attached to the wafer 100, the accuracy is high. Also, the step particularly necessary in order to set the DAF 105 with higher positional accuracy is only the extension step 4. The extension step 4 is performed only once for the wafer 100. For example, when 300 wafers 111 are placed on each wafer and 3 seconds are used in the stretching step, the time required to add a special step is an average of 0.01 sec per wafer 111, and the mass productivity is high. .

對上述半導體裝置之製造方法中所使用之DAF105及膠帶106進行 說明。如圖13所示,膠帶106中,於基材108之一面形成有剝離促進層109。於膠帶106之剝離促進層109之面側,在載置晶圓100之前,成為預先設置有DAF105之狀態。 The DAF 105 and the tape 106 used in the method of manufacturing the above semiconductor device are performed. Description. As shown in FIG. 13, in the tape 106, a peeling promotion layer 109 is formed on one surface of the base material 108. On the surface side of the peeling-promoting layer 109 of the tape 106, the DAF 105 is provided in advance before the wafer 100 is placed.

膠帶106可如圖14所示般於片狀之基材108上貼合片狀之剝離促進層109與片狀之DAF105而形成。基材108與剝離促進層109、DAF105係將分別被捲取成滾筒狀之狀態之材料沿拉出方向114之方向拉出,且將基材108與剝離促進層109、DAF105重合。例如使用經加熱之輥對重合後之基材108與剝離促進層109、DAF105施加壓力而將其等貼合。經貼合之基材108與剝離促進層109、DAF105再次作為滾筒狀之供給構件(片材)113沿拉出方向114之方向被捲取。 The tape 106 can be formed by laminating a sheet-like peeling-promoting layer 109 and a sheet-like DAF 105 on a sheet-like base material 108 as shown in FIG. The base material 108, the peeling-promoting layer 109, and the DAF 105 are drawn in a direction in which the material is wound in a roll shape, and the base material 108 is superposed on the peeling-promoting layer 109 and the DAF 105. For example, the base material 108 after the superposition of the heated roller pair is applied to the peeling-promoting layer 109 and the DAF 105 to apply pressure thereto. The bonded base material 108, the peeling-promoting layer 109, and the DAF 105 are again taken up as a roll-shaped supply member (sheet) 113 in the direction of the drawing direction 114.

再者,此時,對於供晶圓100及環107載置之部分以外之空白部分,DAF105並非特別必需之部分。因此,如圖14所示,可於貼附晶圓100之前預先作為多餘DAF105-2而去除。 Further, at this time, the DAF 105 is not particularly necessary for the blank portion other than the portion on which the wafer 100 and the ring 107 are placed. Therefore, as shown in FIG. 14, it can be removed as the excess DAF 105-2 before attaching the wafer 100.

對應用上述半導體裝置之製造方法之製造裝置之一實施形態進行說明。於圖15中圖示應用半導體裝置之製造方法之製造裝置之一部分。於製造裝置設置有供給滾筒狀之供給構件113之供給部201。供給部201將供給構件113沿拉出方向114之方向拉出而供給。 An embodiment of a manufacturing apparatus to which the above-described semiconductor device manufacturing method is applied will be described. A portion of a manufacturing apparatus to which a method of manufacturing a semiconductor device is applied is illustrated in FIG. The supply unit 201 that supplies the drum-shaped supply member 113 is provided in the manufacturing apparatus. The supply unit 201 pulls the supply member 113 in the direction of the pull-out direction 114 and supplies it.

於所拉出之供給構件113之設置有DAF105之位置設置有用以貼附晶圓100與環107之貼附部202。於貼附部202設置有用以載置晶圓100與環107之載置部115。 A attaching portion 202 for attaching the wafer 100 and the ring 107 is provided at a position where the DAF 105 of the supply member 113 that is pulled out is provided. A mounting portion 115 for placing the wafer 100 and the ring 107 is provided on the attaching portion 202.

於藉由載置部115將晶圓100與環107貼附於供給構件113後,利用回收部203回收位於環107之周圍之多餘供給構件113-2。 After the wafer 100 and the ring 107 are attached to the supply member 113 by the placing unit 115, the excess supply member 113-2 located around the ring 107 is recovered by the collecting unit 203.

為了將晶圓103與環107貼附於供給構件113,而設置有用以支持供給構件113之支持部204。支持部204為了朝向供給構件113貼附載置部115而縮小距離,且為了最終貼附,而支持供給構件113。 In order to attach the wafer 103 and the ring 107 to the supply member 113, a support portion 204 for supporting the supply member 113 is provided. The support portion 204 reduces the distance in order to attach the mounting portion 115 toward the supply member 113, and supports the supply member 113 for final attachment.

此處,於晶圓100設置有方向識別部116。方向識別部116係以可 相對於以有2個方向之切割道中之其中一者為基準之方向識別晶圓100之方向之方式設置。 Here, the direction recognition unit 116 is provided on the wafer 100. The direction identifying unit 116 is It is provided in such a manner as to identify the direction of the wafer 100 with respect to the direction in which one of the dicing tracks having two directions is used as a reference.

貼附部202係以利用方向識別部116所識別出之方向與拉出方向114所成之角度成為15~75度之方式進行貼附。為了以利用方向識別部116所識別出之方向與拉出方向114所成之角度成為15~75度之方式進行貼附,例如,如圖16所示,可於在載置部115載置晶圓100與環107後,以利用方向識別部116所識別出之方向與拉出方向114所成之角度成為15~75度之方式使載置部115保持著載置有晶圓100之狀態旋轉,其後與供給構件113黏貼。 The attaching unit 202 is attached so that the angle formed by the direction recognizing unit 116 and the pull-out direction 114 are 15 to 75 degrees. In order to attach the angle formed by the direction recognizing unit 116 and the drawing direction 114 to 15 to 75 degrees, for example, as shown in FIG. 16, the crystal may be placed on the mounting portion 115. After the circle 100 and the ring 107 are rotated by the direction in which the direction recognized by the direction identifying unit 116 and the drawing direction 114 are 15 to 75 degrees, the mounting portion 115 is held while the wafer 100 is placed. Then, it is adhered to the supply member 113.

或者,如圖17所示,可於在載置部115載置環107後,於以利用方向識別部116所識別出之方向與拉出方向114所成之角度成為15~75度之方式對準方向之狀態下將晶圓100載置於載置部115,其後與供給構件113黏貼。 Alternatively, as shown in FIG. 17, after the ring 107 is placed on the placing portion 115, the angle formed by the direction recognizing portion 116 and the direction of the drawing direction 114 may be 15 to 75 degrees. The wafer 100 is placed on the mounting portion 115 in the state of the quasi-direction, and then adhered to the supply member 113.

使用圖18與圖19,對以設置於晶圓100之切割道之一者為基準之方向識別部116與拉出方向114所成之角度進行說明。圖17係表示供給構件113之拉出方向114及與拉出方向正交之方向117上之拉伸供給構件113時之伸長率與此時所施加之力即拉伸強度之關係的圖。 The angle between the direction identifying portion 116 and the drawing direction 114 based on one of the dicing streets provided on the wafer 100 will be described with reference to FIGS. 18 and 19. Fig. 17 is a view showing the relationship between the elongation rate in the drawing direction 114 of the supply member 113 and the tensile supply member 113 in the direction 117 orthogonal to the drawing direction, and the tensile strength which is the force applied at this time.

如圖18所示,於拉出方向114與方向117上拉伸強度與延伸之關係不同。若使該具有各向異性之供給構件113於延伸步驟4中伸長,則其伸長量於拉出方向114與方向117上不同。認為其原因在於,於供給構件113之製造步驟中,一面沿拉出方向拉出被捲取成滾筒狀之基材108與剝離促進層109或DAF105一面對其等施加壓力。 As shown in FIG. 18, the relationship between tensile strength and elongation in the pull-out direction 114 and the direction 117 is different. When the anisotropic supply member 113 is elongated in the extending step 4, its elongation amount is different from the direction 117 in the drawing direction 114. The reason for this is considered to be that, in the manufacturing step of the supply member 113, the substrate 108 wound in a roll shape and the peeling-promoting layer 109 or the DAF 105 are pulled in the drawing direction to apply pressure thereto.

因此,如圖19所示,一面使利用方向識別部116所識別出之方向與拉出方向114所成之角度變化,一面實施延伸步驟4,並對DAF105之分離狀態及剝離促進層109之狀態進行評價。於距離Ex為2.5 mm時,無論利用方向識別部116所識別出之方向與拉出方向114所成之角 度如何變化,於晶圓100面內之一部分均無法完全地分離DAF105。另一方面,無論利用方向識別部116所識別出之方向與拉出方向114所成之角度為哪一個角度,於距離Ex為3.0 mm之情形時,DAF105均可良好地分離。 Therefore, as shown in FIG. 19, the extending step 4 is performed while changing the angle formed by the direction recognized by the direction identifying unit 116 and the drawing direction 114, and the separation state of the DAF 105 and the state of the peeling promoting layer 109 are performed. Conduct an evaluation. When the distance Ex is 2.5 mm, the angle recognized by the direction recognizing portion 116 and the pull-out direction 114 are formed. How the degree changes, the DAF 105 cannot be completely separated in one of the faces of the wafer 100. On the other hand, regardless of the angle formed by the direction recognized by the direction identifying unit 116 and the drawing direction 114, the DAF 105 can be well separated when the distance Ex is 3.0 mm.

於利用方向識別部116所識別出之方向與拉出方向114所成之角度為0度及90度之情形時,雖然於距離Ex為3.5 mm之情形時DAF105可良好地分離,但剝離促進層109亦被分離。 When the angle between the direction recognized by the direction identifying unit 116 and the drawing direction 114 is 0 degrees and 90 degrees, the DAF 105 can be well separated when the distance Ex is 3.5 mm, but the peeling promoting layer 109 was also separated.

又,於利用方向識別部116所識別出之方向與拉出方向114所成之角度為15度及75度之情形時,於距離Ex為3.0 mm~4.0 mm之情形時DAF105可良好地分離。於距離Ex為5.0 mm之情形時,雖然DAF105可良好地分離,但剝離促進層109亦被分離。即,對於角度15~75度,可使距離Ex具有較廣裕度而製造。 Further, when the angle recognized by the direction recognizing unit 116 and the drawing direction 114 are 15 degrees and 75 degrees, the DAF 105 can be well separated when the distance Ex is 3.0 mm to 4.0 mm. When the distance Ex is 5.0 mm, although the DAF 105 can be well separated, the peeling promoting layer 109 is also separated. That is, for the angle of 15 to 75 degrees, the distance Ex can be manufactured with a wide margin.

進而,於利用方向識別部116所識別出之方向與拉出方向114所成之角度為30度~60度之情形時,即便將距離Ex設為9.0 mm之情形時,DAF105亦可良好地分離,且剝離促進層109未被分離。即,對於角度30~60度,可使距離Ex具有更廣裕度而製造。 Further, when the angle formed by the direction recognizing unit 116 and the direction of the drawing direction 114 is 30 to 60 degrees, the DAF 105 can be well separated even when the distance Ex is set to 9.0 mm. And the peeling promoting layer 109 is not separated. That is, for an angle of 30 to 60 degrees, the distance Ex can be manufactured with a wider margin.

根據上述製造裝置,與上述半導體製造裝置之製造方法同樣地,即便於在背面研磨步驟2之前先進行切割步驟1之情形時,亦可將DAF105以與晶片111之外形大致相同之形狀設置於晶片111之背面。又,關於DAF105相對於晶片111之位置,由於在將DAF105貼附於晶圓100之狀態下沿著切割道自行對準地分離,故而精度較高。又,由於以高的位置精度設置DAF105,故而特別需要之步驟僅為延伸步驟4。延伸步驟4係對晶圓100僅進行1次即可。 According to the manufacturing apparatus described above, similarly to the manufacturing method of the semiconductor manufacturing apparatus, even when the cutting step 1 is performed before the back surface polishing step 2, the DAF 105 may be disposed on the wafer in substantially the same shape as the outer shape of the wafer 111. The back of the 111. Further, since the position of the DAF 105 with respect to the wafer 111 is separated by self-alignment along the dicing street in a state where the DAF 105 is attached to the wafer 100, the accuracy is high. Further, since the DAF 105 is set with high positional accuracy, the step particularly required is only the extension step 4. The extension step 4 is performed only once for the wafer 100.

進而,於使利用方向識別部116所識別出之方向與拉出方向114所成之角度為26~75度之情形時,可具有廣裕度而製造。 Further, when the angle between the direction recognized by the direction identifying unit 116 and the drawing direction 114 is 26 to 75 degrees, it can be manufactured with a wide margin.

對本發明之若干個實施形態進行了說明,但並不限定於各實施 形態所示之構成、各種條件,該等實施形態係作為例而提示者,並非意圖限定發明之範圍。該等新穎之實施形態能以其他各種形態實施,且可於不脫離發明之主旨之範圍內進行各種省略、替換、變更。該等實施形態或其變形包含於發明之範圍或主旨中,並且包含於申請專利範圍所記載之發明及其均等之範圍內。 Although some embodiments of the present invention have been described, they are not limited to the implementations. The configurations and various conditions shown in the drawings are presented as examples, and are not intended to limit the scope of the invention. The present invention may be embodied in other specific forms and various modifications, substitutions and changes may be made without departing from the scope of the invention. The invention or its modifications are intended to be included within the scope of the invention and the scope of the invention.

100‧‧‧晶圓 100‧‧‧ wafer

105‧‧‧DAF 105‧‧‧DAF

106‧‧‧膠帶 106‧‧‧ Tape

107‧‧‧環 107‧‧‧ Ring

111‧‧‧晶片 111‧‧‧ wafer

112‧‧‧框架 112‧‧‧Frame

Claims (6)

一種半導體裝置之製造方法,其特徵在於:其係自被捲繞成滾筒狀之片材拉出上述片材,於上述片材之被拉出之部分貼附設置有複數個半導體晶片之晶圓,且於上述片材之位於上述晶圓之周圍之空白部分貼附環,將上述晶圓置於平台,且於上述晶圓之貼附於上述片材之面方向上擴大上述平台與上述環之距離,藉此將上述片材之接著劑層分離成與上述半導體晶片相對應之形狀,將各個上述半導體晶片與上述接著劑層一併自上述片材剝離;且上述片材包含基材、設置於上述基材上之剝離促進層、及設置於剝離促進層上之上述接著劑層;上述貼附部係以將設置於上述晶圓之方向識別部作為基準之方向、與滾筒狀之上述片材之拉出方向所成之角成為15~75度之方式進行貼附。 A method of manufacturing a semiconductor device, characterized in that a sheet is drawn from a sheet wound into a roll shape, and a wafer on which a plurality of semiconductor wafers are attached is attached to a portion of the sheet that is pulled out And attaching a ring to the blank portion of the sheet around the wafer, placing the wafer on the platform, and expanding the platform and the ring in a direction in which the wafer is attached to the surface of the wafer a distance separating the adhesive layer of the sheet into a shape corresponding to the semiconductor wafer, and separating each of the semiconductor wafer and the adhesive layer from the sheet; and the sheet comprises a substrate, a peeling-promoting layer provided on the substrate and the adhesive layer provided on the peeling-promoting layer; and the attaching portion is formed in a direction of a roller in a direction in which the direction identifying portion provided on the wafer is used as a reference The angle formed by the direction in which the sheet is pulled out is 15 to 75 degrees. 一種半導體裝置之製造裝置,其特徵在於包括:供給部,其用以供給被捲繞成滾筒狀之片材;及貼附部,其於上述供給部之自被捲繞成滾筒狀之上述片材拉出之部分貼附晶圓,且於上述片材之位於上述晶圓之周圍之空白部分貼附用以拉長上述片材之環;且上述片材包含基材及接著劑層;上述貼附部係以將設置於上述晶圓之方向識別部作為基準之方向、與滾筒狀之上述片材之拉出方向所成之角成為15~75度之方式進行貼附。 A manufacturing apparatus for a semiconductor device, comprising: a supply unit for supplying a sheet wound in a roll shape; and an attaching portion which is wound from the supply portion into the sheet which is wound into a roll shape a portion of the material is attached to the wafer, and a ring for stretching the sheet is attached to a blank portion of the sheet around the wafer; and the sheet includes a substrate and an adhesive layer; The attaching portion is attached so that the angle formed by the direction identifying portion provided on the wafer as a reference and the direction in which the sheet-like sheet is pulled out is 15 to 75 degrees. 如請求項2之半導體裝置之製造裝置,其中上述貼附部包括:載置部,其用以載置上述晶圓與上述環;及支持部,其為了對置於上述載置部之上述晶圓與上述環貼附上述片材而拉近距離,為此沿拉出方向支持上述片材。 The apparatus for manufacturing a semiconductor device according to claim 2, wherein the attaching portion includes: a placing portion for placing the wafer and the ring; and a supporting portion for aligning the crystal to the mounting portion The circle is attached to the above-mentioned ring to the close distance of the above-mentioned sheet, and the above-mentioned sheet is supported in the drawing direction. 如請求項3之半導體裝置之製造裝置,其中上述貼附部於沿將上述方向識別部作為基準之方向、及上述角成為15~75度之方向在上述載置部載置上述晶圓後,貼附上述片材。 The apparatus for manufacturing a semiconductor device according to claim 3, wherein the attaching portion mounts the wafer on the mounting portion in a direction in which the direction identifying portion is a reference and a direction in which the angle is 15 to 75 degrees. Attach the above sheets. 如請求項3之半導體裝置之製造裝置,其中上述載置部以成為將上述方向識別部作為基準之方向、及上述角成為15~75度之方向之方式,於載置有上述晶圓之狀態下旋轉。 The manufacturing apparatus of the semiconductor device according to claim 3, wherein the mounting portion is in a state in which the wafer is placed such that the direction identifying portion is a reference direction and the angle is 15 to 75 degrees Rotate down. 一種半導體裝置之製造方法,其特徵在於:其係自被捲繞成滾筒狀之片材拉出上述片材,於上述片材之被拉出之部分貼附設置有複數個半導體晶片之晶圓,且於上述片材之位於上述晶圓之周圍之空白部分貼附環,將上述晶圓置於平台,且於上述晶圓之貼附於上述片材之面方向上擴大上述平台與上述環之距離,藉此將上述片材之接著劑層分離成與上述半導體晶片相對應之形狀,將各個上述半導體晶片與上述接著劑層一併自上述片材剝離;且上述片材包含基材、設置於上述基材上之剝離促進層、及設置於剝離促進層上之接著劑層。 A method of manufacturing a semiconductor device, characterized in that a sheet is drawn from a sheet wound into a roll shape, and a wafer on which a plurality of semiconductor wafers are attached is attached to a portion of the sheet that is pulled out And attaching a ring to the blank portion of the sheet around the wafer, placing the wafer on the platform, and expanding the platform and the ring in a direction in which the wafer is attached to the surface of the wafer a distance separating the adhesive layer of the sheet into a shape corresponding to the semiconductor wafer, and separating each of the semiconductor wafer and the adhesive layer from the sheet; and the sheet comprises a substrate, A release promoting layer provided on the substrate and an adhesive layer provided on the release promoting layer.
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