TW201405783A - 半導體裝置及其製作方法 - Google Patents

半導體裝置及其製作方法 Download PDF

Info

Publication number
TW201405783A
TW201405783A TW102122103A TW102122103A TW201405783A TW 201405783 A TW201405783 A TW 201405783A TW 102122103 A TW102122103 A TW 102122103A TW 102122103 A TW102122103 A TW 102122103A TW 201405783 A TW201405783 A TW 201405783A
Authority
TW
Taiwan
Prior art keywords
semiconductor substrate
layer
via electrode
polymer layer
image sensor
Prior art date
Application number
TW102122103A
Other languages
English (en)
Other versions
TWI559512B (zh
Inventor
Chen-Hua Yu
Wen-Chih Chiou
Jing-Cheng Lin
Original Assignee
Taiwan Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiwan Semiconductor Mfg filed Critical Taiwan Semiconductor Mfg
Publication of TW201405783A publication Critical patent/TW201405783A/zh
Application granted granted Critical
Publication of TWI559512B publication Critical patent/TWI559512B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14621—Colour filter arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14627—Microlenses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14636—Interconnect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685—Process for coatings or optical elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687—Wafer level processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02002—Arrangements for conducting electric current to or from the device in operations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0232—Optical elements or arrangements associated with the device
    • H01L31/02327—Optical elements or arrangements associated with the device the optical elements being integrated or being directly associated to the device, e.g. back reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

本發明提供一種裝置，包括：一半導體基板；一影像感測器，位於半導體基板之一前側表面上；以及複數介電層，位於影像感測器上。一彩色濾光片及一微透鏡，位於介電層上且對準於影像感測器。一通孔電極，穿透該半導體基板；一重佈線，位於介電層上，其中重佈線電性耦接至通孔電極；一聚合物層，覆蓋重佈線。

Description

半導體裝置及其製作方法
本發明係關於一種半導體裝置及其製作方法，特別是關於一種具有影像感測器之半導體裝置及其製作方法。
由於積體電路的發明，半導體工業因各種電子構件(例如，電晶體、二極體、電阻、電容等)之積體密度的持續提昇經歷了連續且快速的成長。在多數情況下，積體密度的提昇來自於重複降低最小特徵尺寸，以允許將更多構件整合於一給定晶片面積。
這些積體電路的提昇本質上為二維(2D)方面的，以積體構件所佔據之空間實質上為半導體晶圓之表面。雖然微影技術的提昇在二維積體電路的形成中已經帶來顯著的改善，然而對於二維中可實現的密度有其物理限制。這些限制之一為製作構件所需之最小尺寸。再者，當較多裝置設置於一晶片中，會需要較複雜的設計。
另一限制來自於在增加裝置數量時，裝置之間內連接的數量及長度的顯著增加。當內連接的數量及長度增加時，電路的RC延遲(RC delay)及功率消耗二者皆會增加。
在為解決上述討論之限制的努力中，常使用三維積體電路(three-dimensional integrated circuit，3DIC)及堆 疊晶粒。矽通孔電極(Through-Silicon vias，TSV)常用於三維積體電路，及堆疊晶粒中以連接晶粒。在這種情況下，矽通孔電極用於連接一晶粒上的積體電路至此晶粒的背側。此外，矽通孔電極亦可用以提供一較短的接地路徑，以連接積體電路中的接地端至晶粒的背側。
本發明一實施例提供一種半導體裝置，包括：一半導體基板；一影像感測器，位於半導體基板之一前側表面上；複數介電層，位於影像感測器上；一通孔電極，穿透半導體基板；一第一重佈線，位於介電層上，其中第一重佈線電性耦接至通孔電極；以及一聚合物層，覆蓋第一重佈線。
本發明另一實施例提供一種半導體裝置，包括：一半導體基板；一影像感測器陣列，位於半導體基板之一前側表面上；一內連接結構，位於影像感測器陣列上，其中內連接結構包括：複數介電層；以及一鈍化保護層，位於介電層上；複數通孔電極，穿透半導體基板、介電層、及鈍化保護層；複數重佈線，位於鈍化保護層上；一聚合物層，位於重佈線之一頂部表面及側壁上；以及複數電性耦接元件，位於半導體基板下，其中電性耦接元件藉由通孔電極電性耦接至重佈線。
本發明又一實施例提供一種半導體裝置之製作方法，包括：蝕刻複數介電層及介電層下之一半導體基板，以形成一通孔電極開口，其中一影像感測器形成於半導體基板之一頂部表面，且其中通孔電極開口由頂部表面延伸進半導體基板；填充通孔電極開口，以形成一通孔電極；於通孔電極上形 成一重佈線且電性耦接至通孔電極；於介電層上形成一彩色濾光片及一微透鏡且對準於影像感測器；形成一聚合物層覆蓋於重佈線上；以及圖案化聚合物層，以移除聚合物層中與微透鏡重疊之一第一部分，其中在該圖案化步驟之後保留聚合物層中與重佈線重疊之一第二部分。
2‧‧‧晶圓
10‧‧‧基板
12A‧‧‧積體電路裝置
12B‧‧‧影像感測器
14‧‧‧前側內連接結構
16、59‧‧‧介電層
17‧‧‧鈍化保護層
18‧‧‧金屬線/介層窗/接觸插塞
20‧‧‧基板通孔電極開口
22、26‧‧‧光阻
24‧‧‧絕緣層
28‧‧‧基板通孔電極焊墊
30‧‧‧擴散阻擋層
34‧‧‧罩幕層
36‧‧‧開口
40‧‧‧基板通孔電極
42、60‧‧‧重佈線
44‧‧‧聚合物層
48‧‧‧彩色濾光片
52‧‧‧微透鏡
54‧‧‧保護層
56‧‧‧載板
58‧‧‧接著劑
62‧‧‧接觸墊
64‧‧‧電性耦接元件
100‧‧‧晶片
110‧‧‧影像感測器陣列
112‧‧‧數位控制器
第1-15、16A圖為依據本發明一些例示性實施例所作之製作互補式金屬氧化物半導體影像感測器晶片之中間步驟的剖面圖。
第16B及16C圖為依據本發明一些例示性實施例所作之互補式金屬氧化物半導體影像感測器晶片的俯視圖。
以下說明本發明實施例之製作與使用。然而，可輕易了解本發明實施例提供許多合適的發明概念而可實施於廣泛的各種特定背景。所揭示的特定實施例僅僅用於說明以特定方法製作及使用本發明，並非用以侷限本發明的範圍。
本發明提供一種用於形成互補式金屬氧化物半導體(Complementary Metal-Oxide-Semiconductor，CMOS)影像感測器(CIS)晶片中之基板通孔電極(亦稱為矽通孔電極、半導體通孔電極、或通孔電極)的形成方法。依據本發明一些例示性實施例，繪示了製作互補式金屬氧化物半導體影像感測器的中間階段，並討論了各實施例的差異。在本發明各種觀點及說明性實施例中，相似代號用以指定相似元件。
參照第1圖，形成晶圓2(其包括了基板10)。基板10可為一半導體基板，例如一矽塊材基板。或者，基板10可包括其它半導體材料，例如III族、IV族及/或V族元素。積體電路裝置12A，例如電晶體、電阻、電容等等，可形成於基板10的頂部表面上(第1圖中朝上的表面)。積體電路裝置12A可形成為數位控制器、數位影像處理電路等等。此外，影像感測器12B(其可為光電二極體)亦形成於基板10的頂部表面。晶圓2因而為一影像感測器晶圓。
前側內連接結構14形成於半導體基板10上，且用於晶圓2中的電性內連接積體電路裝置12A及影像感測器12B。前側內連接結構14包括介電層16及介電層16中的接觸插塞、金屬線及介層窗(繪示為代號18)。介電層16可包括一層間介電層(Inter-Layer Dielectric，ILD)、層間介電層上之金屬間介電層(Inter-Metal Dielectric，IMD)、及金屬間介電層上之鈍化保護層17。例如，層間介電層可以摻磷矽玻璃(Phospho-Silicate Glass，PSG)、摻硼矽玻璃(Boron-Silicate Glass，BSG)、摻硼磷矽玻璃(Boron-doped Phospho-Silicate Glass，BPSG)、四乙氧基矽烷(Tetra Ethyl Ortho Silicate，TEOS)等形成。金屬間介電層可以由低介電常數介電材料形成，其介電常數值低於約2.5。鈍化保護層17具有大於3.9之非低介電常數值，且可包括一氧化層及位於氧化層上之一氮化物。在本發明說明書中，相同介電層16中的金屬線可共同視為一金屬層。前側內連接結構14可包括複數金屬層，其可包括四層或四層以上之金屬層。
第2圖繪示了光阻22的形成及圖案化，藉以露出其下方之介電層16(如鈍化保護層17)。隨後實施一第一蝕刻以形成介電層16中的基板通孔電極開口20。隨後蝕刻基板10以使基板通孔電極開口20更延伸進基板10，例如使用一非等向性蝕刻。在形成基板通孔電極開口20之後，移除光阻22。
第3圖繪示了絕緣層24的形成。絕緣層24可為毯覆層，因而包括基板通孔電極開口20的側壁及底部。絕緣層24更包括覆蓋於介電層16的水平部分。絕緣層24可以介電材料(例如，碳化矽、氮化矽、氮氧化矽等)形成。接著，塗佈並圖案化光阻26以移除光阻26覆蓋基板通孔電極焊墊28的部份。隨後蝕刻藉由圖案化光阻26露出之絕緣層24部分，以露出下方之基板通孔電極焊墊28。隨後移除光阻26，基板通孔電極焊墊28可為金屬層，其形成於鈍化保護層(例如，鈍化保護層17)下方。依據本發明一些實施例，藉由金屬線/介層窗/接觸插塞18將基板通孔電極焊墊28電性耦接至裝置12A及/或影像感測器12B。此外，基板通孔電極焊墊28可以鋁、銅、或其它金屬材料形成。
參照第4圖，毯覆式形成擴散阻擋層30(有時亦稱為接著層)以覆蓋基板通孔電極開口20的側壁及底部。擴散阻擋層30可包括一材料選自鈦、氮化鈦、鉭、氮化鉭、及前述組合，其可使用物理氣相沉積法(Physical Vapor Deposition，PVD)、電漿輔助化學氣相沉積法(Plasma Enhanced Chemical Vapor Deposition，PECVD)等等形成。
一薄晶種層(繪示為代號30)隨後毯覆式形成於擴散阻擋層30上。晶種層30可用的材料包括銅或銅合金。此 外，亦可使用金屬例如銀、金、鋁、或前述之組合。在一些實施例中，晶種層30使用物理氣相沈積法形成。
第5圖繪示了罩幕層34的形成。在一些實施例中，罩幕層34為一乾膜，且因而在本發明說明書中可視為乾膜34。乾膜34可包括有機材料，例如ABF絕緣膜(Ajinimoto buildup film，ABF)。在罩幕層34為乾膜的實施例中，乾膜堆疊於第4圖所示之結構上。隨後施加熱及壓力以軟化堆疊之乾膜，以形成乾膜平坦的頂部表面。堆疊之乾膜34隨後被圖案化。在其它實施例中，罩幕層34為一光阻。在一些例示性的實施例中，所得之基板通孔電極40(第6圖)需藉由基板通孔電極焊墊28電性耦接至裝置12A及/或12B。因此，開口36形成於乾膜34中，露出部份的擴散阻擋層/晶種層30，此部分位於基板通孔電極焊墊28、基板通孔電極開口20、及其間區域上。
在第6圖中，基板通孔電極開口20以金屬材料填充，以在基板通孔電極開口20中形成基板通孔電極40。在一些實施例中，此填充材料包括銅或銅合金，但亦可使用其它金屬例如鋁、銀、金、及前述之組合。其形成方法可為例如無電解電鍍。在填充基板通孔電極開口20之後，可於開口36中連續地填充相同金屬材料，以形成重佈線(Redistribution lines，RDL)42。重佈線42亦可視為後鈍化層內連線(Post-Passivation Interconnec，PPI)42，其電性耦接基板通孔電極焊墊28至基板通孔電極40。
隨後移除罩幕34，使阻擋層/晶種層30(乾膜34下方的部分)露出。隨後移除阻擋層/種子層30的露出部分，所 得結構如第7圖所示。阻擋層/晶種層30形成部份的基板通孔電極40及重佈線42，因而未標示於後續圖式中。
接著，如第8圖所示，塗佈並固化聚合物層44。隨後對聚合物層44實施一圖案化步驟，以移除某些部分並留下另外一些未移除之聚合物層44的部分。聚合物層44可以聚亞醯胺、聚苯并噁唑(PolyBenzOxazole，PBO)、苯并環丁烯(BenzoCycloButene，BCB)等等形成，其可為一光敏材料。藉由使用光敏材料形成聚合物層44，可簡化聚合物層44的圖案化並降低各種製造成本。移除聚合物層44覆蓋影像感測器12B的部分。另一方面，聚合物層44的保留部分覆蓋於金屬線42的頂部表面及側壁上。因此，金屬線42由聚合物層44保護而與可能損壞金屬線42及基板通孔電極40之有害物質(例如水分及化學藥品)隔離。
接著，參照第9圖，形成彩色濾光片48，其可包括紅色濾光片、綠色濾光片、及藍色濾光片。彩色濾光片48可由聚合物形成其配置於選擇性地允許紅色光、綠色光、及藍色光通過。每個彩色濾光片48的形成製程可包括一沉積步驟及一蝕刻步驟。在隨後的製程步驟中(如第10圖所示)，形成額外構件(例如微透鏡52)，且每個彩色濾光片48及微透鏡52與影像感測器12B之其中一者重疊。
在第11圖中，保護層54形成於微透鏡52上，且可形成於聚合物層44的頂部表面及側壁上。保護層54可保護微透鏡52在後續載板56(第12及15圖)的安裝及拆卸中免於損壞。保護層54的厚度可較小以使保護層54為可讓可見光穿透的透 明層。在一些實施例中，保護層54為一氧化層(例如氧化矽層)，其可使用電漿輔助化學氣相沈積法等形成。保護層54亦可為四乙氧基矽烷(TEOS)氧化物(亦為氧化矽)、未摻雜矽玻璃(Un-doped Silicate Glass，USG)等等。
參照第12圖，可藉由接著劑58將晶圓2安裝於載板56上，其中晶圓2的頂部表面朝向載板56。載板56可為玻璃載板。接著，如第13圖所示，於基板10的背側上實施一薄化步驟，直到露出部份的絕緣層24。介電層59亦形成於基板10的背側。介電層59可包括氧化物、氮化物等等。可實施進一步的研磨，以移除部份的介電層59及所得之絕緣層24的露出部分上，以露出基板通孔電極40。在研磨之後，基板通孔電極40突出於介電層59外。在隨後的製程步驟中，如第14圖所示，使用類似於形成重佈線的42之方法(第6圖)將背側內連接結構(可包括重佈線60及接觸墊62)形成於晶圓2的背側。
第15圖繪示了電性耦接元件64的形成。電性耦接元件64可為金屬柱體、焊料球或包括金屬柱體及覆蓋之預焊層之複合連接元件等等。在隨後的步驟中，由晶圓2上拆卸載板56。所得晶圓2繪示於第16A圖中。然後可將晶圓2切割為晶粒100，其每個具有相同結構。
在第16A圖中所示之結構中，電性耦接元件64形成於晶片100的背側上，並藉由金屬層及基板通孔電極40電性耦接至積體電路(例如12A及12B)。晶片100的前側(所繪示之頂部)可不具有任何接合用之電性耦接元件(例如焊料區域)。晶片100之前側上形成有彩色濾光片48及微透鏡52，因而所得 之晶片為前側照明之互補式金氧半導體影像感測器晶片。聚合物層44保護前側重佈線42免於受開放空氣中的物質的損傷。另一方面，背側重佈線60可或可不受聚合物層的保護。當背側重佈線60不受保護，在隨後的接合過程中，可塗佈底部填充物以保護背側重佈線60。
第16B圖繪示了晶片100的俯視示意圖。如第16B圖所示，晶片100可包括影像感測器陣列110，其包括配置為一陣列之影像感測器12B(第16A圖)。數位控制器112可形成為晶片100的一部分，其包括類比-數位轉換器(Analog-to-Digital Converters，ADC)、相關雙重採樣電路(Correlated Double Sampling circuits，CDS，繪示為代號72)、列解碼器、或其它邏輯電路。數位控制器112可或可不受聚合物層44覆蓋。基板通孔電極40及重佈線42受到聚合物層44覆蓋，因此並未繪示於第16B圖。在一些實施例中，如第16B圖所示，圖案化聚合物層44為複數彼此分離之分離部，每個覆蓋基板通孔電極40之其中一者及重佈線42之其中一者。在其它實施例中，所繪示之聚合物層44可內連接為一積體部件，如第16C圖所示。同樣地，在這些實施例中，聚合物層44可包括或不包括對準於數位控制器112的部分。
依據本發明一些實施例，提供一種半導體裝置，包括：一半導體基板；一影像感測器，位於半導體基板之一前側表面上；複數介電層，位於影像感測器上；一通孔電極，穿透半導體基板；一第一重佈線，位於介電層上，其中第一重佈線電性耦接至通孔電極；以及一聚合物層，覆蓋第一重佈線。
依據本發明另外一些實施例，提供一種半導體裝置，包括：一半導體基板；一影像感測器陣列，位於半導體基板之一前側表面上；一內連接結構，位於影像感測器陣列上，其中內連接結構包括：複數介電層；以及一鈍化保護層，位於介電層上；複數通孔電極，穿透半導體基板、介電層、及鈍化保護層；複數重佈線，位於鈍化保護層上；一聚合物層，位於重佈線之一頂部表面及側壁上；以及複數電性耦接元件，位於半導體基板下，其中電性耦接元件藉由通孔電極電性耦接至重佈線。
依據本發明又另外一些實施例，提供一種半導體裝置之製作方法，包括：蝕刻複數介電層及介電層下之一半導體基板，以形成一通孔電極開口，其中一影像感測器形成於半導體基板之一頂部表面，且其中通孔電極開口由頂部表面延伸進半導體基板；填充通孔電極開口，以形成一通孔電極；於通孔電極上形成一重佈線且電性耦接至通孔電極；於介電層上形成一彩色濾光片及一微透鏡且對準於影像感測器；形成一聚合物層覆蓋於重佈線上；以及圖案化聚合物層，以移除聚合物層中與微透鏡重疊之一第一部分，其中在該圖案化步驟之後保留聚合物層中與重佈線重疊之一第二部分。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作更動、替代與潤飾。舉例來說，任何所屬技術領域中具有通常知識者可輕易理解此處所述的許多特徵、功能、製程及材料可在本發明的範圍內作更動。
再者，本發明之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、製造、物質組成、裝置、方法及步驟，任何所屬技術領域中具有通常知識者可從本發明揭示內容中理解現行或未來所發展出的製程、機器、製造、物質組成、裝置、方法及步驟，只要可以在此處所述實施例中實施大體相同功能或獲得大體相同結果皆可使用於本發明中。因此，本發明之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。另外，每一申請專利範圍構成個別的實施例，且本發明之保護範圍也包括各個申請專利範圍及實施例的組合。
100/2‧‧‧晶圓
10‧‧‧基板
12A‧‧‧積體電路裝置
12B‧‧‧影像感測器
16、59‧‧‧介電層
17‧‧‧鈍化保護層
18‧‧‧金屬線/介層窗/接觸插塞
24‧‧‧絕緣層
28‧‧‧基板通孔電極焊墊
40‧‧‧基板通孔電極
42、60‧‧‧重佈線
44‧‧‧聚合物層
48‧‧‧彩色濾光片
52‧‧‧微透鏡
54‧‧‧保護層
62‧‧‧接觸墊
64‧‧‧電性耦接元件

Claims (10)

  1. 一種半導體裝置，包括：一半導體基板；一影像感測器，位於該半導體基板之一前側表面上；複數介電層，位於該影像感測器上；一通孔電極，穿透該半導體基板；一第一重佈線，位於該些介電層上，其中該第一重佈線電性耦接至該通孔電極；以及一聚合物層，覆蓋該第一重佈線。
  2. 如申請專利範圍第1項所述之半導體裝置，其中該聚合物層包括一光敏聚合物。
  3. 如申請專利範圍第1項所述之半導體裝置，更包括：一微透鏡，位於該些介電層上；以及一氧化層，位於該微透鏡上，其中該氧化層更包括位於該聚合物層之頂部表面上的部分，其中該聚合物層不具有與該微透鏡重疊的部分。
  4. 如申請專利範圍第1項所述之半導體裝置，更包括：一第二重佈線，位於該半導體基板之一背側表面上；以及一電性耦接元件，位於該半導體基板之該背側表面上，其中該電性耦接元件電性耦接至該第二重佈線及該通孔電極。
  5. 一種半導體裝置，包括：一半導體基板；一影像感測器陣列，位於該半導體基板之一前側表面上； 一內連接結構，位於該影像感測器陣列上，其中該內連接結構包括：複數介電層；一鈍化保護層，位於該些介電層上；複數通孔電極，穿透該半導體基板、該些介電層、及該鈍化保護層；複數重佈線，位於該鈍化保護層上；一聚合物層，位於該些重佈線之一頂部表面及側壁上；以及複數電性耦接元件，位於該半導體基板下，其中該些電性耦接元件藉由該些通孔電極電性耦接至該些重佈線。
  6. 如申請專利範圍第5項所述之半導體裝置，其中該聚合物層包括彼此分離之複數分離部，每個分離部覆蓋該些重佈線之其中一者。
  7. 如申請專利範圍第5項所述之半導體裝置，其中該聚合物層未與該影像感測器陣列重疊。
  8. 一種半導體裝置之製作方法，包括：蝕刻複數介電層及該些介電層下之一半導體基板，以形成一通孔電極開口，其中一影像感測器形成於該半導體基板之一頂部表面，且其中該通孔電極開口由該頂部表面延伸進該半導體基板；填充該通孔電極開口，以形成一通孔電極；於該通孔電極上形成一重佈線且電性耦接至該通孔電極；於該些介電層上形成一彩色濾光片及一微透鏡且對準於該 影像感測器；形成一聚合物層覆蓋於該重佈線上；以及圖案化該聚合物層，以移除該聚合物層中與該微透鏡重疊之一第一部分，其中在該圖案化步驟之後保留該聚合物層中與該重佈線重疊之一第二部分。
  9. 如申請專利範圍第8項所述之半導體裝置之製作方法，更包括：薄化該半導體基板，以露出該通孔電極；以及形成一電性耦接元件，電性耦接至該通孔電極，其中該電性耦接元件及該聚合物層位於該半導體基板之相對側上。
  10. 如申請專利範圍第9項所述之半導體裝置之製作方法，更包括：在形成該微透鏡的步驟之後，於該微透鏡上形成一氧化層；在該薄化的步驟之前，貼附一載板至該氧化層；以及切割一晶圓，其包括該半導體基板，其中在該切割的步驟之後，保留該微透鏡上之該氧化層。
TW102122103A 2012-07-25 2013-06-21 半導體裝置及其製作方法 TWI559512B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/558,063 US9324756B2 (en) 2012-07-25 2012-07-25 CIS chips and methods for forming the same

Publications (2)

Publication Number Publication Date
TW201405783A true TW201405783A (zh) 2014-02-01
TWI559512B TWI559512B (zh) 2016-11-21

Family

ID=49994076

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102122103A TWI559512B (zh) 2012-07-25 2013-06-21 半導體裝置及其製作方法

Country Status (3)

Country Link
US (2) US9324756B2 (zh)
CN (1) CN103579266B (zh)
TW (1) TWI559512B (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI538174B (zh) * 2013-09-25 2016-06-11 晶相光電股份有限公司 半導體裝置的製造方法
EP2899760B1 (en) * 2014-01-27 2018-08-29 ams AG Semiconductor device for optical applications and method of producing such a semiconductor device
US9978791B2 (en) 2015-07-31 2018-05-22 Taiwan Semiconductor Manufacturing Co., Ltd Image sensor and method for manufacturing the same
TWI649856B (zh) * 2016-05-13 2019-02-01 精材科技股份有限公司 晶片封裝體與其製造方法
KR102428328B1 (ko) 2017-07-26 2022-08-03 삼성전자주식회사 반도체 장치
KR102486561B1 (ko) 2017-12-06 2023-01-10 삼성전자주식회사 재배선의 형성 방법 및 이를 이용하는 반도체 소자의 제조 방법
KR102511008B1 (ko) 2018-01-11 2023-03-17 삼성전자주식회사 반도체 패키지
KR102554417B1 (ko) 2018-06-18 2023-07-11 삼성전자주식회사 이미지 센서
CN112018027A (zh) * 2019-05-31 2020-12-01 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法、晶圆切割方法
KR20210078632A (ko) 2019-12-18 2021-06-29 삼성전자주식회사 이미지 센서

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6057038A (en) 1996-08-02 2000-05-02 Sharp Kabushiki Kaisha Substrate for use in display element, method of manufacturing the same, and apparatus for manufacturing the same
US6774039B1 (en) 2002-08-08 2004-08-10 Novellus Systems, Inc. Process scheme for improving electroplating performance in integrated circuit manufacture
US7964926B2 (en) * 2005-02-02 2011-06-21 Samsung Electronics Co., Ltd. Image sensing devices including image sensor chips, image sensor package modules employing the image sensing devices, electronic products employing the image sensor package modules, and methods of fabricating the same
US7215032B2 (en) 2005-06-14 2007-05-08 Cubic Wafer, Inc. Triaxial through-chip connection
US7928527B2 (en) * 2008-06-04 2011-04-19 International Business Machines Corporation Delamination and crack resistant image sensor structures and methods
US8178953B2 (en) * 2008-09-30 2012-05-15 Infineon Technologies Ag On-chip RF shields with front side redistribution lines
KR101009103B1 (ko) * 2008-10-27 2011-01-18 삼성전기주식회사 양면 전극 패키지 및 그 제조방법
US20110221018A1 (en) * 2010-03-15 2011-09-15 Xunqing Shi Electronic Device Package and Methods of Manufacturing an Electronic Device Package

Also Published As

Publication number Publication date
CN103579266A (zh) 2014-02-12
US20140027872A1 (en) 2014-01-30
CN103579266B (zh) 2016-09-07
TWI559512B (zh) 2016-11-21
US9324756B2 (en) 2016-04-26
US10020344B2 (en) 2018-07-10
US20160240583A1 (en) 2016-08-18

Similar Documents

Publication Publication Date Title
TWI559512B (zh) 半導體裝置及其製作方法
US10535696B2 (en) Pad structure exposed in an opening through multiple dielectric layers in BSI image sensor chips
US9941249B2 (en) Multi-wafer stacking by Ox-Ox bonding
TWI509783B (zh) 半導體裝置及其形成方法
TWI632656B (zh) 半導體裝置及半導體裝置製造方法
TWI593054B (zh) 半導體元件及其製造方法
US8791541B2 (en) Backside-illuminated image sensor having a supporting substrate
US11107848B2 (en) Semiconductor device for detection of radiation and method of producing a semiconductor device for detection of radiation
TWI499047B (zh) 形成半導體元件的方法及成像裝置
CN107039249B (zh) 分割和接合方法及其形成的结构
TWI536550B (zh) 影像感測裝置及其製造方法及背面受光型影像感測裝置
TW202017137A (zh) 用於改善接合性的墊結構
TWI548006B (zh) 形成半導體裝置之方法
TWI792433B (zh) 半導體裝置以及其製造方法
KR20090022325A (ko) 반도체 소자의 본딩 패드 및 그의 제조 방법