TW201405135A - Power testing circuit - Google Patents

Abstract

The present invention provides a power testing circuit for testing a power of a switching transistor of a voltage conversion circuit. The switching transistor includes a control electrode, a first transmitting electrode and a second transmitting electrode. The control electrode is configured to control the first transmitting electrode to connect or disconnect the second transmitting electrode. The power testing circuit includes a current detecting circuit, a voltage detecting circuit and an arithmetic circuit. The current detecting circuit is configured to detect a current flowed through the first transmitting electrode and the second transmitting electrode. The voltage detecting circuit is configured to detect a voltage difference between the first transmitting electrode and the second transmitting electrode. The arithmetic circuit is configured to receive the current and the voltage difference, and execute a multiply operation to the current and the voltage difference, so as to obtain the power of the switching transistor.

Description

Power test circuit

The present invention relates to a power test circuit, and more particularly to a power test circuit for testing a switching transistor power in a voltage conversion circuit.

When designing a voltage conversion circuit, such as a buck converter circuit (Buck circuit), it is necessary to test the power loss of the switching transistor in the circuit. The commonly used test method is to determine the power loss of the switching transistor by testing the heat generated by the switching transistor during turn-on, turn-on, and turn-off by the peripheral temperature sensing element. This test method is more susceptible to the test environment and does not accurately test the actual power loss of the switching transistor.

In view of the above, a power test circuit capable of accurately testing the power loss of a switching transistor in a voltage conversion circuit is provided.

A power test circuit for testing the power of a switching transistor in a voltage conversion circuit, the switching transistor comprising a control pole, a first conductive pole and a second conductive pole, wherein the control pole is used for controlling the first conductive pole and the first The second conductive pole is turned on and off. The power testing circuit includes a current detecting circuit, a voltage detecting circuit and an arithmetic circuit, and the current detecting circuit is configured to detect a current flowing through the first conductive pole and the second conductive pole, and the voltage detecting The circuit is configured to detect a voltage difference between the first conductive pole and the second conductive pole, and the operating circuit receives the current difference detected by the current detecting circuit and the voltage difference detected by the voltage detecting circuit, and the current is different from the voltage difference A multiplication operation is performed and an operation result characterizing the power of the switching transistor is obtained.

Compared with the prior art, the power test circuit of the present invention obtains the actual power loss of the switching transistor by detecting the current actually flowing through the switching transistor and the voltage difference between the two conductive electrodes, thereby more accurately understanding the switching power. The working condition of the crystal enables the engineer to design the voltage conversion circuit more accurately and conveniently.

Please refer to FIG. 1. FIG. 1 is a circuit diagram of a power test circuit 100 for detecting a switching transistor power in a voltage conversion circuit 10 according to a preferred embodiment of the present invention.

The voltage conversion circuit 10 includes components such as a Pulse Width Modulation (PWM) controller 11, a driver 12, a first switching transistor 13, a second switching transistor 14, an inductor 15, and a capacitor 16. In the present embodiment, the voltage conversion circuit 10 is a typical buck conversion circuit.

The pulse width modulation controller 11 is configured to output a pulse width modulation signal (PWM signal) to the driver 12, and the driver 12 outputs two opposite phase pulse signals to the first switching transistor 13 and the second switching transistor according to the PWM signal. 14. The first switching transistor 13 and the second switching transistor 14 are alternately turned on to provide a charging and discharging circuit for the inductor 15 and the capacitor 16, respectively.

The first switching transistor 13 includes a first control electrode 13a, a first conductive electrode 13b and a second conductive electrode 13c. The first control electrode 13a is configured to receive the pulse signal, and the first switch is electrically controlled under the control of the pulse signal. The crystal 13 is turned on or off. In this embodiment, the first conductive pole 13b is electrically connected to the power input terminal Vcc to receive the power supply voltage. The second switching transistor 14 includes a second control electrode 14a, a third conductive electrode 14b and a fourth conductive electrode 14c. The second control electrode 14a also receives a pulse signal from the driver 12, and the third conductive electrode 14b is electrically connected to the second. The conductive pole 13c and the fourth conductive pole 14c are grounded.

The power test circuit 100 is used to test the power consumption of the first switching transistor 13 and the second switching transistor 14 of the voltage conversion circuit 10. For convenience of description, in the embodiment, the power test circuit 100 is described to test the power of the first switching transistor 13 as an example.

The power test circuit 100 includes a current detecting circuit 110, a voltage detecting circuit 120, an arithmetic circuit 130, a data conversion unit 140, a display module 150, a frequency sampling control circuit 160, and an average processing circuit 170.

The current detecting circuit 110 is configured to detect a current flowing through the first conductive pole 13b and the second conductive pole 13c, and the voltage detecting circuit 120 is configured to detect a voltage difference between the first conductive pole 13b and the second conductive pole 13c. The arithmetic circuit 130 receives the current difference detected by the current detecting circuit 110 and the voltage difference detected by the voltage detecting circuit 120, and multiplies the current by the voltage difference to obtain an operation result.

Specifically, the current detecting circuit 110 includes a detecting resistor 111, a first voltage obtaining circuit 112, and a first differential amplifying circuit 113. The detecting resistor 111 is electrically connected between the power input terminal Vcc and the first conductive pole 13b. The current flowing through the first conductive electrode 13b and the second conductive electrode 13c in the first switching transistor 13 is detected, and the current is converted into a voltage, which is the voltage difference across the detecting resistor 111.

The first voltage obtaining circuit 112 is connected in parallel with the detecting resistor 111 to obtain a voltage difference across the detecting resistor 111. In an embodiment, the first voltage obtaining circuit 112 can be implemented by using a resistor or a capacitor.

The first differential amplifying circuit 113 is for amplifying the voltage difference across the detecting resistor 111. Preferably, the first differential amplifier circuit 113 multiplies the product of the voltage amplification of the detecting resistor 111 by the resistance value of the detecting resistor 111 by one, so that the voltage of the detecting resistor 111 amplified by the first differential amplifying circuit 113 is obtained. The difference is substantially equal to the current value flowing through the first switching transistor 13, and the current obtained as the current detecting circuit 110 detects is output to the arithmetic circuit 130.

The voltage detecting circuit 120 includes a second voltage obtaining circuit 122 and a second differential amplifying circuit 123. The second voltage obtaining circuit 122 is connected in parallel between the first conductive pole 13b and the second conductive pole 13c for acquiring the first The voltage difference between the conductive pole 13b and the second conductive pole 13c. The second differential amplifying circuit 123 is for amplifying the voltage difference.

Preferably, the operation circuit 130 further divides the operation result according to the amplification factor of the second differential amplification circuit 123 to obtain the actual power value of the first switching transistor 13.

The data conversion unit 140 is configured to digitally convert the calculated operation result of the operation circuit 130, and convert the calculation result into a digital signal. The display module 150 is configured to display the operation result. In an embodiment, the data conversion unit 140 can be implemented by using a circuit unit including an analog/digital conversion circuit (A/D conversion circuit), and the display module 150 can be implemented by using a liquid crystal display or other display.

The frequency sampling circuit 160 receives the PWM signal from the pulse width modulation controller 11 and outputs a control signal according to the PWM signal to control the data conversion unit 140 to start digital conversion of the operation result of the operation circuit 130.

The averaging processing circuit is configured to average the operation result of the plurality of digitized processes in a predetermined time period, thereby obtaining an average power of the first switching transistor 13 in the predetermined time period, so that the power test circuit 100 The detection is more accurate. The predetermined time can be set in advance, for example, 1 minute.

It should be understood that the circuit for testing the power of the second switching transistor 14 is substantially the same as the principle and structure of the power testing circuit 100, that is, the detecting resistor 111 in the current detecting circuit 110 is electrically connected to the fourth conducting pole. 14c and ground, thereby testing the current flowing through the second switching transistor 14, the voltage detecting circuit 120 is connected in parallel to the third conducting pole 14b and the fourth conducting pole 14c, thereby detecting the third conducting pole 14b and the fourth conducting pole The voltage difference of 14c, and further the average power loss of the second switching transistor 14 from the turn-on to the turn-off process is obtained by the arithmetic circuit 130 and the data conversion unit 140.

Compared with the prior art, the power test circuit 100 of the present invention obtains the actual power loss of the switching transistor by detecting the current actually flowing through the switching transistors 13, 14 and the voltage difference between the two conductive electrodes, thereby being more accurate. Knowing the operation of the switching transistors 13, 14 allows the engineer to design the voltage conversion circuit more accurately and conveniently.

Of course, the present invention is not limited to the above-disclosed embodiments, and the present invention may be variously modified in the above embodiments. Those skilled in the art will appreciate that appropriate changes and modifications of the above embodiments are within the scope of the invention as claimed.

10. . . Voltage conversion circuit

11. . . Pulse width modulation controller

12. . . driver

13. . . First switching transistor

13a. . . First control pole

13b. . . First conductivity

13c. . . Second conduction pole

14. . . Second switching transistor

14a. . . Second control pole

14b. . . Third conduction pole

14c. . . Fourth conduction pole

15. . . inductance

16. . . capacitance

100. . . Power test circuit

110. . . Current detection circuit

111. . . Sense resistor

112. . . First voltage acquisition circuit

113. . . First differential amplifying circuit

120. . . Voltage detection circuit

122. . . Second voltage acquisition circuit

123. . . Second differential amplifying circuit

130. . . Operation circuit

140. . . Data conversion unit

150. . . Display module

160. . . Frequency sampling control circuit

170. . . Mean processing circuit

Vcc. . . Power input

1 is a block schematic diagram of a power test circuit and a voltage conversion circuit tested according to the present invention.

10. . . Voltage conversion circuit

11. . . Pulse width modulation controller

12. . . driver

13. . . First switching transistor

13a. . . First control pole

13b. . . First conductivity

13c. . . Second conduction pole

14. . . Second switching transistor

14a. . . Second control pole

14b. . . Third conduction pole

14c. . . Fourth conduction pole

15. . . inductance

16. . . capacitance

100. . . Power test circuit

110. . . Current detection circuit

111. . . Sense resistor

112. . . First voltage acquisition circuit

113. . . First differential amplifying circuit

120. . . Voltage detection circuit

122. . . Second voltage acquisition circuit

123. . . Second differential amplifying circuit

130. . . Operation circuit

140. . . Data conversion unit

150. . . Display module

160. . . Frequency sampling control circuit

170. . . Mean processing circuit

Vcc. . . Power input

Claims (10)

A power test circuit for testing the power of a switching transistor in a voltage conversion circuit, the switching transistor comprising a control pole, a first conductive pole and a second conductive pole, wherein the control pole is used for controlling the first conductive pole and the first The second conductive pole is turned on and off. The power testing circuit includes a current detecting circuit, a voltage detecting circuit and an arithmetic circuit, and the current detecting circuit is configured to detect a current flowing through the first conductive pole and the second conductive pole, and the voltage detecting The circuit is configured to detect a voltage difference between the first conductive pole and the second conductive pole, and the operating circuit receives the current difference detected by the current detecting circuit and the voltage difference detected by the voltage detecting circuit, and the current is different from the voltage difference A multiplication operation is performed to obtain an operation result characterizing the power of the switching transistor. The power test circuit of claim 1, wherein the current detecting circuit comprises a detecting resistor electrically connected between a power terminal and the first conductive electrode, wherein the power input terminal is used for Receive a power supply voltage. The power test circuit of claim 2, wherein the current detection circuit further comprises a first voltage acquisition circuit, the first voltage acquisition circuit being coupled in parallel with the detection resistor for obtaining a voltage across the detection resistor. The power test circuit of claim 3, wherein the current detecting circuit further comprises a first differential amplifying circuit, wherein the first differential amplifying circuit is configured to perform amplification, and the first differential amplifying circuit is amplified. The product of the multiple and the resistance value of the sense resistor is one. The power test circuit of claim 1, wherein the voltage detection circuit further includes a second voltage acquisition circuit, wherein the second voltage acquisition circuit is configured to acquire voltages of the first conductive pole and the second conductive pole difference. The power test circuit of claim 5, wherein the voltage detecting circuit further comprises a second differential amplifying circuit for amplifying the voltage difference. The power test circuit of claim 1, wherein the power test circuit further includes a data conversion unit, the data conversion unit is configured to receive the operation result of the multiplication circuit, and digitize the operation result. Convert to convert the result of the operation into a digital signal. The power test circuit of claim 7, wherein the power test circuit further comprises a frequency sampling control circuit, wherein the frequency control circuit receives a pulse width modulation control signal in the voltage change circuit, and according to the pulse width The modulation signal controls the data conversion unit to perform digital conversion on the operation result. The power test circuit of claim 8, wherein the power test circuit further comprises an average processing circuit, wherein the average processing circuit is configured to average the plurality of operation results for a predetermined period of time to obtain the The average power of the switching transistor during the predetermined period of time. The power test circuit of any one of claims 1-9, wherein the power test circuit further comprises a display module for displaying the operation result converted by the data conversion unit.