TW201344967A - LED electrode contact structure - Google Patents
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Abstract
Description
本發明係有關發光二極體,特別是指發光二極體的電極接觸結構。The present invention relates to a light-emitting diode, and more particularly to an electrode contact structure of a light-emitting diode.
發光二極體(Light Emitting Diode;LED),具有輕薄短小、省電等特性,已廣泛的應用於照明、交通號誌、廣告招牌等等,其主要由半導體材料多重磊晶堆疊而成,以藍光發光二極體為例,其主要是氮化鎵基(GaN-based)磊晶薄膜組成。Light Emitting Diode (LED), which has the characteristics of lightness, thinness, power saving, etc., has been widely used in lighting, traffic signs, advertising signs, etc., which is mainly composed of multiple epitaxial stacking of semiconductor materials. For example, a blue light-emitting diode is mainly composed of a gallium nitride-based (GaN-based) epitaxial film.
請參閱「圖1A」與「圖1B」所示,為一種習知垂直式發光二極體,其包含組成三明治結構的一N型半導體層1、一發光層2與一P型半導體層3,該P型半導體層3之下依序設置一反射層4(Mirror layer)、一應力釋放層5(tension release layer)、一結合層6、一矽基板7與一P型電極8,而該N型半導體層1的表面可以粗化處理以增加光出射率,並供設置一N型電極9,據此於該N型電極9與該P型電極8施予電壓後,該N型半導體層1提供電子,而該P型半導體層3提供電洞,該電子與該電洞於該發光層2結合後即可產生光。Referring to FIG. 1A and FIG. 1B, a conventional vertical light-emitting diode includes an N-type semiconductor layer 1, a light-emitting layer 2 and a P-type semiconductor layer 3 which constitute a sandwich structure. A Mirror layer, a tension release layer, a bonding layer 6, a germanium substrate 7 and a P-type electrode 8 are sequentially disposed under the P-type semiconductor layer 3, and the N The surface of the semiconductor layer 1 may be roughened to increase the light emission rate, and an N-type electrode 9 is provided, whereby the N-type semiconductor layer 1 is applied after the N-type electrode 9 and the P-type electrode 8 are applied with a voltage. Electrons are provided, and the P-type semiconductor layer 3 provides a hole, and the electrons can be combined with the light-emitting layer 2 to generate light.
為了增加光取出率,該N型半導體層1的表面會粗化處理而形成一不規則表面1A,而該N型電極9為直接形成於該不規則表面1A上,又該N型電極9一般為使用如濺鍍、蒸鍍等薄膜製程形成,因此該N型電極9與該N型半導體層1之間,在進行薄膜製程之時,會於該不規則表面1A的死角處形成空隙1B(void),其不但造成接觸不良而增加接觸阻抗,且製作不規則表面時易導致其分子產生旋鍵而拘限載子,而導致發光效率低落。In order to increase the light extraction rate, the surface of the N-type semiconductor layer 1 is roughened to form an irregular surface 1A, and the N-type electrode 9 is formed directly on the irregular surface 1A, and the N-type electrode 9 is generally In order to form a thin film process such as sputtering or vapor deposition, a void 1B is formed between the N-type electrode 9 and the N-type semiconductor layer 1 at a blind spot of the irregular surface 1A during the film processing. Void), which not only causes poor contact, but also increases the contact resistance, and when the irregular surface is made, it is easy to cause the molecules to generate a spin key and restrain the carrier, resulting in low luminous efficiency.
本發明之主要目的在於揭露一種發光二極體的電極接觸結構,可避免電極與半導體之間產生空隙而造成接觸不良,以提高發光效率。The main object of the present invention is to disclose an electrode contact structure of a light-emitting diode, which can avoid a gap between the electrode and the semiconductor to cause contact failure, thereby improving luminous efficiency.
本發明為一種發光二極體的電極接觸結構,應用於一發光二極體,該發光二極體含依序堆疊的複數N型電極、一N型半導體層、一發光層、一P型半導體層、一反射層、一應力釋放層、一結合層、一永久基板與一P型電極,且該N型半導體層形成有一不規則表面。The invention relates to an electrode contact structure of a light-emitting diode, which is applied to a light-emitting diode, wherein the light-emitting diode comprises a plurality of N-type electrodes, an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor which are sequentially stacked. a layer, a reflective layer, a stress relief layer, a bonding layer, a permanent substrate and a P-type electrode, and the N-type semiconductor layer is formed with an irregular surface.
本發明的技術特徵為,於該N型半導體層形成複數接觸平台,該複數接觸平台具一圖案分佈的設置於該N型半導體層上,且該不規則表面形成於該N型半導體層不具該複數接觸平台之區域,並該複數N型電極分別形成於該複數接觸平台上。The technical feature of the present invention is that a plurality of contact platforms are formed on the N-type semiconductor layer, and the plurality of contact pads are disposed on the N-type semiconductor layer with a pattern distribution, and the irregular surface is formed on the N-type semiconductor layer. A plurality of regions contacting the platform, and the plurality of N-type electrodes are respectively formed on the plurality of contact platforms.
據此,本發明讓該複數N型電極形成於該複數接觸平台上,以藉由該複數接觸平台提供平坦介面,其利用薄膜製程形成該N型電極時,不會形成空隙,因此可讓該N型電極與該接觸平台維持良好的電性接觸,同時可避免製作不規則表面時易導致其分子產生旋鍵而拘限載子,而提高發光效率。According to the present invention, the plurality of N-type electrodes are formed on the plurality of contact platforms to provide a flat interface by the plurality of contact platforms, and when the N-type electrodes are formed by a thin film process, voids are not formed, thereby allowing the The N-type electrode maintains good electrical contact with the contact platform, and at the same time, it can avoid causing the molecules to generate a spin-bond and restrain the carrier when the irregular surface is produced, thereby improving the luminous efficiency.
茲有關本發明的詳細內容及技術說明,現以實施例來作進一步說明,但應瞭解的是,該等實施例僅為例示說明之用,而不應被解釋為本發明實施之限制。The detailed description of the present invention and the technical description of the present invention are further illustrated by the accompanying drawings, but it should be understood that these embodiments are merely illustrative and not to be construed as limiting.
請再參閱「圖2」所示,為本發明的實施例,本發明為一種發光二極體的電極接觸結構,應用於一發光二極體100,該發光二極體100包含依序堆疊的複數N型電極10、一N型半導體層20、一發光層30、一P型半導體層40、一反射層50、一應力釋放層60、一結合層70、一永久基板80與一P型電極90,且該N型半導體層20形成有一不規則表面201。Please refer to FIG. 2 again, which is an embodiment of the present invention. The present invention is an electrode contact structure of a light-emitting diode, which is applied to a light-emitting diode 100, and the light-emitting diode 100 is sequentially stacked. a plurality of N-type electrodes 10, an N-type semiconductor layer 20, a light-emitting layer 30, a P-type semiconductor layer 40, a reflective layer 50, a stress relief layer 60, a bonding layer 70, a permanent substrate 80 and a P-type electrode 90, and the N-type semiconductor layer 20 is formed with an irregular surface 201.
本發明讓該N型半導體層20一體形成複數接觸平台202,該複數接觸平台202為具一圖案分佈的設置於該N型半導體層20上,且該不規則表面201形成於該N型半導體層20不具該複數接觸平台202之區域,並該複數N型電極10分別形成於該複數接觸平台202上。The N-type semiconductor layer 20 integrally forms a plurality of contact platforms 202. The plurality of contact pads 202 are disposed on the N-type semiconductor layer 20 with a pattern distribution, and the irregular surface 201 is formed on the N-type semiconductor layer. 20 does not have the area of the plurality of contact platforms 202, and the plurality of N-type electrodes 10 are respectively formed on the plurality of contact platforms 202.
請再一併參閱「圖3A」~「圖3C」所示,為本發明的製造示意圖。Please refer to both FIG. 3A and FIG. 3C for a schematic view of the manufacturing of the present invention.
首先,如「圖3A」所示,本發明為先製成依序堆疊的一N型半導體層20、一發光層30、一P型半導體層40、一反射層50、一應力釋放層60、一結合層70、一永久基板80與一P型電極90,且該N型半導體層20可以包含一第一N型半導體層21與一第二N型半導體層22。且其中該應力釋放層60可以為選自鈦、鎢、鉑、鎳、鋁與鉻所組成的群組製成。該結合層70可以為選自金錫合金、金銦合金與金鉛合金的任一種製成。該永久基板80可以為選自矽基板、銅基板、銅鎢基板、氮化鋁基板與氮化鈦基板的任一種製成。該反射層50可以為選自鋁、鎳、銀與鈦所組成的群組製成。First, as shown in FIG. 3A, the present invention is an N-type semiconductor layer 20, a light-emitting layer 30, a P-type semiconductor layer 40, a reflective layer 50, and a stress relief layer 60 which are sequentially stacked. A bonding layer 70, a permanent substrate 80 and a P-type electrode 90, and the N-type semiconductor layer 20 may include a first N-type semiconductor layer 21 and a second N-type semiconductor layer 22. And wherein the stress relief layer 60 may be made of a group selected from the group consisting of titanium, tungsten, platinum, nickel, aluminum, and chromium. The bonding layer 70 may be made of any one selected from the group consisting of a gold-tin alloy, a gold-indium alloy, and a gold-lead alloy. The permanent substrate 80 may be made of any one selected from the group consisting of a tantalum substrate, a copper substrate, a copper tungsten substrate, an aluminum nitride substrate, and a titanium nitride substrate. The reflective layer 50 may be made of a group selected from the group consisting of aluminum, nickel, silver, and titanium.
接著,如「圖3B」所示,利用如蒸鍍的薄膜製程,於該N型半導體層20(亦即於第一N型半導體層21)上形成圖案化的複數N型電極10。Next, as shown in FIG. 3B, a patterned complex N-type electrode 10 is formed on the N-type semiconductor layer 20 (that is, on the first N-type semiconductor layer 21) by a thin film process such as vapor deposition.
最後,如「圖3C」所示,利用粗化製程,於該N型半導體層20(亦即於第一N型半導體層21)形成有一不規則表面201,且該不規則表面201可以利用物理方法,如電漿衝擊等方式形成,且藉由該複數N型電極10的遮蔽,於該N型半導體層20(亦即於第一N型半導體層21)上形成該複數接觸平台202,即完成本發明的結構。Finally, as shown in FIG. 3C, an irregular surface 201 is formed on the N-type semiconductor layer 20 (that is, in the first N-type semiconductor layer 21) by using a roughening process, and the irregular surface 201 can utilize physical The method is formed by a plasma impact or the like, and the complex contact platform 202 is formed on the N-type semiconductor layer 20 (that is, on the first N-type semiconductor layer 21) by masking the plurality of N-type electrodes 10, that is, The structure of the present invention is completed.
如上所述,本發明可以讓該複數N型電極10形成於該複數接觸平台202上而與該N型半導體層20接觸,由於該複數接觸平台202具有平坦介面,因而其利用薄膜製程形成該N型電極10時,不會形成空隙,所以本發明的結構可以確保該N型電極10與該接觸平台202之間維持良好的電性接觸,同時可避免製作不規則表面201時易導致其分子產生旋鍵而拘限載子,而提高發光效率。As described above, the present invention allows the complex N-type electrode 10 to be formed on the complex contact platform 202 to be in contact with the N-type semiconductor layer 20. Since the plurality of contact pads 202 have a flat interface, the thin-film contact process is used to form the N. When the electrode 10 is formed, voids are not formed, so that the structure of the present invention can ensure good electrical contact between the N-type electrode 10 and the contact platform 202, and at the same time, it is easy to cause molecular generation when the irregular surface 201 is fabricated. The key is locked and the carrier is restrained to improve the luminous efficiency.
惟上述僅為本發明之較佳實施例而已,並非用來限定本發明實施之範圍。即凡依本發明申請專利範圍所做的均等變化與修飾,皆為本發明專利範圍所涵蓋。The above are only the preferred embodiments of the present invention and are not intended to limit the scope of the embodiments of the present invention. That is, the equivalent changes and modifications made by the scope of the patent application of the present invention are covered by the scope of the invention.
1...N型半導體層1. . . N-type semiconductor layer
1A...不規則表面1A. . . Irregular surface
1B...空隙1B. . . Void
2...發光層2. . . Luminous layer
3...P型半導體層3. . . P-type semiconductor layer
4...反射層4. . . Reflective layer
5...應力釋放層5. . . Stress relief layer
6...結合層6. . . Bonding layer
7...矽基板7. . .矽 substrate
8...P型電極8. . . P-type electrode
9...N型電極9. . . N-type electrode
100...發光二極體100. . . Light-emitting diode
10...N型電極10. . . N-type electrode
20...N型半導體層20. . . N-type semiconductor layer
201...不規則表面201. . . Irregular surface
202...接觸平台202. . . Contact platform
21...第一N型半導體層twenty one. . . First N-type semiconductor layer
22...第二N型半導體層twenty two. . . Second N-type semiconductor layer
30...發光層30. . . Luminous layer
40...P型半導體層40. . . P-type semiconductor layer
50...反射層50. . . Reflective layer
60...應力釋放層60. . . Stress relief layer
70...結合層70. . . Bonding layer
80...永久基板80. . . Permanent substrate
90...P型電極90. . . P-type electrode
圖1A,為習知發光二極體結構圖。FIG. 1A is a structural diagram of a conventional light emitting diode.
圖1B,為習知發光二極體空隙結構圖。FIG. 1B is a diagram showing the structure of a conventional light-emitting diode void.
圖2,為本發明二極體結構圖。Fig. 2 is a structural view of a diode of the present invention.
圖3A~圖3C,為本發明二極體結構製造流程圖。3A-3C are flow charts showing the fabrication of the diode structure of the present invention.
100...發光二極體100. . . Light-emitting diode
10...N型電極10. . . N-type electrode
20...N型半導體層20. . . N-type semiconductor layer
201...不規則表面201. . . Irregular surface
202...接觸平台202. . . Contact platform
21...第一N型半導體層twenty one. . . First N-type semiconductor layer
22...第二N型半導體層twenty two. . . Second N-type semiconductor layer
30...發光層30. . . Luminous layer
40...P型半導體層40. . . P-type semiconductor layer
50...反射層50. . . Reflective layer
60...應力釋放層60. . . Stress relief layer
70...結合層70. . . Bonding layer
80...永久基板80. . . Permanent substrate
90...P型電極90. . . P-type electrode
Claims (6)
該N型半導體層形成複數接觸平台,該複數接觸平台具一圖案分佈的設置於該N型半導體層上,且該不規則表面形成於該N型半導體層不具該複數接觸平台之區域,並該複數N型電極分別形成於該複數接觸平台上。An electrode contact structure of a light-emitting diode is applied to a light-emitting diode comprising a plurality of N-type electrodes, an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, and a plurality of sequentially stacked semiconductor electrodes a reflective layer, a stress relief layer, a bonding layer, a permanent substrate and a P-type electrode, and the N-type semiconductor layer is formed with an irregular surface, wherein:
The N-type semiconductor layer forms a plurality of contact platforms, and the plurality of contact pads are disposed on the N-type semiconductor layer with a pattern distribution, and the irregular surface is formed on a region where the N-type semiconductor layer does not have the complex contact platform, and the A plurality of N-type electrodes are respectively formed on the plurality of contact platforms.
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