TW201340276A - 高頻傳輸模組及光纖連接器 - Google Patents
高頻傳輸模組及光纖連接器 Download PDFInfo
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Abstract
本發明提供一種高頻傳輸模組,其包括一個第一晶片、一個設置於該第一晶片上的第二晶片,該第一晶片的頂面四周形成有多個圍繞該第二晶片的焊墊,該多個焊墊包括至少一個鄰近設置的打線焊墊,該第二晶片靠近該至少一個打線焊墊設置,並通過打線與該至少一個打線焊墊連接。如此,可縮短打線的長度,減少打線對該高頻傳輸模組的影響。本發明還提供一種應用該高頻傳輸模組的光纖連接器。
Description
本發明涉及通訊技術,特別涉及一種高頻傳輸模組及光纖連接器。
先前的一種光纖連接器包括光纖、鐳射發射器、鐳射驅動晶片、鐳射接收器及光電轉換晶片。當發送訊號時,鐳射驅動晶片驅動鐳射發射器發射調製有訊號的鐳射經光纖發送出去,而當接收訊號時,鐳射接收器接收光纖接收的、載有訊號的鐳射,再經光電轉換晶片解調制出訊號。具體的,鐳射驅動晶片及光電轉換晶片的頂面四周形成有焊墊,鐳射發射器及鐳射接收器分別設置於鐳射驅動晶片及光電轉換晶片前方,並以打線的方式(wire bond)通過金線與鐳射驅動晶片及光電轉換晶片的焊墊連接。然而,光纖連接器一般用於傳輸高頻訊號,而傳輸高頻訊號時,金線的等效電感將降低金線的帶寬,而且越長,帶寬降低越明顯,從而降低光纖連接器整體的傳輸速率。
有鑒於此,有必要提供一種能減少打線對傳輸速率影響的高頻傳輸模組及光纖連接器。
一種高頻傳輸模組,其包括一個第一晶片、一個設置於該第一晶片上的第二晶片,該第一晶片的頂面四周形成有多個圍繞該第二晶片的焊墊,該多個焊墊包括至少一個鄰近設置的打線焊墊,該第二晶片靠近該至少一個打線焊墊設置,並通過打線與該至少一個打線焊墊連接。
一種光纖連接器,其包括一個電路板、一個設置於該電路板上的鐳射驅動晶片、一個設置於該鐳射驅動晶片上的鐳射發射器、一個設置於該電路板上的光電轉換晶片及一個設置於該光電轉換晶片的鐳射接收器。該鐳射驅動晶片的頂面四周形成有多個圍繞該鐳射發射器的第一焊墊,該多個第一焊墊包括至少一個鄰近設置的第一打線焊墊,該鐳射發射器靠近該至少一個第一打線焊墊設置,並通過打線與該第一打線焊墊連接。該光電轉換晶片的頂面四周形成有多個圍繞該鐳射接收器的第二焊墊,該多個第二焊墊包括至少一個鄰近設置的第二打線焊墊,該鐳射接收器靠近該至少一個第二打線焊墊設置,並通過打線與該第二打線焊墊連接。
如此,可縮短打線的長度,減少打線對該高頻傳輸模組及該光纖連接器的影響。
請參閱圖1-2,本發明較佳實施方式的高頻傳輸模組10,其包括一個第一晶片110、一個設置於該第一晶片110上的第二晶片120,該第一晶片110的頂面112四周形成有多個圍繞該第二晶片120的焊墊114,該多個焊墊114包括至少一個鄰近設置的打線焊墊114d,該第二晶片120靠近該至少一個打線焊墊114d設置,並通過打線130與該至少一個打線焊墊114d連接。
如此,可縮短打線130的長度,減少該打線130對該高頻傳輸模組10的影響。另外,該打線130一般採用成本較高的金線,該打線130長度的縮短還可以降低該高頻傳輸模組10的成本。
具體的,該高頻傳輸模組10包括一個用於將該第二晶片120固定到該第一晶片110上的固定膠層140。
一般地,該高頻傳輸模組10還包括一個基板150及一個導電膠層160。該基板150的頂面152形成有多個第一焊片154。該第一晶片110一般為晶粒的形式,其底面116形成有多個第二焊片118。該第一晶片110設置於該基板150上,該多個第二焊片118以焊片的方式(die bond)通過該導電膠層160連接到該多個第一焊片154。
請參圖3-4,該高頻傳輸模組10可以應用于本發明較佳實施方式的光纖連接器20。
該基板150可以是一個電路板210。
該第一晶片110可以是一個設置於該電路板210上的鐳射驅動晶片220,也可以是一個設置於該電路板210上的光電轉換晶片240。
該第二晶片120可以是一個設置於該鐳射驅動晶片220上的鐳射發射器230,也可以是一個設置於該光電轉換晶片240的鐳射接收器250。
該焊墊114可以是該鐳射驅動晶片220的頂面222四周形成的多個圍繞該鐳射發射器230的第一焊墊224,也可以是該光電轉換晶片240的頂面242四周形成的多個圍繞該鐳射接收器250的第二焊墊244。
該至少一個打線焊墊114d可以是包括在該多個第一焊墊224內的至少一個鄰近設置的第一打線焊墊224d,也可以是包括在該多個第二焊墊244內的至少一個鄰近設置的第二打線焊墊244d。
該鐳射發射器230靠近該至少一個第一打線焊墊224d設置並通過打線260與該第一打線焊墊224d連接,該鐳射接收器250靠近該至少一個第二打線焊墊244d設置並通過打線260與該第二打線焊墊244d連接。
如此,可縮短打線260的長度,減少打線260對該光纖連接器20傳輸速率的影響。另外,該打線260一般採用成本較高的金線,該打線260長度的縮短還可以降低該光纖連接器20的成本。
同樣的,該光纖連接器20包括一個用於將該鐳射發射器230固定到該鐳射驅動晶片220及將該鐳射接收器250固定到該光電轉換晶片240的固定膠層140。
該光纖連接器20還包括該導電膠層160。該電路板210的頂面212形成有兩組第三焊片214。該鐳射驅動晶片220及該光電轉換晶片240一般為晶粒的形式,其底面226各形成有一組第四焊片228。該兩組第四焊片228分別以焊片的方式通過該導電膠層160連接到該兩組第三焊片214。
具體的,該光纖連接器20一般還包括分別與該鐳射發射器230及該鐳射接收器250耦合的兩個透鏡光纖270及一個外殼280。
綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。
10...高頻傳輸模組
110...第一晶片
112,152,212,222,242...頂面
114...焊墊
114d...打線焊墊
116,226...底面
118...第二焊片
120...第二晶片
130,260...打線
140...固定膠層
150...基板
154...第一焊片
160...導電膠層
20...光纖連接器
210...電路板
214...第三焊片
220...鐳射驅動晶片
224...第一焊墊
224d...第一打線焊墊
228...第四焊片
230...鐳射發射器
240...光電轉換晶片
244...第二焊墊
244d...第二打線焊墊
250...鐳射接收器
270...光纖
280...外殼
圖1為本發明一個實施方式的高頻傳輸模組的立體結構示意圖。
圖2為圖1的高頻傳輸模組的平面示意圖。
圖3為本發明另一個實施方式的光纖連接器的部分剖面立體結構示意圖。
圖4為圖3的光纖連接器的部分剖面平面示意圖。
10...高頻傳輸模組
110...第一晶片
112,152...頂面
114...焊墊
114d...打線焊墊
120...第二晶片
130...打線
150...基板
Claims (8)
- 一種高頻傳輸模組,其包括一個第一晶片、一個設置於該第一晶片上的第二晶片,該第一晶片的頂面四周形成有多個圍繞該第二晶片的焊墊,該多個焊墊包括至少一個鄰近設置的打線焊墊,該第二晶片靠近該至少一個打線焊墊設置,並通過打線與該至少一個打線焊墊連接。
- 如申請專利範圍第1項所述的高頻傳輸模組,其中,該高頻傳輸模組包括一個用於將該第二晶片固定到該第一晶片上的固定膠層。
- 如申請專利範圍第1項所述的高頻傳輸模組,其中,該高頻傳輸模組還包括一個基板及一個導電膠層;該基板的頂面形成有多個第一焊片;該第一晶片一般為晶粒的形式,其底面形成有多個第二焊片;該第一晶片設置於該基板上,該多個第二焊片以焊片的方式通過該導電膠層分別連接到該多個第一焊片。
- 一種光纖連接器,其包括一個電路板、一個設置於該電路板上的鐳射驅動晶片、一個設置於該鐳射驅動晶片上的鐳射發射器、一個設置於該電路板上的光電轉換晶片及一個設置於該光電轉換晶片的鐳射接收器;該鐳射驅動晶片的頂面四周形成有多個圍繞該鐳射發射器的第一焊墊,該多個第一焊墊包括至少一個鄰近設置的第一打線焊墊,該鐳射發射器靠近該至少一個第一打線焊墊設置,並通過打線與該第一打線焊墊連接;該光電轉換晶片的頂面四周形成有多個圍繞該鐳射接收器的第二焊墊,該多個第二焊墊包括至少一個鄰近設置的第二打線焊墊,該鐳射接收器靠近該至少一個第二打線焊墊設置,並通過打線與該第二打線焊墊連接。
- 如申請專利範圍第4項所述的光纖連接器,其中,該光纖連接器包括一個用於將該鐳射發射器固定到該鐳射驅動晶片及將該鐳射接收器固定到該光電轉換晶片的固定膠層。
- 如申請專利範圍第4項所述的光纖連接器,其中,該光纖連接器還包括一個導電膠層;該電路板的頂面形成有兩組第三焊片;該鐳射驅動晶片及該光電轉換晶片為晶粒,其底面各形成有一組第四焊片;該兩組第四焊片分別以焊片的方式通過該導電膠層連接到該兩組第三焊片。
- 如申請專利範圍第4項所述的光纖連接器,其中,該光纖連接器還包括兩個分別與該鐳射發射器及該鐳射接收器耦合的透鏡光纖。
- 如申請專利範圍第4項所述的光纖連接器,其中,該光纖連接器還包括一個外殼。
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US13/555,175 US8740475B2 (en) | 2012-03-22 | 2012-07-22 | High-frequency transmission module and optical connector having stacked chips connected via wire bonding |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI621890B (zh) * | 2017-11-02 | 2018-04-21 | Soft board optical line device manufacturing method | |
TWI636288B (zh) * | 2017-11-02 | 2018-09-21 | 建毅科技股份有限公司 | Flexible board optical line device |
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TWI517433B (zh) * | 2013-03-22 | 2016-01-11 | 財團法人工業技術研究院 | 自動對準之晶片載具與其封裝結構 |
WO2017171337A1 (ko) * | 2016-03-30 | 2017-10-05 | 엘지이노텍 주식회사 | 반도체 소자 |
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Publication number | Priority date | Publication date | Assignee | Title |
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US6437449B1 (en) * | 2001-04-06 | 2002-08-20 | Amkor Technology, Inc. | Making semiconductor devices having stacked dies with biased back surfaces |
JP3936858B2 (ja) * | 2001-11-01 | 2007-06-27 | 日本オプネクスト株式会社 | 光変調装置 |
JP4159778B2 (ja) * | 2001-12-27 | 2008-10-01 | 三菱電機株式会社 | Icパッケージ、光送信器及び光受信器 |
US7183581B2 (en) * | 2003-12-25 | 2007-02-27 | Matsushita Electric Industrial Co., Ltd. | Optical transmission module for use in high-speed optical fiber communication |
JP2005259915A (ja) * | 2004-03-10 | 2005-09-22 | Nec Electronics Corp | 半導体装置およびその製造方法 |
US7505284B2 (en) * | 2005-05-12 | 2009-03-17 | International Business Machines Corporation | System for assembling electronic components of an electronic system |
JPWO2009090988A1 (ja) * | 2008-01-16 | 2011-05-26 | 古河電気工業株式会社 | 光モジュール |
US7923304B2 (en) * | 2009-09-10 | 2011-04-12 | Stats Chippac Ltd. | Integrated circuit packaging system with conductive pillars and method of manufacture thereof |
US8618659B2 (en) * | 2011-05-03 | 2013-12-31 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
US9219041B2 (en) * | 2012-03-29 | 2015-12-22 | International Business Machines Corporation | Electronic package for millimeter wave semiconductor dies |
JP5959097B2 (ja) * | 2012-07-03 | 2016-08-02 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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TWI621890B (zh) * | 2017-11-02 | 2018-04-21 | Soft board optical line device manufacturing method | |
TWI636288B (zh) * | 2017-11-02 | 2018-09-21 | 建毅科技股份有限公司 | Flexible board optical line device |
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US20130251313A1 (en) | 2013-09-26 |
US8740475B2 (en) | 2014-06-03 |
TWI514533B (zh) | 2015-12-21 |
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