TW201327664A - Plasma processing apparatus and focus ring assembly - Google Patents

Abstract

The invention provides a plasma processing apparatus and a focus ring assembly. The plasma processing apparatus comprises: a processing cavity, a pedestal arranged in the processing cavity, an electrostatic chuck (ESC) and the focus ring assembly, wherein the ESC is arranged above the pedestal and is suitable for adsorbing a semiconductor wafer; the focus ring assembly is arranged on the pedestal and surrounds the ESC. The focus ring assembly comprises: a first focus ring and a second focus ring, which are in a ring shape. A groove is arranged in the first focus ring and the second focus ring is located in the groove. One part of the focus ring assembly is located under the semiconductor wafer and the other part surrounds the semiconductor wafer. The second focus ring is located under the semiconductor wafer. When the plasma processing apparatus is used to carry out plasma processing to the semiconductor wafer, a pollution problem of a back side of the semiconductor wafer can be effectively improved. Simultaneously, the semiconductor wafer can have a vertical etching section, which increases performance of an integrated circuit.

Description

Plasma processing device and focus ring element

The present invention relates to a semiconductor device, and more particularly to a plasma processing device and a focus ring element.

Plasma Technology plays a pivotal role in semiconductor manufacturing. It can be used in many semiconductor processes, such as deposition processes (such as chemical vapor deposition), etching processes (such as dry etching). 1 is a partial schematic view of a conventional plasma processing apparatus, as shown in FIG. 1, including a susceptor 1 disposed in a plasma processing chamber (not shown). The susceptor 1 is provided with an Electrostatic Chuck (ESC) 2 for adsorbing the semiconductor wafer W for plasma treatment (etching or deposition). In order to avoid damage to the electrostatic chuck 2 during plasma processing of the semiconductor wafer W, the size of the carrying surface of the electrostatic chuck 2 is smaller than the size of the semiconductor wafer W. In the process of plasma processing the semiconductor wafer W, there is often a problem that the processing effect of the edge region of the semiconductor wafer W is different from that of the central region of the semiconductor wafer W. In order to avoid or improve such a problem, a focus ring 3 is disposed on the susceptor 1 in the plasma processing apparatus, and the focus ring 3 surrounds the electrostatic chuck 2, and at least a part of the focus ring 3 is located on the semiconductor wafer. Below W.

Although the effect of the focus ring on the edge area of the semiconductor wafer is improved, in the process of plasma processing the semiconductor wafer W, the edge region of the back surface of the semiconductor wafer W still often deposits a polymer (such as fluorination polymerization). Byproducts. The polymer is usually a photoresist material or fluorocarbon previously exposed to an etch chemistry The composition of the polymer by-product formed during the etching process. Typically, the fluorinated polymer is a material of the formula CxHyFz wherein x, z are integers greater than zero and y is an integer greater than or equal to zero. For example, common fluorinated polymers are CH4, C2H6, CH2F2, C4H8, C5H8 and the like. After the plasma treatment, the semiconductor wafer on which the polymer is deposited on the back side is transferred to perform the next semiconductor processing. The polymer can cause some contamination to the robot for transport, the transfer chamber, and the box on which the semiconductor wafer is placed during the semiconductor wafer transfer process. If the polymers in these transport devices are not removed in time, subsequent processes can be contaminated. Therefore, effectively improving the contamination on the back side of the semiconductor wafer has become an urgent problem to be solved.

In view of the above problem of semiconductor wafer backside contamination, the prior art proposes another plasma processing apparatus, as shown in FIG. 2, which includes a pedestal placed in a plasma processing chamber (not shown). 1. The susceptor 1 is provided with an Electrostatic Chuck (ESC) 2 for adsorbing the semiconductor wafer W for plasma treatment (etching or deposition), in order to avoid performing on the semiconductor wafer W. During the plasma treatment, the plasma may damage the electrostatic chuck 2, and the size of the carrying surface of the electrostatic chuck 2 is smaller than the size of the semiconductor wafer W. The susceptor 1 is provided with a ring 4 which surrounds the electrostatic chuck 2 and is located below the semiconductor wafer W. A focus ring 3 is also disposed on the base 1, and the focus ring 3 surrounds the ring 4.

Although the added ring 4 in the plasma processing apparatus improves the contamination problem on the back surface of the semiconductor wafer, the semiconductor wafer W after the plasma treatment is detected, and the polymer is still deposited on the back surface of the semiconductor wafer W. In addition, the etched section in the semiconductor wafer W is not vertical, that is, the actual etched shape and target of the semiconductor wafer W The etched topography has variations that affect the performance of the integrated circuit. Obviously, this is undesirable in plasma technology.

The problem to be solved by the present invention is that when a semiconductor wafer is plasma-treated by a conventional plasma device, the problem of backside contamination of the semiconductor wafer cannot be effectively improved, and in addition, the semiconductor wafer cannot obtain a vertical etched section. Affect the performance of the integrated circuit.

In order to solve the above problems, the present invention provides a plasma processing apparatus including: a processing chamber; a susceptor disposed in the processing chamber; and an electrostatic chuck disposed above the susceptor for adsorbing a semiconductor wafer a focus ring assembly disposed on the base and surrounding the electrostatic chuck, comprising a first focus ring and a second focus ring in an annular shape, wherein the first focus ring is provided with a groove, the first a second focus ring is located in the recess, a portion of the focus ring element is adapted to be positioned below the semiconductor wafer, another portion is adapted to surround the semiconductor wafer, and a portion of the second focus ring is adapted to be located in the semiconductor crystal Below the circle.

Optionally, the material of the second focus ring is all quartz, or the surface material of the second focus ring is quartz.

Optionally, the plasma processing apparatus further includes a coupling ring disposed on the base and surrounding the base, the focus ring assembly being located on the coupling ring.

Meanwhile, the present invention also provides a focus ring element comprising a first focus ring in a ring shape, a second focus ring, a groove provided in the first focus ring, and the second focus ring is located in the concave Within the slot, a portion of the focus ring element is adapted to be positioned below the semiconductor wafer and another portion is adapted Surrounding the semiconductor wafer, a portion of the second focus ring is adapted to be positioned below the semiconductor wafer.

Optionally, the material of the second focus ring is all quartz, or the surface material of the second focus ring is quartz.

Compared with the prior art, the present invention has the following advantages: the plasma processing of the semiconductor wafer by the plasma processing device can effectively improve the contamination problem on the back side of the semiconductor wafer, and at the same time, the semiconductor wafer can obtain vertical etching. The cross section improves the performance of the integrated circuit.

As described in the prior art, the plasma processing apparatus in the prior art has the following problems: the problem of contamination on the back side of the semiconductor wafer cannot be effectively improved, and in addition, the semiconductor wafer cannot obtain a vertical etching section, which affects the integrated circuit. Performance.

The technical solutions of the present invention are clearly and completely described in the following with reference to the accompanying drawings. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of them. According to these embodiments, all other embodiments that are available to those skilled in the art without the need for inventive work are within the scope of the present invention.

Fig. 3 is a view showing the configuration of a plasma processing apparatus in an embodiment of the plasma processing apparatus of the present invention. As shown in FIG. 3, the plasma processing apparatus 10 includes a processing chamber 11 which may be formed of alumina having an anodized film (acid-resistant aluminum) formed on its surface. The side wall of the processing chamber 11 is provided with an air suction port 12 which is connected to the exhaust system 13 for evacuating the processing chamber 11 so that plasma processing can be performed in the processing chamber 11. An insulating plate 14 is disposed inside the processing chamber 11, and a base serving as a lower electrode is disposed above the insulating plate 14. 15. The material of the susceptor 15 may be alumina or the like having an anodized film (acid-resistant aluminum) formed on its surface. The inside of the susceptor 15 is provided with a heat medium flow path 15a and a gas flow path 15b for controlling the temperature of the semiconductor wafer W within a predetermined temperature range. Further, a power supply line 16 is connected to the susceptor 15, and a high-frequency power source (RF power source) 17 applies high-frequency power of a predetermined frequency to the susceptor 15 via the power supply line 16.

An electrostatic chuck (ESC) 18 is disposed above the susceptor 15, and the electrostatic chuck 18 is used to adsorb the semiconductor wafer W so that the semiconductor wafer W can be plasma-treated. In order to avoid plasma damage to the electrostatic chuck 18 during plasma processing of the semiconductor wafer W, the size of the electrostatic chuck 18 is smaller than the size of the semiconductor wafer W, that is, the electrostatic chuck 18 is completely covered by the semiconductor wafer W. A shower head 19 is disposed above the electrostatic chuck 18. The shower head 19 is disposed in parallel with the susceptor 15, and both constitute a pair of electrodes (upper electrode and lower electrode). The shower head 19 is provided with a plurality of gas outlets 20 on the side opposite to the susceptor 15, and a gas introduction port 21 is provided above the shower head 19. The gas introduction port 21 is connected to the gas supply pipe 22, and the other end of the gas supply pipe 22 is connected to the gas supply system. The gas supply system consists of a mass flow controller (MFC) 23 that controls the flow of gas and a gas supply source 24.

4 is a partial schematic view of a plasma processing apparatus in an embodiment of a plasma processing apparatus of the present invention. As shown in FIG. 4, the plasma processing apparatus 10 is further provided with a focus ring member 25 having a ring shape which is mounted on the base 15 and surrounds the entire electrostatic chuck 18 (i.e., the electrostatic chuck 18 is biased by the focus ring assembly 25). Surrounded). The focus ring element 25 includes a first focus ring 25a and a second focus ring 25b. The first focus ring 25a and the second focus ring 25b are annular, and the first focus ring 25a is provided with a groove, and the second focus ring 25b is mounted on the ring. Inside the groove. In this embodiment, The cross-sectional shape of the groove is a rectangle, and of course, the groove can also be set to other shapes. The focus ring element 25 can be considered to be composed of two parts, a portion of the focus ring element 25 (the portion containing the groove) being located below the semiconductor wafer W and another portion surrounding the semiconductor wafer W. The material of the first focus ring 25a may be a suitable material such as Si, SiN, SiO2 or the like. The material of the second focus ring 25b may be all quartz, or the material of the second focus ring 25b is quartz, that is, the surface material of the second focus ring 25b is quartz.

In practical applications, the height dimension of the focus ring element 25 can be set according to specific use conditions, so that there is a gap between the portion of the focus ring element 25 under the semiconductor wafer W and the semiconductor wafer W, so that the focus ring element can be avoided. The temperature of 25 is too high to expand so as to jack up the semiconductor wafer W. In addition, the radial dimension of the focus ring element 25 needs to be set according to the specific use conditions, so that after the electrostatic chuck 18 in the plasma processing apparatus adsorbs the semiconductor wafer W, a part of the second focus ring 25b in the focus ring element 25 is located. Below the semiconductor wafer W. Undesirable by-products such as polymers may form during plasma processing (including etching process, deposition process) of the semiconductor wafer W, and the resulting polymer may pass through the semiconductor wafer W and the focus ring element 25 The gap therebetween is deposited on the back side of the semiconductor wafer W, and more specifically, on the edge region of the back surface of the semiconductor wafer W. The quartz (SiO2) in the second focus ring 25b can release oxygen under the action of the plasma, so that when the polymer passes through the gap between the semiconductor wafer W and the focus ring element 25, the released oxygen can react with The polymer in the chamber 11 reacts to generate CO, CO2, H2O, CiFjOk (i, j is an integer greater than 0, and k is an integer greater than or equal to 0), and the generated materials can be processed from the plasma. The suction port 12 in the device 10 is pumped away, thereby making the semiconductor wafer W back The surface will not be contaminated. At the same time, the precursor gas molecule CF2 or the like which produces the polymer is also reacted with quartz to generate CO2, SiF4 or the like which is withdrawn from the suction port 12. Therefore, placing a quartz ring near the edge of the processing wafer not only prevents polymer generation, but also consumes oxygen that is released by the quartz ring. The shape and size design of the second gathering ring 25b is required to achieve the object of the invention as long as it is disposed around the outer edge of the wafer. The second collecting ring has an outer diameter larger than the radius of the wafer, so that the second focusing ring surrounds the wafer, the second focusing ring has an inner diameter smaller than or equal to the wafer radius, and a part of the second collecting ring may be located below the wafer.

Meanwhile, compared with the plasma processing apparatus shown in FIG. 2 in the prior art, since the second focus ring 25b is located in the groove of the first focus ring 25a, that is, between the electrostatic chuck 18 and the second focus ring 25b. Part of the first focus ring 25a is blocked (instead of any barrier between the second focus ring 25b and the electrostatic chuck 18), enhancing RF coupling from the electrostatic chuck 18 to the first focus ring 25a, making the semiconductor The wafer W can obtain a vertical etched cross section, which improves the performance of the integrated circuit.

Further, a coupling ring 26 is disposed between the base 15 and the focus ring member 25, that is, the coupling ring 26 is located on the base 15, the focus ring assembly 25 is located on the coupling ring 26, and the coupling ring 26 is used for reinforcement. RF coupling from the electrostatic chuck 18 to the first focus ring 25a.

Next, the use of the plasma processing apparatus in the present invention will be described. First, the semiconductor wafer W is placed in the processing chamber 11 by a transport mechanism (not shown), and placed above the electrostatic chuck 18 to be removed and transported. The mechanism seals the processing chamber 11. Applying a predetermined voltage to the electrostatic chuck 18 to tightly adsorb the semiconductor wafer W to the electrostatic chuck 18 Above.

Then, the gas in the processing chamber 11 is evacuated by the vacuum pump in the exhaust system 13 until the processing chamber 11 reaches a predetermined degree of vacuum, and gas is introduced into the processing chamber 11 through the gas supply system.

Then, in this state, the high-frequency power source 17 applies high-frequency power of a predetermined frequency to the susceptor 15, generates plasma between the susceptor 15 and the shower head 19, and generates plasma to perform semiconductor processing on the semiconductor wafer W. .

The plasma processing apparatus in the present invention may be a plasma etching apparatus, a plasma deposition apparatus, or the like.

Compared with the prior art, the present invention has the following advantages: the plasma processing of the semiconductor wafer by the plasma processing device can effectively improve the contamination problem on the back side of the semiconductor wafer, and at the same time, the semiconductor wafer can obtain vertical etching. The cross section improves the performance of the integrated circuit.

The above description of the embodiments is to enable those skilled in the art to understand the invention and the invention. It will be apparent to those skilled in the art that various modifications and changes can be made to the above-described embodiments without departing from the spirit and scope of the invention. Therefore, the present invention should not be construed as limited to the above-described embodiments shown herein, and the scope of the invention should be defined by the appended claims.

1‧‧‧Base

2‧‧‧Electrostatic suction cup

3‧‧‧ Focus ring

4‧‧‧rings

10‧‧‧ Plasma processing unit

11‧‧‧Processing chamber

12‧‧‧Exhaust port

13‧‧‧Exhaust system

14‧‧‧Insulation board

15‧‧‧Base

15a‧‧‧Hot media flow path

15b‧‧‧ gas flow path

16‧‧‧Power supply line

17‧‧‧High frequency power supply

18‧‧‧Electrostatic suction cup

19‧‧‧Sprinkler

20‧‧‧ gas export

21‧‧‧ gas inlet

22‧‧‧Gas supply piping

23‧‧‧Quality Flow Controller

24‧‧‧ gas supply

25‧‧‧ Focus ring components

25a‧‧‧First Focus Ring

25b‧‧‧second focus ring

W‧‧‧ wafer

1 is a partial schematic view of a plasma processing apparatus in the prior art.

2 is a partial schematic view of another plasma processing apparatus in the prior art.

3 is a view showing an example of a plasma processing apparatus of the present invention; Schematic diagram of the body treatment device.

4 is a partial schematic view of a plasma processing apparatus in an embodiment of a plasma processing apparatus of the present invention.

10‧‧‧ Plasma processing unit

11‧‧‧Processing chamber

12‧‧‧Exhaust port

13‧‧‧Exhaust system

14‧‧‧Insulation board

15‧‧‧Base

15a‧‧‧Hot media flow path

15b‧‧‧ gas flow path

16‧‧‧Power supply line

17‧‧‧High frequency power supply

18‧‧‧Electrostatic suction cup

19‧‧‧Sprinkler

20‧‧‧ gas export

21‧‧‧ gas inlet

22‧‧‧Gas supply piping

23‧‧‧Quality Flow Controller

24‧‧‧ gas supply

25‧‧‧ Focus ring components

26‧‧‧Coupling ring

W‧‧‧ wafer

Claims (5)

A plasma processing apparatus comprising: a processing chamber; a susceptor disposed within the processing chamber; an electrostatic chuck disposed above the susceptor for adsorbing a semiconductor wafer; disposed on the pedestal and surrounding a focus ring assembly of the electrostatic chuck, the focus ring assembly includes a first focus ring and a second focus ring in a ring shape, a groove is disposed in the first focus ring, and the second focus ring is located in the Within the recess, a portion of the focus ring element is adapted to be positioned below the semiconductor wafer, another portion is adapted to surround the semiconductor wafer, and the second focus ring has an outer diameter greater than the semiconductor crystal The radius of the circle is such that the outer circumference of the second focus ring surrounds the semiconductor wafer, and the second focus ring has an inner diameter equal to or less than a radius of the semiconductor wafer. The plasma processing apparatus of claim 1, wherein the material of the second focus ring is entirely quartz, or the surface material of the second focus ring is quartz. The plasma processing apparatus of claim 1, wherein the plasma processing apparatus further comprises a coupling ring disposed on the base and surrounding the susceptor, A focus ring assembly is located on the coupling ring. A focus ring element includes a first focus ring in a ring shape, a second focus ring, a groove in the first focus ring, and a second focus ring located in the groove, the focus ring element A portion of the portion is adapted to be positioned under the semiconductor wafer, another portion is adapted to surround the semiconductor wafer, and a portion of the second focus ring is adapted to be positioned below the semiconductor wafer. The focus ring element of claim 4, wherein the material of the second focus ring is entirely quartz, or the surface material of the second focus ring is quartz.