TW201324642A - Foreign body inspecting device and semiconductor manufacturing device - Google Patents

Foreign body inspecting device and semiconductor manufacturing device Download PDF

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TW201324642A
TW201324642A TW101132198A TW101132198A TW201324642A TW 201324642 A TW201324642 A TW 201324642A TW 101132198 A TW101132198 A TW 101132198A TW 101132198 A TW101132198 A TW 101132198A TW 201324642 A TW201324642 A TW 201324642A
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foreign matter
inspection
wafer
unit
foreign
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TW101132198A
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TWI509720B (en
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Masayuki Kaga
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Toshiba Kk
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Supply And Installment Of Electrical Components (AREA)
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Abstract

According to one embodiment, a foreign body inspecting device includes an inspection head having a base inspection part and a supporting part for supporting the base inspection part; and a control part having a base data storage part, an inspection control part and a foreign body existence determining part. The base data storage part stores base data representing base arrangement area of arrangement positions of a layout substrate or a chip located on the upper most layer of the layout substrate. The inspection control part is to control the inspection head to contact with a inspection target at a specific position by pressing with a specific force. Based on the inspection data obtained from the base inspection part and referring to the base data, the foreign body existence determining part determines an area in the base arrangement area with pressure higher than other areas as a foreign body existence area .

Description

異物檢查裝置及半導體製造裝置 Foreign object inspection device and semiconductor manufacturing device

本發明之實施形態係關於異物檢查裝置及半導體製造裝置。 Embodiments of the present invention relate to a foreign matter inspection device and a semiconductor manufacturing device.

近年來,較多使用NAND型快閃記憶體等非揮發性半導體記憶裝置作為移動電話或個人電腦等電子機器之記憶裝置,其結果,電子機器之小型輕量化正在進行。又,與藉由該等電子機器而處理之資訊量的增大相對應,非揮發性半導體記憶裝置之高容量化亦在進行。作為此種電子機器中所使用之非揮發性半導體記憶裝置,可列舉記憶卡(半導體記憶卡)。 In recent years, non-volatile semiconductor memory devices such as NAND flash memories have been widely used as memory devices for electronic devices such as mobile phones and personal computers. As a result, the size and weight of electronic devices are increasing. Further, in response to an increase in the amount of information processed by the electronic devices, the increase in capacity of the nonvolatile semiconductor memory device is also progressing. As a nonvolatile semiconductor memory device used in such an electronic device, a memory card (semiconductor memory card) can be cited.

例如,為了實現經小型化之記憶卡,將記憶體晶片或控制器晶片等半導體晶片積層並搭載於佈線基板上,但為了實現記憶卡之更高容量化,亦開始將記憶體晶片本身多段積層於佈線基板上。 For example, in order to realize a miniaturized memory card, a semiconductor wafer such as a memory chip or a controller wafer is laminated on a wiring board. However, in order to increase the capacity of the memory card, the memory chip itself is also laminated in multiple layers. On the wiring substrate.

此時,由於記憶卡之厚度(外形尺寸)已定,因此為了實現高容量化,必需使各記憶體晶片之厚度變薄,例如使用50 μm以下之厚度的晶片。 At this time, since the thickness (outer size) of the memory card is fixed, it is necessary to reduce the thickness of each memory chip in order to increase the capacity, for example, a wafer having a thickness of 50 μm or less is used.

於積層記憶體晶片之時,若於作為基底之佈線基板或記憶體晶片之上表面存在異物,則有於使置於上部之記憶體晶片對於基底接觸並進行按壓之時,以異物為起點記憶體晶片破裂之虞。 When a memory chip is stacked on the surface of the memory substrate or the memory chip as a base, when the memory chip placed on the upper surface is brought into contact with and pressed against the substrate, the foreign matter is used as a starting point for memory. The flaw of the body wafer is broken.

先前,對於檢查記憶體晶片內之功能方塊未正常工作之 缺陷區域,並基於其而使記憶體晶片積層之情況進行有揭示,但對於在基底上存在異物之情形時之晶片的積層方法並未進行揭示。 Previously, it was not working properly to check the function blocks in the memory chip. The defect region is revealed based on the case where the memory wafer is laminated, but the method of laminating the wafer in the case where foreign matter is present on the substrate is not disclosed.

根據一個實施形態,提供一種異物檢查裝置,其檢查包括佈線基板、或積層有晶片之佈線基板的檢查對象之上表面之異物之有無。上述異物檢查裝置包括:檢測頭,其檢測存在於上述檢查對象之上表面的異物之存在之有無;及控制裝置,其使上述檢測頭於上述檢查對象上移動,進行異物檢測處理,根據自上述檢測頭取得之表示上述檢查對象之上表面之狀態的檢查資料提取異物存在區域。 According to one embodiment, there is provided a foreign matter inspection device that checks for the presence or absence of foreign matter on the upper surface of an inspection object including a wiring substrate or a wiring substrate on which a wafer is laminated. The foreign object inspection device includes: a detection head that detects presence or absence of foreign matter present on an upper surface of the inspection object; and a control device that moves the detection head on the inspection object to perform foreign matter detection processing, according to the above The inspection material obtained by the detecting head indicating the state of the upper surface of the inspection object extracts a foreign matter existence region.

根據一個實施形態,可提供一種防止由於存在於作為基底之佈線基板或晶片之上表面的異物而使積層之晶片破裂的異物檢查裝置及半導體製造裝置。 According to one embodiment, it is possible to provide a foreign matter inspection apparatus and a semiconductor manufacturing apparatus which prevent a wafer which is laminated due to foreign matter existing on a surface of a wiring board or a wafer as a base.

以下,參照隨附圖式,對實施形態之異物檢查裝置及半導體製造裝置進行詳細說明。再者,該等實施形態並不限制本發明。 Hereinafter, the foreign matter inspection device and the semiconductor manufacturing device according to the embodiment will be described in detail with reference to the accompanying drawings. Furthermore, the embodiments do not limit the invention.

(第1實施形態) (First embodiment)

圖1係模式性地表示包括第1實施形態之異物檢查裝置之半導體製造系統之構成的圖。半導體製造系統1包括:載入器10,其存儲處理前之佈線基板(包含積層有記憶體晶片或控制器晶片等晶片之佈線基板)80;異物檢查裝置20,其檢查佈線基板80上是否存在異物85;異物除去裝置 30,其於佈線基板80上存在異物85之情形時除去異物85;晶片積層裝置40,其於佈線基板80上不存在異物85之情形時,使記憶體晶片或控制器晶片等晶片90積層於佈線基板80上;卸載器50,其存儲積層有晶片90之佈線基板80;搬送裝置60,其於載入器10與卸載器50之間向各處理裝置搬送佈線基板80;及系統控制裝置70,其控制該等各處理裝置。 Fig. 1 is a view schematically showing the configuration of a semiconductor manufacturing system including the foreign matter inspection device according to the first embodiment. The semiconductor manufacturing system 1 includes a loader 10 that stores a wiring substrate before processing (a wiring substrate including a wafer in which a memory wafer or a controller wafer is laminated) 80; and a foreign matter inspection device 20 that checks whether or not the wiring substrate 80 exists. Foreign matter 85; foreign matter removing device 30. When the foreign matter 85 is present on the wiring substrate 80, the foreign matter 85 is removed. When the foreign matter 85 is not present on the wiring substrate 80, the wafer 90 such as a memory chip or a controller wafer is laminated on the wafer 90. On the wiring board 80; the unloader 50 stores the wiring board 80 on which the wafer 90 is laminated; the transport apparatus 60 transports the wiring board 80 between the loader 10 and the unloader 50 to each processing apparatus; and the system control apparatus 70 It controls the various processing devices.

異物檢查裝置20係檢查所搬送來之佈線基板80之上表面或積層於佈線基板80上之晶片90之上表面是否存在異物85的裝置。以下對於異物檢查裝置20之構造進行描述。 The foreign matter inspection device 20 is a device for inspecting whether or not the foreign matter 85 is present on the upper surface of the transferred wiring substrate 80 or the upper surface of the wafer 90 laminated on the wiring substrate 80. The configuration of the foreign matter inspection device 20 will be described below.

異物除去裝置30係除去存在於佈線基板80之上表面或積層於佈線基板80上的晶片90之上表面的異物85的裝置。作為異物除去裝置30,例如可使用於使粘著膠帶31與佈線基板80之上表面或積層於佈線基板80上之晶片90之上表面接觸之後,進行剝離,藉此而除去異物85之構造之裝置。此處,採用粘著膠帶31藉由滾筒而纏繞之方式者。 The foreign matter removing device 30 is a device that removes foreign matter 85 existing on the upper surface of the wiring substrate 80 or laminated on the upper surface of the wafer 90 on the wiring substrate 80. For example, the foreign matter removing device 30 can be configured such that the adhesive tape 31 is brought into contact with the upper surface of the wiring substrate 80 or the upper surface of the wafer 90 laminated on the wiring substrate 80, and then peeled off, whereby the foreign matter 85 is removed. Device. Here, the manner in which the adhesive tape 31 is wound by the roller is used.

晶片積層裝置40包括:晶片載置台41,其配置所積層之晶片90;及晶片配置頭42,其可於晶片載置台41與支持佈線基板80之未圖示之載物台上之間移動。晶片配置頭42成為可於水平面內及垂直方向移動之構成,並成為於下表面具有真空夾盤機構或靜電夾盤機構等晶片保持機構,且可保持晶片90之上表面之構造。即,藉由晶片載置台41保持下表面形成有黏著層之晶片90之上表面,移動至佈線基板80上,進行佈線基板80與晶片90之位置對準之後,將晶片 90按壓於佈線基板80上使其黏著。黏著處理結束後,解除晶片保持機構,進行貼附其他晶片90之處理。再者,自晶片90之保持向晶片90之佈線基板80上之特定之位置之積層處理例如藉由系統控制裝置70而得以控制。 The wafer stacking apparatus 40 includes a wafer mounting table 41 on which the stacked wafers 90 are disposed, and a wafer placement head 42 that is movable between the wafer mounting table 41 and a stage (not shown) that supports the wiring substrate 80. The wafer arranging head 42 is configured to be movable in the horizontal plane and in the vertical direction, and has a structure in which a wafer holding mechanism such as a vacuum chuck mechanism or an electrostatic chuck mechanism is provided on the lower surface, and the upper surface of the wafer 90 can be held. That is, the wafer mounting table 41 holds the upper surface of the wafer 90 on which the adhesive layer is formed on the lower surface, moves onto the wiring substrate 80, and positions the wiring substrate 80 and the wafer 90. 90 is pressed against the wiring substrate 80 to be adhered. After the adhesion process is completed, the wafer holding mechanism is released, and the process of attaching the other wafers 90 is performed. Further, the lamination processing from the wafer 90 to a specific position on the wiring substrate 80 of the wafer 90 is controlled by, for example, the system control device 70.

搬送裝置60於自載入器10至卸載器50之間的各處理裝置間搬送佈線基板80。作為搬送裝置60,例如可列舉帶式輸送機或機械臂式之佈線基板搬送裝置等。此處,搬送裝置60表示利用帶式輸送機而構成之情形。又,於異物檢查裝置20或異物除去裝置30、晶片積層裝置40中,該帶式輸送機亦具有作為保持佈線基板80之載物台的功能。 The transport device 60 transports the wiring substrate 80 between the respective processing devices from the loader 10 to the unloader 50. As the conveying device 60, for example, a belt conveyor or a robot arm type wiring board conveying device can be cited. Here, the conveying device 60 is a case where it is configured by a belt conveyor. Further, in the foreign matter inspection device 20, the foreign matter removing device 30, and the wafer layering device 40, the tape conveyor also has a function as a stage for holding the wiring substrate 80.

系統控制裝置70進行如下控制:自載入器10至卸載器50藉由搬送裝置60搬送佈線基板80,且向各裝置指示對於佈線基板80之處理。例如,使自載入器10搬出之佈線基板80於異物檢查裝置20之檢查區域停止,指示異物檢查裝置20進行檢查。於異物85於佈線基板80上不存在之情形時,於晶片積層裝置40之處理區域停止佈線基板80,指示晶片積層裝置40將晶片90積層於佈線基板80上。又,於異物85存在於佈線基板80上之情形時,於異物除去裝置30之除去區域停止佈線基板80,指示異物除去裝置30進行異物85之除去,並且指示不要自載入器10搬出新佈線基板80。除去異物85之後,向搬送裝置60發出指示將佈線基板80搬送至異物檢查裝置20,且指示再次對異物檢查裝置20進行檢查。再者,於在相同位置檢測出異物85之情形時,判斷是否藉由異物除去裝置30不能除去佈線基板80上之異物85,或者 異物85附著於異物檢查裝置20側之任一種,且輸出表示異常之警告。 The system control device 70 performs control to transfer the wiring substrate 80 from the loader 10 to the unloader 50 by the transfer device 60, and instruct the respective devices to process the wiring substrate 80. For example, the wiring board 80 carried out from the loader 10 is stopped in the inspection area of the foreign matter inspection apparatus 20, and the foreign object inspection apparatus 20 is instructed to perform inspection. When the foreign matter 85 does not exist on the wiring substrate 80, the wiring substrate 80 is stopped in the processing region of the wafer lamination device 40, and the wafer lamination device 40 is instructed to laminate the wafer 90 on the wiring substrate 80. When the foreign matter 85 is present on the wiring board 80, the wiring board 80 is stopped in the removal area of the foreign matter removing device 30, the foreign matter removing device 30 is instructed to remove the foreign matter 85, and the new wiring is not instructed to be carried out from the loader 10. Substrate 80. After the foreign matter 85 is removed, an instruction is given to the transport device 60 to transport the wiring substrate 80 to the foreign matter inspection device 20, and the foreign matter inspection device 20 is instructed to inspect again. Further, when the foreign matter 85 is detected at the same position, it is judged whether or not the foreign matter 85 on the wiring substrate 80 cannot be removed by the foreign matter removing device 30, or The foreign matter 85 is attached to either side of the foreign matter inspection device 20, and outputs a warning indicating an abnormality.

此處,對異物檢查裝置20之詳細之構成進行說明。圖2係模式性地表示第1實施形態之異物檢查裝置之構成的圖。異物檢查裝置20包括:載物台21,其保持佈線基板80;檢測頭22,其檢查佈線基板80或晶片90之基底上是否存在異物85;及控制部23,其利用檢測頭22之控制及來自檢測頭22之輸出信號判斷基底上是否存在異物85。 Here, the detailed configuration of the foreign matter inspection device 20 will be described. Fig. 2 is a view schematically showing the configuration of a foreign matter inspection device according to the first embodiment. The foreign matter inspection device 20 includes a stage 21 that holds the wiring substrate 80, a detection head 22 that inspects whether or not the foreign matter 85 is present on the substrate of the wiring substrate 80 or the wafer 90, and a control portion 23 that utilizes the control of the detection head 22 and The output signal from the detecting head 22 determines whether or not foreign matter 85 is present on the substrate.

載物台21包括固定佈線基板80之靜電夾盤機構或真空夾盤機構等基板保持機構以使佈線基板80於檢查中保持不動。 The stage 21 includes a substrate holding mechanism such as an electrostatic chuck mechanism or a vacuum chuck mechanism that fixes the wiring substrate 80 to keep the wiring substrate 80 stationary during inspection.

檢測頭22包括:基底檢查部221,其檢查存在於佈線基板80或晶片90上之異物85之有無;及支持部222,其支持基底檢查部221。檢測頭22藉由於水平方向及高度方向未圖示之驅動機構而得以驅動。 The detecting head 22 includes a substrate inspection portion 221 that checks for the presence or absence of foreign matter 85 present on the wiring substrate 80 or the wafer 90, and a support portion 222 that supports the substrate inspection portion 221. The detecting head 22 is driven by a driving mechanism (not shown) in the horizontal direction and the height direction.

作為基底檢查部221,例如可使用於在與基底上接觸之狀態下以特定之力進行按壓之時,可將存在於基底上之異物85與位置資訊一起檢測之傳感片等全面感壓單元。全面感壓單元例如可使用如下者:將向第1方向伸出、於上表面具有包含感壓電阻器之感壓層的短條狀感壓電極與在與第1方向正交之第2方向以特定之間隔經複數個設置之包含彈性體材料之第1片材區域,及向第2方向伸出、於上表面具有包含感壓電阻器之感壓層的短條狀感壓電極與在第1方向以特定之間隔經複數個設置之包含彈性體材料之第2 片材區域,以感壓層彼此接觸之方式而貼合者。 As the base inspection unit 221, for example, a full-sensing unit such as a sensor sheet that can detect the foreign matter 85 existing on the substrate and the position information can be pressed when pressed with a specific force in contact with the substrate. . For the full pressure sensitive unit, for example, a short strip-shaped pressure sensitive electrode having a pressure sensitive layer including a pressure sensitive resistor on the upper surface and extending in the first direction may be used in a second direction orthogonal to the first direction. a plurality of first sheet regions including an elastomer material disposed at a predetermined interval, and a short strip-shaped pressure-sensitive electrode having a pressure-sensitive layer including a pressure-sensitive resistor extending on the upper surface and extending in the second direction The first direction includes a plurality of elastic materials at a specific interval. The sheet region is attached in such a manner that the pressure sensitive layers are in contact with each other.

於該全面感壓單元中,配置於各片材區域之短條狀感壓電極交叉,且該等各交點作為感壓部而起作用,對各感壓電極依序通電,測量感壓電極間之電阻,藉此可測定傳感片表面內之壓力分佈。將測定時所獲得之信號輸出至控制部23。再者,作為基底檢查部221,亦可使用可不接觸而檢測基底上之異物85之有無者,例如可使用光學檢測單元,其使紫外線區域之波長之光掃描並且照射基底表面,並接收其反射光或散射光,從而檢測基底表面之異物85之有無。 In the overall pressure sensitive unit, the short strip-shaped pressure sensitive electrodes disposed in the respective sheet regions intersect, and the respective intersections function as the pressure sensitive portions, and the respective pressure sensitive electrodes are sequentially energized to measure the pressure sensitive electrodes. The resistance is thereby measured by the pressure distribution in the surface of the sensor sheet. The signal obtained at the time of measurement is output to the control unit 23. Further, as the substrate inspection portion 221, it is also possible to detect the presence or absence of foreign matter 85 on the substrate without contact, and for example, an optical detection unit that scans and irradiates light of a wavelength of the ultraviolet region and receives the reflection thereof can be used. Light or scattered light to detect the presence or absence of foreign matter 85 on the surface of the substrate.

控制部23包括檢查對象設定部231、檢查控制部232、基底資料存儲部233、及異物存在判定部234。檢查對象設定部231設定作為檢查對象之基底是佈線基板80,還是積層於佈線基板80上之第幾層之晶片90。此處,將佈線基板作為第1段,將積層於佈線基板上之第1層記憶體晶片作為第2段,將同為第2層之記憶體晶片作為第3段,...,將同為第n層之記憶體晶片作為第(n+1)段。此係於檢查時將基底檢查部221之下表面降至何處之設定,及指定藉由基底檢查部221而檢查之區域之設定。作為設定之項目,可列舉所製造之晶片的種類或段數。 The control unit 23 includes an inspection target setting unit 231, an inspection control unit 232, a base material storage unit 233, and a foreign matter existence determination unit 234. The inspection target setting unit 231 sets whether the substrate to be inspected is the wiring substrate 80 or the wafer 90 of the first layer laminated on the wiring substrate 80. Here, the first board of the wiring board is used as the first stage, and the first layer of the memory wafer laminated on the wiring board is used as the second stage, and the memory chip of the second layer is used as the third stage. The memory chip of the nth layer is referred to as the (n+1)th segment. This is a setting for lowering the lower surface of the substrate inspection portion 221 at the time of inspection, and designating an area to be inspected by the substrate inspection portion 221. The item to be set includes the type or number of stages of the wafer to be manufactured.

檢查控制部232以如下方式進行控制:基於藉由檢查對象設定部231而設定之段數,使檢測頭22移動至與基底對向之區域,以特定之壓力按壓基底之後,將檢測頭22自基底抽離。 The inspection control unit 232 performs control so as to move the detection head 22 to the region facing the substrate and press the substrate with a specific pressure based on the number of segments set by the inspection target setting unit 231, and then the detection head 22 is self-controlled. The substrate is separated.

基底資料存儲部233存儲作為基底之佈線基板80及晶片90之配置位置的基底資料。此係於檢查未積層晶片90之佈線基板80上表面之情形時,與於檢查積層有晶片90之佈線基板80之上表面,即最上層之晶片90之上表面之情形時,施加於基底檢查部221之壓力不同,因此,係用於預先存儲佈線基板80或晶片90配置於何處者。 The base data storage unit 233 stores the base material of the arrangement position of the wiring substrate 80 and the wafer 90 as the base. This is applied to the substrate inspection when the upper surface of the wiring substrate 80 of the unlaminated wafer 90 is inspected, and when the upper surface of the wiring substrate 80 on which the wafer 90 is laminated, that is, the upper surface of the uppermost wafer 90 is inspected. Since the pressure of the portion 221 is different, it is used to store the wiring substrate 80 or the place where the wafer 90 is placed in advance.

圖3係表示基底資料之一例的圖,(a)係表示第1段(佈線基板上)中之基底之配置區域的圖,(b)係表示第2段(第1層記憶體晶片上)中之基底之配置區域的圖,(c)係表示第3段(第2層之記憶體晶片上)中之基底配置區域的圖。如圖3(a)所示,於第1段之情形時,基底檢查部221之下表面全部成為佈線基板配置區域2311(基底配置區域)。即,基底檢查部221之下表面全部與佈線基板80之上表面接觸。另一方面,如圖3(b)或(c)所示,於積層有晶片90之情形時,基底檢查部221之下表面的一部分成為晶片配置區域2312(基底配置區域),晶片配置區域2312間成為未配置任何物之晶片非配置區域2313。因此,於異物檢查時,僅對晶片配置區域2312施加壓力,對晶片非配置區域2313不施加壓力。又,晶片配置區域2312之面積因段數不同而不同。再者,此處,僅顯示至第3段之資料,但根據所積層之晶片數,將基底資料存儲於基底資料存儲部233。又,根據半導體晶片之種類,將各段之基底資料存儲於基底資料存儲部233。 3 is a view showing an example of a base material, wherein (a) is a view showing an arrangement area of a base in a first stage (on a wiring board), and (b) is a second stage (on a first layer memory wafer). (c) is a view showing a base arrangement area in the third stage (on the memory chip of the second layer). As shown in FIG. 3(a), in the case of the first stage, all of the lower surfaces of the base inspection portion 221 are the wiring board arrangement regions 2311 (base arrangement regions). That is, all of the lower surfaces of the substrate inspection portion 221 are in contact with the upper surface of the wiring substrate 80. On the other hand, as shown in FIG. 3(b) or (c), when the wafer 90 is laminated, a part of the lower surface of the substrate inspection portion 221 becomes the wafer arrangement region 2312 (base arrangement region), and the wafer arrangement region 2312 It becomes a wafer non-arrangement area 2313 in which nothing is disposed. Therefore, at the time of the foreign matter inspection, only the wafer arrangement region 2312 is pressed, and no pressure is applied to the wafer non-arrangement region 2313. Further, the area of the wafer arrangement region 2312 differs depending on the number of segments. Here, only the data of the third stage is displayed, but the base material is stored in the base data storage unit 233 based on the number of wafers stacked. Further, the base material of each segment is stored in the base material storage unit 233 in accordance with the type of the semiconductor wafer.

異物存在判定部234自基底檢查部221取得表示基底之上 表面之狀態的檢查結果之資料(信號),判定異物之存在。於此情形時,自基底檢查部221取得表示基底上之各位置之壓力值的檢查結果之資料,自基底資料存儲部233取得與檢查對象設定部231所設定之段數對應之基底資料,將檢查結果之資料與基底資料所示之基底配置區域相比較,將基底上壓力比其他部分更高之區域提取作為異物存在區域。此時,例如可將與其他部分相比壓力值僅高出特定之比率之區域作為異物存在區域。藉此,可根據壓力值之大小考慮異物85之硬度,將具有特定值以上之硬度者判定為應除去之異物85。將異物存在判定部234之判定結果輸出至系統控制裝置70。 The foreign matter presence determining unit 234 acquires the base substrate 221 from the base The data (signal) of the inspection result of the state of the surface is used to determine the presence of foreign matter. In this case, the base inspection unit 221 acquires the data of the inspection result indicating the pressure value at each position on the base, and acquires the base data corresponding to the number of segments set by the inspection target setting unit 231 from the base data storage unit 233. The data of the inspection result is extracted as a foreign matter-existing region as compared with the substrate-arranged region shown in the substrate data, and the region on the substrate having a higher pressure than the other portions is extracted. At this time, for example, a region in which the pressure value is higher than a specific ratio compared with other portions can be used as the foreign matter existence region. Thereby, the hardness of the foreign matter 85 can be considered according to the magnitude of the pressure value, and the hardness having a specific value or more can be determined as the foreign matter 85 to be removed. The determination result of the foreign matter existence determining unit 234 is output to the system control device 70.

其次,對晶片積層處理中之異物檢測處理進行說明。圖4係表示第1實施形態之異物檢測處理之順序之一例的流程圖,圖5係模式性地表示第1實施形態之半導體製造系統中之晶片積層處理之情況的圖。再者,此處,將異物除去裝置30與異物檢查裝置20及晶片積層裝置40存在於相同線上之情形作為例子進行說明。 Next, the foreign matter detecting process in the wafer lamination process will be described. Fig. 4 is a flowchart showing an example of the procedure of the foreign matter detecting process in the first embodiment, and Fig. 5 is a view schematically showing the state of the wafer lamination process in the semiconductor manufacturing system of the first embodiment. Here, a case where the foreign matter removing device 30 and the foreign matter inspecting device 20 and the wafer layering device 40 are present on the same line will be described as an example.

首先,藉由搬送裝置60將作為半導體製品之佈線基板80自載入器10搬送至異物檢查裝置20(步驟S11)。若藉由搬送裝置60將佈線基板80配置於特定之位置,則異物檢查裝置20開始異物檢測處理(步驟S12,圖5(a))。 First, the wiring substrate 80 as a semiconductor product is transferred from the loader 10 to the foreign matter inspection device 20 by the transfer device 60 (step S11). When the wiring board 80 is placed at a specific position by the transport device 60, the foreign matter inspection apparatus 20 starts the foreign matter detection processing (step S12, FIG. 5(a)).

於異物檢測處理中,控制部23之檢查控制部232以如下方式進行控制:對應於由檢查對象設定部231所設定之晶片90之種類之段數,使檢測頭22下降至與載物台上之佈線 基板80接觸為止,以特定之力使檢測頭22(基底檢查部221)對佈線基板80進行按壓。再者,於使檢測頭22與佈線基板80接觸之時,利用設置於佈線基板80中之位置對準標記進行檢測頭22之位置對準之後,使檢測頭22與佈線基板80接觸。 In the foreign matter detecting process, the inspection control unit 232 of the control unit 23 performs control to lower the detecting head 22 to the stage corresponding to the number of types of the wafer 90 set by the inspection target setting unit 231. Wiring The detection head 22 (base inspection portion 221) presses the wiring substrate 80 with a specific force until the substrate 80 comes into contact with each other. When the detecting head 22 is brought into contact with the wiring board 80, the position of the detecting head 22 is aligned by the position alignment marks provided in the wiring board 80, and then the detecting head 22 is brought into contact with the wiring board 80.

圖6係模式性地表示佈線基板中之異物檢測處理之情況的圖,(a)係模式性地表示異物檢測時之原理的圖,(b)係表示藉由異物檢測處理所獲得之異物存在資訊之一例的圖。如圖6(a)所示,若使基底檢查部221以特定之力按壓佈線基板80,則於基底檢查部221之各位置檢測自佈線基板80向檢測頭22之壓力。於基底,即佈線基板80之上表面為平坦之情形時,於任何位置壓力P1之大小均相同,但若異物85存在,則僅該部分壓力P2比周圍高。如此之壓力分佈藉由基底檢查部221而取得,並向控制部23輸送。 Fig. 6 is a view schematically showing a state of foreign matter detecting processing in a wiring board, wherein (a) schematically shows the principle of foreign matter detection, and (b) shows the presence of foreign matter obtained by foreign matter detecting processing. A diagram of an example of information. As shown in FIG. 6( a ), when the base inspection unit 221 presses the wiring board 80 with a specific force, the pressure from the wiring board 80 to the detection head 22 is detected at each position of the base inspection unit 221 . When the substrate, that is, the upper surface of the wiring substrate 80 is flat, the pressure P1 is the same at any position, but if the foreign matter 85 is present, only the portion of the pressure P2 is higher than the surrounding. Such a pressure distribution is acquired by the base inspection unit 221 and is sent to the control unit 23.

控制部23之異物存在判定部234根據自基底檢查部221取得之壓力分佈之資料、及存儲於基底資料存儲部233中之對應之段數之基底資料,將壓力與周圍相比僅特定之比率較高之異物存在區域與位置資訊一起提取,作為異物存在資訊而向系統控制裝置70傳送。異物存在資訊如圖6(b)所示,係表示異物85存在於佈線基板80之何位置的資訊,此處,表示於佈線基板配置區域2311(基底配置區域)中存在異物存在區域2315之狀態。 The foreign matter existence determining unit 234 of the control unit 23 compares the pressure to the surrounding ratio based on the data of the pressure distribution acquired from the base inspection unit 221 and the base data of the corresponding number of segments stored in the base data storage unit 233. The higher foreign matter existence area is extracted together with the position information, and transmitted to the system control device 70 as foreign matter presence information. As shown in FIG. 6(b), the foreign matter presence information is information indicating where the foreign matter 85 exists on the wiring substrate 80. Here, the state in which the foreign matter existence region 2315 exists in the wiring substrate arrangement region 2311 (base arrangement region) is shown. .

再者,此處對佈線基板80上之異物檢測處理進行了說明,對於積層於佈線基板80上之晶片90之上表面的異物檢 測處理亦同樣地進行。圖7及圖8係模式性地表示晶片中之異物檢測處理之情況的圖,(a)係模式性地表示異物檢測時之原理的圖,(b)係表示藉由異物檢測處理所獲得之異物存在資訊之一例的圖。於晶片90之上表面之異物檢測處理中,壓力分佈如圖7(a)或圖8(a)所示,於未配置晶片90之區域壓力為零,於配置有晶片90之區域,檢測出特定之壓力P3。因此,於配置晶片90之區域,將檢測出與壓力P3相比僅特定之比率較高之壓力P4的區域作為異物存在區域2315而提取。圖7(b)或圖8(b)係表示於晶片配置區域2312(基底配置區域)內存在異物存在區域2315之狀態的異物存在資訊。 Here, the foreign matter detecting process on the wiring substrate 80 is described here, and the foreign matter inspection on the upper surface of the wafer 90 laminated on the wiring substrate 80 is described. The measurement process is also performed in the same manner. FIG. 7 and FIG. 8 are diagrams schematically showing a state of foreign matter detecting processing in a wafer, wherein (a) schematically shows the principle of foreign matter detection, and (b) shows a foreign matter detecting process. A diagram of an example of foreign matter presence information. In the foreign matter detecting process on the upper surface of the wafer 90, the pressure distribution is as shown in Fig. 7 (a) or Fig. 8 (a), and the pressure in the region where the wafer 90 is not disposed is zero, and is detected in the region where the wafer 90 is disposed. Specific pressure P3. Therefore, in the region where the wafer 90 is disposed, a region where the pressure P4 having a higher specific ratio than the pressure P3 is detected is extracted as the foreign matter existence region 2315. FIG. 7(b) or FIG. 8(b) shows foreign matter existence information in a state in which the foreign matter existence region 2315 exists in the wafer arrangement region 2312 (base arrangement region).

又,可將與特定之壓力P1、P3相比具有較高之壓力的區域直接作為異物存在區域2315,亦可將作為與特定之壓力P1、P3(周圍之壓力)相比,高於特定之比率(或特定之值)以上之壓力P2、P4之區域作為異物存在區域2315,藉此,對於比無使積層之晶片90破損之虞的特定之硬度更小之硬硬度的異物85,亦可不作為除去對象。 Further, a region having a higher pressure than the specific pressures P1 and P3 may be directly used as the foreign matter existence region 2315, or may be higher than a specific pressure P1 and P3 (peripheral pressure). The region of the pressures P2 and P4 having a ratio (or a specific value) or more is used as the foreign matter-existing region 2315, whereby the foreign matter 85 having a hardness smaller than the specific hardness of the crucible in which the laminated wafer 90 is not damaged may be used. Not as a removal object.

系統控制裝置70根據異物檢測處理之結果判定佈線基板80上之異物85之有無(步驟S13)。於步驟S13中於無異物85之情形時(步驟S13中為否之情形),將佈線基板80搬送至晶片積層裝置40(步驟S26)。於晶片積層裝置40中,進行晶片積層處理,其包括如下步驟:驅動晶片配置頭42,自晶片載置台41取得下表面設置有黏著層之晶片90,根據基底資料將晶片90載置於佈線基板80上之特定之位置之後, 以特定之壓力進行按壓,使晶片90積層於佈線基板80上。而且,於使晶片90積層於佈線基板80上之後,藉由搬送裝置60,將其搬送至卸載器50,異物除去處理結束。 The system control device 70 determines the presence or absence of the foreign matter 85 on the wiring board 80 based on the result of the foreign matter detecting process (step S13). When there is no foreign matter 85 in the step S13 (NO in step S13), the wiring board 80 is transported to the wafer stacking apparatus 40 (step S26). In the wafer lamination device 40, a wafer lamination process is performed, which includes the steps of: driving the wafer placement head 42, taking the wafer 90 having the adhesive layer on the lower surface from the wafer stage 41, and placing the wafer 90 on the wiring substrate according to the substrate data. After a specific position on 80, The wafer 90 is laminated on the wiring substrate 80 by pressing at a specific pressure. Then, after the wafer 90 is laminated on the wiring board 80, the wafer 90 is transported to the unloader 50 by the transport device 60, and the foreign matter removing process is completed.

又,於有異物85之情形(步驟S13中為是之情形)時,將佈線基板80搬送至異物除去裝置30,並且不將新佈線基板80自載入器10搬送至異物檢查裝置20(步驟S14)。而且,系統控制裝置70指示異物除去裝置30對經判定存在異物85之佈線基板80實施異物除去處理(步驟S15,圖5(b))。於圖5(b)中,於載入器10與異物檢查裝置20之間配置有止動部61,以不將新佈線基板80供給至異物檢查裝置20。 In the case where the foreign matter 85 is present (in the case of the step S13), the wiring board 80 is transported to the foreign matter removing device 30, and the new wiring board 80 is not transported from the loader 10 to the foreign matter inspection device 20 (step S14). Further, the system control device 70 instructs the foreign matter removing device 30 to perform the foreign matter removing process on the wiring substrate 80 on which the foreign matter 85 is determined to be present (step S15, FIG. 5(b)). In FIG. 5(b), a stopper portion 61 is disposed between the loader 10 and the foreign matter inspection device 20 so that the new wiring substrate 80 is not supplied to the foreign matter inspection device 20.

於異物除去處理中,如圖5(b)所示,異物除去裝置30於包含存在異物85之佈線基板80之上表面之位置的區域貼付粘著膠帶31,將其剝離,藉此除去異物85。此時,異物除去裝置30下降至使捲繞於滾筒上之粘著膠帶31與佈線基板80之上表面接觸之後,以粘著膠帶31與佈線基板80之上表面全面接觸之方式於水平方向移動。此處,粘著膠帶31為纏繞式。使粘著膠帶31與佈線基板80之上表面接觸之後,異物除去裝置30上升,自佈線基板80之上表面剝離。再者,亦可不使粘著膠帶31與佈線基板80之上表面全面接觸,而基於異物存在資訊,使粘著膠帶31僅與包含存在異物85之區域的特定之範圍接觸。 In the foreign matter removing process, as shown in FIG. 5(b), the foreign matter removing device 30 attaches the adhesive tape 31 to a region including the upper surface of the wiring substrate 80 on which the foreign matter 85 is present, and peels off the foreign tape 85. . At this time, the foreign matter removing device 30 is lowered until the adhesive tape 31 wound on the roller comes into contact with the upper surface of the wiring substrate 80, and then moved in the horizontal direction so that the adhesive tape 31 is in full contact with the upper surface of the wiring substrate 80. . Here, the adhesive tape 31 is a wound type. After the adhesive tape 31 is brought into contact with the upper surface of the wiring board 80, the foreign matter removing device 30 rises and peels off from the upper surface of the wiring board 80. Further, the adhesive tape 31 may not be brought into full contact with the upper surface of the wiring board 80, and the adhesive tape 31 may be brought into contact with only a specific range including the region where the foreign matter 85 exists, based on the foreign matter presence information.

之後,搬送裝置60將進行異物除去後之佈線基板80搬送至異物檢查裝置20(步驟S16),異物檢查裝置20進行異物檢測處理(步驟S17,圖5(c))。異物檢測處理進行與於步驟 S12中所說明者相同之處理,並將其結果傳送至系統控制裝置70。 After that, the transport device 60 transports the wiring substrate 80 after the foreign matter removal to the foreign matter inspection device 20 (step S16), and the foreign matter inspection device 20 performs the foreign matter detection process (step S17, FIG. 5(c)). Foreign matter detection processing is performed in steps The same processing as described in S12 is performed, and the result is transmitted to the system control device 70.

繼而,系統控制裝置70根據異物檢測處理之結果,判定佈線基板80上之異物85之有無(步驟S18)。於有異物85之情形(步驟S18中為是之情形)時,判定是否於與上次所檢測之區域(位置)相同部位有異物85(步驟S19)。 Then, the system control device 70 determines the presence or absence of the foreign matter 85 on the wiring board 80 based on the result of the foreign matter detecting process (step S18). When there is a foreign matter 85 (YES in step S18), it is determined whether or not there is a foreign matter 85 at the same portion as the region (position) detected last time (step S19).

於與上次所檢測之區域相同之區域存在異物85之情形(步驟S19中為是之情形)時,係步驟S15之異物除去處理中未能除去異物85,或異物85咬入基底檢查部221而不能除去異物85之任一種。因此,系統控制裝置70向半導體製造系統1之使用者或管理者通知異常(步驟S25),處理結束。 When the foreign matter 85 is present in the same region as the region detected last time (in the case of the step S19), the foreign matter 85 is not removed in the foreign matter removing process in the step S15, or the foreign matter 85 is bitten into the substrate inspection portion 221 It is not possible to remove any of the foreign matter 85. Therefore, the system control device 70 notifies the user or manager of the semiconductor manufacturing system 1 of the abnormality (step S25), and the processing ends.

又,於與上次所檢測之區域相同之區域不存在異物85之情形(步驟S19中為否之情形)時,搬送裝置60再次將佈線基板80搬送至異物除去裝置30(步驟S20),進行布驟S15中所說明之異物除去處理(步驟S21)。之後,將佈線基板80搬送至異物檢查裝置20(步驟S22),進行異物檢測處理之後(步驟S23),判定系統控制裝置70之異物85是否存在(步驟S24)。於存在異物85之情形(步驟S24中為是之情形)時,返回至步驟S19。 In the case where the foreign matter 85 is not present in the same region as the region detected last time (in the case of NO in the step S19), the transport device 60 transports the wiring substrate 80 to the foreign matter removing device 30 again (step S20). The foreign matter removal processing described in step S15 is performed (step S21). After that, the wiring board 80 is transported to the foreign object inspection device 20 (step S22), and after the foreign matter detection processing is performed (step S23), it is determined whether or not the foreign matter 85 of the system control device 70 is present (step S24). In the case where the foreign matter 85 is present (YES in step S24), the process returns to step S19.

另一方面,於步驟S18、S24中不存在異物85之情形(步驟S18、S24中分別為否之情形)時,將佈線基板80搬送至晶片積層裝置40(步驟S26),進行於佈線基板80上積層晶片90之處理。再者,此時,解除圖5(c)之止動部61,藉由搬送裝置60將新佈線基板80自載入器10供給至異物檢查裝 置20。藉由以上,異物檢測處理結束。再者,如圖5所示,異物檢測處理及異物除去處理與晶片積層處理可平行進行。 On the other hand, when there is no foreign matter 85 in the steps S18 and S24 (in the case of NO in steps S18 and S24, respectively), the wiring board 80 is transported to the wafer stacking apparatus 40 (step S26), and is performed on the wiring substrate 80. Processing of the upper layered wafer 90. At this time, the stopper portion 61 of FIG. 5(c) is released, and the new wiring substrate 80 is supplied from the loader 10 to the foreign matter inspection device by the transport device 60. Set 20. With the above, the foreign matter detecting process ends. Further, as shown in FIG. 5, the foreign matter detecting process and the foreign matter removing process and the wafer layering process can be performed in parallel.

於第1實施形態中,於積層晶片90之前,檢查作為基底之佈線基板80或晶片90上是否存在異物85,於存在異物85之情形時,除去異物85之後使晶片90積層。藉此,具有於使晶片90積層之時,可防止以存在於基底上之異物85為起點而晶片90破損之效果。 In the first embodiment, before the laminated wafer 90, the foreign matter 85 is detected on the wiring substrate 80 or the wafer 90 as the base. When the foreign matter 85 is present, the foreign matter 85 is removed and the wafer 90 is laminated. Thereby, when the wafer 90 is laminated, it is possible to prevent the wafer 90 from being broken due to the foreign matter 85 existing on the substrate.

(第2實施形態) (Second embodiment)

於第1實施形態中,表示有於存在異物之情形時,於異物檢查裝置與異物除去裝置之間,使佈線基板移動而進行異物檢測處理及異物部位除去處理之例,而於第2實施形態中,以於異物檢查裝置中進行之不使佈線基板自檢查位置移動而進行異物除去處理之情形為例進行說明。 In the first embodiment, the foreign object detecting device and the foreign matter removing device are moved between the foreign matter inspection device and the foreign matter removing device to perform the foreign matter detecting process and the foreign matter removing process. In the second embodiment, the second embodiment is described. In the case where the foreign matter removal processing is performed in the foreign matter inspection apparatus, the foreign matter removal processing is performed without moving the wiring board from the inspection position.

圖9係表示第2實施形態之異物檢測處理之順序之一例的流程圖,圖10係模式性地表示第2實施形態之半導體製造系統中之晶片積層處理之情況的圖。再者,此處,亦以異物除去裝置30與異物檢查裝置20及晶片積層裝置40存在於相同線上之情形為例進行說明。 FIG. 9 is a flowchart showing an example of the procedure of the foreign matter detecting process in the second embodiment, and FIG. 10 is a view schematically showing the state of the wafer lamination process in the semiconductor manufacturing system of the second embodiment. Here, the case where the foreign matter removing device 30 and the foreign matter inspecting device 20 and the wafer layering device 40 exist on the same line will be described as an example.

於第2實施形態之晶片積層處理中,於載入器10與卸載器50之間,依序配置有異物檢查裝置20、異物除去裝置30及晶片積層裝置40,藉由搬送裝置60於載入器10與異物檢查裝置20之間、異物檢查裝置20與晶片積層裝置40之間、及晶片積層裝置40與卸載器50之間搬送佈線基板80。具體 而言,藉由搬送裝置60,將佈線基板80自載入器10搬送至異物檢查裝置20,於藉由異物檢查裝置20判定異物85不存在之情形時,於晶片積層裝置40中進行晶片積層處理之後,將佈線基板80搬送至卸載器50。另一方面,於判定異物檢查裝置20中存在異物85之情形時,於異物檢查裝置20之位置,進行利用異物除去裝置30之異物除去處理,再次於異物檢查裝置20中進行異常檢測處理。 In the wafer lamination process of the second embodiment, the foreign object inspection device 20, the foreign matter removing device 30, and the wafer layering device 40 are sequentially disposed between the loader 10 and the unloader 50, and are loaded by the transport device 60. The wiring board 80 is transferred between the apparatus 10 and the foreign matter inspection apparatus 20, between the foreign object inspection apparatus 20 and the wafer lamination apparatus 40, and between the wafer lamination apparatus 40 and the unloader 50. specific In the transfer device 60, the wiring board 80 is transported from the loader 10 to the foreign matter inspection apparatus 20, and when the foreign matter inspection apparatus 20 determines that the foreign matter 85 does not exist, the wafer stacking apparatus 40 performs wafer lamination. After the processing, the wiring substrate 80 is transported to the unloader 50. On the other hand, when it is determined that the foreign matter 85 is present in the foreign matter inspection device 20, the foreign matter removal processing by the foreign matter removing device 30 is performed at the position of the foreign matter inspection device 20, and the abnormality detection processing is performed again in the foreign matter inspection device 20.

因此,於第2實施形態中,異物除去裝置30為了可除去設置於異物檢查裝置20中之佈線基板80之上表面的異物85,以纏繞有粘著膠帶31之滾筒32可移動至佈線基板80之位置之方式,具有藉由伸縮構件33而得以保持之構造。 Therefore, in the second embodiment, the foreign matter removing device 30 can move the disk 32 wound with the adhesive tape 31 to the wiring substrate 80 in order to remove the foreign matter 85 provided on the upper surface of the wiring substrate 80 in the foreign matter inspection device 20. The position of the position has a configuration that is held by the telescopic member 33.

又,異物檢查裝置20為了於異物除去處理之時,可使檢測頭22上升至不與異物除去裝置30之纏繞有粘著膠帶31之滾筒32接觸之高度,成為可升降之構成。 Further, in order to remove the foreign matter, the foreign object inspection device 20 can raise the height of the detecting head 22 to a height that does not come into contact with the drum 32 around which the adhesive tape 31 of the foreign matter removing device 30 is wound, and can be configured to be movable up and down.

其次,對晶片積層處理中之異物檢測處理進行說明。首先,藉由搬送裝置60將作為半導體製品之佈線基板80自載入器10搬送至異物檢查裝置20(步驟S31),將檢測頭22下降至佈線基板80上之特定之位置(步驟S32),進行利用異物檢查裝置20之異物檢測處理(步驟S33,圖10(a))。對於異物檢測處理,於第1實施形態中進行了詳細描述,因此,以下省略說明。將異物檢測處理之結果傳送至系統控制裝置70。 Next, the foreign matter detecting process in the wafer lamination process will be described. First, the wiring substrate 80 as a semiconductor product is transferred from the loader 10 to the foreign matter inspection device 20 by the transfer device 60 (step S31), and the detection head 22 is lowered to a specific position on the wiring substrate 80 (step S32). The foreign matter detecting process by the foreign matter inspection device 20 is performed (step S33, FIG. 10(a)). Since the foreign matter detection processing has been described in detail in the first embodiment, the description thereof will be omitted below. The result of the foreign matter detecting process is transmitted to the system control device 70.

系統控制裝置70根據異物檢測處理之結果,判定佈線基板80上之異物85之有無(步驟S34)。於異物85不存在之情 形(步驟S34中為否之情形)時,搬送裝置60將佈線基板80搬送至晶片積層裝置40(步驟S47),於進行晶片積層處理之後,異物檢測處理結束。另一方面,於存在異物85之情形(步驟S34中為是之情形)時,使檢測頭22上升至特定之高度(步驟S35),進行利用異物除去裝置30之異物除去處理(步驟S36,圖10(b))。於異物除去處理中,異物除去裝置30以使滾筒32到達配置於異物檢查裝置20之區域的佈線基板80上之方式伸出伸縮構件33,並於佈線基板80上滾動滾筒32,藉由纏繞於滾筒32上之粘著膠帶31而除去佈線基板80上之異物85。之後,藉由縮回伸縮構件33使滾筒32返回至原來位置,異物除去處理結束。 The system control device 70 determines the presence or absence of the foreign matter 85 on the wiring board 80 based on the result of the foreign matter detecting process (step S34). In the foreign matter 85 does not exist In the case of the case (NO in step S34), the transport device 60 transports the wiring substrate 80 to the wafer stacking device 40 (step S47), and after the wafer lamination process is performed, the foreign matter detecting process ends. On the other hand, when the foreign matter 85 is present (in the case of the step S34), the detecting head 22 is raised to a specific height (step S35), and the foreign matter removing process by the foreign matter removing device 30 is performed (step S36, 10(b)). In the foreign matter removing process, the foreign matter removing device 30 extends the telescopic member 33 so that the drum 32 reaches the wiring substrate 80 disposed in the region of the foreign matter inspecting device 20, and rolls the roller 32 on the wiring substrate 80 by winding The foreign tape 85 on the wiring substrate 80 is removed by the adhesive tape 31 on the drum 32. Thereafter, the drum 32 is returned to the original position by retracting the telescopic member 33, and the foreign matter removing process ends.

之後,使異物檢查裝置20之檢測頭22下降至進行異物除去處理後之佈線基板80上之特定之高度(步驟S37),進行異物檢測處理(步驟S38)。系統控制裝置70根據異物檢測處理之結果,判定佈線基板80上之異物85之有無(步驟S39)。 Thereafter, the detecting head 22 of the foreign matter inspection device 20 is lowered to a specific height on the wiring substrate 80 after the foreign matter removing process (step S37), and foreign matter detecting processing is performed (step S38). The system control device 70 determines the presence or absence of the foreign matter 85 on the wiring board 80 based on the result of the foreign matter detecting process (step S39).

於存在異物85之情形(步驟S39中為是之情形)時,判定異物85是否存在於相同部位(步驟S40)。異物85存在於相同部位之情形(步驟S40中為是之情形),係步驟S36之異物除去處理中未能除去異物85,或異物85咬入基底檢查部221而未能除去異物85之任一種情形。因此,系統控制裝置70向半導體製造系統1之使用者或管理者通知異常(步驟S46),處理結束。 When there is a foreign matter 85 (YES in step S39), it is determined whether or not the foreign matter 85 exists in the same portion (step S40). When the foreign matter 85 is present in the same portion (in the case of the step S40), the foreign matter 85 is not removed in the foreign matter removing process in the step S36, or the foreign matter 85 is bitten into the base inspection portion 221 and the foreign matter 85 is not removed. situation. Therefore, the system control device 70 notifies the user or manager of the semiconductor manufacturing system 1 of the abnormality (step S46), and the processing ends.

又,於相同部位不存在異物85之情形(步驟S40中為否之 情形)時,使檢測頭22上升至特定之高度(步驟S41),與步驟S36同樣地進行利用異物除去裝置30之異物除去處理(步驟S42)。之後,再次使異物檢查裝置20之檢測頭22下降至進行異物除去處理後之佈線基板80上之特定之高度(步驟S43),進行異物檢測處理(步驟S44)。而且,系統控制裝置70根據異物檢測處理之結果,判定佈線基板80上之異物85之有無(步驟S45)。其結果,於存在異物85之情形(步驟S45中為是之情形)時,返回至步驟S40。 Moreover, there is no foreign matter 85 in the same portion (NO in step S40) In the case of the case, the detection head 22 is raised to a specific height (step S41), and the foreign matter removal processing by the foreign matter removing device 30 is performed in the same manner as in step S36 (step S42). After that, the detection head 22 of the foreign matter inspection apparatus 20 is again lowered to a specific height on the wiring board 80 after the foreign matter removal processing (step S43), and the foreign matter detection processing is performed (step S44). Further, the system control device 70 determines the presence or absence of the foreign matter 85 on the wiring board 80 based on the result of the foreign matter detecting process (step S45). As a result, when there is a foreign matter 85 (YES in step S45), the process returns to step S40.

另一方面,於判定在步驟S39及步驟S45中不存在異物85之情形(步驟S39,S45中分別為否之情形)時,藉由搬送裝置60將佈線基板80搬送至晶片積層裝置40(步驟S47),進行晶片積層處理。藉由以上,異物檢測處理結束。 On the other hand, when it is determined that there is no foreign matter 85 in step S39 and step S45 (in the case of NO in step S39 or S45), the wiring board 80 is transported to the wafer stacking apparatus 40 by the transport device 60 (step S47), performing wafer lamination processing. With the above, the foreign matter detecting process ends.

於第2實施形態中,不使佈線基板80自異物檢查裝置20移動而進行異物除去處理之後,再次進行異物檢查處理。藉此,無需使佈線基板80於異物檢查裝置20與異物除去裝置30之間往返,因此具有如下效果:可免除於存在異物85之情形時來自載入器10之佈線基板80之搬出的暫時停止,或搬送裝置60之於異物檢查裝置20與異物除去裝置30之間的往返等複雜之控制。又,由於可無需移動佈線基板80,故而可無需進行異物檢查裝置20中之檢測頭22與第二次以後之相同佈線基板80之間的位置對準。 In the second embodiment, the foreign matter inspection process is performed again after the foreign matter removing process is performed without moving the wiring board 80 from the foreign matter inspection device 20. With this configuration, it is not necessary to reciprocate the wiring board 80 between the foreign matter inspection device 20 and the foreign matter removing device 30. Therefore, it is possible to eliminate the temporary stoppage of the removal of the wiring substrate 80 from the loader 10 when the foreign matter 85 is present. Or the complicated control such as the round trip between the foreign matter inspection device 20 and the foreign matter removing device 30 of the conveying device 60. Moreover, since it is not necessary to move the wiring board 80, it is not necessary to perform the positional alignment between the detecting head 22 in the foreign matter inspection apparatus 20 and the same wiring board 80 after the second time.

(第3實施形態) (Third embodiment)

於第1及第2實施形態中,表示了異物除去裝置與異物檢查裝置及晶片積層裝置配置於相同線上之情形,於第3實 施形態中,對異物除去裝置與異物檢查裝置及晶片積層裝置配置於不同線上之情形的異物檢測處理進行說明。 In the first and second embodiments, the foreign matter removing device, the foreign matter detecting device, and the wafer laminating device are arranged on the same line, and the third embodiment is shown. In the embodiment, the foreign matter detecting process in the case where the foreign matter removing device, the foreign matter detecting device, and the wafer layering device are disposed on different lines will be described.

圖11係表示第3實施形態之異物檢測處理之順序之一例的流程圖。再者,此處,雖未圖示,但對例如於圖1中,異物檢查裝置20與晶片積層裝置40存在於相同線上,且與該線分離而配置有異物除去裝置30之半導體製造系統中的異物檢測處理進行說明。又,以下參照圖1之符號進行說明。 Fig. 11 is a flowchart showing an example of the procedure of the foreign matter detecting process in the third embodiment. Here, although not shown in the drawings, for example, in the semiconductor manufacturing system in which the foreign matter inspection device 20 and the wafer lamination device 40 are on the same line and the foreign matter removing device 30 is disposed apart from the line, for example, The foreign matter detection processing will be described. Further, the description will be made below with reference to the symbols of Fig. 1 .

首先,藉由搬送裝置60將作為半導體製品之佈線基板80自載入器10搬送至異物檢查裝置20(步驟S61),進行利用異物檢查裝置20之異物檢查處理(步驟S62)。對於異物檢測處理,於第1實施形態中進行了詳細描述,因此,此處省略說明。而且,系統控制裝置70根據異物檢測處理之結果判定佈線基板80上之異物85之有無(步驟S63)。 First, the wiring board 80 as a semiconductor product is transported from the loader 10 to the foreign matter inspection apparatus 20 by the transport apparatus 60 (step S61), and the foreign material inspection apparatus 20 is performed by the foreign material inspection apparatus 20 (step S62). The foreign matter detecting process has been described in detail in the first embodiment, and thus the description thereof is omitted here. Further, the system control device 70 determines the presence or absence of the foreign matter 85 on the wiring board 80 based on the result of the foreign matter detecting process (step S63).

於異物檢測處理中判定不存在異物85之情形(步驟S63中為否之情形)時,將佈線基板80直接搬送至晶片積層裝置40(步驟S64),進行晶片積層處理之後,處理結束。 When it is determined that there is no foreign matter 85 in the foreign matter detecting process (NO in step S63), the wiring board 80 is directly transferred to the wafer layering apparatus 40 (step S64), and after the wafer layering process is performed, the process ends.

另一方面,於在異物檢測處理中判定存在異物85之情形(步驟S63中為是之情形)時,藉由搬送裝置60將佈線基板80搬送至與設置有異物檢查裝置20之線分離而設置之異物除去裝置30(步驟S65)。而且,進行利用異物除去裝置30之異物除去處理(步驟S66)。對於異物除去處理,由於與第1實施形態中所說明之情況相同,故而省略其說明。而且,藉由搬送裝置60將異物除去處理結束後之佈線基板80 搬送至載入器10(步驟S67),處理結束。再者,對於被搬送至載入器10之佈線基板80,再次進行自步驟S61開始之處理。又,於將佈線基板80搬送至異物除去裝置30之後,於具有異物檢查裝置20及晶片積層裝置40之線上,對於新佈線基板80之處理與異物除去處理平行進行。 On the other hand, when it is determined that the foreign matter 85 is present in the foreign matter detecting process (YES in step S63), the wiring device 80 is transported by the transport device 60 to be separated from the line on which the foreign matter detecting device 20 is provided. The foreign matter removing device 30 (step S65). Then, the foreign matter removing process by the foreign matter removing device 30 is performed (step S66). Since the foreign matter removal processing is the same as that described in the first embodiment, the description thereof will be omitted. Moreover, the wiring substrate 80 after the foreign matter removal processing is completed by the transport device 60 The load is transferred to the loader 10 (step S67), and the process ends. In addition, the process from step S61 is performed again on the wiring board 80 transferred to the loader 10. After the wiring board 80 is transported to the foreign matter removing device 30, the processing of the new wiring board 80 and the foreign matter removing processing are performed in parallel on the line having the foreign matter inspection apparatus 20 and the wafer layering apparatus 40.

如上所述,根據第3實施形態,由於將異物除去裝置30與設置有異物檢查裝置20及晶片積層裝置40之線分別設置,故而可同時平行進行異物除去處理及晶片積層處理。其結果,如第1及第2實施形態所述,具有如下效果:可防止於檢測有異物85之情形時,至異物除去處理完成為止之期間,晶片積層處理停止。 As described above, according to the third embodiment, since the foreign matter removing device 30 and the line in which the foreign matter detecting device 20 and the wafer layering device 40 are provided are provided separately, the foreign matter removing process and the wafer layering process can be simultaneously performed in parallel. As a result, as described in the first and second embodiments, it is possible to prevent the wafer lamination process from being stopped until the foreign matter removing process is completed when the foreign matter 85 is detected.

又,於異物檢查裝置20中,於所檢測之異物85之硬度比特定值更小之情形時,不進行異物除去處理,僅於在特定值以上之情形時進行異物除去處理,因此,即便具有晶片90不破損之程度之硬度的異物85存在於基底上,亦無需將其除去。其結果,具有與將全部異物85除去之情形相比可縮短製造步驟之效果。 In the foreign matter inspection device 20, when the hardness of the detected foreign matter 85 is smaller than a specific value, the foreign matter removal process is not performed, and the foreign matter removal process is performed only when the specific value is equal to or greater than a specific value. The foreign matter 85 having a hardness of the wafer 90 which is not damaged is present on the substrate and does not need to be removed. As a result, the effect of the manufacturing step can be shortened compared to the case where all the foreign matter 85 is removed.

雖對本發明之幾個實施形態進行了說明,但該等之實施形態係作為示例而提示者,並不意欲限定發明之範圍。該等新穎之實施形態可以其他各種之形態進行實施,在不脫離發明之主旨之範圍內,可進行各種之省略、替換、及變更。該等實施形態或其變化,包含於發明之範圍或主旨,並且包含於申請專利範圍所記載之發明及其均等之範圍內。 The embodiments of the present invention have been described, but the embodiments are presented as examples and are not intended to limit the scope of the invention. The various embodiments of the invention can be embodied in various other forms and various modifications, substitutions and changes can be made without departing from the scope of the invention. The scope of the invention and the scope of the invention are intended to be included within the scope of the invention and the scope of the invention.

1‧‧‧半導體製造系統 1‧‧‧Semiconductor Manufacturing System

10‧‧‧載入器 10‧‧‧Loader

20‧‧‧異物檢查裝置 20‧‧‧ Foreign object inspection device

21‧‧‧載物台 21‧‧‧stage

22‧‧‧檢測頭 22‧‧‧Detector

23‧‧‧控制部 23‧‧‧Control Department

30‧‧‧異物除去裝置 30‧‧‧ Foreign matter removal device

31‧‧‧粘著膠帶 31‧‧‧Adhesive tape

32‧‧‧滾筒 32‧‧‧Roller

33‧‧‧伸縮構件 33‧‧‧Flexible members

40‧‧‧晶片積層裝置 40‧‧‧ Wafer layering device

41‧‧‧晶片載置台 41‧‧‧ wafer mounting table

42‧‧‧晶片配置頭 42‧‧‧ wafer configuration head

50‧‧‧卸載器 50‧‧‧ Unloader

60‧‧‧搬送裝置 60‧‧‧Transporting device

61‧‧‧止動部 61‧‧‧Departure

70‧‧‧系統控制裝置 70‧‧‧System control device

80‧‧‧佈線基板 80‧‧‧ wiring substrate

85‧‧‧異物 85‧‧‧ Foreign objects

90‧‧‧晶片 90‧‧‧ wafer

221‧‧‧基底檢查部 221‧‧‧Base Inspection Department

222‧‧‧支持部 222‧‧‧Support Department

231‧‧‧檢查對象設定部 231‧‧‧Check object setting section

232‧‧‧檢查控制部 232‧‧‧Check Control Department

233‧‧‧基底資料存儲部 233‧‧‧Base Data Storage Department

234‧‧‧異物存在判定部 234‧‧‧ Foreign Body Presence Determination Department

2311‧‧‧佈線基板配置區域 2311‧‧‧Wiring board configuration area

2312‧‧‧晶片配置區域 2312‧‧‧ wafer configuration area

2313‧‧‧晶片非配置區域 2313‧‧‧ wafer non-configuration area

2315‧‧‧異物存在區域 2315‧‧‧ Foreign body existence area

P1‧‧‧壓力 P1‧‧‧ pressure

P2‧‧‧壓力 P2‧‧‧ pressure

P3‧‧‧壓力 P3‧‧‧ pressure

P4‧‧‧壓力 P4‧‧‧ pressure

圖1係模式性地表示具有第1實施形態之異物檢查裝置之半導體製造系統之構成的圖。 Fig. 1 is a view schematically showing the configuration of a semiconductor manufacturing system including the foreign matter inspection device according to the first embodiment.

圖2係模式性地表示第1實施形態之異物檢查裝置之構成的圖。 Fig. 2 is a view schematically showing the configuration of a foreign matter inspection device according to the first embodiment.

圖3(a)~(c)係表示基底資料之一例的圖。 3(a) to (c) are diagrams showing an example of the base material.

圖4係表示第1實施形態之異物檢測處理之順序之一例的流程圖。 Fig. 4 is a flowchart showing an example of the procedure of the foreign matter detecting process of the first embodiment.

圖5(a)~(c)係表示第1實施形態之半導體製造系統中之晶片積層處理之情況的圖。 (a) to (c) of FIG. 5 are views showing a state of wafer lamination processing in the semiconductor manufacturing system of the first embodiment.

圖6(a)、6(b)係模式性地表示佈線基板中之異物檢測處理之情況的圖。 6(a) and 6(b) are diagrams schematically showing a state of foreign matter detecting processing in the wiring board.

圖7(a)、7(b)係模式性地表示晶片中之異物檢測處理之情況的圖。 7(a) and 7(b) are diagrams schematically showing a state of foreign matter detecting processing in a wafer.

圖8(a)、8(b)係模式性地表示晶片中之異物檢測處理之情況的圖。 8(a) and 8(b) are diagrams schematically showing a state of foreign matter detecting processing in a wafer.

圖9係表示第2實施形態之異物檢測處理之程序之一例的流程圖。 Fig. 9 is a flowchart showing an example of a procedure of foreign matter detecting processing in the second embodiment.

圖10(a)、10(b)係模式性地表示第2實施形態之半導體製造系統中之晶片積層處理之情況的圖。 FIGS. 10(a) and 10(b) are diagrams schematically showing a state of wafer lamination processing in the semiconductor manufacturing system of the second embodiment.

圖11係表示第3實施形態之異物檢測處理之程序之一例的流程圖。 Fig. 11 is a flowchart showing an example of a procedure of foreign matter detecting processing in the third embodiment.

20‧‧‧異物檢查裝置 20‧‧‧ Foreign object inspection device

21‧‧‧載物台 21‧‧‧stage

22‧‧‧檢測頭 22‧‧‧Detector

23‧‧‧控制部 23‧‧‧Control Department

80‧‧‧佈線基板 80‧‧‧ wiring substrate

85‧‧‧異物 85‧‧‧ Foreign objects

221‧‧‧基底檢查部 221‧‧‧Base Inspection Department

222‧‧‧支持部 222‧‧‧Support Department

231‧‧‧檢查對象設定部 231‧‧‧Check object setting section

232‧‧‧檢查控制部 232‧‧‧Check Control Department

233‧‧‧基底資料存儲部 233‧‧‧Base Data Storage Department

234‧‧‧異物存在判定部 234‧‧‧ Foreign Body Presence Determination Department

Claims (10)

一種異物檢查裝置,其特徵在於:其係檢查包括佈線基板或積層有晶片之佈線基板的檢查對象之上表面之異物之有無者,且包括:檢測頭,其包含感壓單元、及支持上述感壓單元之支持部,且可於水平方向及高度方向移動;及控制機構,其使上述檢測頭於上述檢查對象上移動,進行異物檢測處理;上述控制機構包括:基底資料存儲機構,其存儲包括表示未配置上述晶片之上述佈線基板的配置位置、或積層有上述晶片之上述佈線基板之最上層之晶片的配置位置之基底配置區域的基底資料;檢查控制機構,其以使上述檢測頭與上述檢查對象上之特定之位置接觸並以特定之力按壓之方式進行控制;及異物存在判定機構,其自上述感壓單元取得表示各位置之壓力值的檢查資料,參照上述基底資料存儲裝置中之上述基底資料,於上述基底配置區域之中根據上述檢查資料存在壓力比周圍更高之區域之情形時,將其提取作為異物存在區域。 A foreign matter inspection device that checks for the presence or absence of foreign matter on a surface of an inspection object including a wiring substrate or a wiring substrate on which a wafer is laminated, and includes: a detection head including a pressure sensitive unit, and supporting the feeling a support portion of the pressing unit movable in a horizontal direction and a height direction; and a control mechanism that moves the detecting head on the inspection object to perform a foreign matter detecting process; the control mechanism includes: a base material storage mechanism, wherein the storage includes a base material indicating an arrangement position of the wiring substrate on which the wafer is not disposed, or a base arrangement region in which an arrangement position of a wafer of the uppermost layer of the wiring substrate of the wafer is stacked; and an inspection control mechanism for causing the detection head and the The specific position contact on the inspection object is controlled by a specific force; and the foreign matter existence determining means obtains inspection data indicating the pressure value of each position from the pressure sensitive unit, and refers to the base material storage device. The above substrate data is in the above substrate arrangement area according to Check information when there is a pressure ratio of greater area surrounding the case, which region is extracted as foreign matter exists. 一種異物檢查裝置,其特徵在於:其係檢查包括佈線基板、或積層有晶片之佈線基板的檢查對象之上表面之異物之有無者,且包括:檢測頭,其檢測存在於上述檢查對象之上表面的異物 之存在之有無;及控制機構,其使上述檢測頭於上述檢查對象上移動而進行異物檢測處理,且根據自上述檢測頭取得之表示上述檢查對象之上表面之狀態的檢查資料而提取異物存在區域。 A foreign matter inspection device that checks for the presence or absence of foreign matter on a surface of an inspection object including a wiring substrate or a wiring substrate on which a wafer is laminated, and includes: a detection head that detects presence on the inspection object Surface foreign matter And a control mechanism that moves the detection head on the inspection object to perform foreign matter detection processing, and extracts foreign matter based on inspection data obtained from the inspection head indicating the state of the upper surface of the inspection object region. 如請求項1之異物檢查裝置,其中上述異物存在判定機構於上述檢查對象為積層有上述晶片之上述佈線基板之情形時,將上述基底配置區域內壓力比周圍高出特定比率以上的區域提取作為上述異物存在區域。 The foreign matter inspection device according to claim 1, wherein the foreign matter presence determining means extracts a region in which the pressure in the base arrangement region is higher than a specific ratio by a specific ratio when the inspection target is the wiring substrate in which the wafer is laminated. The above foreign matter exists in the area. 一種半導體製造裝置,其特徵在於包括:晶片積層部,其於包括佈線基板或積層有晶片之佈線基板之處理對象之上表面之特定之位置,經由黏著層而配置並按壓上述晶片,使上述晶片積層;及異物檢查部,其於在上述晶片積層部中積層上述晶片之前,檢查上述處理對象之上表面之異物的有無;且且上述異物檢查部包括:檢測頭,其檢測存在於上述處理對象之上表面的異物之存在之有無;及控制機構,其使上述檢測頭於上述處理對象上移動而進行異物檢測處理,根據自上述檢測頭取得之表示上述處理對象之上表面之狀態的檢查資料而提取異物存在區域。 A semiconductor manufacturing apparatus comprising: a wafer build-up portion that is disposed at a specific position on a surface of a processing object including a wiring substrate or a wiring substrate on which a wafer is laminated, and presses the wafer via an adhesive layer to cause the wafer And a foreign matter inspection unit that checks for the presence or absence of foreign matter on the upper surface of the processing target before stacking the wafer in the wafer layering portion; and the foreign object inspection unit includes a detection head that detects the presence of the processing target a presence or absence of the presence of foreign matter on the upper surface; and a control mechanism that moves the detection head on the processing target to perform a foreign matter detection process, and based on the inspection data obtained from the detection head indicating the state of the upper surface of the processing object The area where the foreign matter is present is extracted. 如請求項4之半導體製造裝置,其中上述異物檢查部之上述檢測頭包括: 感壓單元;及支持部,其支持上述感壓單元,且可於水平方向及高度方向移動;上述異物檢查部之上述控制機構包括:基底資料存儲機構,其存儲包括表示未配置上述晶片之上述佈線基板的配置位置、或積層有上述晶片之上述佈線基板之最上層之晶片的配置位置的基底配置區域之基底資料;檢查控制機構,其以使上述檢測頭與上述處理對象上之特定之位置接觸並以特定之力按壓之方式進行控制;及異物存在判定機構,其自上述感壓單元取得表示各位置之壓力值的檢查資料,參照上述基底資料存儲裝置中之上述基底資料,於上述基底配置區域之中根據上述檢查資料存在壓力比周圍更高之區域之情形時,將其提取作為異物存在區域。 The semiconductor manufacturing apparatus of claim 4, wherein the detecting head of the foreign matter inspecting unit comprises: a pressure sensing unit; and a support unit that supports the pressure sensing unit and is movable in a horizontal direction and a height direction; the control mechanism of the foreign object inspection unit includes: a base data storage mechanism that stores the above-mentioned An arrangement position of the wiring board, or a base material of a base arrangement area in which the arrangement position of the wafer of the uppermost layer of the wiring board of the wafer is laminated; and an inspection control mechanism for setting the detection head and the specific position on the processing target Contacting and controlling by a specific force; and a foreign matter existence determining means for obtaining inspection data indicating the pressure value of each position from the pressure sensitive unit, referring to the base material in the base data storage device, on the base In the case where there is a region in which the pressure is higher than the surrounding area according to the above inspection data, it is extracted as a foreign matter existence region. 如請求項5之半導體製造裝置,其中上述異物檢查部之上述異物存在判定機構於上述處理對象為積層有上述晶片之上述佈線基板之情形時,將上述基底配置區域內壓力比周圍高出特定之比率以上之區域提取作為上述異物存在區域。 The semiconductor manufacturing apparatus according to claim 5, wherein, in the case where the processing target is the wiring board in which the wafer is stacked, the foreign matter presence determining unit of the foreign matter inspection unit is configured to have a higher specific pressure in the base arrangement area than the surroundings. The region above the ratio is extracted as the above-mentioned foreign matter existence region. 如請求項4至6中任一項之半導體製造裝置,其進而包括異物除去部,該異物除去部具備纏繞有粘著膠帶之一對滾筒,且於藉由上述異物檢查部判定上述處理對象之上表面存在異物之情形時,使一個上述滾筒與上述處理對 象之上表面接觸並於上述處理對象上移動,而除去上述異物。 The semiconductor manufacturing apparatus according to any one of claims 4 to 6, further comprising a foreign matter removing unit that includes one of the pair of adhesive tapes wound around the drum, and the foreign matter inspection unit determines the processing target When there is a foreign matter on the upper surface, one of the above rollers is treated with the above-mentioned treatment The foreign matter is removed as the upper surface contacts and moves on the above-mentioned processing object. 如請求項7之半導體製造裝置,其進而包括於上述異物檢查部、上述異物除去部及上述晶片積層部之間搬送上述處理對象之搬送部,上述搬送部於在上述異物檢查部中判定上述處理對象之上表面存在異物之情形時,將上述處理對象搬送至上述異物除去部,於異物除去處理結束後再次將上述處理對象搬送至上述異物檢查部。 The semiconductor manufacturing apparatus according to claim 7, further comprising: a transfer unit that transports the processing target between the foreign object inspection unit, the foreign matter removal unit, and the wafer layering unit, wherein the transfer unit determines the processing in the foreign object inspection unit When there is a foreign matter on the surface of the object, the object to be processed is transported to the foreign matter removing unit, and the object to be processed is again transported to the foreign matter inspecting unit after the foreign matter removing process is completed. 如請求項7之半導體製造裝置,其進而包括於上述異物檢查部與上述晶片積層部之間搬送上述處理對象之搬送部,上述異物除去部進而包含可使上述一個滾筒移動至在上述異物檢查部中檢查之上述處理對象的可伸縮之支持構件,於在上述異物檢查部中判定上述處理對象之上表面存在異物之情形時,上述異物除去部伸出上述可伸縮之支持構件,使上述滾筒移動至上述處理對象,而除去上述處理對象上之異物。 The semiconductor manufacturing apparatus according to claim 7, further comprising: a transport unit that transports the processing target between the foreign object inspection unit and the wafer layering unit, wherein the foreign matter removing unit further includes moving the one roller to the foreign object inspection unit In the case where the foreign object inspection unit determines that there is a foreign matter on the upper surface of the processing target, the foreign matter removing unit extends the telescopic support member to move the drum. The foreign matter on the processing target is removed to the processing target. 如請求項7之半導體製造裝置,其中上述異物檢查部與上述晶片積層部配置於相同線上;上述異物除去部配置於與上述線不同之位置;且進而包括搬送部,該搬送部包括:第1搬送裝置,其於在上述異物檢查部中判定上述處理對象之上表面不 存在異物之情形時,於上述線上搬送上述處理對象;及第2搬送裝置,其於在上述異物檢查部中判定上述處理對象之上表面存在異物之情形時,將上述處理對象自上述異物檢查部搬送至上述異物除去部。 The semiconductor manufacturing apparatus according to claim 7, wherein the foreign object inspection unit and the wafer layered portion are disposed on a same line; the foreign matter removing unit is disposed at a position different from the line; and further includes a transport unit including: first a conveying device that determines that the upper surface of the processing target is not in the foreign matter inspection unit When there is a foreign matter, the processing target is transported on the line; and the second transport device determines that the foreign object is present on the upper surface of the processing target, and the processing target is from the foreign object inspection unit. The conveyance is carried out to the foreign matter removing unit.
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