TW201308532A - Laminated module and interposer used in same - Google Patents

Laminated module and interposer used in same Download PDF

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Publication number
TW201308532A
TW201308532A TW101119685A TW101119685A TW201308532A TW 201308532 A TW201308532 A TW 201308532A TW 101119685 A TW101119685 A TW 101119685A TW 101119685 A TW101119685 A TW 101119685A TW 201308532 A TW201308532 A TW 201308532A
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TW
Taiwan
Prior art keywords
interposer
semiconductor element
heat
fluid
disposed
Prior art date
Application number
TW101119685A
Other languages
Chinese (zh)
Other versions
TWI604578B (en
Inventor
Hirofumi Nakamura
Manabu Bonkohara
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Zycube Co Ltd
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Publication date
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Publication of TW201308532A publication Critical patent/TW201308532A/en
Application granted granted Critical
Publication of TWI604578B publication Critical patent/TWI604578B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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    • H01L23/473Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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    • H01L2225/06503Stacked arrangements of devices
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Abstract

Provided is a laminated module that can suppress a temperature rise accompanying heat release by semiconductor devices, allowing stable operation, even in the case of a configuration laminating semiconductor devices having a large power consumption. The laminated module (40b) is provided with: an interposer (30a); at least one first semiconductor device (11b) disposed on one side of the interposer (30a); and at least one second semiconductor device (12b) disposed on the reverse side of the interposer (30a) from the first semiconductor device (11b). The interposer (30a) has: a main body having a channel (31) through which a fluid flows; and a heat reflection layer (61a) and/or a heat radiating layer (61b) disposed at a predetermined region of the inner wall of the main body demarcating the channel (31).

Description

積層模組及使用於其之中介層 Multilayer module and interposer used in it

本發明係關於將半導體元件積層複數個而成之積層模組(以下亦稱積層半導體元件),進一步言之,係關於能抑制消耗電力大之半導體元件之動作溫度上升而穩定地動作之積層模組與使用於其之中介層。 The present invention relates to a laminated module in which a plurality of semiconductor elements are laminated in a plurality of layers (hereinafter also referred to as a laminated semiconductor device), and further relates to a laminated mode in which an operating temperature of a semiconductor element capable of suppressing a large power consumption is increased and stably operates. Groups and intermediaries used in them.

近年,以矽為代表之半導體工業領域之技術大幅進步,不論工業用、民生用,均達到大幅貢獻於機器或系統之小型化、輕量化、低價格化、高功能化等。另一方面,對半導體元件之要求並未停止,仍被期待更加高積體化、高速化、高度化,且亦被期待小型化。 In recent years, the technology in the field of the semiconductor industry represented by 矽 has been greatly improved, and it has contributed significantly to the miniaturization, weight reduction, low price, and high functionality of machines and systems, regardless of industrial use or people's livelihood. On the other hand, the demand for semiconductor elements has not been stopped, and it is expected to be more integrated, higher in speed, and higher in height, and is expected to be miniaturized.

作為因應此等要求之對策,有將構成半導體元件之單位元件(例如電晶體)之尺寸微小化,使搭載之單位元件數目增多之方式。此對策之優點係伴隨微小化之動作速度之增大(高速化)、伴隨高積體化之功能之增大(或必要之半導體元件數目之減少)。然而,伴隨高速化或高積體化使在半導體元件內部之消耗電力變大,使動作不穩定化或半導體元件本身受破壞之危險性增大。為了使此等危險性降低,必須有半導體元件之放熱技術(或冷卻技術)。 In response to such a request, there is a method of miniaturizing the size of a unit element (for example, a transistor) constituting a semiconductor element, and increasing the number of unit elements to be mounted. The advantage of this measure is an increase in the speed of operation (higher speed) associated with miniaturization, an increase in the function of high integration (or a reduction in the number of necessary semiconductor elements). However, with the increase in speed or high integration, the power consumption in the semiconductor element is increased, and the operation is unstable or the semiconductor element itself is damaged. In order to reduce these risks, it is necessary to have an exothermic technique (or cooling technique) of the semiconductor element.

以前已開發出多數個降低半導體元件之動作溫度之技術。例如有於大電力之半導體元件貼附放熱翼片(多為鋁合金製),藉由對此翼片吹送空氣之流動以冷卻半導體元件之 技術。在消耗電力較低(例如數瓦)時,能以此技術解決。然而,最新之半導體元件中,消耗電力變得更大,在電腦之CPU等中有時會高達100瓦以上。因此,此種大消耗電力之半導體元件中,若放熱非充分,則亦有半導體元件之溫度上升導致熱失控或熱破壞之情形。因此,半導體元件動作之上限可謂受到放熱技術支配。 A number of techniques have been previously developed to reduce the operating temperature of semiconductor components. For example, a semiconductor component of a large power is attached with a heat releasing fin (manufacturally made of an aluminum alloy), and the flow of air is blown to the fin to cool the semiconductor element. technology. This technology can be solved when the power consumption is low (for example, several watts). However, in the latest semiconductor devices, power consumption becomes larger, and sometimes it is as high as 100 watts or more in a CPU of a computer. Therefore, in such a semiconductor device that consumes a large amount of power, if the heat radiation is insufficient, there is a case where the temperature of the semiconductor element rises to cause thermal runaway or thermal destruction. Therefore, the upper limit of the operation of the semiconductor element can be said to be dominated by the heat release technology.

將半導體元件積層複數個而成之「半導體模組(積層半導體元件)」,有能比較容易實現高積體化之優點。在此種構成下,在配置於下位層之半導體元件之電力消耗,不僅使此半導體元件之溫度上升,亦使配置於其上位層之半導體元件之溫度上升。因此,在於積層模組之上位層配置有特性為對動作溫度敏感之半導體元件時,有可能會使積層模組整體之動作不穩定。因此,在半導體模組之情形,最好係在來自消耗電力大之半導體元件之發熱傳達至位於更上位層之半導體元件前放出至積層模組外部,藉此避免在所積層之半導體元件間產生熱傳達之構裝構造。 The "semiconductor module (layered semiconductor device)" in which a plurality of semiconductor elements are laminated is advantageous in that it is relatively easy to achieve high integration. With such a configuration, the power consumption of the semiconductor element disposed in the lower layer not only increases the temperature of the semiconductor element but also increases the temperature of the semiconductor element disposed in the upper layer. Therefore, when a semiconductor element whose characteristics are sensitive to the operating temperature is disposed on the upper layer of the laminated module, the operation of the laminated module as a whole may be unstable. Therefore, in the case of a semiconductor module, it is preferable to discharge heat from a semiconductor element that consumes a large amount of power to a semiconductor element located in a higher-level layer before being discharged to the outside of the build-up module, thereby avoiding generation between the stacked semiconductor elements. The structure of the heat transmission.

作為所積層之半導體元件(半導體模組)之冷卻技術,以往已提出了圖31所示之構裝構造。該圖為記載為專利文獻1之圖1A。 As a cooling technique of a stacked semiconductor element (semiconductor module), the structure shown in FIG. 31 has been proposed. This figure is shown in FIG. 1A of Patent Document 1.

圖31中,晶片堆疊體110由以符號110a、110b、110c所示之3個半導體晶片之積層體構成。於各個晶片110a、110b、110c設有複數個藉蝕刻形成之通道175(圖31中符號175顯示代表之通道)。藉由使流體(冷媒)流動於通道175內,來進行晶片堆疊體110之冷卻。此流體在形成於所積 層之晶片110a、110b、110c之間之狹窄通道175內流動。此外,在晶片110a、110b、110c由半導體基板構成之情形,其厚度通常為數百微米(μm)以下。 In Fig. 31, the wafer stack 110 is composed of a laminate of three semiconductor wafers indicated by reference numerals 110a, 110b, and 110c. A plurality of channels 175 formed by etching are provided on the respective wafers 110a, 110b, 110c (the symbol 175 in Fig. 31 indicates the channel). Cooling of the wafer stack 110 is performed by flowing a fluid (refrigerant) into the channel 175. This fluid is formed in the accumulation The narrow channels 175 between the wafers 110a, 110b, 110c of the layers flow. Further, in the case where the wafers 110a, 110b, and 110c are composed of a semiconductor substrate, the thickness thereof is usually several hundred micrometers (μm) or less.

在各半導體晶片110a、110b、110c之垂直方向,藉由以符號123所示之TSV[Through Silicon Via,矽貫通電極]使晶片110a、110b、110c彼此相互連接。 In the vertical direction of each of the semiconductor wafers 110a, 110b, and 110c, the wafers 110a, 110b, and 110c are connected to each other by a TSV [Through Silicon Via] indicated by reference numeral 123.

[先行技術文獻] [Advanced technical literature]

[專利文獻1]美國發明專利申請公開第2009/031186號說明書 [Patent Document 1] US Patent Application Publication No. 2009/031186

圖31所示之習知積層半導體元件(積層模組)之構裝構造中,通道175形成為宛如「多數個柱林立之迴廊」,且由於其高度在數百微米(μm)以下,因此為了使流體(冷媒)流入通道175內必須有較大壓力。 In the structure of the conventional laminated semiconductor device (layered module) shown in FIG. 31, the channel 175 is formed like "a plurality of pillars", and since the height is several hundred micrometers (μm) or less, There must be a large pressure to allow the fluid (refrigerant) to flow into the passage 175.

又,流體之流動方向雖以位於圖31之符號111下側之向下箭頭與向右箭頭顯示,但沿該向下箭頭流入晶片堆疊體110周圍之流體不僅沿該向右箭頭流入位於晶片110a、110b、110c間之通道175內,亦應會在晶片110a、110b、110c周圍流動。如上述,考量到通道175之高度較低、晶片110a、110b、110c之周圍具有寬廣空間,則可想見難以使流體僅流入通道175內,多數流體會沿晶片110a、110b、110c周圍流動。而且,由於形成於晶片110a、110b、110c之通道175之形狀(沿著流體流動之方向之形狀)依各晶片 110a、110b、110c均相異,因此應難以在形成於各層之通道175全部實現均一之流體流動。 Further, although the flow direction of the fluid is indicated by a downward arrow and a rightward arrow located on the lower side of the symbol 111 of FIG. 31, the fluid flowing around the wafer stack 110 along the downward arrow flows not only along the rightward arrow but also on the wafer 110a. Within the channel 175 between 110b and 110c, it should also flow around the wafers 110a, 110b, 110c. As described above, considering that the height of the channel 175 is low and the periphery of the wafers 110a, 110b, 110c has a wide space, it is conceivable that it is difficult to allow fluid to flow only into the channel 175, and most of the fluid flows around the wafers 110a, 110b, 110c. Moreover, the shape of the channel 175 formed in the wafers 110a, 110b, 110c (the shape along the direction of fluid flow) depends on each wafer. 110a, 110b, 110c are all different, so it should be difficult to achieve uniform fluid flow in all of the channels 175 formed in each layer.

由上述理由可知,藉由圖31之習知構裝構造,欲實現晶片110a、110b、110c之充分冷卻(或從晶片110a、110b、110c之放熱)並不一定容易。 For the above reasons, it is understood that the sufficient cooling of the wafers 110a, 110b, and 110c (or the heat release from the wafers 110a, 110b, and 110c) is not always easy by the conventional structure of Fig. 31.

再者,由於在配置於晶片堆疊體110之下位層之晶片110c之電力消耗,不僅會引起晶片110c之溫度上昇,亦會引起配置於較其上位層之晶片110a、110b之溫度上昇,因此最好係不僅能冷卻晶片堆疊體110本身,在下位層之晶片110c之發熱最好係難以傳達至上位層之晶片110a、110b。然而,由於難以實現對形成於各層之通道175之均一之流體流動,因此難以抑制晶片110a、110b、110c間之熱傳導。 Furthermore, the power consumption of the wafer 110c disposed in the lower layer of the wafer stack 110 not only causes the temperature of the wafer 110c to rise, but also causes the temperature of the wafers 110a and 110b disposed above the upper layer to rise. It is preferable that not only the wafer stack 110 itself but also the heat of the wafer 110c in the lower layer is hardly transmitted to the wafers 110a and 110b of the upper layer. However, since it is difficult to achieve uniform fluid flow to the channels 175 formed in the respective layers, it is difficult to suppress heat conduction between the wafers 110a, 110b, 110c.

本發明係考量如以上之情事,其目的在於,提供即使係具有積層有消耗電力大之半導體元件之構成之情形,亦能抑制伴隨該等半導體元件發熱導致之溫度上升而穩定地動作之積層模組與使用於其之中介層。 The present invention has been made in view of the above, and it is an object of the present invention to provide a laminated mold capable of stably operating in response to temperature rise due to heat generation of the semiconductor elements even in the case of a semiconductor element having a large power consumption. Groups and intermediaries used in them.

本發明之另一目的,在於提供能抑制所積層之半導體元件間之熱傳導而抑制其溫度上升之積層模組及使用於其之中介層。 Another object of the present invention is to provide a laminated module capable of suppressing heat conduction between stacked semiconductor elements and suppressing an increase in temperature thereof, and an interposer used therefor.

此處未明記之本發明之其他目的,由以下說明及附圖即可明瞭。 Other objects of the present invention which are not explicitly described herein will be apparent from the following description and the accompanying drawings.

(1)本發明之積層模組,其特徵在於,具備:中介層; 配置於前述中介層單側之1個以上之第1半導體元件;以及配置於前述中介層之與前述第1半導體元件相反側之1個以上之第2半導體元件;前述中介層具有:具有流體流動之通道之本體、以及配置於該本體之區劃前述通道之內壁之既定區域之熱放射層及熱反射層之至少一方。 (1) The laminated module of the present invention, comprising: an interposer; One or more first semiconductor elements disposed on one side of the interposer; and one or more second semiconductor elements disposed on the opposite side of the interposer from the first semiconductor element; the interposer having fluid flow And a body of the channel and at least one of a heat radiation layer and a heat reflection layer disposed in a predetermined region of the inner wall of the channel.

本發明之積層模組由於具有上述之構成,因此例如從1個以上之前述第1半導體元件發出之熱雖會經由前述中介層傳達至1個以上之前述第2半導體元件,但藉由使流體流動於前述中介層之前述通道,而能將前述熱藉由前述流體有效地放出至外部。而且,前述中介層由於在區劃前述通道之內壁之既定區域具有前述熱放射層或前述熱反射層或該等兩者,因此能藉由使前述熱從前述熱放射層往前述流體放射,或將前述熱藉由前述熱反射層往前述第1半導體元件反射,而能使前述熱之放出更有效果。 Since the laminated module of the present invention has the above-described configuration, for example, heat generated from one or more of the first semiconductor elements is transmitted to one or more of the second semiconductor elements via the interposer, but the fluid is made by the fluid. Flowing through the aforementioned passage of the intermediate layer, the heat can be efficiently discharged to the outside by the aforementioned fluid. Further, since the interposer has the heat radiation layer or the heat reflection layer or both in a predetermined region that partitions the inner wall of the passage, the heat can be radiated from the heat radiation layer to the fluid, or The heat is reflected by the heat reflecting layer toward the first semiconductor element, and the heat is released more effectively.

因此,能防止或減低從前述第1半導體元件發出之前述熱傳達至前述第2半導體元件。其結果,即使係具有積層有消耗電力大之半導體元件之構成之積層模組,亦能抑制伴隨該等半導體元件發熱導致之溫度上升而穩定地動作。 Therefore, it is possible to prevent or reduce the heat transmitted from the first semiconductor element to the second semiconductor element. As a result, even if it has a laminated module in which a semiconductor element having a large power consumption is laminated, it is possible to suppress stable temperature rise due to temperature rise due to heat generation of the semiconductor elements.

又,由於使在區劃前述通道之內壁之既定區域具有前述熱放射層或前述熱反射層或該等兩者之前述中介層,介在於前述第1半導體元件與前述第2半導體元件之間,因 此能抑制構成前述積層模組之半導體元件間之熱傳導而抑制該積層模組溫度上升。 Further, the intermediate layer between the first semiconductor element and the second semiconductor element is interposed between the first semiconductor element and the second semiconductor element in a predetermined region in which the inner wall of the channel is partitioned, and the heat radiation layer or the heat reflection layer or the intermediate layer is provided. because This can suppress the heat conduction between the semiconductor elements constituting the laminated module and suppress the temperature rise of the laminated module.

(2)本發明之積層模組之較佳例為,前述中介層之前述熱放射層配置於發熱量相對大之前述第1半導體元件之側。 (2) In a preferred embodiment of the multilayer module of the present invention, the heat radiation layer of the interposer is disposed on a side of the first semiconductor element having a relatively large amount of heat generation.

(3)本發明之積層模組之其他較佳例為,前述中介層之前述熱反射層配置於發熱量相對小之前述第2半導體元件之側。 (3) In another preferred embodiment of the laminated module of the present invention, the heat reflecting layer of the interposer is disposed on a side of the second semiconductor element having a relatively small amount of heat generation.

(4)本發明之積層模組之再一其他較佳例為,前述中介層之前述熱放射層配置於發熱量相對大之前述第1半導體元件之側,前述中介層之前述熱反射層配置於發熱量相對小之前述第2半導體元件之側。 (4) In still another preferred embodiment of the laminated module of the present invention, the heat radiation layer of the interposer is disposed on a side of the first semiconductor element having a relatively large amount of heat generation, and the heat reflection layer is disposed on the interposer The side of the second semiconductor element having a relatively small amount of heat generation.

(5)本發明之中介層,其特徵在於,具備:具有流體流動之通道之本體;以及配置於前述本體之區劃前述通道之內壁之既定區域之熱放射層及熱反射層之至少一方。 (5) The interposer of the present invention, comprising: a body having a passage through which a fluid flows; and at least one of a heat radiation layer and a heat reflection layer disposed in a predetermined region of the inner wall of the passage defining the passage.

本發明之中介層由於具有上述之構成,因此藉由使流體流動於前述通道,而能將配置於前述中介層附近之半導體元件所發出之熱藉由前述流體有效地放出至外部。又,前述中介層由於在區劃前述通道之內壁之既定區域具有前述熱放射層或前述熱反射層或該等兩者,因此能藉由使前述熱從前述熱放射層往前述流體放射,或將前述熱藉由前述熱反射層往前述半導體元件反射,而能使前述熱之放出更有效果。 Since the interposer of the present invention has the above-described configuration, the heat generated by the semiconductor element disposed in the vicinity of the interposer can be efficiently released to the outside by the fluid by flowing the fluid to the channel. Further, since the interposer has the heat radiation layer or the heat reflection layer or both in a predetermined region zoning the inner wall of the passage, the heat can be radiated from the heat radiation layer to the fluid, or The heat is reflected by the heat reflecting layer toward the semiconductor element, so that the heat release can be more effective.

因此,能防止或減低從前述半導體元件發出之前述熱 傳達至配置於前述中介層相反側附近之另一半導體元件。其結果,即使係具有積層有消耗電力大之半導體元件之構成之積層模組,亦能抑制伴隨該等半導體元件發熱導致之溫度上升而穩定地動作。 Therefore, the aforementioned heat emitted from the aforementioned semiconductor element can be prevented or reduced It is transmitted to another semiconductor element disposed near the opposite side of the aforementioned interposer. As a result, even if it has a laminated module in which a semiconductor element having a large power consumption is laminated, it is possible to suppress stable temperature rise due to temperature rise due to heat generation of the semiconductor elements.

又,由於在區劃前述通道之內壁之既定區域具有前述熱放射層或前述熱反射層或該等兩者,因此藉由使該中介層介在,能抑制構成前述積層模組之半導體元件間之熱傳導而抑制該積層模組溫度上升。 Further, since the predetermined region of the inner wall of the channel is provided with the heat radiation layer or the heat reflection layer or both, by interposing the interposer, it is possible to suppress the semiconductor elements constituting the laminate module. The heat conduction suppresses the temperature rise of the laminated module.

(6)本發明之中介層之較佳例為,前述熱放射層配置於發熱量相對大之半導體元件之側,前述熱反射層配置於發熱量相對小之半導體元件之側。 (6) In a preferred embodiment of the interposer of the present invention, the heat radiation layer is disposed on the side of the semiconductor element having a relatively large amount of heat generation, and the heat reflection layer is disposed on the side of the semiconductor element having a relatively small amount of heat generation.

(7)本說明書中,將關連之用語如下述般定義。 (7) In this manual, the terms used are defined as follows.

‧基板:只要係具有能支撐前述積層模組之剛性之基板,其構成或材質為任意。 ‧Substrate: The structure or material is arbitrary as long as it has a substrate capable of supporting the rigidity of the laminated module.

‧半導體元件:指包含以下之(i)與(ii)之所有半導體元件。 ‧Semiconductor component: Refers to all semiconductor components including (i) and (ii) below.

(i)晶圓製程結束,從半導體晶圓切出之半導體晶片(裸晶片)。於該半導體晶片包含配置有至少1個之電晶體、二極體等半導體元件之所謂積體電路之晶片。 (i) Semiconductor wafers (bare wafers) cut from semiconductor wafers at the end of the wafer process. The semiconductor wafer includes a wafer of a so-called integrated circuit in which at least one semiconductor element such as a transistor or a diode is disposed.

(ii)已封裝之上述半導體晶片。包含被稱為球柵陣列(BGA)、晶片尺寸封裝體(CSP)等以各種封裝體封裝者。 (ii) The above-described semiconductor wafer that has been packaged. A package called a ball grid array (BGA), a chip size package (CSP), or the like is packaged in various packages.

‧電子零件:亦稱為被動元件之零件,有電阻、電容器、電感(線圈)等。亦有將單一元件(個別零件)組合複數個而成之構成(例如模組電阻)。又,具有特定功能之感測器或 致動器亦為電子零件所含。再者,積體化有訊號處理電路、驅動電路等之前述感測器或前述致動器亦為電子零件所含。 ‧Electronic components: Also known as passive component parts, including resistors, capacitors, inductors (coils), etc. There is also a combination of a single component (individual components) (for example, a module resistor). Also, sensors with specific functions or Actuators are also included in electronic components. Further, the aforementioned sensor or the actuator including the signal processing circuit, the drive circuit, and the like is also included in the electronic component.

‧半導體模組:具有積層有2個以上之前述半導體元件之構造。構成此積層構造之各層間之相互連接之手法雖有打線、貫通電極(TSV)等,但其手法不拘。例如,在由中介層、配置於其單側之1個以上之第1半導體元件、以及配置於前述中介層之相反側之1個以上之第2半導體元件構成之情形,為「3段構成之積層模組」。積層有更多之半導體元件之情形,則為「多段構成之積層模組」。 ‧ Semiconductor module: A structure having two or more semiconductor elements stacked in layers. Although the methods of interconnecting the layers constituting the laminated structure include wire bonding and through electrodes (TSV), the method is not limited. For example, in the case where the interposer, one or more first semiconductor elements disposed on one side thereof, and one or more second semiconductor elements disposed on the opposite side of the interposer are configured, the three-phase configuration is Multilayer module." In the case where there are more semiconductor elements stacked, it is a "multi-segment laminated module".

‧構裝構造:係包含前述基板與搭載於其上之前述積層模組之構造。不過亦可包含搭載於前述基板上之罩體等。 ‧Construction structure: A structure including the substrate and the above-described laminated module mounted thereon. However, a cover or the like mounted on the substrate may be included.

‧中介層:配置於前述第1半導體元件與前述第2半導體元件之間,具有從其一端貫通(延伸)至另一端之通道。於中介層表面及背面形成有電氣連接點。進而,於中介層之表背面有時亦設有被稱為「再配線層」之配線圖案。此外,於前述之積層模組,於構成此積層模組之半導體元件之間有時會插入用以「於配置於上下之半導體元件間形成電氣導電路」之「配線基板」,此「配線基板」亦有稱為「中介層」之情形。然而,本說明書中,此「配線基板」並不包含於「中介層」。 ‧ Interposer: disposed between the first semiconductor element and the second semiconductor element, and having a channel penetrating (extending) from one end to the other end. Electrical connection points are formed on the surface and the back surface of the interposer. Further, a wiring pattern called a "rewiring layer" may be provided on the back surface of the interposer. Further, in the above-described laminated module, a "wiring substrate" for "forming an electrical conduction circuit between semiconductor elements arranged up and down" may be inserted between semiconductor elements constituting the laminated module. There is also a situation called "intermediary layer". However, in this specification, the "wiring board" is not included in the "interposer".

‧流體:為氣體或液體,具有藉由以熱傳導吸收熱以放熱或排熱之效果。具有此種功能之流體亦稱為「冷媒」。作為具體例,有(i)氟氯碳化物類/無氟氯碳化物類(多使用 此,種類多);(ii)有機化合物之丁烷、異丁烷等;(iii)無機化合物之氫、氦、氨、水、二氧化氫等。 ‧ Fluid: A gas or liquid that has the effect of absorbing heat by heat transfer to dissipate heat or heat. Fluids with this function are also referred to as "refrigerants". As a specific example, there are (i) chlorofluorocarbons/non-chlorofluorocarbons (multiple use) Here, there are many types); (ii) butane, isobutane, etc. of an organic compound; (iii) hydrogen, hydrazine, ammonia, water, hydrogen dioxide, and the like of the inorganic compound.

(8)亦可進一步設置搭載前述積層模組之基板與以包含前述積層模組之方式緊貼固定於前述基板上,與前述基板一起形成內部空間之罩體。此情形下,最好係具備配置於前述罩體與前述基板間之用以分隔前述內部空間之堰部(分隔構件)。前述罩體之形狀取決於前述積層模組之外觀形狀。雖最好係大致長方體(包含大致立方體),但並不限定於此。該長方體之頂點與交線(面與面相交之線段)亦可係平滑。 (8) It is also possible to further provide a substrate on which the laminated module is mounted and a cover that is closely attached to the substrate so as to include the laminated module, and forms an internal space together with the substrate. In this case, it is preferable to provide a weir portion (separator member) disposed between the cover body and the substrate to partition the internal space. The shape of the cover body depends on the appearance of the aforementioned laminated module. Although it is preferably a substantially rectangular parallelepiped (including a substantially cubic shape), it is not limited thereto. The vertices of the cuboid and the intersection line (the line intersecting the face and the face) may also be smooth.

關於形成於前述罩體之入口與出口之位置,必須係從前述入口流入前述內部空間之流體會通過前述中介層之通道而從前述出口流出之配置。亦即,前述入口配置於前述堰部之上游側,前述出口配置於前述堰部之下游側,換言之,前述入口必須連通於前述上游測空間,前述出口必須連通於前述下游側空間。只要滿足此位置關係,即無針對前述入口與前述出口之位置之限制。例如,(a)亦可將前述入口配置於前述罩體之所指定之面,將前述出口配置於前述罩體之與該面為相反側之面,(b)亦可將前述入口與前述出口兩者配置於前述罩體之相同面(例如上面),(c)亦可將前述入口配置於前述罩體之所指定之面,將前述出口配置於前述罩體之上面。 Regarding the position formed at the inlet and the outlet of the cover, it is necessary that the fluid flowing into the internal space from the inlet enters the outlet through the passage of the intermediate layer. That is, the inlet is disposed on the upstream side of the crotch portion, and the outlet is disposed on the downstream side of the crotch portion, in other words, the inlet must communicate with the upstream measurement space, and the outlet must communicate with the downstream side space. As long as this positional relationship is satisfied, there is no restriction on the position of the aforementioned inlet and the aforementioned outlet. For example, (a) the inlet may be disposed on a surface designated by the cover, and the outlet may be disposed on a surface of the cover opposite to the surface, and (b) the inlet and the outlet may be The two are disposed on the same surface (for example, the upper surface) of the cover, and (c) the inlet may be disposed on a designated surface of the cover, and the outlet may be disposed on the upper surface of the cover.

作為前述罩體之材質能使用金屬、樹脂等。若欲增大冷卻(放熱)效果,雖最好係以金屬材料形成前述罩體,但並 不限定於此。以樹脂材料形成前述罩體時,為了增大冷卻(放熱)效果,亦可於前述罩體之表側或背側、或者表側及背側設置金屬層。 A metal, a resin, or the like can be used as the material of the cover. If it is desired to increase the cooling (heat release) effect, it is preferable to form the cover body with a metal material, but It is not limited to this. When the cover is formed of a resin material, in order to increase the cooling (heat release) effect, a metal layer may be provided on the front side or the back side, or the front side and the back side of the cover.

前述罩體亦可形成為一體構造,直接緊貼固定於前述基板之表面。為了使前述罩體緊貼於前述基板之表面,亦可使用接著劑(固化時產生之氣體不會對前述半導體元件之特性產生不良影響這點較佳)。又,當前述罩體為金屬材料時,亦可在與設於前述基板表面之金屬層之間進行金屬/金屬接合(例如熔接、焊接等),藉此緊貼固定。 The cover body may also be formed in an integral structure and directly attached to the surface of the substrate. In order to adhere the cover to the surface of the substrate, an adhesive may be used (it is preferable that the gas generated during curing does not adversely affect the characteristics of the semiconductor element). Further, when the cover is made of a metal material, metal/metal bonding (for example, welding, welding, or the like) may be performed between the metal layer provided on the surface of the substrate, thereby adhering and fixing.

前述罩體由複數個構成零件構成,亦可藉由使此等構造零件合體(組裝),而作成前述罩體。例如,將配置有前述入口與前述出口之「蓋」(為平板狀)與形成前述罩體之側面部之「框」組合而構成前述罩體。此構成例中,係使前述框之下面緊貼於前述基板之表面且使前述框之上面緊貼於前述蓋之下面。前述框之材料亦可不與前述罩體相同。例如,有前述蓋為金屬材,前述框為樹脂或玻璃之組合。 The cover body is composed of a plurality of constituent members, and the cover member may be formed by combining (assembling) the structural members. For example, the cover is formed by combining a "cover" (a flat plate shape) in which the inlet and the outlet are disposed, and a "frame" forming a side surface portion of the cover. In this configuration example, the lower surface of the frame is brought into close contact with the surface of the substrate, and the upper surface of the frame is brought into close contact with the underside of the cover. The material of the aforementioned frame may not be the same as the above-mentioned cover. For example, the cover is a metal material, and the frame is a combination of resin or glass.

前述蓋與前述框之緊貼接合及前述框與前述基板表面之緊貼固定亦可使用接著劑(固化時產生之氣體不會對前述半導體元件之特性產生不良影響這點較佳)。前述蓋與前述框均為金屬材料時,亦可進行金屬/金屬接合(例如熔接、焊接等)。前述蓋為金屬(例如鋁),前述框為玻璃時,亦可使用靜電接合(金屬與玻璃之接著法)。若前述框為金屬材料,則亦可在與設於前述基板表面之金屬層之間進行金屬/金屬接合(例如熔接、焊接)。在前述框為玻璃,前述中介 層之表面為金屬(或相反之組合)時,亦可使用靜電接合。 It is preferable to use an adhesive (the gas generated during curing does not adversely affect the characteristics of the semiconductor element) by bonding the cover to the frame and by adhering the frame to the surface of the substrate. When both the cover and the frame are made of a metal material, metal/metal bonding (for example, welding, welding, etc.) may be performed. The cover is made of a metal (for example, aluminum), and when the frame is glass, electrostatic bonding (metal and glass bonding method) may be used. If the frame is a metal material, metal/metal bonding (for example, welding or soldering) may be performed between the metal layers provided on the surface of the substrate. In the foregoing box is glass, the aforementioned intermediary When the surface of the layer is metal (or a combination of the opposite), electrostatic bonding can also be used.

(9)前述堰部係為了阻止從前述入口流入前述內部空間之前述流體不往前述通道流入而通過前述積層模組之側面(外周)往前述出口導引而設置,其原因在於,從前述入口流入之前述流體若不通過前述通道而直接從前述出口流出,則無法得到所欲之冷卻效果之故。具有此種功能之堰部,能藉由(a)於待配置前述罩體之前述堰部之位置預先設置間隙,(b)將前述罩體緊貼固定於前述基板,(c)從前述間隙注入作為前述堰部之材料(合成樹脂等)之步驟形成。此處所使用之合成樹脂,最好係熱硬化性且前述積層模組及前述罩體之緊貼性高,且其熱膨脹係數接近前述積層模組及前述罩體之熱膨脹係數(較佳為一致)。然而,並不限定於此。 (9) The crotch portion is provided to prevent the fluid flowing into the internal space from the inlet from flowing into the passage and passing through the side surface (outer circumference) of the laminated module to the outlet, because the inlet is provided from the inlet If the inflowing fluid directly flows out of the outlet without passing through the passage, the desired cooling effect cannot be obtained. The crotch portion having such a function can (a) fix the cover body to the substrate in advance (a) at a position where the crotch portion of the cover body is to be placed, and (c) the gap from the gap. It is formed by a step of injecting a material (synthetic resin or the like) as the above-mentioned crotch portion. The synthetic resin used herein is preferably thermosetting, and the laminate module and the cover have high adhesion, and the thermal expansion coefficient thereof is close to the thermal expansion coefficient of the laminate module and the cover (preferably consistent). . However, it is not limited to this.

藉由前述堰部之存在,從前述入口流入前述內部空間之前述流體之一部分有進入前述上游側空間(形成於前述積層模組與前述罩體與前述堰部之間之前述入口側之空間)而在該處滯流之傾向。亦即,在前述上游側空間,前述流體易成為不流動之狀態。若發生此種滯留,則藉由前述流體之放熱效果會降低。為了防止此放熱效果之降低,最好係構成為前述流體之全量隨時會從前述入口流動至前述出口。因此,由於必須使前述堰部延伸至接近前述積層模組之前述入口側之端部附近,使前述上游側空間之體積縮小,因此例如只要增大前述堰部之寬度(沿著前述流體之流動方向之長度)即可。此種寬度廣之堰部,能藉由增大注入形成前述堰部之合成樹脂等之前述間隙來容易地實現。 One of the fluids flowing into the internal space from the inlet enters the upstream space (the space formed on the inlet side between the laminated module and the cover and the crotch portion) by the presence of the crotch portion And the tendency to stagnate there. That is, in the upstream space, the fluid tends to be in a state of no flow. If such retention occurs, the heat release effect of the fluid described above is lowered. In order to prevent the decrease in the heat release effect, it is preferable that the entire amount of the fluid flows from the inlet to the outlet at any time. Therefore, since it is necessary to extend the crotch portion to the vicinity of the end portion of the inlet module side of the stacking module to reduce the volume of the upstream side space, for example, it is only necessary to increase the width of the crotch portion (along the flow of the fluid) The length of the direction) can be. Such a wide width portion can be easily realized by increasing the gap between the synthetic resin or the like into which the crotch portion is formed.

如上述增大前述堰部之寬度而縮小前述上游側空間之體積之情形,前述「間隙」係變大。在形成前述堰部時雖係從設於前述罩體之前述間隙注入前述樹脂,但在利用藉由空壓等從注射器擠出前述樹脂之製程時,亦於露出於前述間隙內之前述積層模組之外表面塗布前述樹脂。不過,亦可不於露出之前述積層模組之外表面全面塗布前述樹脂。亦即,亦可僅於前述間隙之上游側端部與下游側端部塗布前述樹脂,於前述間隙之中央部分(前述上游側端部與前述下游側端部間之部分)則不塗布前述樹脂。 As described above, the width of the crotch portion is increased to reduce the volume of the upstream side space, and the "gap" is increased. In the formation of the crotch portion, the resin is injected from the gap provided in the cover, but when the resin is extruded from a syringe by air pressure or the like, the laminated mold is exposed in the gap. The outer surface of the group was coated with the aforementioned resin. However, the resin may not be completely coated on the surface other than the exposed laminated module. In other words, the resin may be applied only to the upstream end portion and the downstream end portion of the gap, and the resin may not be applied to the central portion of the gap (the portion between the upstream end portion and the downstream end portion). .

在如上述僅於前述間隙之上游側端部與下游側端部塗布前述樹脂時,由於需使來自前述注射器之前述樹脂之流動變細,因此係使用小口徑者作為前述注射器。此情形下,由於在前述樹脂之塗布後亦殘存露出於前述積層模組之外表面之部分,因此係從此露出部分進行放熱。從此露出部分之放熱,係從前述罩體之間隙往外部直接放射熱,並非利用前述流體之放熱。 When the resin is applied only to the upstream end portion and the downstream end portion of the gap as described above, since the flow of the resin from the syringe is required to be thinned, a small diameter is used as the syringe. In this case, since the portion exposed to the outer surface of the laminated module remains after the application of the resin, heat is emitted from the exposed portion. From this, the exothermic heat is emitted directly from the gap of the cover to the outside, and the heat of the fluid is not used.

(10)針對前述堰部,亦考量使上述構成進一步發展而成之構成。例如,從前述積層模組之外表面之露出部分之放熱,並非藉由熱放射進行,而能作成利用第2流體(與通過前述通道之冷卻用前述流體不同之流體)之構成。此構成中,係以覆蓋於外表面具有前述露出部分(此位於前述上游側端部與前述下游側端部之間)之前述積層模組與前述罩體之方式將第2罩體緊貼固定於前述基板上,藉此於前述罩體與前述第2罩體之間與前述基板一起形成第2內部空 間。接著,使前述第2流體流入該第2內部空間。 (10) For the above-mentioned crotch, a configuration in which the above-described configuration is further developed is also considered. For example, the heat radiation from the exposed portion of the outer surface of the laminated module is not formed by heat radiation, but can be formed by using a second fluid (a fluid different from the fluid for cooling through the passage). In this configuration, the second cover body is closely attached to the cover layer having the exposed portion (between the upstream end portion and the downstream end portion) on the outer surface and the cover body. Forming a second internal space with the substrate between the cover and the second cover on the substrate between. Next, the second fluid flows into the second internal space.

此構成中,最好係對供應至前述內部空間之前述流體施加壓力以使前述流體往剖面積小之前述通道之流入可順暢地進行。另一方面,對供應至前述第2內部空間之前述第2液體則無須如前述流體之加壓。其原因在於無需使前述流體對開口剖面積小之前述通道流入。因此,亦能於前述第2罩體設置前述第2流體流入/流出之(亦即發揮入口兼出口之功能)單一口,作成如搭載於筆記型電腦之與熱泵(未使用壓縮機者)類似之構成。只要採用此種雙重罩體構成,則有在前述積層模組產生之熱之放熱效果會更高之優點。 In this configuration, it is preferable that pressure is applied to the fluid supplied to the internal space so that the inflow of the fluid to the passage having a small cross-sectional area can be smoothly performed. On the other hand, the second liquid supplied to the second internal space does not need to be pressurized as described above. The reason for this is that it is not necessary to cause the aforementioned fluid to flow into the aforementioned passage having a small sectional area of the opening. Therefore, it is also possible to provide a single port in which the second fluid flows in and out (that is, functions as an inlet and an outlet) in the second cover, and is similar to a heat pump (not using a compressor) mounted on a notebook computer. The composition. As long as such a double cover is used, there is an advantage that the heat generated by the above-mentioned laminated module is higher.

(11)前述中介層,只要具備配置於前述通道之內壁之指定區域之熱反射層及熱放射層之至少一方即可。例如,亦可於前述中介層之前述通道之內壁之第1指定區域配置熱放射層,於該內壁之第2指定區域配置熱反射層。此情形下,例如作成下述構裝構造,即包含(a)由至少2個半導體元件與被夾入於彼此上下相鄰之前述半導體元件間之中介層構成之積層模組;以及(b)搭載有前述積層模組之基板,(c)於前述中介層內部形成流體流動之通道,(d)於前述通道之內壁之第1指定區域配置熱放射層。或者作成下述構裝構造,即包含(a)由至少2個半導體元件與被夾入於彼此上下相鄰之前述半導體元件間之中介層構成之積層模組;以及(b)搭載有前述積層模組之基板,(c)於前述中介層內部形成流體流動之通道,(d)於前述通道之內壁之第2指定區 域配置熱反射層。 (11) The interposer may have at least one of a heat reflecting layer and a heat radiating layer disposed in a predetermined region of the inner wall of the passage. For example, a heat radiation layer may be disposed in a first designated region of the inner wall of the passage of the interposer, and a heat reflective layer may be disposed in a second designated region of the inner wall. In this case, for example, a laminated structure including (a) an intermediate layer composed of at least two semiconductor elements and the semiconductor elements sandwiched between the semiconductor elements adjacent to each other; and (b) a substrate on which the laminated module is mounted, (c) a channel through which a fluid flows in the interposer, and (d) a heat radiation layer disposed in a first designated region of the inner wall of the channel. Or a structure comprising: (a) a build-up module comprising at least two semiconductor elements and an interposer sandwiched between the semiconductor elements vertically adjacent to each other; and (b) mounting the build-up layer a substrate of the module, (c) a channel for forming a fluid flow inside the interposer, and (d) a second designated region of the inner wall of the channel The domain is configured with a heat reflective layer.

前述熱反射層與前述熱放射層亦可涵蓋前述內壁之全區配置,亦可配置於一部分。亦可限定於前述內壁之指定之區域並分別配置前述熱反射層與前述熱放射層。例如,亦可將前述內壁之第1指定區域作為前述通道之「頂部」,於此頂部配置前述熱反射層,並將前述內壁之第2指定區域作為前述通道之「底部」,於此底部配置前述熱放射層,進而,於前述通道之「側壁」不配置前述熱反射層及前述熱放射層之構成。又,亦可為於前述「頂部」之周邊部(接近「側壁」之區域)不配置前述熱反射層之構成,或者亦可為於前述「底部」之周邊部(接近「側壁」之區域)不配置前述熱放射層之構成。 The heat reflecting layer and the heat radiation layer may also cover the entire area of the inner wall, or may be disposed in a part. The heat reflecting layer and the heat radiation layer may be disposed in a predetermined region of the inner wall. For example, the first designated area of the inner wall may be the "top" of the channel, and the heat reflecting layer may be disposed on the top, and the second designated area of the inner wall may be the "bottom" of the channel. The heat radiation layer is disposed on the bottom, and the heat reflection layer and the heat radiation layer are not disposed on the "side wall" of the channel. Further, the peripheral portion of the "top" (the region close to the "side wall") may not be disposed, or the peripheral portion of the "bottom portion" (the region adjacent to the "side wall") may be used. The configuration of the aforementioned heat radiation layer is not disposed.

構成前述通道之「頂部」與「底部」與「側壁」亦可以相同材料構成。例如,將此等全部以單結晶矽形成時,能利用周知之積體電路作成技術於前述中介層之表面與背面、或者於前述「頂部」或「底部」容易地形成電子電路或電氣配線層。 The "top" and "bottom" and "sidewall" constituting the passage may be made of the same material. For example, when all of these are formed by a single crystal enthalpy, an electronic circuit or an electric wiring layer can be easily formed on the front and back surfaces of the interposer or on the "top" or "bottom" by using a well-known integrated circuit fabrication technique. .

構成前述通道之「頂部」與「底部」與「側壁」亦可以不同材料構成。例如,將「頂部」與「底部」以單結晶矽構成,將「側壁」以玻璃構成。此構成例中,亦能使單結晶矽與玻璃以靜電接合而氣密良好地(液體不漏出地)且強固地緊貼。又,亦可將「頂部」或「底部」以樹脂材料(例如印刷基板之材料)構成,將「側壁」以接著性高之樹脂材料(例如光二極體材料即「SU-8」)構成。此外,「頂部」與「底部」與「側壁」雖最好係 以熱傳導率大之材料形成,但並不一定要如此。 The "top" and "bottom" and "sidewall" constituting the aforementioned passages may also be made of different materials. For example, the "top" and the "bottom" are composed of a single crystal crucible, and the "side wall" is made of glass. In this configuration example, the single crystal ruthenium and the glass can be electrostatically bonded to each other to be airtight (the liquid does not leak) and strongly adhere to each other. Further, the "top" or "bottom" may be made of a resin material (for example, a material of a printed circuit board), and the "side wall" may be made of a resin material having high adhesion (for example, "SU-8" which is a photodiode material). In addition, "top" and "bottom" and "sidewall" are better. It is formed from a material with a high thermal conductivity, but this is not necessarily the case.

(12)亦可於前述中介層之表面與背面(分別與前述第1及第2半導體元件對向之面)配置電子電路或電氣配線層。又,亦可於前述通道之內壁(「頂部」與「底部」與「側壁」)亦配置電子電路或電氣配線層。此情形下,為了使前述熱反射層及前述熱放射層不阻礙前述電子電路等之動作(例如電子電路之短路),需於前述熱反射層與前述電子電路等之間以及前述熱放射層與前述電子電路等之間配置絕緣層。 (12) An electronic circuit or an electric wiring layer may be disposed on the front surface and the back surface of the interposer (the surfaces facing the first and second semiconductor elements, respectively). Further, an electronic circuit or an electric wiring layer may be disposed on the inner wall of the passage ("top", "bottom" and "side wall"). In this case, in order to prevent the operation of the electronic circuit or the like (for example, short circuit of the electronic circuit), the heat reflecting layer and the heat radiation layer are required to be between the heat reflecting layer and the electronic circuit, and the heat radiation layer. An insulating layer is disposed between the electronic circuits and the like.

亦可於前述中介層形成貫通電極。藉由形成貫通電極,能將來自配置於前述中介層上方(與前述基板為相反側)之前述第2半導體元件之電氣訊號往配置於前述中介層下方(前述基板之側)之前述第1半導體元件、前述基板等傳達。 A through electrode may also be formed on the interposer. By forming the through electrode, the electrical signal from the second semiconductor element disposed above the interposer (opposite to the substrate) can be placed under the interposer (on the side of the substrate) of the first semiconductor The component, the substrate, and the like are conveyed.

於前述通道亦可無「頂部」。此情形下,配置於前述中介層之表面(與前述基板相反側之面)側之前述第2半導體元件之對向面成為「頂部」。又,於前述通道亦可無「底部」。此情形下,配置於前述中介層之背面(前述基板側之面)之前述第1半導體元件之對向面成為「底部」。此等構成例中,係在前述半導體元件之表面或背面,於前述中介層之「頂部」或「底部」加蓋。 There may be no "top" in the aforementioned passage. In this case, the opposing surface of the second semiconductor element disposed on the surface of the interposer (the surface opposite to the substrate) is the "top". Moreover, there is no "bottom" in the aforementioned passage. In this case, the opposing surface of the first semiconductor element disposed on the back surface (the surface on the substrate side) of the interposer is a "bottom". In these constitutional examples, the "top" or "bottom" of the interposer is capped on the front or back surface of the semiconductor element.

(13)前述通道之形狀有多種變形。 (13) The shape of the aforementioned passage has various modifications.

前述通道之剖面形狀(在相對前述流體之流動方向為垂直之面之剖面形狀)最好係包含大致正方形之大致長方形(例如寬度方向大、高度方向小之長方形)。前述通道在平行 於前述基板之面內之形狀雖最好係包含大致正方形之大致長方形,但並不限定於此。例如,亦能作成流體往前述通道流入之入口(上游側)之附近區域與流出之出口(下游側)之附近區域兩者、或者入口之附近區域與出口之附近區域之任一方為狹窄之形狀。亦即,為「前述通道之至少一方端部較細,其中央部較粗」之形狀。此狹窄區域雖係藉由使前述通道之前述側壁之至少一方往內側曲折而形成,但亦可於此曲折處配置貫通電極。前述入口與前述出口所配置之位置,雖最好為前述通道之寬度方向中央,但並不限定於此。例如,亦可為前述入口在前述通道之寬度方向靠左、前述出口在前述通道之寬度方向靠右之配置。 Preferably, the cross-sectional shape of the channel (the cross-sectional shape of the surface perpendicular to the flow direction of the fluid) is substantially rectangular (e.g., a rectangle having a large width direction and a small height direction). The aforementioned channels are parallel The shape in the plane of the substrate preferably includes a substantially square substantially rectangular shape, but is not limited thereto. For example, it is also possible to form a shape in which a fluid flows into the vicinity of the inlet (upstream side) where the passage flows in, and the vicinity of the outlet (downstream side) where the fluid flows out, or the vicinity of the inlet and the vicinity of the outlet is narrow. . That is, it is a shape in which "at least one end of the passage is thin and the center portion thereof is thick". Although the narrow region is formed by bending at least one of the side walls of the passage to the inside, the through electrode may be disposed at the meandering portion. The position where the inlet and the outlet are disposed is preferably the center in the width direction of the passage, but is not limited thereto. For example, the inlet may be disposed to the left in the width direction of the passage, and the outlet may be disposed to the right in the width direction of the passage.

(14)夾入前述中介層之前述第1及第2半導體元件可分別係2個以上。例如,亦可在前述中介層之表面或背面,於同一平面內配置複數個半導體元件。 (14) The first and second semiconductor elements sandwiching the interposer may be two or more. For example, a plurality of semiconductor elements may be disposed on the surface or the back surface of the interposer in the same plane.

亦能使用2個以上之前述中介層來將前述積層模組之構成作成包含多段之半導體元件之構成。例如,亦能構成為於前述第1半導體元件表面搭載前述中介層,於前述中介層表面搭載前述第2半導體元件,於前述第2半導體元件表面搭載追加之中介層,於前述追加之中介層表面搭載第3半導體元件。此情形下,亦可分別於前述中介層與前述追加之中介層形成前述通道,亦可僅於前述中介層或前述追加之中介層形成前述通道。 It is also possible to use the above-described interposer to form the above-described laminated module as a semiconductor element including a plurality of segments. For example, the interposer may be mounted on the surface of the first semiconductor element, the second semiconductor element may be mounted on the surface of the interposer, and an additional interposer may be mounted on the surface of the second semiconductor element on the surface of the additional interposer. The third semiconductor element is mounted. In this case, the passage may be formed in the interposer and the additional interposer, respectively, or the passage may be formed only in the interposer or the additional interposer.

(15)前述中介層,亦能使在前述通道之指定之第1區域之剖面積較在該通道之指定之第2區域之剖面積小。此情 形下,剖面積相對小之前述第1區域位於前述上游側,剖面積相對大之前述第2區域位於前述下游側。若以其他表現來說明,即前述第1區域位於接近前述通道之前述入口之位置,前述第2區域位於接近前述通道之前述出口之位置。更詳言之,前述第1區域位於較前述第2區域更靠上游側(接近前述通道之入口之側)之處。所謂前述剖面積,係前述通道在與前述流體之流動方向垂直之剖面之面積。 (15) The interposer may also have a cross-sectional area of the designated first region of the channel smaller than a cross-sectional area of the designated second region of the channel. This situation In the form, the first region having a relatively small cross-sectional area is located on the upstream side, and the second region having a relatively large cross-sectional area is located on the downstream side. In other embodiments, the first region is located near the inlet of the passage, and the second region is located near the outlet of the passage. More specifically, the first region is located on the upstream side (the side closer to the entrance of the aforementioned passage) than the second region. The cross-sectional area is the area of the cross section perpendicular to the flow direction of the fluid.

前述通道之前述第1區域係前述流體往前述通道流入之區域,前述第2區域係前述流體從前述通道流出之區域。此構成中,前述流體首先往剖面積小之前述第1區域流入,在從前述通道流出錢,被導往剖面積大之前述第2區域。其結果,於前述流體產生「斷熱膨脹」,產生吸熱作用。藉由此吸熱作用,由於在配置於前述中介層兩側之前述第1及第2半導體元件產生之熱,被前述流體吸收,因此能使前述第1及第2半導體元件之動作溫度降低。被前述流體吸收之熱藉由前述流體放出至外部。 The first region of the passage is a region in which the fluid flows into the passage, and the second region is a region in which the fluid flows out from the passage. In this configuration, the fluid first flows into the first region having a small cross-sectional area, and flows out from the passage to be guided to the second region having a large cross-sectional area. As a result, "heat-dissipation expansion" occurs in the fluid, and an endothermic effect is generated. By the endothermic action, the heat generated by the first and second semiconductor elements disposed on both sides of the interposer is absorbed by the fluid, so that the operating temperatures of the first and second semiconductor elements can be lowered. The heat absorbed by the aforementioned fluid is released to the outside by the aforementioned fluid.

製造技術上,雖最好係前述通道之高度(「頂部」與「底部」間之距離)為一定,但並不限定於此。例如,亦可在前述流體往前述通道流入之前述第1區域,前述通道之高度相對小,在前述流體從前述通道流出之前述第2區域,前述通道之高度相對大。為了使前述吸熱作用增大,最好係增大在前述第1區域之剖面積與在前述第2區域之剖面積之比。為了增大此剖面積之比,最好係使前述通道之寬度(前述通道之「兩側壁」間之距離)之比與前述高度之比兩者均增 大。 In terms of manufacturing technology, it is preferable that the height of the passage (the distance between the "top" and the "bottom") is constant, but it is not limited thereto. For example, the height of the passage may be relatively small in the first region in which the fluid flows into the passage, and the height of the passage may be relatively large in the second region in which the fluid flows out from the passage. In order to increase the heat absorbing action, it is preferable to increase the ratio of the cross-sectional area of the first region to the cross-sectional area of the second region. In order to increase the ratio of the cross-sectional area, it is preferable to increase the ratio of the width of the channel (the distance between the "two side walls" of the channel) to the height. Big.

於前述通道亦可無「頂部」。在無「頂部」之構成中,配置於前述中介層上側(與前述基板相反側)之前述第2半導體元件之下位表面發揮「頂部」之作用。於前述通道亦可無「底部」。在無「底部」之構成中,配置於前述中介層下側(前述基板之側)之前述第1半導體元件之上位表面發揮「底部」之作用。此等構成中,此等構成中,前述第2半導體元件之上位表面或前述第1半導體元件之下位表面係於前述通道之開口處加蓋。 There may be no "top" in the aforementioned passage. In the configuration without the "top", the lower surface of the second semiconductor element disposed on the upper side of the interposer (on the side opposite to the substrate) functions as a "top". There is also no "bottom" in the aforementioned passage. In the configuration without the "bottom", the upper surface of the first semiconductor element disposed on the lower side of the interposer (the side of the substrate) functions as a "bottom". In such a configuration, in the above configuration, the upper surface of the second semiconductor element or the lower surface of the first semiconductor element is capped at the opening of the channel.

(16)關於於前述流體引起「斷熱膨脹」之前述通道之平面形狀有多個選項。例如,(a)剖面積為一定且剖面積相對小之區域→剖面積增大之區域→剖面積為一定且剖面積相對大之區域,(b)無剖面積為一定之區域,於流體流動之方向剖面積依序(連續地)變大等。又,在從剖面積相對小之區域往剖面積相對大之區域變化時,雖此變化最好係急遽,但並不限定於此。進而,關於前述流體流入之位置與流出之位置亦不特別限制。 (16) There are a plurality of options regarding the planar shape of the aforementioned passage in which the fluid causes "breaking heat expansion". For example, (a) a region having a constant cross-sectional area and a relatively small cross-sectional area → a region where the cross-sectional area is increased → a region having a constant cross-sectional area and a relatively large cross-sectional area, and (b) a region having a non-sectional area being a certain area, in fluid flow The cross-sectional area of the direction is increased (continuously) in order. Further, when the area having a relatively small cross-sectional area changes to a region having a relatively large cross-sectional area, the change is preferably rapid, but is not limited thereto. Further, the position at which the fluid flows in and the position where the fluid flows out are also not particularly limited.

(17)前述通道之數目只要係1個以上即可。例如,亦可於前述通道內部配置2個前述通道,各個之剖面積變化之區域配置於相異之位置。更具體以一例而言,即在第1前述通道之剖面積變化之區域配置於前述中介層左下(從上部觀看中介層時),在第2前述通道之剖面積變化之區域配置於前述中介層右上。此種構成中,係使前述之剖面積變化之區域接近前述第1或第2半導體元件之消耗電力大之區 域(熱點)。 (17) The number of the aforementioned channels may be one or more. For example, two of the aforementioned passages may be disposed inside the passage, and the regions in which the cross-sectional areas vary may be disposed at different positions. More specifically, in an example, the region in which the cross-sectional area of the first passage is changed is disposed in the lower left side of the interposer (when the interposer is viewed from the upper portion), and is disposed in the interposer in a region where the cross-sectional area of the second passage is changed. Top right. In such a configuration, the area where the cross-sectional area is changed is close to the area where the power consumption of the first or second semiconductor element is large. Domain (hotspot).

在具有2個以上前述通道之上述構成之情形,亦能將該等通道之入口結合而作成1個。例如,亦可為對前述複數通道之前述流體之流入為1處,在前述中介層內部使前述流體分歧至前述之2個以上之通道之各個。 In the case of the above configuration having two or more of the above-described passages, one of the inlets of the passages can be combined to form one. For example, the inflow of the fluid to the plurality of channels may be one, and the fluid may be branched into each of the two or more channels in the interposer.

亦可於前述通道之前述頂部及前述底部分別配置前述熱反射層與前述熱放射層。又,亦可於前述通道之前述頂部或前述底部分別配置前述熱反射層或前述熱放射層。此等熱反射層與熱放射層亦可分別僅限定配置於前述頂部與前述底部之指定區域,亦可分別配置於前述頂部全面與前述底部全面。進而,於前述通道之前述側壁亦可選擇性地配置前述熱反射層或前述熱放射層。 The heat reflecting layer and the heat radiation layer may be disposed on the top portion and the bottom portion of the channel, respectively. Further, the heat reflecting layer or the heat radiation layer may be disposed on the top portion or the bottom portion of the passage. Each of the heat reflecting layer and the heat radiation layer may be disposed only in a predetermined region disposed on the top portion and the bottom portion, or may be disposed on the top portion and fully integrated with the bottom portion. Further, the heat reflecting layer or the heat radiation layer may be selectively disposed on the sidewall of the channel.

(18)關於從前述積層模組之訊號擷取方法(電氣配線)沒有任何限定。例如,有使用打線之構成(接合模組)或使用貫通電極之構成(貫通電極模組)。在使用貫通電極之構成中,藉由形成於前述中介層之貫通電極,配置於前述中介層兩側(上下)之前述第1及第2半導體元件相互電氣連接。進而,亦可於前述中介層之表面或背面,或者表面及背面兩者配置電子電路或電氣配線層,以使前述電氣連接容易。 (18) There is no limitation on the signal extraction method (electrical wiring) from the above-mentioned laminated module. For example, there is a configuration using a wire bonding (joining module) or a configuration using a through electrode (through electrode module). In the configuration using the through electrode, the first and second semiconductor elements disposed on both sides (upper and lower sides) of the interposer are electrically connected to each other by a through electrode formed on the interposer. Further, an electronic circuit or an electric wiring layer may be disposed on the front surface or the back surface of the interposer or on both the front and back surfaces to facilitate the electrical connection.

(19)前述積層模組中,夾入前述中介層之前述第1及第2半導體元件可分別係2個以上。例如,亦可在前述中介層之表面或背面,於同一平面內配置複數個半導體元件。亦能使用2個以上之前述中介層來形成由多段之半導體元件構成之積層模組。例如,亦能係於前述第1半導體元件表 面搭載前述中介層,於前述中介層表面搭載前述第2半導體元件,於前述第2半導體元件表面搭載追加之中介層,於該追加之中介層表面搭載第3半導體元件之構成。此構成中,亦可於各中介層配置前述通道,亦可僅於指定之中介層配置前述通道。 (19) In the multilayer module, the first and second semiconductor elements sandwiching the interposer may be two or more. For example, a plurality of semiconductor elements may be disposed on the surface or the back surface of the interposer in the same plane. It is also possible to form a laminated module composed of a plurality of semiconductor elements using two or more intermediate layers. For example, it can also be attached to the aforementioned first semiconductor element table. The interposer is mounted on the surface, and the second semiconductor element is mounted on the surface of the interposer, and an additional interposer is mounted on the surface of the second semiconductor element, and a third semiconductor element is mounted on the surface of the additional interposer. In this configuration, the channels may be disposed in each of the interposers, or the channels may be disposed only in the designated interposer.

前述積層模組中,通常係上述之接合模組或貫通電極模組,但在積層更多半導體元件之構成中,亦可混用使用接合之電氣連接與使用貫通電極之電氣連接。此種構成之一例,係「混載」接合模組與貫通電極模組之構成。 In the above-mentioned laminated module, the above-described bonding module or through-electrode module is usually used. However, in the configuration in which a plurality of semiconductor elements are laminated, electrical connection using bonding and electrical connection using through electrodes may be used in combination. An example of such a configuration is a configuration of a "mixed" bonding module and a through electrode module.

藉由本發明之積層模組及中介層,能得到(a)即使具有積層有消耗電力大之半導體元件之構成時,亦能抑制伴隨該等半導體元件發熱導致之溫度上升而穩定地動作,(b)能抑制所積層之半導體元件間之熱傳導而抑制該積層模組溫度上升之效果。 According to the laminated module and the interposer of the present invention, it is possible to obtain (a) a structure in which a semiconductor element having a large power consumption is laminated, and it is possible to suppress stable temperature rise due to heat generation of the semiconductor element (b) The effect of suppressing the heat conduction between the stacked semiconductor elements and suppressing the temperature rise of the laminated module can be suppressed.

以下,參照附圖說明本發明之積層模組(積層半導體元件)與中介層之較佳實施形態。 Hereinafter, preferred embodiments of the laminated module (layered semiconductor device) and the interposer of the present invention will be described with reference to the accompanying drawings.

(積層模組之構成例) (Configuration example of laminated module)

圖1A與圖1B顯示了積層模組之構成。 1A and 1B show the construction of a laminated module.

圖1A,係於以樹脂、陶瓷、半導體等構成之基板10上將第1半導體元件11a與第2半導體元件12a依此順序積疊,並藉由接合接合線(金屬細線)13來進行該等之電氣連接之構成例。以下,將具有此構成之積層模組稱為「接合模 組」。此處,位於下位之第1半導體元件11a與位於上位之第2半導體元件12a雖均為晶片狀,但不限定於晶片狀。第1半導體元件11a係以接著劑17等固定於基板10之表面(上面)。第2半導體元件12a係以接著劑17等固定於第1半導體元件11a之上面。此等半導體元件11a及12a與基板10間之電氣連接係使用接合線13進行。 1A, the first semiconductor element 11a and the second semiconductor element 12a are stacked in this order on a substrate 10 made of a resin, a ceramic, a semiconductor or the like, and the bonding wires (metal thin wires) 13 are bonded to each other. A configuration example of electrical connection. Hereinafter, the laminated module having this configuration is referred to as "joining mode group". Here, the first semiconductor element 11a located at the lower position and the second semiconductor element 12a located at the upper position are both wafer-shaped, but are not limited to the wafer shape. The first semiconductor element 11a is fixed to the surface (upper surface) of the substrate 10 with an adhesive 17 or the like. The second semiconductor element 12a is fixed to the upper surface of the first semiconductor element 11a by an adhesive 17 or the like. The electrical connection between the semiconductor elements 11a and 12a and the substrate 10 is performed using the bonding wires 13.

圖1B之構成例中,雖與圖1A之接合模組同樣地,於基板10上將第1半導體元件11b與第2半導體元件12b依此順序積疊,但電氣連接法與其相異。亦即,第1半導體元件11b之表面與背面藉由將該元件11b在其厚度方向貫通之貫通電極14電氣相互連接,基板10與第1半導體元件11b間之電氣連接(及機械連接)、以及第1半導體元件11b與第2半導體元件12b間之電氣連接(及機械連接)均使用導電性球體15進行。如此,基板10與第1半導體元件11b與第2半導體元件12b係相互電氣連接,且相互機械連接(固定)。於基板10與第1半導體元件11b之間、第1半導體元件11b與第2半導體元件12b之間之間隙,分別充填有填料16。此係為了使使用球體15之基板10與元件11b及12b間之機械連接強度增大。以下,將具有圖1B構成之積層模組稱為「貫通電極模組」。 In the configuration example of FIG. 1B, the first semiconductor element 11b and the second semiconductor element 12b are sequentially stacked on the substrate 10 in the same manner as the bonding module of FIG. 1A, but the electrical connection method is different. In other words, the front surface and the back surface of the first semiconductor element 11b are electrically connected to each other through the through electrode 14 penetrating the element 11b in the thickness direction thereof, and electrical connection (and mechanical connection) between the substrate 10 and the first semiconductor element 11b, and The electrical connection (and mechanical connection) between the first semiconductor element 11b and the second semiconductor element 12b is performed using the conductive sphere 15. In this manner, the substrate 10 and the first semiconductor element 11b and the second semiconductor element 12b are electrically connected to each other and mechanically connected (fixed) to each other. A filler 16 is filled between the substrate 10 and the first semiconductor element 11b and between the first semiconductor element 11b and the second semiconductor element 12b. This is to increase the mechanical connection strength between the substrate 10 using the sphere 15 and the elements 11b and 12b. Hereinafter, the laminated module having the configuration of FIG. 1B will be referred to as a "through electrode module".

圖1A之接合模組與圖1B之積層模組分別有其優缺。亦即,接合模組由於係單純將兩個半導體元件11a及12a積層於基板10上,並僅以接合線13進行該等之電氣配線,因此不需要新的技術開發。不過,必須滿足第1半導體元 件11a較第2半導體元件12a大、能確實從高度不同之位置進行打線等之條件。亦有以此手法將3個以上之半導體元件積層而作成3層以上之接合模組。此外,在此構成例使冷卻用流體(冷媒)流動於半導體元件11a及11b周圍時,需以某些形式施加接合線13之保護以避免接合線13被切斷。 The joint module of FIG. 1A and the laminated module of FIG. 1B respectively have advantages and disadvantages. That is, since the bonding module simply laminates the two semiconductor elements 11a and 12a on the substrate 10 and performs the electric wiring only by the bonding wires 13, no new technical development is required. However, the first semiconductor element must be met. The member 11a is larger than the second semiconductor element 12a, and can be surely subjected to conditions such as wire bonding from a position different in height. In this way, three or more semiconductor elements are laminated to form a bonding module of three or more layers. Further, in this configuration, when the cooling fluid (refrigerant) flows around the semiconductor elements 11a and 11b, the protection of the bonding wires 13 is applied in some form to prevent the bonding wires 13 from being cut.

圖1B之積層模組,需有將貫通電極14埋入下位之第1半導體元件11b之技術、穩定進行多數個導電性球體15之搭載/熔融/再凝固之製造技術、進而使填料16流入於基板10與第1半導體元件11b間、第1半導體元件11b與第2半導體元件12b間之狹窄間隙之技術等。此構成中,由於配線相關之所有區域均位於半導體晶片11b及12b內部或以填料16覆蓋,因此即使使上述之冷卻用流體流動於周圍,亦少有此積層模組被破壞之可能性。 In the multilayer module of FIG. 1B, a technique of embedding the through electrode 14 in the lower first semiconductor element 11b, a technique for stably mounting/melting/resolidifying a plurality of conductive balls 15, and a filling of the filler 16 are required. A technique of narrowing a gap between the substrate 10 and the first semiconductor element 11b and between the first semiconductor element 11b and the second semiconductor element 12b. In this configuration, since all the regions related to the wiring are located inside the semiconductor wafers 11b and 12b or covered with the filler 16, even if the above-described cooling fluid flows around, there is little possibility that the laminated module is broken.

(使用附有通道之中介層之接合模組之構成例) (Example of a configuration of a bonding module using an interposer with a channel)

圖2A係顯示於圖1A之接合模組搭載了附有通道之中介層20之構成例(積層模組)之剖面圖,圖2B係沿其A-A線之中介層20之剖面圖。 2A is a cross-sectional view showing a configuration example (layered module) in which the interposer 20 with a via is mounted on the bonding module of FIG. 1A, and FIG. 2B is a cross-sectional view of the interposer 20 along the line A-A.

如圖2A所示,在此構成例中,附有通道之中介層20配置於配置在基板10表面(上面)之第1半導體元件11a表面(上面),於該中介層20表面(上面)配置有第2半導體元件12a。換言之,於中介層20上下分別配置有第2半導體元件12a與第1半導體元件11a,成為兩元件12a及11a夾中介層20之構造。 As shown in FIG. 2A, in this configuration example, the interposer 20 having the vias is disposed on the surface (upper surface) of the first semiconductor element 11a disposed on the surface (upper surface) of the substrate 10, and is disposed on the surface (upper surface) of the interposer 20 There is a second semiconductor element 12a. In other words, the second semiconductor element 12a and the first semiconductor element 11a are disposed above and below the interposer 20, and the interposer 20 is sandwiched between the two elements 12a and 11a.

第1半導體元件11a係以接著劑17等固定於基板10 之表面(上面)。中介層20係以接著劑17等固定於第1半導體元件11a之表面(上面)。第2半導體元件12a係以接著劑17等固定於中介層20之上面。接著劑17最好係熱傳導率大之材料(例如混練有金屬填料之樹脂),但並不限定於此。 The first semiconductor element 11a is fixed to the substrate 10 with an adhesive 17 or the like. The surface (above). The interposer 20 is fixed to the surface (upper surface) of the first semiconductor element 11a with an adhesive 17 or the like. The second semiconductor element 12a is fixed to the upper surface of the interposer 20 by an adhesive 17 or the like. The subsequent agent 17 is preferably a material having a large thermal conductivity (for example, a resin in which a metal filler is kneaded), but is not limited thereto.

第1半導體元件11a較基板10小。中介層20較第1半導體元件11b小。第2半導體元件12a較中介層20小。此等半導體元件11a及12a與基板10間之電氣連接係使用接合線13進行。 The first semiconductor element 11a is smaller than the substrate 10. The interposer 20 is smaller than the first semiconductor element 11b. The second semiconductor element 12a is smaller than the interposer 20. The electrical connection between the semiconductor elements 11a and 12a and the substrate 10 is performed using the bonding wires 13.

形成於中介層20內部之通道21係以上壁23與下壁24與左右兩側之側壁22支撐。換言之,通道21係以上壁23與下壁24與側壁22區劃。通道21之前端部(上游側端部)與後端部(下游側端部)係開口,因此不存在通道21之前壁與後壁。於通道21中,冷卻用之流體(冷煤)於圖2B之箭頭25所示之方向,在圖2A為與紙面垂直之方向(從前方往深處,從前端部往後端部)流動。在此構成中,在第1及第2半導體元件11a及12a產生之熱被流動於通道21之流體吸收,而往該積層模組外部排出。此種流體之流動如後述能藉由泵或壓縮機與配管等(均未圖示)來容易地實現。 The passage 21 formed inside the interposer 20 is supported by the upper wall 23 and the lower wall 24 and the left and right side walls 22. In other words, the passage 21 is divided by the upper wall 23 and the lower wall 24 and the side wall 22. The front end portion (upstream side end portion) and the rear end portion (downstream side end portion) of the passage 21 are opened, so that the front wall and the rear wall of the passage 21 are not present. In the passage 21, the fluid for cooling (cold coal) flows in the direction indicated by the arrow 25 in Fig. 2B, and in Fig. 2A, the direction perpendicular to the plane of the paper (from the front to the deep, from the front end portion to the rear end portion) flows. In this configuration, heat generated in the first and second semiconductor elements 11a and 12a is absorbed by the fluid flowing through the channel 21, and is discharged to the outside of the laminated module. The flow of such a fluid can be easily realized by a pump, a compressor, a pipe, or the like (none of which is shown) as will be described later.

冷卻用之前述流體亦稱為「冷媒」,具有能從發熱物體吸收熱並往外部移送之特性。作為前述流體,例如使用(1)氟氯碳化物類/無氟氯碳化物類(多使用此,種類多);(2)丁烷、異丁烷等有機化合物;(3)氫、氦、氨、水、二氧化氫等無機化合物。 The fluid for cooling is also referred to as "refrigerant" and has the property of being able to absorb heat from a heat generating object and transport it to the outside. As the fluid, for example, (1) chlorofluorocarbons/chlorofluorocarbons (multiple uses, many types); (2) organic compounds such as butane and isobutane; (3) hydrogen, helium, An inorganic compound such as ammonia, water or hydrogen dioxide.

此外,通道21只要至少以兩側之側壁22支撐即足夠, 上壁23與下壁24之至少一方亦可省略。 In addition, it is sufficient that the passage 21 is supported by at least the side walls 22 on both sides. At least one of the upper wall 23 and the lower wall 24 may be omitted.

通道21之上壁23與下壁24雖最好係以熱傳導率大之材料形成,但不一定限於此。又,上壁23與下壁24以單結晶矽構成,於上壁23與下壁24之外面(亦即,上壁23之下面與上面,下壁24之上面與下面)配置由電子零件或電晶體等構成之電子電路或電氣配線層亦可。當於通道21露出之面(亦即,上壁23之下面與下壁24之上面)形成有電子電路或電氣配線層時,最好係藉由於此等之面之最表層配置絕緣層(未圖示),以防止該電子電路或電氣配線層之冷卻用流體導致之侵蝕或污染,以保護該電子電路或電氣配線層。 The upper wall 23 and the lower wall 24 of the passage 21 are preferably formed of a material having a large thermal conductivity, but are not necessarily limited thereto. Further, the upper wall 23 and the lower wall 24 are formed of a single crystal cymbal, and the outer surface of the upper wall 23 and the lower wall 24 (that is, the lower surface and the upper surface of the upper wall 23, the upper surface and the lower surface of the lower wall 24) are disposed by electronic components or An electronic circuit or an electric wiring layer composed of a transistor or the like may also be used. When an electronic circuit or an electric wiring layer is formed on the surface on which the channel 21 is exposed (that is, the lower surface of the upper wall 23 and the upper surface of the lower wall 24), it is preferable to dispose the insulating layer by the outermost layer of the surface (not (Illustration) to protect the electronic circuit or the wiring layer from corrosion or contamination caused by the cooling fluid of the electronic circuit or the electrical wiring layer.

(使用附有通道之中介層之貫通電極模組之構成例) (Example of a configuration of a through electrode module using an interposer with a channel)

圖3A係顯示於圖1B之貫通電極模組搭載了附有通道之中介層30之構成例(積層模組)之剖面圖,圖3B係沿其B-B線之中介層30之剖面圖。 Fig. 3A is a cross-sectional view showing a configuration example (stacking module) in which the interposer 30 with a via is mounted on the through electrode module of Fig. 1B, and Fig. 3B is a cross-sectional view of the interposer 30 along the line B-B.

如圖3A所示,在此構成例中,附有通道之中介層30配置於配置在基板10表面(上面)之第1半導體元件11b表面(上面),於該中介層30表面(上面)配置有第2半導體元件12b。換言之,於中介層30上下分別配置有第2半導體元件12b與第1半導體元件11b,成為兩元件12b及11b夾中介層30之構造。 As shown in FIG. 3A, in this configuration example, the interposer 30 having the vias is disposed on the surface (upper surface) of the first semiconductor element 11b disposed on the surface (upper surface) of the substrate 10, and is disposed on the surface (upper surface) of the interposer 30. There is a second semiconductor element 12b. In other words, the second semiconductor element 12b and the first semiconductor element 11b are disposed above and below the interposer 30, and the interposer 30 is sandwiched between the two elements 12b and 11b.

於中介層30之左右側壁32埋入有在厚度方向貫通其之貫通電極36。此等貫通電極36係透過導電性球體37與第2半導體元件12b之電子電路電氣連接(及機械連接), 又,透過導電性球體38與第1半導體元件11b之電子電路電氣連接(及機械連接)。亦即,第1半導體元件11b與第2半導體元件12b之電子電路係使用貫通電極36相互電氣連接,且相互機械連接(固定)。如此,基板10與第1半導體元件11b與第2半導體元件12b係相互電氣連接,且相互機械連接(固定)。此外,基板10與第1半導體元件11b間之電氣連接及機械連接與圖1B之情形同樣地係使用導電性球體15進行。 A through electrode 36 penetrating in the thickness direction is embedded in the left and right side walls 32 of the interposer 30. The through electrodes 36 are electrically connected (and mechanically connected) to the electronic circuit of the second semiconductor element 12b through the conductive balls 37, Further, the conductive ball 38 is electrically connected (and mechanically connected) to the electronic circuit of the first semiconductor element 11b. In other words, the electronic circuits of the first semiconductor element 11b and the second semiconductor element 12b are electrically connected to each other using the through electrodes 36, and are mechanically connected (fixed) to each other. In this manner, the substrate 10 and the first semiconductor element 11b and the second semiconductor element 12b are electrically connected to each other and mechanically connected (fixed) to each other. Further, electrical connection and mechanical connection between the substrate 10 and the first semiconductor element 11b are performed using the conductive balls 15 as in the case of FIG. 1B.

於基板10與第1半導體元件11b之間、第1半導體元件11b與第2半導體元件12b之間、中介層30與第2半導體元件12b之間之間隙,分別充填有填料16。此係為了使使用球體15、37及38之基板10與中介層30與元件11b及12b間之機械連接強度增大。 A filler 16 is filled between the substrate 10 and the first semiconductor element 11b, between the first semiconductor element 11b and the second semiconductor element 12b, and between the interposer 30 and the second semiconductor element 12b. This is to increase the mechanical connection strength between the substrate 10 using the balls 15, 37 and 38 and the interposer 30 and the elements 11b and 12b.

中介層30之貫通電極36亦可不形成於上壁33及下壁34,而僅形成於左右之側壁32。換言之,配置於半導體元件11b及12b之電氣連接點(相當於接合墊)必須配置於中介層30之與左右任一方之側壁32對向之部分。 The through electrode 36 of the interposer 30 may not be formed on the upper wall 33 and the lower wall 34, but may be formed only on the left and right side walls 32. In other words, the electrical connection points (corresponding to the bonding pads) disposed on the semiconductor elements 11b and 12b must be disposed at portions of the interposer 30 that face the left and right side walls 32.

與接合模組之構成例不同地,第1半導體元件11b與中介層30與第2半導體元件12b為大致相同大小,且均較基板10小。此處,構成積層模組40之第1半導體元件11b與中介層30與第2半導體元件12b之大小(面積)雖均為相等,但並不限定於此。例如,亦可中介層30較第1半導體元件11b小,且第2半導體元件12b較中介層30小。 Unlike the configuration example of the bonding module, the first semiconductor element 11b and the interposer 30 and the second semiconductor element 12b have substantially the same size and are smaller than the substrate 10. Here, the size (area) of the first semiconductor element 11b and the interposer 30 and the second semiconductor element 12b constituting the laminated module 40 are all equal, but are not limited thereto. For example, the interposer 30 may be smaller than the first semiconductor element 11b, and the second semiconductor element 12b may be smaller than the interposer 30.

形成於中介層30內部之通道31係以上壁33與下壁34 與左右兩側之側壁32支撐。換言之,通道31係以上壁33與下壁34與側壁32區劃。通道31之前端部(上游側端部)與後端部(下游側端部)係開口,因此不存在通道31之前壁與後壁。於通道31中,冷卻用之流體(冷煤)於圖3B之箭頭35所示之方向,在圖3A為與紙面垂直之方向(從前方往深處,從前端部往後端部)流動。在此構成中,在第1及第2半導體元件11b及12b產生之熱被流動於通道31之流體吸收,而往該積層模組外部排出。此種流體之流動能藉由泵或壓縮機與配管等(均未圖示)來容易地實現。作為流體,能使用在使用附有通道之中介層之接合模組之構成例所述者。 The passage 31 formed inside the interposer 30 is the upper wall 33 and the lower wall 34 Supported by the side walls 32 of the left and right sides. In other words, the passage 31 is divided by the upper wall 33 and the lower wall 34 and the side wall 32. The front end portion (upstream side end portion) and the rear end portion (downstream side end portion) of the passage 31 are opened, so that the front wall and the rear wall of the passage 31 are not present. In the passage 31, the fluid for cooling (cold coal) flows in the direction indicated by the arrow 35 in Fig. 3B, and flows in a direction perpendicular to the plane of the paper (from the front to the deep, from the front end portion to the rear end portion) in Fig. 3A. In this configuration, heat generated in the first and second semiconductor elements 11b and 12b is absorbed by the fluid flowing through the channel 31, and is discharged to the outside of the laminated module. The flow of such a fluid can be easily realized by a pump, a compressor, a pipe, or the like (none of which is shown). As the fluid, it can be used as a configuration example of a joint module using an interposer having a passage.

此外,通道31只要至少以兩側之側壁32支撐即足夠,上壁33與下壁34之至少一方亦可省略。 Further, it is sufficient that the passage 31 is supported by at least the side walls 32 on both sides, and at least one of the upper wall 33 and the lower wall 34 may be omitted.

通道31之上壁33與下壁34雖最好係以熱傳導率大之材料形成,但不一定限於此。又,上壁33與下壁34以單結晶矽構成,於上壁33與下壁34之外面(亦即,上壁33之下面與上面,下壁34之上面與下面)配置由電子零件或電晶體等構成之電子電路或電氣配線層亦可。當於通道31露出之面(亦即,上壁33之下面與下壁34之上面)形成有電子電路或電氣配線層時,最好係藉由於此等之面之最表層配置絕緣層(未圖示),以防止該電子電路或電氣配線層之冷卻用流體導致之侵蝕或污染,以保護該電子電路或電氣配線層。 The upper wall 33 and the lower wall 34 of the passage 31 are preferably formed of a material having a large thermal conductivity, but are not necessarily limited thereto. Further, the upper wall 33 and the lower wall 34 are formed of a single crystal cymbal, and the outer surfaces of the upper wall 33 and the lower wall 34 (that is, the lower surface and the upper surface of the upper wall 33, the upper surface and the lower surface of the lower wall 34) are disposed by electronic parts or An electronic circuit or an electric wiring layer composed of a transistor or the like may also be used. When an electronic circuit or an electrical wiring layer is formed on the exposed surface of the channel 31 (i.e., the lower surface of the upper wall 33 and the upper surface of the lower wall 34), it is preferable to arrange the insulating layer by the outermost layer of the surface (not (Illustration) to protect the electronic circuit or the wiring layer from corrosion or contamination caused by the cooling fluid of the electronic circuit or the electrical wiring layer.

充填於基板10與第1半導體元件11b與中介層30與 第2半導體元件12b間之間隙之填料16雖最好係熱傳導率大之材料(例如混練有金屬填料之樹脂),但並不限定此。 Filled in the substrate 10 and the first semiconductor element 11b and the interposer 30 The filler 16 having a gap between the second semiconductor elements 12b is preferably a material having a large thermal conductivity (for example, a resin in which a metal filler is kneaded), but is not limited thereto.

(冷卻使用附有通道之中介層之貫通電極模組之構成例) (Example of a configuration of a through electrode module using an interposer with a channel)

圖4A係使用流體冷卻顯示於圖3B之貫通電極模組(具有附有通道30之中介層)40時之構成例(構裝構造)之剖面圖,圖4B係沿其C-C線之剖面圖。 4A is a cross-sectional view showing a configuration example (construction structure) of the through electrode module (having an interposer having the channel 30) shown in FIG. 3B, and FIG. 4B is a cross-sectional view taken along line C-C thereof.

如上所述,積層模組40係以配置於基板10表面之第1半導體元件11b、配置於第1半導體元件11b表面之中介層30、配置於中介層30表面之第2半導體元件12b為主要構成要素,於中介層30內部形成有通道31。 As described above, the build-up module 40 is mainly composed of the first semiconductor element 11b disposed on the surface of the substrate 10, the interposer 30 disposed on the surface of the first semiconductor element 11b, and the second semiconductor element 12b disposed on the surface of the interposer 30. The element 31 is formed inside the interposer 30.

於基板10上緊貼固定有包覆積層模組40整體之罩體42,於基板10與罩體42間形成有內部空間50。於罩體42設有用以將冷卻用流體L導入內部空間50之入口43與用以從內部空間50排出該流體L之出口44。於罩體42下端形成有腳部45,於基板10表面之與腳部45對應處形成有安裝部46,罩體42藉由使腳部45緊貼/固定於安裝部46而固定於基板10。 A cover 42 covering the entire laminated module 40 is attached to the substrate 10, and an internal space 50 is formed between the substrate 10 and the cover 42. The cover 42 is provided with an inlet 43 for introducing the cooling fluid L into the internal space 50 and an outlet 44 for discharging the fluid L from the internal space 50. A leg portion 45 is formed at a lower end of the cover 42 , and a mounting portion 46 is formed on the surface of the substrate 10 corresponding to the leg portion 45 . The cover 42 is fixed to the substrate 10 by attaching/fixing the leg portion 45 to the mounting portion 46 . .

流體L藉由設於罩體42外部之泵P(或壓縮機)而從入口43沿箭頭47a所示方向流入內部空間50,從出口44沿箭頭47b所示方向流出,返回至泵P。此外,T1係連結入口43與泵P間之配管,T2係連結出口44與泵P間之配管。 The fluid L flows into the internal space 50 from the inlet 43 in the direction indicated by the arrow 47a by the pump P (or compressor) provided outside the cover 42, and flows out from the outlet 44 in the direction indicated by the arrow 47b, and returns to the pump P. Further, T1 is a pipe connecting the inlet 43 and the pump P, and T2 is a pipe connecting the outlet 44 and the pump P.

通過入口43導入內部空間50之流體L,沿著箭頭48所示之路徑在中介層30之通道31從其上游側端部通過至 下游側端部,而可期待於其間吸收在第1半導體元件11b與第2半導體元件12b產生之熱。然而,在內部空間50中,除了此種被期待之流體L之流動以外,亦會產生沿著積層模組40周圍之箭頭49所示之非期待之流體L流動。若考量相較於通道31之剖面積(特別是通道31之高度)較小(例如數百微米程度),積層模組40與罩體42間之間隙(剖面積)則遠較其大(例如數百毫米程度),則沿箭頭48之流動流量較少,沿箭頭49之流動流量較大。若於流量之間有此種大小關係,則有很大可能性無法得到透過流動於通道31之流體L之所欲吸熱效果。因此,為了對積層模組40確實地得到所欲之冷卻效果,則僅將覆蓋積層模組40整體之罩體42安裝於基板10上之構成(參照圖4A及圖4B)則非充分,仍需採取某些對策。 The fluid L introduced into the internal space 50 through the inlet 43 passes along the path indicated by the arrow 48 at the passage 31 of the interposer 30 from its upstream side end to The downstream end portion is expected to absorb heat generated in the first semiconductor element 11b and the second semiconductor element 12b therebetween. However, in the internal space 50, in addition to the flow of the expected fluid L, undesired flow of fluid L along the arrow 49 around the laminated module 40 occurs. If the cross-sectional area of the channel 31 (especially the height of the channel 31) is small (for example, several hundred micrometers), the gap (sectional area) between the laminated module 40 and the cover 42 is much larger (for example) At a level of hundreds of millimeters, the flow rate along arrow 48 is less and the flow rate along arrow 49 is greater. If there is such a size relationship between the flows, there is a high possibility that the desired heat absorption effect through the fluid L flowing through the passage 31 cannot be obtained. Therefore, in order to reliably obtain the desired cooling effect on the build-up module 40, it is not sufficient to mount the cover 42 covering the entire laminated module 40 on the substrate 10 (see FIGS. 4A and 4B). Some countermeasures need to be taken.

(於冷卻貫通電極模組之構成例附加有堰部之構裝構造之第1例) (First example of a structure in which a crotch portion is attached to a configuration example of a cooling through electrode module)

圖5A及圖5B與圖6係顯示於圖4A及圖4B之構裝構造附加了堰部之積層模組之構裝構造之第1例。圖5A係此構裝構造沿冷卻用流體L之流動方向之縱剖面圖,圖5B係沿圖5A之C-C線之剖面圖。圖6係顯示將此構裝構造之罩體42從基板10卸除後之狀態之立體圖。 5A, FIG. 5B and FIG. 6 show a first example of the structure of the laminated module in which the structure of the structure is added to the structure of FIGS. 4A and 4B. Fig. 5A is a longitudinal sectional view of the structure of the structure along the flow direction of the cooling fluid L, and Fig. 5B is a cross-sectional view taken along line C-C of Fig. 5A. Fig. 6 is a perspective view showing a state in which the cover 42 of the structure is removed from the substrate 10.

此積層模組之構裝構造之第1例,係在圖4A及圖4B所示之構成例(使用貫通電極模組)中,於積層模組40與罩體42之間設有將內部空間50分隔成上游側空間與下游側空間之堰部51。圖5A及圖5B中,與圖4A及圖4B所示之 構成要素相同之符號顯示相同之構成要素。 In the first example of the structure of the laminated module, in the configuration example (using the through electrode module) shown in FIGS. 4A and 4B, the internal space is provided between the laminated module 40 and the cover 42. 50 is divided into a crotch portion 51 of the upstream side space and the downstream side space. 5A and 5B, and FIG. 4A and FIG. 4B Symbols with the same constituent elements show the same constituent elements.

堰部51之整體形狀為大致倒U字形,藉由在罩體42內側帶狀覆蓋積層模組40之外側,而遮斷通過積層模組40周圍之路徑。換言之,堰部51係將內部空間50分隔成入口43側之上游側空間與出口44側之下游側空間之兩個空間。如此,防止箭頭49所示之通過積層模組40周圍之非期望之流體L之流動產生。 The overall shape of the crotch portion 51 is substantially inverted U-shaped, and the path around the laminated module 40 is blocked by covering the outer side of the laminated module 40 in a strip shape inside the cover 42. In other words, the crotch portion 51 divides the internal space 50 into two spaces of the upstream side space on the inlet 43 side and the downstream side space on the outlet 44 side. Thus, the flow of the undesired fluid L around the build-up module 40 as indicated by the arrow 49 is prevented from occurring.

由於設有堰部51,因此內部空間50之上游側空間與下游側空間僅以中介層30之通道31相互連結,因此,從入口43流入上游側空間之流體L全部沿箭頭48所示路徑通過通道31,到達下游側空間。其後,從出口44排出。因此,能實現有效率之吸熱效果,確實地得到對積層模組40之所欲冷卻效果。 Since the crotch portion 51 is provided, the upstream side space and the downstream side space of the internal space 50 are connected to each other only by the passage 31 of the interposer 30, and therefore, the fluid L flowing from the inlet 43 into the upstream side space passes through the path indicated by the arrow 48. The passage 31 reaches the downstream side space. Thereafter, it is discharged from the outlet 44. Therefore, an efficient endothermic effect can be achieved, and the desired cooling effect on the laminated module 40 can be surely obtained.

關於配置堰部51之位置與堰部51之厚度(沿流體L之流動方向之長度),除了不阻塞通道31之入口(上游側端部)與出口(下游側端部)這點以外,並無特別之限制。 Regarding the position of the crotch portion 51 and the thickness of the crotch portion 51 (the length in the flow direction of the fluid L), except that the inlet (upstream side end portion) and the outlet (downstream side end portion) of the passage 31 are not blocked, There are no special restrictions.

(於冷卻貫通電極模組之構成例附加有堰部之構裝構造之第2例) (Second example of a structure in which a crotch portion is attached to a configuration example of the cooling through electrode module)

圖7A及圖7B與圖8A及圖8B係顯示於圖4A及圖4B之構裝構造附加了堰部之積層模組之構裝構造之第2例之製造方法。圖7A及圖7B係顯示此製造方法之立體圖,圖8A及圖8B係其剖面圖。圖8A及圖8B中,該構裝構造之縱剖面描繪於上位,橫剖面描繪於下位。 FIGS. 7A and 7B and FIGS. 8A and 8B show a manufacturing method of a second example of the structure of the laminated module in which the structure of the structure is added to the structure of FIGS. 4A and 4B. 7A and 7B are perspective views showing the manufacturing method, and Figs. 8A and 8B are cross-sectional views thereof. In FIGS. 8A and 8B, the longitudinal section of the structure is depicted in the upper position, and the cross section is depicted in the lower position.

此積層模組之構裝構造之第2例如圖8B(d1)及(d2)所 示,上述之第1例之罩體42係由兩個罩半體42a與42b構成,且該等罩半體42a與42b隔開既定之間隙G固定於基板10上。堰部51雖與第1例同樣地,為大致倒U字形,帶狀覆蓋積層模組40外側,但由於配置於罩半體42a與42b間之間隙G,因此堰部51之外周面係從罩體42(罩半體42a與42b)露出至外部。除此以外之構成係與第1例相同。 The second structure of the laminated module is as shown in Fig. 8B (d1) and (d2), for example. The cover 42 of the first example described above is composed of two cover halves 42a and 42b, and the cover halves 42a and 42b are fixed to the substrate 10 with a predetermined gap G therebetween. Similarly to the first example, the crotch portion 51 has a substantially inverted U shape and covers the outer side of the laminated module 40 in a strip shape. However, since the gap portion G is disposed between the cover half bodies 42a and 42b, the outer peripheral surface of the crotch portion 51 is The cover 42 (the cover halves 42a and 42b) is exposed to the outside. The other configurations are the same as in the first example.

如上述,堰部51亦可從罩體42露出至外部,堰部51整體亦可不配置於罩體42內部。 As described above, the crotch portion 51 may be exposed to the outside from the cover 42 , and the entire crotch portion 51 may not be disposed inside the cover 42 .

其次,說明此構裝構造之第2例之製造方法。 Next, a method of manufacturing the second example of the structure will be described.

首先,如圖7A(a)與圖8A(a1)及(a2)所示,積層模組40搭載於基板10表面。積層模組40之構成由於與圖3A及圖3B所示之貫通電極40(具有附有通道之中介層30)相同,因此其說明省略。此外,此處雖構成積層模組40之第1半導體元件11b與中介層30與第2半導體元件12b之大小(面積)均相等,但本發明並不限定於此,亦可為互異。例如中介層30較第1半導體元件11b小,第2半導體元件12b較中介層30小。 First, as shown in FIG. 7A (a) and FIGS. 8A (a1) and (a2), the build-up module 40 is mounted on the surface of the substrate 10. The configuration of the build-up module 40 is the same as that of the through electrode 40 (having the interposer 30 with the via) shown in FIGS. 3A and 3B, and thus the description thereof is omitted. In addition, although the size (area) of the first semiconductor element 11b and the interposer 30 and the second semiconductor element 12b constituting the laminated module 40 are equal, the present invention is not limited thereto, and may be different from each other. For example, the interposer 30 is smaller than the first semiconductor element 11b, and the second semiconductor element 12b is smaller than the interposer 30.

其次,如圖7A(b)與圖8A(b1)及(b2)所示,在基板10表面,於積層模組40之下端之周邊區域塗布有接著劑,接著層55形成於基板10上。使用於接著層55之接著劑例如係環氧樹脂,其黏度為在塗布後亦能維持其形狀(亦即,流動而厚度不變薄)之程度之值。 Next, as shown in FIG. 7A(b) and FIGS. 8A(b1) and (b2), an adhesive is applied to the peripheral region of the lower end of the build-up module 40 on the surface of the substrate 10, and then a layer 55 is formed on the substrate 10. The adhesive used for the adhesive layer 55 is, for example, an epoxy resin whose viscosity is such a value as to maintain its shape after application (i.e., flow without thickness).

其次,如圖7B(c)與圖8B(c1)及(c2)所示,罩半體42a與罩半體42b配置於基板10表面。罩半體42a與42b係將 圖6之罩體42二分割之形狀,於該等分別設有入口43與出口44。在罩半體42a與42b配置於基板10表面之狀態下,於罩半體42a與42b間形成有間隙G。間隙G之大小(間隔)通常雖為數毫米(mm),但並不限定於此。 Next, as shown in FIG. 7B(c) and FIGS. 8B(c1) and (c2), the cover half 42a and the cover half 42b are disposed on the surface of the substrate 10. The cover halves 42a and 42b will The shape of the cover 42 of Fig. 6 is divided into two, and an inlet 43 and an outlet 44 are respectively provided. In a state in which the cover halves 42a and 42b are disposed on the surface of the substrate 10, a gap G is formed between the cover halves 42a and 42b. The size (interval) of the gap G is usually several millimeters (mm), but is not limited thereto.

分別設於罩半體42a與42b之腳部45與分別設於基板10表面之對應腳部45之位置之安裝部46係使用接著劑互相接合。此接著亦能使用接著劑以外者。能利用周知之手法,例如焊接(罩半體42a與42b與安裝部46表面均為金屬之情形)、靜電接合(罩半體42a與42b為金屬,安裝部46表面為玻璃之情形),在分子間之直接接合(罩半體42a與42b與安裝部46表面均為矽結晶之情形)等。 The mounting portions 46 provided at the positions of the leg portions 45 of the cover half bodies 42a and 42b and the respective leg portions 45 provided on the surface of the substrate 10 are bonded to each other using an adhesive. This can be followed by the use of an adhesive. It is possible to use a well-known technique such as soldering (when the cover halves 42a and 42b and the surface of the mounting portion 46 are both metal), and electrostatic bonding (the cover halves 42a and 42b are made of metal, and the surface of the mounting portion 46 is glass), The direct bonding between the molecules (the case where the cover halves 42a and 42b and the surface of the mounting portion 46 are both enamel crystals) and the like.

罩半體42a與42b與腳部45雖最好係與接著層55之端部重疊,但並不限於此。在重疊之情形,藉由將腳部45按壓於基板10表面,接著層55之與腳部45重疊之端部係變形。 The cover half bodies 42a, 42b and the leg portions 45 preferably overlap the end portions of the adhesive layer 55, but are not limited thereto. In the case of overlap, the leg portion 45 is pressed against the surface of the substrate 10, and then the end portion of the layer 55 overlapping the leg portion 45 is deformed.

接著,使接著層55之接著劑與腳部45與安裝部46間之接著劑固化,確保在其後之程序之機械強度。在腳部45與安裝部46係以接著劑以外之材料或手法結合時,只要僅使接著層55之接著劑固化即可。 Next, the adhesive between the adhesive layer 55 and the adhesive between the leg portion 45 and the mounting portion 46 is cured to secure the mechanical strength of the subsequent process. When the leg portion 45 and the attachment portion 46 are joined by a material other than the adhesive or a method, only the adhesive of the adhesive layer 55 may be cured.

其次,如圖7B(d)與圖8B(d1)及(d2)所示,從罩半體42a及42b間之間隙G流入樹脂56,於貫通電極模組40之外周面形成大致倒U字形之堰部51。作為樹脂56能使用環氧樹脂等。於罩半體42a及42b與積層模組40間之間隙能利用樹脂56之流動性,被樹脂56完全充填。藉由適當選擇樹 脂56之黏度,能使樹脂56僅留於間隙G之周邊區域而不阻塞中介層30之通道31之入口與出口。 Next, as shown in Fig. 7B(d) and Figs. 8B(d1) and (d2), the resin G is flowed from the gap G between the cover halves 42a and 42b, and the outer peripheral surface of the through electrode module 40 is formed into a substantially inverted U shape. The crotch part 51. As the resin 56, an epoxy resin or the like can be used. The gap between the cover halves 42a and 42b and the build-up module 40 can be completely filled with the resin 56 by the fluidity of the resin 56. By choosing the tree appropriately The viscosity of the grease 56 enables the resin 56 to remain only in the peripheral region of the gap G without blocking the entrance and exit of the passage 31 of the interposer 30.

如上述,堰部51由於使樹脂56流入罩半體42a與42b間之間隙G而形成,因此有堰部51之形成較上述第1例之情形容易之優點。 As described above, since the crotch portion 51 is formed by flowing the resin 56 into the gap G between the cover halves 42a and 42b, there is an advantage that the formation of the crotch portion 51 is easier than in the case of the first example described above.

由於對堰部51施加從入口43流入之流體L之壓力,因此長期來看,在有形成堰部51之樹脂56變形之可能性時,必須使樹脂56充分地固化。如上述,由於堰部51具有將入口43側之上游側空間與出口44側之下游側空間絕緣(分離)之功能,因此需堰部51之表側(外側)牢固地緊貼於罩半體42a及42b之內壁面且堰部51之下端部牢固地接著於接著層55。 Since the pressure of the fluid L flowing from the inlet 43 is applied to the crotch portion 51, in the long term, when the resin 56 forming the crotch portion 51 is deformed, the resin 56 must be sufficiently cured. As described above, since the crotch portion 51 has a function of insulating (separating) the upstream side space on the inlet 43 side from the downstream side space on the outlet 44 side, the front side (outer side) of the crotch portion 51 is firmly adhered to the cover half body 42a. The inner wall surface of the portion 42b and the lower end portion of the crotch portion 51 are firmly adhered to the subsequent layer 55.

此積層模組之構裝構造第2例中之堰部51之製作程序中,係由間隙G規定堰部51之配置區域。一般而言,如圖7B(d)與圖8B(d1)及(d2)所示,使罩半體42a與42b之長度(沿流體L之流動方向之長度)彼此相等,間隙G亦即堰部51配置於積層模組40中央部。然而,亦可不一定要如此配置。例如,亦可使罩半體42a之長度較罩半體42b之長度短。此情形下,間隙G亦即堰部51係較積層模組40中央部往入口43側偏移配置。 In the manufacturing procedure of the dam portion 51 in the second example of the structure of the laminated module, the arrangement area of the dam portion 51 is defined by the gap G. In general, as shown in Fig. 7B(d) and Figs. 8B(d1) and (d2), the lengths of the cover halves 42a and 42b (the lengths in the flow direction of the fluid L) are made equal to each other, and the gap G is also The portion 51 is disposed at the center of the build-up module 40. However, it may not be necessary to configure this. For example, the length of the cover half 42a may be made shorter than the length of the cover half 42b. In this case, the gap G, that is, the crotch portion 51 is disposed offset from the central portion of the buildup module 40 toward the inlet 43 side.

圖7B及圖8B僅係顯示對罩半體42a與42b之入口43與出口44之配置一例,亦能為除此以外之配置。例如,(i)亦可入口43配置於罩半體42a上面,出口44配置於罩半體42b上面,(ii)亦可入口43配置於罩半體42a側面,出口44 配置於罩半體42b上面。針對配置入口43與出口44之區域並無特別限制,可視配置本第2例之構裝構造之環境(例如在印刷基板上之零件類之配置狀況)來適當決定。 7B and 8B show only an example of the arrangement of the inlet 43 and the outlet 44 of the cover half bodies 42a and 42b, and may be other arrangements. For example, (i) the inlet 43 may be disposed on the upper surface of the cover half 42a, the outlet 44 may be disposed on the upper surface of the cover half 42b, and (ii) the inlet 43 may be disposed on the side of the cover half 42a, and the outlet 44 It is disposed on the cover half 42b. The area in which the inlet 43 and the outlet 44 are disposed is not particularly limited, and the environment in which the structure of the second example is disposed (for example, the arrangement of components on a printed circuit board) can be appropriately determined.

此積層模組之構裝構造第2例亦同樣地,堰部51遮斷通過積層模組40周圍之路徑。換言之,堰部51係將內部空間50分隔成入口43側之上游側空間與出口44側之下游側空間之兩個空間。如此,不會產生防止箭頭49所示之通過積層模組40周圍之非期待之流體L之流動,從入口43流入上游側空間之流體L之全部沿箭頭48所示之路徑通過通道31並到達下游側空間後,從出口44被排出。因此,與上述之第1例之情形同樣地,能實現有效率之吸熱效果,確實地得到對積層模組40之所欲冷卻效果。 In the second example of the structure of the laminated module, the dam portion 51 blocks the path around the laminated module 40. In other words, the crotch portion 51 divides the internal space 50 into two spaces of the upstream side space on the inlet 43 side and the downstream side space on the outlet 44 side. Thus, the flow of the undesired fluid L passing through the laminated module 40 as indicated by the arrow 49 is not prevented, and all of the fluid L flowing from the inlet 43 into the upstream side space passes through the passage 31 and reaches the path indicated by the arrow 48. After the downstream side space, it is discharged from the outlet 44. Therefore, similarly to the case of the first example described above, an efficient heat absorbing effect can be achieved, and the desired cooling effect on the laminated module 40 can be surely obtained.

(於冷卻貫通電極模組之構成例附加有堰部之構裝構造之第3例) (The third example of the structure in which the crotch portion is attached to the configuration of the cooling through electrode module)

圖9係顯示於冷卻貫通電極模組之構成例附加有堰部之積層模組之構裝構造之第3例。 Fig. 9 is a view showing a third example of the structure of the laminated module in which the crotch portion is attached to the configuration of the cooling through electrode module.

此例係使用3個半導體元件與2個中介層所構成之5段構成(扣除中介層則為3段構成)之積層模組40a者,除此以外之構成係與第1例相同。 In this example, a laminated module 40a composed of five semiconductor elements and two interposer layers (three-stage excluding the interposer) is used, and the other configuration is the same as that of the first example.

積層模組40a係由配置於基板10表面(上面)之第1半導體元件11b、配置於第1半導體元件11b表面(上面)之附有通道31之中介層30、配置於中介層30表面(上面)之第2半導體元件12b、配置於第2半導體元件12b表面(上面)之再一個附有通道31之中介層30、配置於該中介層30表面 (上面)之第3半導體元件12b’構成。換言之,於下側之中介層30上下分別配置有第2半導體元件12b與第1半導體元件11b,兩元件12b及11b夾著下側之中介層30,又,於上側之中介層30上下分別配置有第3半導體元件12b’與第2半導體元件12b,兩元件12b’及12b夾著上側之中介層30之構造。 The build-up module 40a is disposed on the surface of the interposer 30 by the first semiconductor element 11b disposed on the surface (upper surface) of the substrate 10, the interposer 30 on the surface (upper surface) of the first semiconductor element 11b. a second semiconductor element 12b disposed on the surface (upper surface) of the second semiconductor element 12b, and an interposer 30 having a via 31 attached thereto, and disposed on the surface of the interposer 30 The third semiconductor element 12b' of the above (upper side) is configured. In other words, the second semiconductor element 12b and the first semiconductor element 11b are disposed above and below the lower interposer 30, and the lower interposer 30 is interposed between the two elements 12b and 11b, and is disposed above and below the upper interposer 30. There are three semiconductor elements 12b' and second semiconductor elements 12b, and the two elements 12b' and 12b have a structure in which the upper interposer 30 is interposed.

於積層模組40a外周面由於配置有大致倒U字形之堰部51,因此流體L僅通過兩個中介層30之通道31。從罩體42之入口43流入內部空間50之流體L在通過通道31後從罩體42之出口44流出至外部。堰部51其整體位於罩體42內部,不從罩體42露出。 Since the substantially U-shaped crotch portion 51 is disposed on the outer peripheral surface of the laminated module 40a, the fluid L passes only through the passages 31 of the two interposing layers 30. The fluid L flowing into the internal space 50 from the inlet 43 of the cover 42 flows out of the outlet 44 of the cover 42 to the outside after passing through the passage 31. The crotch portion 51 is entirely located inside the cover 42 and is not exposed from the cover 42.

此外,亦可不於兩個中介層30兩者形成通道31。例如,亦可僅於下側之中介層30或僅於上側之中介層30形成通道31。 In addition, the channel 31 may not be formed by both of the two interposers 30. For example, the channel 31 may be formed only on the lower interposer 30 or only on the upper interposer 30.

(於冷卻貫通電極模組之構成例附加有堰部之構裝構造之第4例) (Fourth example of a structure in which a crotch portion is attached to a configuration example of a cooling through electrode module)

圖10A及圖10B與圖11A及圖11B係顯示於冷卻貫通電極模組之構成例附加有堰部之積層模組之構裝構造之第4例之製造方法。圖10A及圖10B係顯示此製造方法之立體圖,圖11A及圖11B係其剖面圖。圖11A及圖11B中,該構裝構造之縱剖面描繪於上位,橫剖面描繪於下位。 10A and FIG. 10B and FIG. 11A and FIG. 11B show a manufacturing method of a fourth example of the structure of the laminated module in which the crucible is added to the configuration of the cooling through electrode module. 10A and 10B are perspective views showing the manufacturing method, and Figs. 11A and 11B are cross-sectional views thereof. In FIGS. 11A and 11B, the longitudinal section of the structure is depicted in the upper position, and the cross section is depicted in the lower position.

此構裝構造之第4例如圖11B(d1)及(d2)所示,罩體42係由兩個罩半體52a與52b構成,且該等罩半體52a與52b隔開既定之間隙G緊貼固定於基板10上。罩體52之此構 成雖與上述之第2例之情形近似,但相異點為,罩半體52a與52b之長度較上述第2例之長度短,罩半體52a與52b間之間隙G較上述第2例之間隙大,設定為接近積層模組40全長之值。又,堰部51雖與上述第2例同樣地,為大致倒U字形,帶狀覆蓋積層模組40外側之大致全面,但由於堰部51配置於罩半體52a與52b間之較大間隙G,因此其長度(流體L之流動方向之長度)較上述之第2例之情形大,為接近積層模組40全長之值。除此以外之構成係與第1例相同。 In the fourth configuration of the structure, as shown in Figs. 11B (d1) and (d2), the cover 42 is composed of two cover halves 52a and 52b, and the cover halves 52a and 52b are separated by a predetermined gap G. It is fixed to the substrate 10 in close contact. The structure of the cover 52 The difference is similar to the case of the second example described above, but the difference is that the lengths of the cover halves 52a and 52b are shorter than the length of the second example, and the gap G between the cover halves 52a and 52b is smaller than the second example. The gap is large and is set to be close to the total length of the build-up module 40. Further, the crotch portion 51 has a substantially inverted U shape as in the second example, and the outer portion of the band-covering laminated module 40 is substantially uniform. However, the crotch portion 51 is disposed in a large gap between the cover halves 52a and 52b. G, therefore, the length (the length of the flow direction of the fluid L) is larger than that of the second example described above, and is a value close to the entire length of the laminated module 40. The other configurations are the same as in the first example.

上述第2例(參照圖8B(d1)及(d2))中,內部空間50被堰部51分為上游側空間與下游側空間。於上游側空間,在罩半體42a內面與積層模組40之外周面之間雖存在大致倒U字形之狹窄區域,但在流體L進入此區域後,即會成為在該處滯留(流體L幾乎不流動)之狀態。若於內部空間50產升此種流體L之滯留,則會阻礙流體L之排熱作用,無法得到所欲之積層模組40之冷卻作用。此點於下游側空間亦相同。此第4例則係除去其困難點。 In the second example (see FIGS. 8B (d1) and (d2)), the internal space 50 is divided into the upstream side space and the downstream side space by the weir portion 51. In the upstream space, although there is a narrow U-shaped narrow area between the inner surface of the cover half 42a and the outer peripheral surface of the laminated module 40, after the fluid L enters the area, it will stay there (fluid) The state of L almost does not flow). If the retention of the fluid L in the internal space 50 is caused, the heat dissipation of the fluid L is hindered, and the cooling effect of the desired laminated module 40 cannot be obtained. This point is also the same on the downstream side space. This fourth case removes its difficulty.

亦即,此第4例中,由於罩半體52a及52b間之間隙G設定為接近積層模組40全長之值,因此堰部51之其長度(流體L之流動方向之長度)亦為接近積層模組40全長之值。因此,於罩半體52a及52b之內面與積層模組40之外周面之間幾乎不形成大致倒U字形之狹窄區域。其結果,不會因流體L之滯留阻礙排熱作用,而能得到所欲之積層模組40之冷卻效果。 That is, in the fourth example, since the gap G between the cover halves 52a and 52b is set to be close to the total length of the laminated module 40, the length of the crotch portion 51 (the length of the flow direction of the fluid L) is also close. The value of the full length of the laminated module 40. Therefore, a narrow region having a substantially inverted U shape is hardly formed between the inner faces of the cover half bodies 52a and 52b and the outer peripheral surface of the buildup module 40. As a result, the cooling effect of the desired laminated module 40 can be obtained without hindering the heat dissipation by the retention of the fluid L.

其次,說明此構裝構造之第4例之製造方法。 Next, a method of manufacturing the fourth example of the structure will be described.

首先,圖10A(a)與圖11A(a1)及(a2)所示之積層模組40之搭載步驟、與圖10A(b)與圖11A(b1)及(b2)所示之接著層55之形成步驟與上述之第2例相同。因此,該等之說明省略。 First, the mounting step of the laminated module 40 shown in FIG. 10A(a) and FIGS. 11A(a1) and (a2), and the bonding layer 55 shown in FIG. 10A(b) and FIGS. 11A(b1) and (b2). The formation step is the same as the second example described above. Therefore, the description of these is omitted.

其次,如圖10B(c)與圖11B(c1)及(c2)所示,罩半體52a及52b配置於基板10表面。罩半體52a及52b與圖7B中之罩半體42a及42b同樣地,係將罩體52二分割之形狀,於該等分別設有入口43與出口44。在罩半體52a及52b緊貼/固定於基板10表面之狀態下,於罩半體52a與52b間形成有間隙G。間隙G之大小(間隔)設定為與積層模組40全長大致相等之值。 Next, as shown in FIG. 10B(c) and FIGS. 11B(c1) and (c2), the cover halves 52a and 52b are disposed on the surface of the substrate 10. Similarly to the cover half bodies 42a and 42b in Fig. 7B, the cover half bodies 52a and 52b have a shape in which the cover body 52 is divided into two, and the inlet 43 and the outlet 44 are respectively provided. In a state in which the cover halves 52a and 52b are in close contact with and fixed to the surface of the substrate 10, a gap G is formed between the cover halves 52a and 52b. The size (interval) of the gap G is set to be substantially equal to the entire length of the build-up module 40.

罩半體52a及52b之腳部45與基板10表面之安裝部46與上述第2例同樣地係使用接著劑等互相接合。 The leg portions 45 of the cover half bodies 52a and 52b and the mounting portion 46 on the surface of the substrate 10 are joined to each other by an adhesive or the like in the same manner as in the second example described above.

腳部45之內側雖最好係與上述之接著層55之端部重疊,但並不限於此。在重疊之情形,藉由將腳部45按壓於基板10表面,接著層55之與腳部45重疊之端部係變形。 The inner side of the leg portion 45 preferably overlaps the end portion of the above-mentioned adhesive layer 55, but is not limited thereto. In the case of overlap, the leg portion 45 is pressed against the surface of the substrate 10, and then the end portion of the layer 55 overlapping the leg portion 45 is deformed.

接著,使接著層55之接著劑與腳部45與安裝部46間之接著劑固化,確保在其後之程序之機械強度。在腳部45與安裝部46係以接著劑以外之材料或手法結合時,只要僅使接著層55之接著劑固化即可。此點與上述第2例相同。 Next, the adhesive between the adhesive layer 55 and the adhesive between the leg portion 45 and the mounting portion 46 is cured to secure the mechanical strength of the subsequent process. When the leg portion 45 and the attachment portion 46 are joined by a material other than the adhesive or a method, only the adhesive of the adhesive layer 55 may be cured. This point is the same as the second example described above.

其次,如圖10B(d)與圖11B(d1)及(d2)所示,從罩半體52a及52b間之間隙G流入樹脂56,於積層模組40之外周面形成大致倒U字形之堰部51。作為樹脂56能使用環氧樹 脂等。於罩半體52a及52b與積層模組40間之兩個間隙能利用樹脂56之流動性,被樹脂56完全充填。間隙G雖較上述第2實施形態之構裝構造之情形大,但藉由適當選擇樹脂56之黏度,能使樹脂56流入並停留,而不阻塞中介層30之通道31之入口與出口且填埋間隙G整體。 Next, as shown in Fig. 10B(d) and Figs. 11B(d1) and (d2), the resin G is flowed from the gap G between the cover halves 52a and 52b, and is formed in a substantially inverted U shape on the outer peripheral surface of the laminated module 40. Crotch 51. Epoxy resin can be used as the resin 56 Fat and so on. The two gaps between the cover halves 52a and 52b and the build-up module 40 can be completely filled with the resin 56 by the fluidity of the resin 56. The gap G is larger than that of the above-described second embodiment, but by appropriately selecting the viscosity of the resin 56, the resin 56 can flow in and stay without blocking the inlet and outlet of the passage 31 of the interposer 30 and filling. Buried gap G as a whole.

此時,堰部51,由於覆蓋貫通電極模組40外周面之大致全面,因此貫通電極模組40之外周面不從罩體52露出。堰部51之外周面從罩體52之間隙G露出。 At this time, since the crotch portion 51 covers substantially the entire outer peripheral surface of the through electrode module 40, the outer peripheral surface of the through electrode module 40 is not exposed from the cover 52. The outer peripheral surface of the flange portion 51 is exposed from the gap G of the cover 52.

與上述第2例同樣地,由於對堰部51施加從入口43流入之流體L之壓力,因此長期來看,在有形成堰部51之樹脂56變形之可能性時,必須使樹脂56充分地固化。如上述,由於堰部51具有將入口43側之上游側空間與出口44側之下游側空間絕緣(分離)之功能,因此需堰部51之表側(外側)牢固地緊貼於罩半體52a及52b之內壁面且堰部51之下端部牢固地接著於接著層55。 In the same manner as in the second example described above, since the pressure of the fluid L flowing from the inlet 43 is applied to the crotch portion 51, in the long term, when the resin 56 forming the crotch portion 51 is deformed, the resin 56 must be sufficiently Cured. As described above, since the crotch portion 51 has a function of insulating (separating) the upstream side space on the inlet 43 side from the downstream side space on the outlet 44 side, the front side (outer side) of the crotch portion 51 is firmly adhered to the cover half body 52a. The inner wall surface of the portion 52b and the lower end portion of the crotch portion 51 are firmly adhered to the subsequent layer 55.

本第4例中之堰部51之製作程序中,亦同樣地由間隙G規定堰部51之配置區域。 In the production procedure of the crotch portion 51 in the fourth example, the arrangement area of the crotch portion 51 is also defined by the gap G in the same manner.

圖10B及圖11B僅係顯示對罩半體52a與52b之入口43與出口44之配置一例,亦能為除此以外之配置。此點與上述第2例相同。 10B and FIG. 11B show only an example of the arrangement of the inlet 43 and the outlet 44 of the cover half bodies 52a and 52b, and may be other arrangements. This point is the same as the second example described above.

如以上所說明,此積層模組之構裝構造之第4例中,與上述第3例同樣地,不會因流體L之滯留阻礙排熱作用,而有對積層模組40之冷卻效果較上述第2例之情形高之效果。 As described above, in the fourth example of the structure of the laminated module, as in the third example, the cooling effect of the laminated module 40 is not caused by the retention of the fluid L and the heat dissipation effect. The effect of the second example described above is high.

此外,圖10A及圖10B與圖11A及圖11B中,雖顯示了堰部51填埋間隙G整體之構造,但本第4例並不限定於此。例如亦可僅使樹脂56限定流入間隙G之兩端部(亦即罩半體52a之下游側端部與罩半體52b之上游側端部)附近,藉此如圖13C(d1)及(d2)所示,僅於間隙G之兩端部分散形成堰部51a與51b。此情形下,積層模組40外周面之絕大部分從堰部51a與51b之間露出於罩體52外部。 In addition, in FIGS. 10A and 10B and FIGS. 11A and 11B, the structure in which the crotch portion 51 fills the entire gap G is shown, but the fourth example is not limited thereto. For example, only the resin 56 may be limited to the vicinity of both end portions of the inflow gap G (that is, the downstream end portion of the cover half 52a and the upstream end portion of the cover half 52b), whereby (Fig. 13C(d1) and ( As shown in d2), the crotch portions 51a and 51b are formed only at the both end portions of the gap G. In this case, most of the outer peripheral surface of the laminated module 40 is exposed outside the cover 52 from between the flange portions 51a and 51b.

(於冷卻貫通電極模組之構成例附加有堰部之構裝構造之第5例) (Fifth example of a structure in which a crotch portion is attached to a configuration example of a cooling through electrode module)

圖12A及圖12B與圖13A~圖13D係顯示於冷卻貫通電極模組之構成例附加有堰部之積層模組之構裝構造之第5例之製造方法。圖12A及圖12B係顯示此製造方法之立體圖,圖13A~圖13D係其剖面圖。圖13A~圖13D中,該構裝構造之縱剖面描繪於上位,橫剖面描繪於下位。 12A and FIG. 12B and FIG. 13A to FIG. 13D show a fifth example of the manufacturing method of the structure of the laminated module in which the crucible portion is added to the configuration of the cooling through electrode module. 12A and 12B are perspective views showing the manufacturing method, and Figs. 13A to 13D are cross-sectional views thereof. In FIGS. 13A to 13D, the longitudinal section of the structure is depicted in the upper position, and the cross section is depicted in the lower position.

此構裝構造之第5例特徵點在於,除了覆蓋積層模組40之罩體52以外,尚安裝第2罩體(外罩)57,而為雙重罩體。亦即,如圖13D(e1)及(e2)所示,與上述第4例同樣地,罩體52由兩個罩半體52a與52b構成且罩半體52a及52b間之間隙G設定為接近積層模組40全長之值。然而,與上述第4例之相異點在於,僅於間隙G兩端部形成有(分散配置)堰部51a及51b,積層模組40外周面之大部分係從堰部51a及51b間之間隙G露出至罩體52外部。 The fifth example of the structure is characterized in that a second cover (cover) 57 is attached to the cover 52 of the build-up module 40, and is a double cover. That is, as shown in Figs. 13D (e1) and (e2), the cover 52 is composed of two cover halves 52a and 52b and the gap G between the cover halves 52a and 52b is set to be the same as in the above-described fourth example. It is close to the value of the full length of the laminated module 40. However, the fourth example is different in that the crotch portions 51a and 51b are formed (distributed) only at the both end portions of the gap G, and most of the outer peripheral surface of the laminated module 40 is interposed between the crotch portions 51a and 51b. The gap G is exposed to the outside of the cover 52.

於基板10表面進一步安裝有第2罩體(外罩)57而覆蓋罩體52。第2罩體57分別於上游側具備入口58,於下游 側具備出口59。於罩體52與第2罩體57間之空間,有冷卻用第2流體L2從入口58往出口59流動。罩體52之入口43與出口44貫通第2罩體57側壁露出至其外部,該等貫通處以流體L與第2流體L2不洩漏之方式被以樹脂等密封。 Further, a second cover (cover) 57 is attached to the surface of the substrate 10 to cover the cover 52. The second cover 57 has an inlet 58 on the upstream side, and is downstream. The side has an exit 59. In the space between the cover 52 and the second cover 57, the cooling second fluid L2 flows from the inlet 58 to the outlet 59. The inlet 43 and the outlet 44 of the cover 52 are exposed to the outside through the side wall of the second cover 57, and the penetrations are sealed with resin or the like so that the fluid L and the second fluid L2 do not leak.

對罩半體52a及52b之入口43與出口44之配置與第2罩體57之入口58與出口59之配置,可視必要任意變更。 The arrangement of the inlet 43 and the outlet 44 of the cover half bodies 52a and 52b and the arrangement of the inlet 58 and the outlet 59 of the second cover 57 may be arbitrarily changed as necessary.

其次說明本第5例之製造方法。 Next, the manufacturing method of the fifth example will be described.

首先,由於圖12A(a)與圖13A(a1)及(a2)所示之積層模組40之搭載步驟、圖12A(b)與圖13A(b1)及(b2)所示之接著層55之形成步驟、圖12A(c)與圖13B(c1)及(c2)所示之罩體52(罩半體52a及52b)之安裝步驟,與上述之第4例相同,因此其說明省略。 First, the mounting step of the laminated module 40 shown in FIG. 12A(a) and FIGS. 13A(a1) and (a2), and the bonding layer 55 shown in FIG. 12A(b) and FIGS. 13A(b1) and (b2). The steps of forming the cover, the cover 52 (the cover halves 52a and 52b) shown in Figs. 12A(c) and 13B(c1) and (c2) are the same as those of the fourth example described above, and therefore the description thereof will be omitted.

其次,如圖12B(d)與圖13C(d1)及(d2)所示,於罩半體52a之下游側端部附近與罩半體52b之上游側端部附近分別個別流入樹脂56,於貫通電極模組40外周面形成大致倒U字形之兩個堰部51a及51b。作為樹脂56能使用環氧樹脂等。位於罩半體52a之下游側端部附近與罩半體52b之上游側端部附近之罩半體52a及52b與積層模組40間之間隙,能利用樹脂56之流動性,被樹脂56完全阻塞。間隙G之兩端部雖被樹脂56(堰部51a及51b)覆蓋,但其中央部保持露出。 Then, as shown in Fig. 12B (d) and Fig. 13C (d1) and (d2), the resin 56 is separately flowed in the vicinity of the downstream end portion of the cover half 52a and the vicinity of the upstream end portion of the cover half 52b. The outer peripheral surface of the through electrode module 40 forms two crotch portions 51a and 51b having a substantially inverted U shape. As the resin 56, an epoxy resin or the like can be used. The gap between the cover half bodies 52a and 52b in the vicinity of the downstream end portion of the cover half 52a and the upstream end portion of the cover half 52b and the build-up module 40 can be completely filled with the resin 56 by the fluidity of the resin 56. Blocked. Both ends of the gap G are covered by the resin 56 (the dam portions 51a and 51b), but the central portion thereof is kept exposed.

最後,如圖12B(e)與圖13D(e1)及(e2)所示,以覆蓋罩體52(罩半體52a及52b)之方式將第2罩體(外罩)57緊貼固 定於基板10表面。如此,此構裝構造之第5例即完成。 Finally, as shown in Fig. 12B(e) and Figs. 13D(e1) and (e2), the second cover (cover) 57 is tightly attached to cover the cover 52 (the cover halves 52a and 52b). It is fixed on the surface of the substrate 10. Thus, the fifth example of the structure is completed.

如以上所說明,此積層模組之構裝構造之第5例中,為雙重罩體構成,內側之罩體52之內部空間50被堰部51a及51b分割成上游側空間與下游側空間,且從入口43往出口44導入/排出冷卻用之流體L。又,於罩體52與第2罩體57間之空間,使冷卻用之第2流體L2從入口58往出口59流動。於此空間未設有堰部。因此,除了冷卻用之流體L產生之排熱外,亦同時進行第2流體L2產生之排熱。因此,相較於上述第3及第4例雖構造些許複雜,但有對積層模組40(第2半導體元件12b及第1半導體元件11b)之冷卻效果較上述第3及第4例之情形高之效果。 As described above, in the fifth example of the structure of the laminated module, the double-shell structure is configured, and the inner space 50 of the inner cover 52 is divided into the upstream space and the downstream space by the flange portions 51a and 51b. The fluid L for cooling is introduced/discharged from the inlet 43 to the outlet 44. Further, in the space between the cover 52 and the second cover 57, the second fluid L2 for cooling flows from the inlet 58 to the outlet 59. There is no crotch in this space. Therefore, in addition to the heat generation by the cooling fluid L, the heat generation by the second fluid L2 is simultaneously performed. Therefore, compared with the third and fourth examples, the structure is somewhat complicated, but the cooling effect on the build-up module 40 (the second semiconductor element 12b and the first semiconductor element 11b) is higher than that of the third and fourth examples. High effect.

流體L與第2流體L2無需為相同種類。例如,流體L為液體,第2流體L2為氣體等亦可。流體L,由於如上述係通過剖面積小(狹窄)之通道31,因此最好係能使用壓縮機或泵將已提高壓力之流體供應至入口43。另一方面,第2流體L2,由於係通過剖面積遠大於通道31之區域,因此高壓力非為必要。因此,對第2流體亦能採用更簡便之構成。例如,亦能於第2罩體(外罩)57設置第2流體L2流入/流出之單一口(此口發揮入口兼出口之功能),作成與如搭載於筆記型電腦之熱泵(此未使用壓縮機)類似之構成。 The fluid L and the second fluid L2 need not be the same type. For example, the fluid L may be a liquid, and the second fluid L2 may be a gas or the like. Since the fluid L passes through the passage 31 having a small (stencil) sectional area as described above, it is preferable to supply the fluid having the increased pressure to the inlet 43 using a compressor or a pump. On the other hand, the second fluid L2 is not necessary because the cross-sectional area is much larger than the area of the passage 31. Therefore, a simpler configuration can be adopted for the second fluid. For example, it is also possible to provide a single port in which the second fluid L2 flows in and out of the second cover (the cover) 57 (this port functions as an inlet and an outlet), and is configured as a heat pump mounted on a notebook computer (this does not use compression). Machine) similar composition.

(第1實施形態之積層模組) (Laminated module of the first embodiment)

圖14與圖15A及15B顯示本發明之第1實施形態之積層模組(貫通電極模組)。圖14係顯示使用於此積層模組之中介層30a構成之剖面說明圖。圖15A及15B係此積層模 組之構裝構造之縱剖面圖與沿其D-D線之剖面圖。 Fig. 14 and Figs. 15A and 15B show a laminated module (through electrode module) according to the first embodiment of the present invention. Fig. 14 is a cross-sectional explanatory view showing the constitution of the interposer 30a used in the laminated module. 15A and 15B are the laminated modes A longitudinal section of the assembled structure and a cross-sectional view along its D-D line.

此外,本第1實施形態中,雖為貫通電極模組,但當然亦可為接合模組。又,在將此模組構裝於基板上時,上述之構裝構造(具有基板與罩體者)之任一者均能適用。 Further, in the first embodiment, the through electrode module is used, but of course, it may be a joint module. Further, when the module is mounted on a substrate, any of the above-described structure (having a substrate and a cover) can be applied.

本第1實施形態之積層模組特徵在於,使用於其之中介層30a內藏有露出於通道31之熱反射層61a與熱放射層61b。 In the laminated module according to the first embodiment, the heat reflecting layer 61a and the heat radiation layer 61b exposed to the channel 31 are housed in the interposer 30a.

如圖14所示,於中介層30a之上壁33內面,隔著絕緣層62a形成有熱反射層61a,於其下壁34內面,隔著絕緣層62b形成有熱放射層61b。熱反射層61a覆蓋上壁33之內面整體。熱放射層61b覆蓋下壁34之內面整體。如此,在中介層30a之通道31內部,位於上位之熱反射層61a與位於下位之熱放射層61b彼此對向。因此,通道31之上壁33與下壁34分別被熱反射層61a與熱放射層61b區劃。 As shown in Fig. 14, a heat reflecting layer 61a is formed on the inner surface of the upper wall 33 of the interposer 30a via an insulating layer 62a, and a heat radiating layer 61b is formed on the inner surface of the lower wall 34 via an insulating layer 62b. The heat reflecting layer 61a covers the entire inner surface of the upper wall 33. The heat radiation layer 61b covers the entire inner surface of the lower wall 34. Thus, inside the channel 31 of the interposer 30a, the upper heat reflecting layer 61a and the lower heat radiating layer 61b oppose each other. Therefore, the upper wall 33 and the lower wall 34 of the passage 31 are respectively partitioned by the heat reflective layer 61a and the heat radiation layer 61b.

於上壁33外面有熱源63(此對應於第2半導體元件12b)接觸。於下壁34外面有熱源64(此對應於第1半導體元件11b)接觸。 A heat source 63 (this corresponds to the second semiconductor element 12b) is in contact with the outside of the upper wall 33. A heat source 64 (this corresponds to the first semiconductor element 11b) is in contact with the outside of the lower wall 34.

圖14所示之中介層30a構造亦稱為「放射/反射構造」。 The structure of the interposer 30a shown in Fig. 14 is also referred to as "radiation/reflection structure".

熱反射層61a多由金屬薄膜等形成,具有使從其上方與下方兩方射入之熱反射之功能。熱反射層61a雖最好係例如由金或鋁之薄膜形成,其表面為鏡面,但並不限於此。又,熱反射層61a雖最好係涵蓋上壁33內面整體配置,但並不限於此。例如,亦可僅於上壁33內面之指定區域配置熱反射層61a。 The heat reflecting layer 61a is often formed of a metal thin film or the like, and has a function of reflecting heat incident from both the upper side and the lower side. The heat reflecting layer 61a is preferably formed of, for example, a film of gold or aluminum, and the surface thereof is a mirror surface, but is not limited thereto. Further, the heat reflecting layer 61a preferably covers the entire inner surface of the upper wall 33, but is not limited thereto. For example, the heat reflecting layer 61a may be disposed only in a designated area on the inner surface of the upper wall 33.

熱放射層61b例如由亦稱為「金黑」之熱放射層形成。「金黑」可藉由在真空度較低之環境氣體中蒸鍍金而製得。於「金黑」表面具有微小凹凸,當以可視光觀察時看似黑色。「金黑」已知具有在其表面溫度較周圍溫度低時會吸收熱,在其表面溫度較周圍溫度高時會放射熱之特性。此外,亦可取代「金黑」而為其他材料,例如著色成黑色之樹脂等。再者,熱放射層61b雖最好係涵蓋下壁34內面整體配置,但並不限於此。例如,亦可僅於下壁34內面之指定區域配置熱放射層61b。 The heat radiation layer 61b is formed of, for example, a heat radiation layer also called "gold black". "Golden Black" can be obtained by vapor deposition of gold in an ambient gas with a low degree of vacuum. It has tiny irregularities on the surface of "Golden Black" and looks black when viewed with visible light. "Golden Black" is known to have a property of absorbing heat when its surface temperature is lower than the ambient temperature, and radiating heat when its surface temperature is higher than the ambient temperature. In addition, it is also possible to replace "golden black" with other materials, such as a resin colored in black. Further, the heat radiation layer 61b preferably covers the entire inner surface of the lower wall 34, but is not limited thereto. For example, the heat radiation layer 61b may be disposed only in a designated area on the inner surface of the lower wall 34.

上壁33與下壁34雖最好係以熱傳導率大之材料形成,但不一定限於此。在上壁33與下壁34均以單結晶矽構成,於各自之表面(上壁33之內面,下壁34之內面)配置有由電子零件或電晶體等構成之電子電路或電氣配線層時,最好係使絕緣層62a及62b介在。此等絕緣層62a及62b具有防止該電子電路等因熱反射層61a(由於此為金屬薄膜,因此為導電性)或熱放射層61b(為金黑時係導電性)而短路之功能。 The upper wall 33 and the lower wall 34 are preferably formed of a material having a large thermal conductivity, but are not necessarily limited thereto. The upper wall 33 and the lower wall 34 are each formed of a single crystal cymbal, and electronic circuits or electric wires composed of electronic components or transistors are disposed on the respective surfaces (the inner surface of the upper wall 33 and the inner surface of the lower wall 34). In the case of the layer, it is preferable to interpose the insulating layers 62a and 62b. These insulating layers 62a and 62b have a function of preventing the electronic circuit or the like from being short-circuited by the heat reflecting layer 61a (which is a conductive film due to the metal thin film) or the heat radiating layer 61b (which is conductive in the case of gold black).

圖14中,箭頭66a及66b顯示冷卻用流體L之流動方向。藉由流動於通道31之流體L,從熱放射層61b放射至通道31內之熱與被熱反射層61a反射至通道31內之熱出排至中介層30a外部。此種流體L之流動,能使用泵或壓縮機與配管等(均未圖示)來容易地實現。流體L亦稱為「冷媒」,具有能從發熱物體吸收熱並往外部移送之特性。例如使用(1)氟氯碳化物類/無氟氯碳化物類(多使用此,種類 多);(2)丁烷、異丁烷等有機化合物;(3)氫、氦、氨、水、二氧化氫等無機化合物。此點與上述者相同。 In Fig. 14, arrows 66a and 66b show the flow direction of the cooling fluid L. The heat radiated from the heat radiation layer 61b into the channel 31 and the heat which is reflected into the channel 31 by the heat reflection layer 61a are discharged to the outside of the interposer 30a by the fluid L flowing through the channel 31. The flow of such a fluid L can be easily realized by using a pump, a compressor, a pipe, or the like (none of which is shown). The fluid L is also called "refrigerant" and has the property of being able to absorb heat from a heat generating object and transport it to the outside. For example, use (1) chlorofluorocarbons/non-chlorofluorocarbons (use more, type (2) organic compounds such as butane and isobutane; and (3) inorganic compounds such as hydrogen, helium, ammonia, water, and hydrogen peroxide. This point is the same as above.

此處,若假定位於下位之熱源64之發熱量較位於上位之熱源63大,則在下位之熱源64產生之熱通過下壁34與絕緣層62b之內部到達熱放射層61b表面(通道31側之面),在此表面朝向流動於通道31之流體L放射。如此放射之熱之絕大部分被流體L吸收。不被流體L吸收而到達熱反射層61a之熱,由於在熱反射層61a表面(通道31側之面)朝向流體L反射,因此仍會被流體L吸收。 Here, if it is assumed that the heat source 64 located in the lower position generates heat larger than the upper heat source 63, the heat generated in the lower heat source 64 reaches the surface of the heat radiation layer 61b through the inside of the lower wall 34 and the insulating layer 62b (channel 31 side) On the surface, the surface is radiated toward the fluid L flowing through the channel 31. Most of the heat thus radiated is absorbed by the fluid L. The heat that is not absorbed by the fluid L and reaches the heat reflecting layer 61a is still absorbed by the fluid L because it is reflected toward the fluid L on the surface (the surface on the side of the channel 31) of the heat reflecting layer 61a.

另一方面,在上位之熱源63產生之熱首先通過上壁34與絕緣層62a之內部到達熱放射層61b背面(與通道31側相反側之面),在此背面朝向熱源63反射。在熱反射層61a未完全反射而透過此之熱,到達熱反射層61a表面(通道31側之面),在此表面被流動於通道31之流體L吸收。 On the other hand, the heat generated by the upper heat source 63 first passes through the inside of the upper wall 34 and the insulating layer 62a to the back surface of the heat radiation layer 61b (the surface opposite to the channel 31 side), and the back surface is reflected toward the heat source 63. The heat reflecting layer 61a is not completely reflected and transmitted through the heat, and reaches the surface of the heat reflecting layer 61a (the surface on the side of the channel 31) where the surface is absorbed by the fluid L flowing through the channel 31.

其結果,在下位之熱源64產生之熱不會到達上位之熱源63,且在上位之熱源63產生之熱亦不會到達下位之熱源64。換言之,上下之熱源63與熱源64,藉由中介層30a而被「熱絕緣」。因此,例如即使下位之熱源64為消耗大電力之半導體元件,上位之熱源63為對熱具有敏感特性之半導體元件,亦能藉由使具有此種構成之中介層30a介在於兩者之間,來大幅減低下位之半導體元件對上位之半導體元件給予之熱影響。 As a result, the heat generated by the lower heat source 64 does not reach the upper heat source 63, and the heat generated by the upper heat source 63 does not reach the lower heat source 64. In other words, the upper and lower heat sources 63 and the heat source 64 are "thermally insulated" by the interposer 30a. Therefore, for example, even if the lower heat source 64 is a semiconductor element that consumes a large amount of power, the upper heat source 63 is a heat sensitive semiconductor element, and the interposer 30a having such a configuration can be interposed therebetween. To greatly reduce the thermal impact of the lower semiconductor components on the upper semiconductor components.

將使用具有圖14所示之中介層30a之本發明之第1實施形態之積層模組40b顯示於圖15A及15B。 The laminated module 40b of the first embodiment of the present invention having the interposer 30a shown in Fig. 14 is shown in Figs. 15A and 15B.

如圖15A所示,本第1實施形態之積層模組40b具備搭載於基板10上之第1半導體元件11b、搭載於其上之中介層30a、以及搭載於其上之第2半導體元件12b。 As shown in FIG. 15A, the multilayer module 40b of the first embodiment includes a first semiconductor element 11b mounted on a substrate 10, an interposer 30a mounted thereon, and a second semiconductor element 12b mounted thereon.

於中介層30a兩側之側壁22,埋入有複數個在厚度方向貫通其之貫通電極36。此等貫通電極36係透過導電性球體37與第2半導體元件12b之電子電路電氣連接(及機械連接),又,透過導電性球體38與第1半導體元件11b之電子電路電氣連接(及機械連接)。亦即,第1半導體元件11b與第2半導體元件12b之電子電路係使用中介層30a之貫通電極36相互電氣連接,且相互機械連接(固定)。如此,基板10與第1半導體元件11b與第2半導體元件12b係相互電氣連接,且相互機械連接(固定)。基板10與第1半導體元件11b間之電氣連接及機械連接係使用導電性球體15進行。於基板10與第1半導體元件11b之間、第1半導體元件11b與中介層30a之間、中介層30a與第2半導體元件12b之間之間隙,分別充填有填料16。 A plurality of through electrodes 36 penetrating in the thickness direction are embedded in the side walls 22 on both sides of the interposer 30a. The through electrodes 36 are electrically connected (and mechanically connected) to the electronic circuits of the second semiconductor element 12b through the conductive balls 37, and are electrically connected (and mechanically connected) to the electronic circuits of the first semiconductor elements 11b through the conductive balls 38. ). That is, the electronic circuits of the first semiconductor element 11b and the second semiconductor element 12b are electrically connected to each other using the through electrodes 36 of the interposer 30a, and are mechanically connected (fixed) to each other. In this manner, the substrate 10 and the first semiconductor element 11b and the second semiconductor element 12b are electrically connected to each other and mechanically connected (fixed) to each other. Electrical connection and mechanical connection between the substrate 10 and the first semiconductor element 11b are performed using the conductive balls 15. A filler 16 is filled between the substrate 10 and the first semiconductor element 11b, between the first semiconductor element 11b and the interposer 30a, and between the interposer 30a and the second semiconductor element 12b.

圖15A中,雖顯示了中介層30a之熱反射層61a與熱放射層61b,但絕緣層62a與62b係省略。 In Fig. 15A, although the heat reflecting layer 61a and the heat radiation layer 61b of the interposer 30a are shown, the insulating layers 62a and 62b are omitted.

如圖15B所示,於中介層30a之通道31,有流體L如以箭頭35所示流動。因此,圖15A中,流體L從紙面前側往深側流動。在第1半導體元件11b產生之熱由於透過熱放射層61b被流體L吸收,因此藉由流體L之排出被放出至外部。透過熱放射層61b而到達熱反射層61a之熱由於亦在該處被反射而被流體L吸收,因此仍會藉由流體L之排 出被放出至外部。又,在第2半導體元件12b產生之熱被熱反射層61a往上方反射,藉此放熱至外部。在熱反射層61a未完全反射而透過此之熱,由於會透過熱反射層61a而被流動於通道31之流體L吸收,因此此亦藉由流體L之排出被放出至外部。 As shown in Fig. 15B, in the channel 31 of the interposer 30a, a fluid L flows as indicated by an arrow 35. Therefore, in Fig. 15A, the fluid L flows from the front side to the deep side of the paper. Since the heat generated in the first semiconductor element 11b is absorbed by the fluid L through the heat radiation layer 61b, it is discharged to the outside by the discharge of the fluid L. The heat that has passed through the heat radiation layer 61b and reaches the heat reflection layer 61a is also absorbed by the fluid L at that point, and is still absorbed by the fluid L. The out is released to the outside. Further, the heat generated in the second semiconductor element 12b is reflected upward by the heat reflecting layer 61a, thereby radiating heat to the outside. The heat that has not been completely reflected by the heat reflecting layer 61a and transmitted therethrough is absorbed by the fluid L flowing through the channel 31 through the heat reflecting layer 61a, and therefore is also discharged to the outside by the discharge of the fluid L.

中介層30a左右之側壁32雖係與上壁33及下壁34一起區劃通道31者,但亦為連結第1半導體元件11b與第2半導體元件12b之熱傳導路。此情形下,在第1半導體元件11b產生之熱之一部分會經由側壁32傳達至第2半導體元件12b。不過,藉由使側壁32之寬度較小,或實施將側壁32以與上壁33及下壁34相異之材料(最好係熱傳導率小之材料)構成等措施,即能減小經由側壁32之熱傳導量。因此,最好係盡可能如上述進行。 The side wall 32 of the left and right sides of the interposer 30a divides the channel 31 together with the upper wall 33 and the lower wall 34, but is also a heat conduction path connecting the first semiconductor element 11b and the second semiconductor element 12b. In this case, one of the heat generated in the first semiconductor element 11b is transmitted to the second semiconductor element 12b via the side wall 32. However, by making the width of the side wall 32 small, or by constructing the side wall 32 with a material different from the upper wall 33 and the lower wall 34 (preferably a material having a small thermal conductivity), the side wall can be reduced. 32 heat conduction. Therefore, it is preferable to carry out as much as possible as described above.

形成於側壁32之貫通電極36通常係以如金屬之熱傳導率大之材料形成。此情形下,由於容易引起經由貫通電極36之熱傳導,因此在第1半導體元件11b產生之熱之一部分到達第2半導體元件12b,而有可能使第2半導體元件12b之溫度上升。然而,藉由減小貫通電極36之粗度,或修正前述電氣配線層之設計來減少貫通電極36之數目,而能減小傳導之熱量。因此,最好係盡可能如上述進行。 The through electrode 36 formed on the side wall 32 is usually formed of a material having a large thermal conductivity such as metal. In this case, since heat conduction through the through electrode 36 is likely to occur, one of the heat generated in the first semiconductor element 11b reaches the second semiconductor element 12b, and the temperature of the second semiconductor element 12b may rise. However, by reducing the thickness of the through electrode 36 or modifying the design of the wiring layer to reduce the number of through electrodes 36, the amount of conduction heat can be reduced. Therefore, it is preferable to carry out as much as possible as described above.

如圖15A及圖15B所示,配置於通道31之上壁33內面之熱反射層61a非配置於上壁33之內面整體,而係配置於上壁33內面之除了周邊區域以外之部分。同樣地,配置於通道31之下壁34內面之熱放射層61b非配置於下壁34 之內面整體,而係配置於下壁34內面之除了周邊區域以外之部分。然而,關於熱反射層61a與熱放射層61b之配置,不限於圖15A及圖15B所例示之配置。 As shown in FIG. 15A and FIG. 15B, the heat reflecting layer 61a disposed on the inner surface of the upper wall 33 of the channel 31 is not disposed on the entire inner surface of the upper wall 33, but is disposed on the inner surface of the upper wall 33 except for the peripheral region. section. Similarly, the heat radiation layer 61b disposed on the inner surface of the lower wall 34 of the channel 31 is not disposed on the lower wall 34. The inner surface is entirely disposed on the inner surface of the lower wall 34 except for the peripheral region. However, the arrangement of the heat reflective layer 61a and the heat radiation layer 61b is not limited to the arrangement illustrated in FIGS. 15A and 15B.

例如,(a)亦可將熱放射層61b配置於下壁34之內面整體與側壁32之內面整體,將熱反射層61a配置於上壁33內面之指定區域。此配置例,非常合適於僅考量使在半導體元件11b產生之熱放出至流體L之情形。(b)亦可將熱放射層61b配置於下壁33之指定區域,將熱反射層61a配置於上壁33之內面整體與側壁32之內面整體。(c)亦可將熱放射層61b配置於下壁34之內面整體與左側之側壁32之接近下壁34之區域,將熱反射層61a配置於上壁33之內面整體與右側之側壁32之接近上壁33之區域。 For example, (a) the heat radiation layer 61b may be disposed on the entire inner surface of the lower wall 34 and the inner surface of the side wall 32, and the heat reflection layer 61a may be disposed in a predetermined region on the inner surface of the upper wall 33. This configuration example is very suitable for considering only the case where the heat generated in the semiconductor element 11b is released to the fluid L. (b) The heat radiation layer 61b may be disposed in a predetermined region of the lower wall 33, and the heat reflection layer 61a may be disposed on the entire inner surface of the upper wall 33 and the entire inner surface of the side wall 32. (c) The heat radiation layer 61b may be disposed in a region of the inner surface of the lower wall 34 and the side wall 32 of the left side adjacent to the lower wall 34, and the heat reflection layer 61a may be disposed on the inner surface of the upper wall 33 and the side wall of the right side. The area of 32 close to the upper wall 33.

從圖15B可清楚得知,上述之中介層30a之通道31之平面形狀為直線。然而,通道31之平面形狀不限定於此。例如,亦可作成如圖16A及圖16B所示之平面形狀。 As is clear from Fig. 15B, the planar shape of the channel 31 of the interposer 30a described above is a straight line. However, the planar shape of the passage 31 is not limited thereto. For example, a planar shape as shown in FIGS. 16A and 16B can also be made.

(第2實施形態之積層模組) (Laminated module of the second embodiment)

圖16A係顯示本發明之第2實施形態之積層模組所使用之中介層30b構成之剖面說明圖。 Fig. 16A is a cross-sectional explanatory view showing the structure of an interposer 30b used in the laminated module according to the second embodiment of the present invention.

此中介層30b中,左右側壁32係在通道31之上游側與下游側之端部區域(圖16A中為上下端部之區域)往內側突出。亦即,通道31之寬度(剖面積),在上游側與下游側之端部區域較中央部狹窄。其結果,沿箭頭35a流入通道31之流體L通過通道31之狹窄入口流入,被導至寬廣中央部後,通過狹窄出口流出至外部。 In the intermediate layer 30b, the left and right side walls 32 project inward at the end portion of the upstream side and the downstream side of the passage 31 (the region of the upper and lower ends in Fig. 16A). That is, the width (sectional area) of the passage 31 is narrower at the end portion on the upstream side and the downstream side than at the center portion. As a result, the fluid L flowing into the passage 31 along the arrow 35a flows in through the narrow inlet of the passage 31, is guided to the wide central portion, and flows out to the outside through the narrow outlet.

此中介層30b中,由於藉由使左右之側壁32往內側突出,而使貫通電極36能配置之面積增大,因此在有使貫通電極36數目增加之必要時,特別有效。 In the interposer 30b, since the area of the through electrode 36 can be increased by projecting the left and right side walls 32 inward, it is particularly effective when the number of the through electrodes 36 is increased.

關於通道31之形狀能有多個變形。例如,通道31之縱剖面形狀(沿相對基板10垂直之面之剖面形狀)最好係包含大致正方形之大致長方形(例如流體之流動方向之長度較大,高度方向之長度較小之長方形)。通道31之水平剖面形狀雖與縱剖面形狀同樣地最好係包含大致正方形之大致長方形,但並不限於此。例如,亦可流體L流入通道31之入口區域與流體L流出之出口區域兩者、或通道31之入口區域與出口區域之任一方較狹窄。此狹窄之區域雖係側壁32彎曲,但亦可於該彎曲區域配置貫通電極36。此例係第2實施形態之構成。 There are a number of variations with respect to the shape of the channel 31. For example, the longitudinal cross-sectional shape of the channel 31 (the cross-sectional shape along the plane perpendicular to the substrate 10) preferably includes a substantially square substantially rectangular shape (for example, a rectangle having a large length in the flow direction of the fluid and a small length in the height direction). The horizontal cross-sectional shape of the channel 31 preferably includes a substantially square substantially rectangular shape similarly to the longitudinal cross-sectional shape, but is not limited thereto. For example, either the inlet region of the fluid L into the passage 31 and the outlet region where the fluid L flows out, or the inlet region and the outlet region of the passage 31 may be narrower. Although the narrowed region is curved by the side wall 32, the through electrode 36 may be disposed in the curved region. This example is a configuration of the second embodiment.

通道31之入口與出口之配置區域雖最好係位於通道31寬度方向之中央部,但並不限於此。例如,亦可將入口配置於較寬度方向之中央部靠左處,將出口配置於靠右處。此例係圖16B所示之後述之第3實施形態之構成。 The arrangement area of the inlet and the outlet of the passage 31 is preferably located at the central portion in the width direction of the passage 31, but is not limited thereto. For example, the inlet may be disposed to the left in the center portion in the width direction, and the outlet may be disposed on the right side. This example is a configuration of the third embodiment described later in Fig. 16B.

圖16A所示之中介層30b中,通道31係在其入口側端部與出口側端部較細,通道31中央部較其入口側及出口側端部粗(剖面積較大)。此種構成,能同時滿足欲使熱反射層61a與熱放射層61b面積增大來增大放熱效果之要求、以及欲對應貫通電極36總數之增加之兩個要求。 In the interposer 30b shown in Fig. 16A, the passage 31 is thinner at the inlet side end portion and the outlet side end portion, and the center portion of the passage 31 is thicker than the inlet side and the outlet side end portion (the sectional area is larger). With such a configuration, it is possible to simultaneously satisfy the requirements for increasing the area of the heat reflecting layer 61a and the heat radiation layer 61b to increase the heat radiation effect, and the two requirements for increasing the total number of the through electrodes 36.

(第3實施形態之積層模組) (Layer module of the third embodiment)

圖16B係顯示本發明之第3實施形態之積層模組所使 用之中介層30c構成之剖面說明圖。 Fig. 16B is a view showing a laminated module according to a third embodiment of the present invention; A cross-sectional explanatory view of the interposer 30c is used.

此中介層30c中,左側之側壁32在通道31之下游側之端部區域(圖16B中為上端部之區域)往內側突出,右側之側壁32在通道31之上游側之端部區域(圖16B中為下端部之區域)往內側突出。亦即,於通道31之中央形成有階梯狀彎曲之彎曲部。其結果,沿箭頭35a流入通道31之流體L通過通道31之狹窄入口流入,通過中央之彎曲部後,通過狹窄出口流出至外部。因此,流體L看似彷彿在傾斜方向流動於通道31。 In the intermediate layer 30c, the side wall 32 of the left side protrudes inward at the end portion (the region of the upper end portion in FIG. 16B) on the downstream side of the passage 31, and the end portion of the right side wall 32 on the upstream side of the passage 31 (Fig. The region of the lower end portion of 16B protrudes inward. That is, a curved portion having a stepped curvature is formed in the center of the passage 31. As a result, the fluid L flowing into the passage 31 along the arrow 35a flows in through the narrow inlet of the passage 31, passes through the curved portion at the center, and then flows out to the outside through the narrow outlet. Therefore, the fluid L appears to flow in the oblique direction as to the passage 31.

此中介層30c中,由於藉由使左右之側壁32往內側突出,而使貫通電極36能配置之面積增大,因此在有使貫通電極36數目增加之必要時,特別有效。 In the interposer 30c, since the area of the through electrode 36 can be increased by projecting the left and right side walls 32 inward, it is particularly effective when the number of the through electrodes 36 is increased.

關於通道31之形狀,能進行與上述第2實施形態所述者相同之變形。 The shape of the passage 31 can be deformed in the same manner as described in the second embodiment.

圖16B所示之中介層30c亦同樣地,通道31係在其入口側端部與出口側端部較細,通道31中央部較其入口側及出口側端部粗(剖面積較大)。此種構成,能同時滿足欲使熱反射層61a與熱放射層61b面積增大來增大放熱效果之要求、以及欲對應貫通電極36總數之增加之兩個要求。 Similarly, in the interposer 30c shown in Fig. 16B, the passage 31 is thinner at the inlet side end portion and the outlet side end portion, and the center portion of the passage 31 is thicker than the inlet side and the outlet side end portion (the sectional area is larger). With such a configuration, it is possible to simultaneously satisfy the requirements for increasing the area of the heat reflecting layer 61a and the heat radiation layer 61b to increase the heat radiation effect, and the two requirements for increasing the total number of the through electrodes 36.

(第1實施形態所使用之中介層之製造方法第1例) (First example of manufacturing method of interposer used in the first embodiment)

圖17係顯示上述之第1實施形態之積層模組所使用之中介層30a之製造方法第1例。此製造方法,由於亦能使用於上述之第2及第3實施形態之積層模組所使用之中介層30b及30c之任一者,因此此處針對中介層30a之製造方法 作說明。 Fig. 17 is a view showing a first example of a method of manufacturing the interposer 30a used in the multilayer module of the first embodiment. This manufacturing method can also be used for any of the interposers 30b and 30c used in the multilayer module of the second and third embodiments described above. Therefore, the method for manufacturing the interposer 30a is here. Give instructions.

首先,如圖17(a)所示,於板狀之上壁33內面(在圖中為下面)之既定區域形成熱反射層61a。上壁33雖最好係由熱傳導率大之材料構成,但亦可非如此。熱反射層61a例如係將金、鋁等金屬使用蒸鍍法等手法而形成。 First, as shown in Fig. 17 (a), a heat reflecting layer 61a is formed in a predetermined region on the inner surface (lower in the figure) of the plate-like upper wall 33. The upper wall 33 is preferably made of a material having a large thermal conductivity, but may be different. The heat reflecting layer 61a is formed, for example, by using a metal such as gold or aluminum by a vapor deposition method or the like.

其次,如圖17(b)所示,於板狀之下壁34內面(在圖中為上面)之既定區域形成熱放射層61b。熱放射層61b例如藉由「金黑」之蒸鍍膜來形成。 Next, as shown in Fig. 17 (b), a heat radiation layer 61b is formed in a predetermined region on the inner surface (upper in the figure) of the plate-shaped lower wall 34. The heat radiation layer 61b is formed, for example, by a vapor deposition film of "gold black".

此處,熱反射層61a與熱放射層61b雖不覆蓋上壁33之內面與下壁34之內面整體而僅於中央區域選擇性地形成,但並不限定於此。亦可分別覆蓋上壁33之內面與下壁34之內面整體。 Here, the heat reflecting layer 61a and the heat radiation layer 61b are not formed to cover the entire inner surface of the upper wall 33 and the inner surface of the lower wall 34, but are selectively formed only in the central region, but are not limited thereto. The inner surface of the upper wall 33 and the inner surface of the lower wall 34 may be covered as a whole.

其次,如圖17(c)所示,於下壁34左右之周邊區域分別以不與熱放射層61b重疊之方式形成帶狀之側壁32。側壁32之材料例如為樹脂,藉由接著劑等固接於下壁34之內面(在圖中為上面)。 Next, as shown in Fig. 17 (c), the strip-shaped side walls 32 are formed so as not to overlap the heat radiation layer 61b in the peripheral regions on the right and left sides of the lower wall 34, respectively. The material of the side wall 32 is, for example, a resin, and is fixed to the inner surface (upper side in the drawing) of the lower wall 34 by an adhesive or the like.

最後,如圖17(d)所示,使用接著劑等使左右之側壁32上面分別固接上壁33內面之對應處。如此,製造於內部具有通道31之中介層30a。流體L係從紙面之前方往後方(或後方往前方)貫通通道31內部流動。 Finally, as shown in Fig. 17 (d), the upper and lower side walls 32 are respectively fixed to the upper surfaces of the upper surfaces of the upper walls 33 by using an adhesive or the like. Thus, the interposer 30a having the passage 31 inside is manufactured. The fluid L flows through the inside of the passage 31 from the front side (or the rear side toward the front side) of the paper surface.

此製造方法之第1例所使用之接著劑等,需考量與接著對象物之緊貼性而選擇可長期維持通道31之氣密性者。例如,在上壁33與下壁34由單結晶矽形成,側壁32由玻璃形成時,下壁34與側壁32之接合,進而側壁32與上壁 33之接合能使用靜電接合技術。由於靜電接合之密封性充分高,因此能長期維持通道31之氣密性。又,由於上壁33與下壁34係單結晶矽製,因此亦能使用周知技術分別於上壁33與下壁34之表面形成1層以上之配線層。 The adhesive or the like used in the first example of the production method is selected such that the airtightness of the passage 31 can be maintained for a long period of time in consideration of the adhesion to the object to be attached. For example, when the upper wall 33 and the lower wall 34 are formed of a single crystal raft, and the side wall 32 is formed of glass, the lower wall 34 is joined to the side wall 32, and thus the side wall 32 and the upper wall The bonding of 33 can use electrostatic bonding techniques. Since the sealing property of the electrostatic bonding is sufficiently high, the airtightness of the passage 31 can be maintained for a long period of time. Further, since the upper wall 33 and the lower wall 34 are made of a single crystal, it is also possible to form one or more wiring layers on the surfaces of the upper wall 33 and the lower wall 34 by a known technique.

此外,圖17雖無顯示,但亦能於中介層30a之周邊區域形成貫通電極36。例如使用RIE(反應性離子蝕刻)等加工技術形成複數個貫通上壁33(例如單結晶矽)、側壁32(例如玻璃)、下壁34(例如單結晶矽)之孔,並於該等貫通孔內部視必要使絕緣膜介在同時附著或充填導電材料,藉此能形成貫通電極36。 Further, although not shown in Fig. 17, the through electrode 36 can be formed in the peripheral region of the interposer 30a. For example, a plurality of holes penetrating the upper wall 33 (for example, a single crystal crucible), the side wall 32 (for example, glass), and the lower wall 34 (for example, a single crystal crucible) are formed by a processing technique such as RIE (Reactive Ion Etching), and are penetrated therethrough. The inside of the hole may be such that the insulating film is attached or filled with a conductive material at the same time, whereby the through electrode 36 can be formed.

(第1實施形態所使用之中介層之製造方法第2例) (Second example of manufacturing method of interposer used in the first embodiment)

圖18係顯示上述之第1實施形態之積層模組所使用之中介層30a之製造方法第2例。 Fig. 18 is a view showing a second example of the method of manufacturing the interposer 30a used in the multilayer module of the first embodiment.

首先,如圖18(a)所示,於板狀之上壁33內面(在圖中為下面)之既定區域形成熱反射層61a。上壁33雖最好係由熱傳導率大之材料構成,但亦可非如此。熱反射層61a例如係將金、鋁等金屬使用蒸鍍法等手法而形成。此步驟與上述之製造方法第1例相同。 First, as shown in Fig. 18 (a), a heat reflecting layer 61a is formed in a predetermined region on the inner surface (lower side in the figure) of the plate-like upper wall 33. The upper wall 33 is preferably made of a material having a large thermal conductivity, but may be different. The heat reflecting layer 61a is formed, for example, by using a metal such as gold or aluminum by a vapor deposition method or the like. This step is the same as the first example of the above-described manufacturing method.

其次,如圖18(b)所示,將中介層30a之下壁34與側壁32一體形成。側壁32分別位於下壁34左右之周邊區域。被下壁34與側壁32包圍之處形成有凹陷34a。又,於下壁34之內面(在圖中為上面)之既定區域(此位於凹陷34a中)形成熱放射層61b。熱放射層61b例如藉由「金黑」之蒸鍍膜形成。此步驟與上述之製造方法第1例相異。 Next, as shown in Fig. 18 (b), the lower wall 34 of the interposer 30a is integrally formed with the side wall 32. The side walls 32 are respectively located at peripheral regions of the left and right walls 34. A recess 34a is formed by the lower wall 34 and the side wall 32. Further, a heat radiation layer 61b is formed in a predetermined region (which is located in the recess 34a) on the inner surface (upper in the figure) of the lower wall 34. The heat radiation layer 61b is formed, for example, by a vapor deposition film of "gold black". This step is different from the first example of the above-described manufacturing method.

此種構成,能藉由選擇性地除去下壁34中央區域而形成凹陷34a後於凹陷34a底面形成熱放射層61b,來容易地實現。若具體顯示其加工法之一例,則如下述。亦即,首先於單結晶矽板(其厚度相等於側壁32厚度)之上側表面形成經圖案化之光阻層。其次,以該光阻層為光罩,透過RIE法等選擇性地除去單結晶矽板至既定深度。如此,於單結晶矽板之中央區域形成凹陷34a。最後,使用蒸鍍法等於凹陷34a底面選擇性地形成金黑層,只要作為熱放射層61b則為完成。 Such a configuration can be easily realized by selectively removing the central portion of the lower wall 34 to form the recess 34a and then forming the heat radiation layer 61b on the bottom surface of the recess 34a. If an example of the processing method is specifically shown, it is as follows. That is, a patterned photoresist layer is first formed on the upper side surface of the single crystal raft plate (having a thickness equal to the thickness of the side wall 32). Next, the photoresist layer is used as a mask, and the single crystal plate is selectively removed by a RIE method or the like to a predetermined depth. Thus, the recess 34a is formed in the central portion of the single crystal raft. Finally, the gold black layer is selectively formed using the vapor deposition method to be equal to the bottom surface of the recess 34a, as long as it is completed as the heat radiation layer 61b.

此處,雖熱放射層61b不覆蓋凹陷34a之底面整體而僅形成於中央區域,但並不限定於此。例如,熱放射層61b亦可覆蓋凹陷34a之底面整體,亦可覆蓋凹陷34a之底面整體與兩側壁32之內面一部分,亦可覆蓋凹陷34a之底面整體與兩側壁32之內面整體。 Here, although the heat radiation layer 61b does not cover the entire bottom surface of the recess 34a but is formed only in the center area, it is not limited to this. For example, the heat radiation layer 61b may cover the entire bottom surface of the recess 34a, or cover the entire bottom surface of the recess 34a and a part of the inner surface of the side walls 32, or cover the entire bottom surface of the recess 34a and the inner surface of the two side walls 32 as a whole.

最後,如圖18(c)所示,使圖18(b)所示構成之兩側壁32之上面固接於圖18(a)所示之上壁33(此具有熱反射層61a)內面之周邊區域後,製造於內部具有通道31之中介層30a。此固接能使用環氧系接著材67等。 Finally, as shown in Fig. 18 (c), the upper surfaces of the side walls 32 of the configuration shown in Fig. 18 (b) are fixed to the inner surface of the upper wall 33 (which has the heat reflecting layer 61a) shown in Fig. 18 (a). After the peripheral region, the interposer 30a having the passage 31 inside is manufactured. An epoxy-based adhesive material 67 or the like can be used for this fastening.

在上壁33與具有側壁32之下壁34兩者以單結晶矽形成且於側壁32之上端面未形成有熱放射層61b時(此第2例即為此),亦能以矽-矽熱接合進行上壁33與具有側壁32之下壁34之接合。 When both the upper wall 33 and the lower wall 34 having the side wall 32 are formed of a single crystal enthalpy and the heat radiation layer 61b is not formed on the upper end surface of the side wall 32 (this second example is for this purpose), the 矽-矽 can also be used. Thermal bonding proceeds to engage the upper wall 33 with the lower wall 34 of the side wall 32.

通道31由於必須維持氣密性,因此前述之接著材等或熱接合程序,需適當選擇以維持通道31之所欲氣密性。 Since the passage 31 must be kept airtight, the aforementioned joining or the like or the thermal joining procedure should be appropriately selected to maintain the desired airtightness of the passage 31.

圖18所示之第2例,係假定於上壁33與具有側壁32之下壁34利用單結晶矽之情形。因此,能使用周知加工技術於側壁32形成貫通電極36,亦能於上壁33與下壁34分別形成1層以上之電氣配線層。上壁33與具有側壁32之下壁34之材料不限於單結晶矽,亦可使用樹脂等。 The second example shown in Fig. 18 is assumed to be a case where the upper wall 33 and the lower wall 34 having the side wall 32 are made of a single crystal. Therefore, the through electrode 36 can be formed on the side wall 32 by a known processing technique, and one or more electrical wiring layers can be formed on the upper wall 33 and the lower wall 34, respectively. The material of the upper wall 33 and the lower wall 34 having the side wall 32 is not limited to a single crystal crucible, and a resin or the like may be used.

此外,亦能將圖18(b)所示之構造直接作為中介層30a使用。此情形下,雖不存在區劃通道31之頂部分,但此頂部分之功能,係由搭載於中介層30a上位之半導體元件12b之下側表面來發揮。又,熱反射層61a形成於此半導體元件12b之下側表面。 Further, the configuration shown in Fig. 18(b) can also be directly used as the interposer 30a. In this case, although the top portion of the partitioning passage 31 does not exist, the function of the top portion is exerted by the lower surface of the semiconductor element 12b mounted on the upper portion of the interposer 30a. Further, the heat reflective layer 61a is formed on the lower side surface of the semiconductor element 12b.

同樣地,亦能藉由使圖18(b)之構成上下反轉,作成不存在區劃通道31之底部分之中介層30a。 Similarly, the intermediate layer 30a in which the bottom portion of the zoning passage 31 does not exist can be formed by vertically inverting the configuration of Fig. 18(b).

(第1實施形態所使用之中介層之製造方法第3例) (The third example of the method for producing the interposer used in the first embodiment)

圖19係顯示上述之第1實施形態之積層模組所使用之中介層30a之製造方法第3例。 Fig. 19 is a view showing a third example of the method of manufacturing the interposer 30a used in the multilayer module of the first embodiment.

首先,如圖19(a)所示,準備作為下壁34之板狀母材34’(此處為單結晶矽基板)。 First, as shown in Fig. 19 (a), a plate-shaped base material 34' (here, a single crystal ruthenium substrate) as the lower wall 34 is prepared.

其次,如圖19(b)所示,藉由周知之手法於母材34’左右周邊區域形成複數個貫通電極36。更具體而言,藉由以RIE法蝕刻,於母材34’形成複數個貫通於其厚度方向之貫通孔,以絕緣層(未圖示)覆蓋此等貫通孔內側後,於此等絕緣層內側覆蓋或充填導電性材料。藉由如此對各貫通孔賦予導電性,能容易地製得貫通電極36。其後,於母材34’表面與背面分別形成電氣連接用墊68及69,電氣連接於對 應之貫通電極36。 Next, as shown in Fig. 19 (b), a plurality of through electrodes 36 are formed in the peripheral regions of the base material 34' by a known method. More specifically, by etching by the RIE method, a plurality of through holes penetrating through the thickness direction of the base material 34' are formed, and the inside of the through holes is covered with an insulating layer (not shown), and the insulating layer is formed thereon. The inner side is covered or filled with a conductive material. By providing conductivity to each of the through holes as described above, the through electrode 36 can be easily produced. Thereafter, electrical connection pads 68 and 69 are formed on the front and back surfaces of the base material 34', respectively, electrically connected to the pair The electrode 36 should be penetrated.

其次,如圖19(c)所示,利用經圖案化之光罩(未圖示。此由光阻膜等構成),將母材34’從其表面側選擇性地除去,而形成凹陷34a。此凹陷34a之形成步驟,例如利用TMAH(氫氧化四甲基銨)或KOH(氫氧化鉀)等異向性蝕刻液。此等蝕刻液中,由於係在特定之矽結晶面(亦即(111)面)蝕刻速度相對變低,因此凹陷34a之緣(亦即,從凹陷34a底面至母材34’表面之斜面)為露出之(111)面。如此,得到左右側壁32一體化之下壁34。 Next, as shown in FIG. 19(c), the mother material 34' is selectively removed from the surface side by a patterned mask (not shown. This is composed of a photoresist film or the like) to form a recess 34a. . The formation step of the recess 34a is, for example, an anisotropic etching solution such as TMAH (tetramethylammonium hydroxide) or KOH (potassium hydroxide). In these etching liquids, since the etching speed is relatively low on a specific crystal plane (i.e., (111) plane), the edge of the recess 34a (that is, the slope from the bottom surface of the recess 34a to the surface of the base material 34') To expose the (111) face. In this way, the left and right side walls 32 are integrated into the lower wall 34.

接著,於下壁34之凹陷34a底面,以公知之方法形成熱放射層61b。此時之狀態係如圖19(c)所示。 Next, a heat radiation layer 61b is formed on the bottom surface of the recess 34a of the lower wall 34 by a known method. The state at this time is as shown in Fig. 19(c).

另一方面,如圖19(d)所示,形成具有用以使電氣連接用墊68露出之複數個開口33a之上壁33。此上壁33係藉由將板狀之母材(此處為單結晶矽基板)從其上側以RIE法蝕刻等而容易地形成。其後,於上壁33之內面(圖中為下面)之既定區域形成熱反射層61a。 On the other hand, as shown in Fig. 19 (d), the upper wall 33 having a plurality of openings 33a for exposing the electrical connection pads 68 is formed. This upper wall 33 is easily formed by etching a plate-shaped base material (here, a single crystal germanium substrate) from the upper side thereof by RIE etching or the like. Thereafter, a heat reflecting layer 61a is formed in a predetermined region on the inner surface (lower in the figure) of the upper wall 33.

最後,於圖19(c)所示之下壁34(此具有貫通電極36與電氣連接墊68與熱放射層61b)上載置圖19(d)所示之上壁33(此具有熱反射層61a)並固接後,製得具有圖19(e)所示之構造之中介層30a。此固接使用接著劑或低融點玻璃等。藉由下壁34之凹陷34a來形成通道31。通道31必須除了其入口與出口外具有氣密性。 Finally, the lower wall 34 shown in FIG. 19(d) is placed on the lower wall 34 (having the through electrode 36 and the electrical connection pad 68 and the heat radiation layer 61b) as shown in FIG. 19(c) (this has a heat reflective layer). 61a) After the bonding, the interposer 30a having the configuration shown in Fig. 19(e) is obtained. This fixing uses an adhesive or a low melting point glass or the like. The passage 31 is formed by the recess 34a of the lower wall 34. The passage 31 must be airtight except for its inlet and outlet.

此第3例,由於中介層30a之上壁33與下壁34兩者由單結晶矽基板形成,因此亦能於中介層30a之表背面形成1 層以上之配線層。 In the third example, since both the upper wall 33 and the lower wall 34 of the interposer 30a are formed of a single crystal germanium substrate, they can also be formed on the front and back sides of the interposer 30a. Wiring layer above layer.

此外,亦能將圖19(c)所示之構造直接作為中介層30a使用。此情形下,雖不存在區劃通道31之頂部分,但此頂部分之功能,係由搭載於中介層30a上位之半導體元件12b之下側表面來發揮。又,熱反射層61a形成於此半導體元件12b之下側表面。 Further, the configuration shown in Fig. 19(c) can also be directly used as the interposer 30a. In this case, although the top portion of the partitioning passage 31 does not exist, the function of the top portion is exerted by the lower surface of the semiconductor element 12b mounted on the upper portion of the interposer 30a. Further, the heat reflective layer 61a is formed on the lower side surface of the semiconductor element 12b.

同樣地,亦能藉由使圖19(b)之構成上下反轉,作成不存在區劃通道31之底部分之中介層30a。 Similarly, the intermediate layer 30a in which the bottom portion of the zoning passage 31 does not exist can be formed by vertically inverting the configuration of Fig. 19(b).

(第1實施形態所使用之中介層之製造方法第4例) (Fourth example of manufacturing method of interposer used in the first embodiment)

圖20係顯示上述之第1實施形態之積層模組所使用之中介層30a之製造方法第4例。 Fig. 20 is a view showing a fourth example of the method of manufacturing the interposer 30a used in the multilayer module of the first embodiment.

圖20(a)~圖20(c)為止之下壁34(此具有貫通電極36及電氣連接墊68與熱放射層61b)之製程由於與上述之第3例相同,因此其說明省略。 The processes of the lower wall 34 (the through electrode 36, the electrical connection pad 68, and the heat radiation layer 61b) as shown in Figs. 20(a) to 20(c) are the same as those of the third example described above, and thus the description thereof is omitted.

另一方面,如圖20(d)所示,形成作成嵌入下壁34之凹陷34a之形狀之上壁33。此上壁33係藉由將板狀之母材(此處為單結晶矽基板)從其下側以RIE法蝕刻等而容易地形成。其後,於上壁33之內面(圖中為下面)之既定區域形成熱反射層61a。 On the other hand, as shown in Fig. 20 (d), the upper wall 33 is formed to be formed into the shape of the recess 34a of the lower wall 34. This upper wall 33 is easily formed by etching a plate-shaped base material (here, a single crystal germanium substrate) from the lower side thereof by RIE etching or the like. Thereafter, a heat reflecting layer 61a is formed in a predetermined region on the inner surface (lower in the figure) of the upper wall 33.

最後,以嵌入圖20(c)所示之下壁34(此具有貫通電極36及電氣連接墊68與熱放射層61b)之凹陷34a之方式載置圖20(d)所示之上壁33(此具有熱反射層61a)並固接後,製得具有圖20(e)所示之構造之中介層30a。此固接使用接著劑或低融點玻璃等。此狀態下,在凹陷34a內部,於上壁 33之熱反射層61a與下壁34之熱放射層61b間形成有間隙,此為通道31。通道31必須除了其入口與出口外具有氣密性。 Finally, the upper wall 33 shown in FIG. 20(d) is placed so as to be embedded in the recess 34a of the lower wall 34 (which has the through electrode 36 and the electrical connection pad 68 and the heat radiation layer 61b) shown in FIG. 20(c). (This has the heat reflecting layer 61a) and fixed, the interposer 30a having the configuration shown in Fig. 20(e) is obtained. This fixing uses an adhesive or a low melting point glass or the like. In this state, inside the recess 34a, on the upper wall A gap is formed between the heat reflecting layer 61a of 33 and the heat radiating layer 61b of the lower wall 34, which is the passage 31. The passage 31 must be airtight except for its inlet and outlet.

此第4例亦同樣地,由於中介層30a之上壁33與下壁34兩者由單結晶矽基板形成,因此亦能於中介層30a之表背面形成1層以上之配線層。 Similarly, in the fourth example, since both the upper wall 33 and the lower wall 34 of the interposer 30a are formed of a single crystal germanium substrate, one or more wiring layers can be formed on the front and back surfaces of the interposer 30a.

此第4例中,與圖19所示之第3例相異,為上壁33之大致整體嵌入下壁34之凹陷34a中之構成,左右之側壁32之上部表面不被上壁33覆蓋。是以,不需於上壁33設置如第3例之開口33a,因此,有製造技術較圖19所示之第3例簡便之優點。 In the fourth example, unlike the third example shown in FIG. 19, the upper wall 33 is substantially entirely embedded in the recess 34a of the lower wall 34, and the upper surface of the left and right side walls 32 is not covered by the upper wall 33. Therefore, the opening 33a of the third example is not required to be provided on the upper wall 33. Therefore, there is an advantage that the manufacturing technique is simpler than the third example shown in FIG.

此外,亦能將圖20(c)所示之構造直接作為中介層30a使用。此情形下,雖不存在區劃通道31之頂部分,但此頂部分之功能,係由搭載於中介層30a上位之半導體元件12b之下側表面來發揮。又,熱反射層61a形成於此半導體元件12b之下側表面。 Further, the configuration shown in Fig. 20(c) can also be directly used as the interposer 30a. In this case, although the top portion of the partitioning passage 31 does not exist, the function of the top portion is exerted by the lower surface of the semiconductor element 12b mounted on the upper portion of the interposer 30a. Further, the heat reflective layer 61a is formed on the lower side surface of the semiconductor element 12b.

同樣地,亦能藉由使圖20(c)之構成上下反轉,作成不存在區劃通道31之底部分之中介層30a。 Similarly, the intermediate layer 30a in which the bottom portion of the zoning passage 31 does not exist can be formed by vertically inverting the configuration of Fig. 20(c).

(第1實施形態之積層模組之變形例) (Modification of the laminated module of the first embodiment)

至此為止,雖敘述了具有熱反射層61a與熱放射層61b之中介層30a、30b、30c與組裝有其之第1實施形態之積層模組40b,但此積層模組40b除了此等例示者以外,亦能有各種變形例。 Heretofore, the interposer layers 30a, 30b, and 30c having the heat reflective layer 61a and the heat radiation layer 61b and the buildup module 40b of the first embodiment in which the heat radiation layer 61a and the heat radiation layer 61b are incorporated have been described. However, the buildup module 40b is exemplified by these examples. In addition, various modifications are possible.

例如,在位於上位之第2半導體元件12b之消耗電力 較位於下位之第1半導體元件11b之消耗電力大時,可替換熱反射層61a與熱放射層61b之位置。亦即,作成於消耗電力大之第2半導體元件12b側配置有熱放射層61b,於消耗電力小之第1半導體元件11b側配置有熱反射層61a之構成。又,積層模組亦可為將半導體元件積層3層以上之構成、夾入中介層之上下之半導體元件分別為2個以上之構成(例如於中介層上面,在同一平面內排列配置有複數個半導體元件之構成)等。不論係何種構成,均在熱反射層61a與熱放射層61b進行位於中介層上下之半導體元件間之熱絕緣,且藉由從熱放射層61b使熱放出至流體L來取得放熱效果,此點為共通。 For example, power consumption of the second semiconductor element 12b located at the upper position When the power consumption of the lower first semiconductor element 11b is large, the positions of the heat reflection layer 61a and the heat radiation layer 61b can be replaced. In other words, the heat radiation layer 61b is disposed on the side of the second semiconductor element 12b having a large power consumption, and the heat reflection layer 61a is disposed on the side of the first semiconductor element 11b having a small power consumption. Further, the build-up module may have two or more semiconductor elements in which the semiconductor element is laminated in three or more layers and sandwiched between the intermediate layers (for example, on the upper surface of the interposer, a plurality of the semiconductor elements are arranged in the same plane. The composition of the semiconductor element). Regardless of the configuration, the heat reflecting layer 61a and the heat radiation layer 61b are thermally insulated between the semiconductor elements located above and below the interposer, and the heat is released from the heat radiation layer 61b to the fluid L to obtain a heat release effect. Points are common.

(利用流體之斷熱膨脹使冷卻效果增加之構成第1例) (The first example of the structure in which the cooling effect is increased by the thermal expansion of the fluid)

圖21A~圖21C係顯示利用流體之斷熱膨脹使半導體元件之冷卻效果增加之中介層70。圖21A係中介層70之分解立體圖,圖21B係其立體圖,圖21C係其剖面圖。 21A to 21C show the interposer 70 which increases the cooling effect of the semiconductor element by the thermal expansion of the fluid. 21A is an exploded perspective view of the interposer 70, FIG. 21B is a perspective view thereof, and FIG. 21C is a cross-sectional view thereof.

上述第1~第3實施形態所使用之中介層30,亦能藉由將其通道31形狀改變為中介層70之通道71,而得到與中介層70相同之作用效果。 The interposer 30 used in the first to third embodiments can also have the same operational effects as the interposer 70 by changing the shape of the channel 31 to the channel 71 of the interposer 70.

中介層70如圖21A~圖21C所示,係將矩形板狀之上壁73、同樣為矩形板狀之下壁74、一對側壁72a及72b組合而構成,藉由該等四個構件於內部形成有通道71。一對側壁72a及72b具有鏡面對稱之形狀,從該等之上游側端部起在一定之範圍中寬度變寬,從其下游側端部起在一定之範圍中寬度變窄。在一對側壁72a及72b之上游側之寬度寬 廣部分與寬度狹窄部分之間,其寬度係直線變化。因此,被上壁33、下壁34及側壁72a及72b區劃之通道71具有漏斗形之平面形狀,寬度在上游側區域相對變窄(剖面積小),寬度在下游側區域相對變寬(剖面積大)。 As shown in FIGS. 21A to 21C, the interposer 70 is formed by combining a rectangular plate-shaped upper wall 73, a rectangular plate-shaped lower wall 74, and a pair of side walls 72a and 72b, by means of the four members. A passage 71 is formed inside. The pair of side walls 72a and 72b have a mirror-symmetric shape, and the width thereof is widened in a certain range from the upstream side end portion, and the width is narrowed in a certain range from the downstream side end portion. The width on the upstream side of the pair of side walls 72a and 72b is wide Between the wide portion and the narrow portion of the width, the width varies linearly. Therefore, the passage 71 partitioned by the upper wall 33, the lower wall 34, and the side walls 72a and 72b has a funnel-shaped planar shape, the width is relatively narrow in the upstream side region (small sectional area), and the width is relatively wide in the downstream side region (section large area).

通道71之形狀,如圖21C所明確顯示。亦即,通道71之高度雖為一定,但其寬度非為一定,在上游側區域變窄,在下游側區域變寬。上游側區域與下游側區域之中間,為通道71之寬度徐徐擴張之遷移區域。 The shape of the channel 71 is as shown clearly in Figure 21C. That is, although the height of the passage 71 is constant, the width thereof is not constant, and it is narrowed in the upstream side region and widened in the downstream side region. In the middle of the upstream side region and the downstream side region is a transition region in which the width of the channel 71 is gradually expanded.

流體L如以箭頭75a所示,從相對窄之上游側開口(入口)流入中介層70之通道71,如以箭頭75b所示,從相對寬之下游側開口(出口)流出。由於通道71之寬度在從上游側端部經過一定範圍處急遽地擴大,因此流體L在通過通道71之途中引起斷熱膨脹,溫度降低。其結果,使通道71內之溫度降低。亦即,中介層70由於其本身具有冷卻(吸熱)作用,因此與不利用斷熱膨脹之情形相較,半導體元件之冷卻效果係提升。 The fluid L flows into the passage 71 of the interposer 70 from the relatively narrow upstream side opening (inlet) as indicated by an arrow 75a, and flows out from the relatively wide downstream side opening (outlet) as indicated by an arrow 75b. Since the width of the passage 71 is sharply expanded at a certain extent from the upstream end, the fluid L causes thermal expansion and the temperature is lowered while passing through the passage 71. As a result, the temperature inside the channel 71 is lowered. That is, since the interposer 70 has a function of cooling (endothermic) by itself, the cooling effect of the semiconductor element is improved as compared with the case where the thermal expansion is not utilized.

圖21A~圖21C所示之構造,此處稱為「斷熱膨脹構造」。此「斷熱膨脹構造」,亦可與圖14所示之上述第1~第3實施形態之「放射/反射構造」組合。如此,能更增加流體L所產生之冷卻(吸熱)作用。此情形下,於形成通道71之頂部分之上壁73配置有熱反射層61a,於形成通道71之底部分之下壁74配置有熱放射層61b。熱反射層61a與熱放射層61b之配置處與配置範圍只要與上述第1~第3實施形態相同即可。 The structure shown in FIGS. 21A to 21C is referred to herein as a "heat-breaking expansion structure". The "thermal expansion structure" may be combined with the "radiation/reflection structure" of the first to third embodiments shown in FIG. In this way, the cooling (endothermic) effect generated by the fluid L can be further increased. In this case, the heat reflecting layer 61a is disposed on the upper wall 73 of the top portion of the forming passage 71, and the heat radiating layer 61b is disposed in the lower wall 74 of the bottom portion forming the passage 71. The arrangement and arrangement range of the heat reflecting layer 61a and the heat radiation layer 61b may be the same as those of the first to third embodiments described above.

圖22A係將具有如以上構成與作用之中介層70組裝於圖2A及圖2B所示之接合模組而構成之積層模組之構裝構造之例。圖22B顯示中介層70之通道71。 Fig. 22A shows an example of a structure of a laminated module in which the interposer 70 having the above-described configuration and function is assembled to the bonding module shown in Figs. 2A and 2B. Figure 22B shows the channel 71 of the interposer 70.

圖22A所示之積層模組之構裝構造,由於除了取代中介層20而使用中介層70這點以外,其餘則與圖22A及圖22B所示之接合模組相同,因此其說明省略。圖22A中,流體L係從紙面前方往後方沿與該紙面垂直之方向流動。 The structure of the laminated module shown in FIG. 22A is the same as that of the bonding module shown in FIGS. 22A and 22B except that the interposer 70 is used instead of the interposer 20, and thus the description thereof is omitted. In Fig. 22A, the fluid L flows from the front side toward the rear side in the direction perpendicular to the paper surface.

圖22A之構裝構造中,於位於下位之第1半導體元件11a與位於上位之第2半導體元件12a之間配置有具有「斷熱膨脹構造」之中介層70。如圖22B所示,在使流體L從中介層70之狹窄入口流入通道71後,流體L,首先從上游側端部進入一定範圍之寬度寬廣(剖面積相對大)之第1區域71a。流體L接著通過寬度徐徐增大之遷移區域,而從下游側端部進入一定範圍之寬度狹窄(剖面積相對小)之第2區域71b,通過其寬廣出口而從通道71流出。流體L通過第1區域71a後,由於壓力急遽地下降,因此會一邊斷熱膨脹、一邊到達第2區域71b。其結果,使流體L之溫度降低。 In the package structure of FIG. 22A, an interposer 70 having a "heat-dissipating structure" is disposed between the lower first semiconductor element 11a and the upper second semiconductor element 12a. As shown in Fig. 22B, after the fluid L flows into the channel 71 from the narrow inlet of the interposer 70, the fluid L first enters the first region 71a having a wide width (a relatively large cross-sectional area) from the upstream end portion. The fluid L then passes through the transition region whose width is gradually increased, and enters the second region 71b having a narrow width (the cross-sectional area is relatively small) from the downstream end portion, and flows out from the passage 71 through the wide outlet. When the fluid L passes through the first region 71a, the pressure is rapidly lowered, so that it expands to the second region 71b while being thermally decompressed. As a result, the temperature of the fluid L is lowered.

在無在第1半導體元件11a與第2半導體元件12a之發熱時,從通道71流出時之流體L之溫度會較往通道71流入時之流體L溫度低。有在第1半導體元件11a與第2半導體元件12a之發熱時,此等熱由於會被流體L吸收,因此可有效地放出來自第1半導體元件11a與第2半導體元件12a之熱。 When the first semiconductor element 11a and the second semiconductor element 12a are not heated, the temperature of the fluid L flowing out of the channel 71 is lower than the temperature of the fluid L when the channel 71 flows. When heat is generated in the first semiconductor element 11a and the second semiconductor element 12a, the heat is absorbed by the fluid L, so that heat from the first semiconductor element 11a and the second semiconductor element 12a can be efficiently released.

(利用流體之斷熱膨脹使冷卻效果增加之構成第2例) (Second example of the structure in which the cooling effect is increased by the thermal expansion of the fluid)

圖23A係顯示將圖21A~圖21C所示之中介層70組裝於圖3A及圖3B所示之貫通電極模組而構成之積層模組之構裝構造。圖23B顯示中介層70之通道71。 Fig. 23A shows a structure of a laminated module in which the interposer 70 shown in Figs. 21A to 21C is assembled to the through electrode module shown in Figs. 3A and 3B. Figure 23B shows the channel 71 of the interposer 70.

圖23A所示之構裝構造,由於除了取代中介層30而使用中介層70這點以外,其餘則與圖3A及圖3B所示之接合模組相同,因此其說明省略。圖23A中,流體L係從紙面前方往後方沿與該紙面垂直之方向流動。 The structure shown in FIG. 23A is the same as the bonding module shown in FIGS. 3A and 3B except that the interposer 70 is used instead of the interposer 30, and thus the description thereof is omitted. In Fig. 23A, the fluid L flows from the front side to the rear side of the paper surface in a direction perpendicular to the paper surface.

由於圖23A之構裝構造中亦同樣地,於位於下位之第1半導體元件11b與位於上位之第2半導體元件12b之間配置有具有「斷熱膨脹構造」之中介層70,因此與圖22A之構裝構造同樣地,在通過第1區域71a後,流體L之壓力急遽地降低,一邊斷熱膨脹、一邊到達第2區域71b。其結果,使流體L之溫度降低。 In the same configuration as in the configuration of FIG. 23A, the interposer 70 having the "heat-dissipating structure" is disposed between the first semiconductor element 11b located at the lower position and the second semiconductor element 12b located at the upper position. In the same manner, after the first region 71a is passed, the pressure of the fluid L is rapidly lowered, and the second region 71b is reached while being thermally expanded. As a result, the temperature of the fluid L is lowered.

在無在第1半導體元件11b與第2半導體元件12b之發熱時,從通道71流出時之流體L之溫度會較往通道71流入時之流體L溫度低。有在第1半導體元件11b與第2半導體元件12b之發熱時,此等熱由於會被流體L吸收,因此可有效地放出來自第1半導體元件11b與第2半導體元件12b之熱。 When there is no heat generation in the first semiconductor element 11b and the second semiconductor element 12b, the temperature of the fluid L when flowing out from the channel 71 is lower than the temperature of the fluid L when the channel 71 flows. When heat is generated in the first semiconductor element 11b and the second semiconductor element 12b, the heat is absorbed by the fluid L, so that heat from the first semiconductor element 11b and the second semiconductor element 12b can be efficiently released.

(利用流體之斷熱膨脹使冷卻效果增加之構成變形例) (Example of a configuration in which the cooling effect is increased by the thermal expansion of the fluid)

圖24A及圖24B與圖25A及圖25B係顯示上述之利用流體之斷熱膨脹使冷卻效果增加之第1例與第2例之變形例。圖24A及圖24B顯示通道71為1個之例,圖25A及圖25B顯示通道71為2個之例。 Figs. 24A and 24B and Figs. 25A and 25B show a modification of the first example and the second example in which the cooling effect is increased by the thermal expansion of the fluid described above. 24A and 24B show an example in which the channel 71 is one, and FIGS. 25A and 25B show an example in which the channel 71 is two.

此等圖中,符號76顯示位於寬度狹窄(剖面積相對小)之第1區域71a與寬度寬廣(剖面積相對大)之第2區域71b之間,通道71之寬度(剖面積)增大(變化)、亦即流入通道71之流體L引起斷熱膨脹,流體L之溫度降低之遷移區域。 In the figures, reference numeral 76 indicates that the width (sectional area) of the channel 71 is increased between the first region 71a having a narrow width (the cross-sectional area is relatively small) and the second region 71b having a wide width (the cross-sectional area is relatively large). The change), that is, the fluid L flowing into the passage 71 causes a thermal expansion and a transition region in which the temperature of the fluid L is lowered.

圖24A(a)之例,從上游側端部進入通道71之流體L,首先進入寬度(剖面積)為一定之第1區域71a,接著通過寬度(剖面積)徐徐增大之遷移區域76,進入寬度(剖面積)為一定之第2區域71b。接著,通過第2區域71b之寬度寬廣之出口,從通道71流出至外部。流體L在遷移區域76壓力急遽地降低,一邊斷熱膨脹、一邊到達第2區域71b。其結果,使流體L之溫度降低。 In the example of Fig. 24A(a), the fluid L entering the channel 71 from the upstream end portion first enters the first region 71a having a constant width (sectional area), and then the migration region 76 which is gradually increased in width (sectional area). The entry width (sectional area) is a constant second area 71b. Then, the outlet of the second region 71b is wide and wide, and flows out from the passage 71 to the outside. The fluid L is rapidly lowered in pressure in the migration region 76, and reaches the second region 71b while being thermally expanded. As a result, the temperature of the fluid L is lowered.

圖24A(b)之例中,由於從第1區域71a之上游側端部至第2區域71b之下游側端部為止,寬度(剖面積)以一定比例徐徐增加,因此流體L會在流入通道71(第1區域71a)之瞬間引起斷熱膨脹。 In the example of FIG. 24A(b), since the width (sectional area) is gradually increased from a certain upstream end portion of the first region 71a to the downstream end portion of the second region 71b, the fluid L is in the inflow passage. The moment of 71 (the first region 71a) causes thermal expansion.

圖24A(c)之例中,雖與圖24A(a)之例相同,但由於上游側之第1區域71a位置相對通道71(中介層70)之中央線於寬度方向偏移配置,因此流體L看似彷彿流動於傾斜方向(在圖中為從左下往右上的方向)。 In the example of FIG. 24A(c), the same as the example of FIG. 24A(a), since the position of the first region 71a on the upstream side is displaced in the width direction with respect to the center line of the channel 71 (interposer 70), the fluid L seems to flow in the oblique direction (in the figure, from the lower left to the upper right).

圖24A(d)之例中,雖與圖24A(a)之例相同,但第1區域71a與第2區域71b較圖24(a)之例更接近配置,換言之,相異點在於從第1區域71a至第2區域71b之寬度(剖面積)之變化更為急遽。此例中,由於斷熱膨脹會較圖24(a)之例更急遽地產生,因此流體L之溫度降低會更大。 In the example of Fig. 24A(d), the first region 71a and the second region 71b are arranged closer to each other than the example of Fig. 24(a), in other words, the difference is that The change in the width (sectional area) of the region 71a to the second region 71b is more urgent. In this case, since the thermal expansion is more urgent than the example of Fig. 24(a), the temperature drop of the fluid L is greater.

圖24A(e)之例中,雖與圖24A(a)之例相同,但相異點在於,於第1區域71a與第2區域71b之間、亦即遷移區域76設有寬度(剖面積)較第1區域71a小之處(緊縮部)。此例中,流體L係在緊縮部暫時被加壓後斷熱膨脹。 In the example of Fig. 24A(e), the same as the example of Fig. 24A(a), the difference is that the width (section area) is provided between the first region 71a and the second region 71b, that is, the transition region 76. ) is smaller than the first region 71a (tightening portion). In this example, the fluid L is thermally expanded and expanded after the constricted portion is temporarily pressurized.

如圖24A及圖24B所示,通道71之形狀並無特別限制。能視必要之遷移區域76之位置決定通道71之形狀。亦即,可視配置於具有通道71之中介層70上下之半導體元件(圖24A及圖24B中省略)之發熱狀況配置遷移區域76。 As shown in FIGS. 24A and 24B, the shape of the passage 71 is not particularly limited. The shape of the channel 71 can be determined depending on the position of the necessary migration region 76. That is, the transition region 76 is disposed in a heat-dissipating state in which the semiconductor elements (not shown in FIGS. 24A and 24B) having the upper and lower sides of the interposer 70 of the channel 71 are disposed.

一般而言,在半導體元件之發熱不會在構成該半導體元件之晶片全面產生。在例如運算電路、輸出電路等消耗電力大,發熱主要亦在配置有此等電路之區域(熱點)產生。因此,最好係將遷移區域76配置於對應此等電路之區域(在上位或下位與此等電路重疊之處)。此情形下,有發熱擴散至該晶片全面前以流體L吸熱之優點。 In general, heat generation in a semiconductor element is not generated in all of the wafers constituting the semiconductor element. For example, an arithmetic circuit, an output circuit, and the like consume a large amount of power, and heat generation is mainly generated in a region (hot spot) in which such circuits are disposed. Therefore, it is preferable to arrange the migration region 76 in an area corresponding to such circuits (where the upper or lower bits overlap with such circuits). In this case, there is an advantage that heat is diffused to absorb heat from the fluid L before the wafer is fully integrated.

圖25A(a)之例中,將相同形狀之通道71相鄰設有2個。流體L之流入口有2處,流體L之流出口亦有2處。亦即,兩個通道71彼此獨立。 In the example of Fig. 25A(a), two channels 71 of the same shape are provided adjacent to each other. There are two inlets for the fluid L and two outlets for the fluid L. That is, the two channels 71 are independent of each other.

圖25A(b)之例中,一方(在圖中為左側)之通道71雖與圖25A(a)之例相同,但另一方(在圖中為右側)之通道71,遷移區域76於下游側(在圖中為上方)偏移配置。流體L之流入口有2處,流體L之流出口亦有2處。亦即,兩個通道71彼此獨立。 In the example of Fig. 25A(b), the channel 71 of one side (left side in the drawing) is the same as the example of Fig. 25A(a), but the other side (right side in the figure) is the channel 71, and the migration area 76 is downstream. Offset (upward in the figure) configuration. There are two inlets for the fluid L and two outlets for the fluid L. That is, the two channels 71 are independent of each other.

圖25B(c)之例中,係將圖25A(a)之兩個通道之流入口結合而為1處。通道71係在中介層70內部分歧成兩個後, 於兩個流出口連結。因此,兩個通道71係在中介層70內部彼此連結。 In the example of Fig. 25B(c), the flow inlets of the two channels of Fig. 25A(a) are combined to one place. After the channel 71 is divided into two inside the interposer 70, Connected to two outlets. Therefore, the two passages 71 are connected to each other inside the interposer 70.

圖25B(d)之例中,雖與圖25B(c)同樣地,係將兩個通道之流入口結合而為1處,但相異點在於一方(在圖中為左側)之通道71中,遷移區域76於上游側(在圖中為下方)偏移配置,另一方(在圖中為右側)之通道71,遷移區域76於下游側(在圖中為上方)偏移配置。此例亦同樣地,兩個通道71係在中介層70內部彼此連結。 In the example of Fig. 25B(d), similarly to Fig. 25B(c), the flow inlets of the two channels are combined into one, but the difference is in one of the channels 71 (left side in the figure). The migration region 76 is disposed offset on the upstream side (lower in the figure), and the other side (on the right side in the figure) is the channel 71, and the migration region 76 is offset on the downstream side (upward in the figure). Also in this example, the two channels 71 are connected to each other inside the interposer 70.

圖25A及圖25B中,雖顯示通道71與遷移區域76分別為2個之例,但通道71與遷移區域76之數目並無限制。 亦可使通道71與遷移區域76分別為3個或其以上。亦能視半導體元件之發熱狀況(例如係存在幾個發熱大之區域)任意地選擇通道71之形狀與遷移區域76之數目與配置。 In FIGS. 25A and 25B, although the channel 71 and the migration region 76 are respectively shown as two examples, the number of the channel 71 and the migration region 76 is not limited. It is also possible to make the channel 71 and the migration region 76 three or more. It is also possible to arbitrarily select the shape and configuration of the shape of the channel 71 and the number of the migration regions 76 depending on the heat generation condition of the semiconductor element (for example, a region where there is a large heat generation).

(利用流體之斷熱膨脹之中介層之製造方法第1例) (The first example of the manufacturing method of the interposer using the thermal expansion of the fluid)

圖26A及圖26B係顯示利用流體之斷熱膨脹之上述中介層70之製造方法第1例。 26A and 26B show a first example of a method of manufacturing the above-described interposer 70 by thermal expansion of a fluid.

此製造方法,首先如圖26A(a)及圖26B(a)所示,準備矩形板狀之上壁73。另一方面,如圖26A(b)及圖26B(b)所示,準備矩形板狀之下壁74,於其表面形成左右之側壁72a及72b。藉由側壁72a及72b於下壁74表面形成具有漏斗形之平面形狀之凹陷74a。 In this manufacturing method, first, as shown in FIGS. 26A(a) and 26B(a), a rectangular plate-shaped upper wall 73 is prepared. On the other hand, as shown in Fig. 26A (b) and Fig. 26B (b), a rectangular plate-shaped lower wall 74 is prepared, and left and right side walls 72a and 72b are formed on the surface. A recess 74a having a funnel-shaped planar shape is formed on the surface of the lower wall 74 by the side walls 72a and 72b.

其後,如圖26A(c)及圖26B(c)所示,只要將上壁73接合於左右之側壁72a及72b之表面,即製造具有圖21A~圖21C所示之斷熱膨脹構造之中介層70。凹陷74a之上面被 以上壁73阻塞,成為通道71。 Thereafter, as shown in Figs. 26A(c) and 26B(c), by bonding the upper wall 73 to the surfaces of the left and right side walls 72a and 72b, the intermediate structure having the thermal expansion structure shown in Figs. 21A to 21C is manufactured. Layer 70. The top of the recess 74a is The upper wall 73 is blocked to become the passage 71.

雖上壁73與下壁74之材料最好為單結晶矽等,側壁72a及72b之材料最好為玻璃、單結晶矽、樹脂、或光阻(SU-8等),但亦可係此等以外之材料。上壁73與下壁74與側壁72a及72b雖最好係以接著劑等接合,但並不限於此。亦能使用其他周知之手法。 The material of the upper wall 73 and the lower wall 74 is preferably a single crystal crucible or the like, and the materials of the side walls 72a and 72b are preferably glass, single crystal germanium, resin, or photoresist (SU-8, etc.), but may be Materials other than those. The upper wall 73, the lower wall 74, and the side walls 72a and 72b are preferably joined by an adhesive or the like, but are not limited thereto. Other well-known techniques can also be used.

此外,圖26A及圖26B中,雖通道71為1個,但不限定於此,亦可如圖24A及圖24B與圖25A及圖25B所例示,設置2個以上之通道71。 In addition, in FIG. 26A and FIG. 26B, although there are one channel 71, it is not limited to this, You may provide two or more channels 71 as illustrated in FIG. 24A and FIG. 24B and FIG. 25A and FIG.

又,亦能省略上壁73或下壁74。例如,將圖26A(b)及圖26B(b)所示之構造直接作為中介層70使用。此情形下,由於成為無頂部(上面開口)之中介層70,因此將配置於上位之半導體元件下面作為頂部利用。同樣地,只要使圖26A(b)及圖26B(b)所示之構造上下反轉,由於成為無底部(下面開口)之中介層70,因此將配置於下位之半導體元件上面作為底部利用。 Moreover, the upper wall 73 or the lower wall 74 can also be omitted. For example, the structures shown in FIGS. 26A(b) and 26B(b) are directly used as the interposer 70. In this case, since the interposer 70 is provided without the top (opening of the upper surface), the underside of the semiconductor element disposed on the upper side is used as the top. Similarly, as long as the structure shown in FIGS. 26A(b) and 26B(b) is reversed upside down, since the interposer 70 having no bottom (opening of the lower surface) is formed, the upper surface of the semiconductor element disposed on the lower side is used as the bottom.

(利用流體之斷熱膨脹之中介層之製造方法第2例) (Second example of manufacturing method of interposer using thermal expansion of fluid)

圖27A及圖27B係顯示利用流體之斷熱膨脹之上述中介層70之製造方法第2例。 27A and 27B show a second example of a method of manufacturing the above-described interposer 70 by thermal expansion of a fluid.

此製造方法,首先如圖27A(a)及圖27B(a)所示,準備於表面一體形成左右之側壁72a及72b之矩形之下壁74。藉由側壁72a及72b於下壁74表面側形成具有漏斗形之平面形狀之凹陷74a。下壁74與側壁72a及72b之材料最好為單結晶矽,凹陷74a例如以濕式蝕刻(包含異向性蝕刻) 或乾式蝕刻等將下壁74表面側選擇性地除去而形成。 In the manufacturing method, first, as shown in Figs. 27A(a) and 27B(a), a rectangular lower wall 74 is formed integrally formed on the front and rear side walls 72a and 72b. A recess 74a having a funnel-shaped planar shape is formed on the surface side of the lower wall 74 by the side walls 72a and 72b. The material of the lower wall 74 and the side walls 72a and 72b is preferably a single crystal crucible, and the recess 74a is, for example, wet etched (including anisotropic etching) Or dry etching or the like is formed by selectively removing the surface side of the lower wall 74.

其後,如圖27A(b)及圖27B(b)所示,使用接著劑等將上壁73接合於左右之側壁72a及72b之表面後,即製造具有圖21A~圖21C所示之斷熱膨脹構造之中介層70。凹陷74a之上面被以上壁73阻塞,成為通道71。上壁73為玻璃時,能利用靜電接合等來接合/一體化。上壁73為單結晶矽時,能以矽/矽接合來一體化。 Then, as shown in FIGS. 27A(b) and 27B(b), after the upper wall 73 is joined to the surfaces of the left and right side walls 72a and 72b by using an adhesive or the like, the break shown in FIGS. 21A to 21C is produced. Interposer 70 of the thermally expandable structure. The upper surface of the recess 74a is blocked by the upper wall 73 to become the passage 71. When the upper wall 73 is glass, it can be joined/integrated by electrostatic bonding or the like. When the upper wall 73 is a single crystal crucible, it can be integrated by 矽/矽 bonding.

此外,圖27A及圖27B中,雖通道71為1個,但不限定於此,亦可如圖24A及圖24B與圖25A及圖25B所例示,設置2個以上之通道71。 In addition, in FIG. 27A and FIG. 27B, although there are one channel 71, it is not limited to this, You may provide two or more channels 71 as illustrated in FIGS. 24A and 24B and FIGS. 25A and 25B.

又,亦能省略上壁73或下壁74。例如,將圖27A(a)及圖27B(a)所示之構造直接作為中介層70使用。此情形下,由於成為無頂部(上面開口)之中介層70,因此將配置於上位之半導體元件下面作為頂部利用。同樣地,只要使圖27A(b)及圖27B(b)所示之構造上下反轉,由於成為無底部(下面開口)之中介層70,因此將配置於下位之半導體元件上面作為底部利用。 Moreover, the upper wall 73 or the lower wall 74 can also be omitted. For example, the structures shown in FIGS. 27A(a) and 27B(a) are directly used as the interposer 70. In this case, since the interposer 70 is provided without the top (opening of the upper surface), the underside of the semiconductor element disposed on the upper side is used as the top. Similarly, if the structure shown in FIGS. 27A(b) and 27B(b) is reversed upside down, since the interposer 70 having no bottom (opening of the lower surface) is formed, the upper surface of the semiconductor element disposed on the lower side is used as the bottom.

(利用流體之斷熱膨脹之中介層之製造方法第3例) (The third example of the manufacturing method of the interposer using the thermal expansion of the fluid)

圖28A及圖28B係顯示利用流體之斷熱膨脹之上述中介層70之製造方法第3例。 28A and 28B show a third example of a method of manufacturing the above-described interposer 70 by thermal expansion of a fluid.

此製造方法,首先如圖28A(a)及圖28B(a)所示,準備具有電氣連接用之墊78及79與貫通電極77之矩形板狀之下壁74。墊78形成於下壁74表面,墊79形成於下壁74背面。各貫通電極77係貫通下壁74到達對應之墊78及79。 由圖28B(a)可明確得知,墊78及79與貫通電極77僅於通道71之上游側端部附近形成為不與通道71重疊。下壁74最好係以單結晶矽形成。 In this manufacturing method, first, as shown in FIGS. 28A(a) and 28B(a), a rectangular plate-shaped lower wall 74 having pads 78 and 79 for electrical connection and through electrodes 77 is prepared. A pad 78 is formed on the surface of the lower wall 74, and a pad 79 is formed on the back surface of the lower wall 74. Each of the through electrodes 77 penetrates the lower wall 74 to reach the corresponding pads 78 and 79. As is clear from FIG. 28B(a), the pads 78 and 79 and the through electrode 77 are formed only in the vicinity of the upstream side end portion of the channel 71 so as not to overlap the channel 71. The lower wall 74 is preferably formed as a single crystal ruthenium.

其次,如圖28A(b)及圖28B(b)所示,將下壁74表面側選擇性地除去而形成具有漏斗形之平面形狀之凹陷74a。此時,於凹陷74a左右兩側藉由下壁74之殘存部形成一對側壁72a及72b。凹陷74a不與墊78及79重疊,墊78及79與貫通電極77配置於側壁72a及72b。下壁74只要係以單結晶矽製,凹陷74a即能以例如濕式蝕刻(包含異向性蝕刻)或乾式蝕刻等形成。 Next, as shown in Figs. 28A(b) and 28B(b), the surface side of the lower wall 74 is selectively removed to form a recess 74a having a funnel-shaped planar shape. At this time, a pair of side walls 72a and 72b are formed on the left and right sides of the recess 74a by the remaining portion of the lower wall 74. The recess 74a does not overlap the pads 78 and 79, and the pads 78 and 79 and the through electrode 77 are disposed on the side walls 72a and 72b. The lower wall 74 can be formed by, for example, wet etching (including anisotropic etching) or dry etching, as long as it is made of a single crystal.

其後,如圖28A(c)及圖28B(c)所示,準備具有複數個開口73a之矩形板狀之上壁73。開口73a配置於下壁74之與各墊78對應之位置。上壁73只要係以單結晶矽製,開口73a即能以例如濕式蝕刻(包含異向性蝕刻)或乾式蝕刻等形成。 Thereafter, as shown in FIGS. 28A(c) and 28B(c), a rectangular plate-shaped upper wall 73 having a plurality of openings 73a is prepared. The opening 73a is disposed at a position of the lower wall 74 corresponding to each of the pads 78. The upper wall 73 can be formed by, for example, wet etching (including anisotropic etching) or dry etching, as long as it is made of a single crystal.

最後,如圖28A(d)及圖28B(d)所示,使用接著劑等將上壁73接合於下壁74,只要上壁73與下壁74均為單結晶矽製,則亦能以矽/矽接合來接合。在上壁73為玻璃之情形,能以靜電接合等來接合。 Finally, as shown in FIGS. 28A(d) and 28B(d), the upper wall 73 is joined to the lower wall 74 by using an adhesive or the like, and as long as both the upper wall 73 and the lower wall 74 are made of a single crystal, it can also be矽/矽 joint to join. In the case where the upper wall 73 is glass, it can be joined by electrostatic bonding or the like.

此外,圖28A及圖28B中,雖通道71為1個,但不限定於此,亦可如圖24A及圖24B與圖25A及圖25B所例示,設置2個以上之通道71。 In addition, in FIG. 28A and FIG. 28B, although there are one channel 71, it is not limited to this, You may provide two or more channels 71 as illustrated in FIGS. 24A and 24B and FIGS. 25A and 25B.

又,亦能省略上壁73或下壁74。例如,將圖28A(b)及圖28B(b)所示之構造直接作為中介層70使用。此情形 下,由於成為無頂部(上面開口)之中介層70,因此將配置於上位之半導體元件下面作為頂部利用。同樣地,只要使圖28A(b)及圖28B(b)所示之構造上下反轉,由於成為無底部(下面開口)之中介層70,因此將配置於下位之半導體元件上面作為底部利用。 Moreover, the upper wall 73 or the lower wall 74 can also be omitted. For example, the structures shown in FIGS. 28A(b) and 28B(b) are directly used as the interposer 70. This situation Next, since the interposer 70 having no top (opening on the top) is used, the underlying semiconductor element disposed on the upper side is used as the top. Similarly, as long as the structure shown in FIGS. 28A(b) and 28B(b) is reversed upside down, since the interposer 70 having no bottom (opening of the lower surface) is formed, the upper surface of the semiconductor element disposed on the lower side is used as the bottom portion.

(於積層模組附加基板與罩體之構成例) (Example of the structure of the additional substrate and the cover of the laminated module)

圖29係顯示於圖23A所示之積層模組附加基板10與罩體82之構成例(構裝構造例)。於基板10上搭載有具有圖23A所示構成之積層模組80,罩體82以包含積層模組80整體之方式,使用罩體82之腳部85固定於基板10上。罩體82具有入口83與出口84。入口83配置於具有「斷熱膨脹構造」之中介層70之上游側(流體L流入之側),出口84配置於中介層70之下游側(流體L流出之側)。 Fig. 29 shows a configuration example (construction structure example) of the laminated module additional substrate 10 and the cover 82 shown in Fig. 23A. A laminated module 80 having the configuration shown in FIG. 23A is mounted on the substrate 10, and the cover 82 is fixed to the substrate 10 by using the leg portion 85 of the cover 82 so as to include the entire laminated module 80. The cover 82 has an inlet 83 and an outlet 84. The inlet 83 is disposed on the upstream side of the interposer 70 having the "heat-dissipating expansion structure" (the side where the fluid L flows in), and the outlet 84 is disposed on the downstream side of the interposer 70 (the side from which the fluid L flows out).

圖29中,例示了配置於積層模組80下位之第1半導體元件11與配置於積層模組80上位之第2半導體元件12與配置於兩半導體11及12間之中介層70大小彼此不相等之情形。然而,此等大小關係並無限制。又,亦可為2個以上之第1半導體元件11配置於中介層70下位之構成,亦可為2個以上之第2半導體元件12配置於中介層70上位之構成,亦可為具有更多之段數構成(圖29之積層模組80為3段)之構成。 In FIG. 29, it is exemplified that the first semiconductor element 11 disposed under the build-up module 80 and the second semiconductor element 12 disposed on the upper layer of the build-up module 80 and the interposer 70 disposed between the two semiconductors 11 and 12 are not equal in size. The situation. However, there is no limit to these size relationships. Further, two or more of the first semiconductor elements 11 may be disposed below the interposer 70, or two or more of the second semiconductor elements 12 may be disposed on the interposer 70, or may have more The number of segments is formed (the stack module 80 of Fig. 29 is composed of three segments).

圖29之構成例,亦能適用於於圖22A所示之積層模組80附加基板10與罩體82之情形。此情形下,僅積層模組80取代接合模組,除此以外之構成相同。 The configuration example of Fig. 29 can also be applied to the case where the laminated module 80 shown in Fig. 22A is attached to the substrate 10 and the cover 82. In this case, only the build-up module 80 replaces the joint module, and the other configuration is the same.

(對積層模組之流體供應) (fluid supply to laminated modules)

圖30係顯示對本發明之積層模組80之流體供應系統之一例。 Fig. 30 is a view showing an example of a fluid supply system for the laminated module 80 of the present invention.

圖30中,在內藏於積層模組80之中介層70之通道71之上游側開口有罩體82之入口83連通,於其下游側開口有罩體82之出口84連通。90為壓縮機,91為驅動壓縮機90之動力源(通常為馬達)。壓縮機90經由配管T3連接於入口83。出口84經由配管T4連接於壓縮機90。 In Fig. 30, the inlet 83 of the cover 82 is opened on the upstream side of the passage 71 of the intermediate layer 70 of the build-up module 80, and the outlet 84 of the cover 82 is open on the downstream side. 90 is the compressor and 91 is the power source (usually the motor) that drives the compressor 90. The compressor 90 is connected to the inlet 83 via a pipe T3. The outlet 84 is connected to the compressor 90 via a pipe T4.

以壓縮機90加壓壓縮之流體(此處為氣體)L經由配管T3被導至入口83,進入罩體82內部之上游側空間。其後,流體L通過中介層70之通道71移動至罩體82內部之下游側空間。接著,經由出口84從下游側空間流出至外部。如此流出之流體L,經由配管T4返回至壓縮機90。由於流動於配管T4之流體L吸收在積層模組80內產生之熱,其溫度變高,進而,由於在壓縮機90內藉由加壓(斷熱壓縮)而流體L之溫度上升,因此最好係在壓縮機90附屬使流體L之溫度降低之功能(流體冷卻功能)。然而,流體冷卻功能並非必需,亦能省略。其原因在於,例如在配管T3與T4置於溫度較低之環境時,該流體冷卻功能亦有不需要之故。 The fluid (here, gas) L pressurized and compressed by the compressor 90 is guided to the inlet 83 through the pipe T3, and enters the upstream side space inside the cover 82. Thereafter, the fluid L moves through the passage 71 of the interposer 70 to the downstream side space inside the cover 82. Then, it flows out from the downstream side space to the outside via the outlet 84. The fluid L thus discharged flows back to the compressor 90 via the pipe T4. Since the fluid L flowing through the pipe T4 absorbs heat generated in the build-up module 80, the temperature thereof becomes high, and further, since the temperature of the fluid L rises by pressurization (heat-breaking compression) in the compressor 90, It is preferable that the compressor 90 is attached to a function of lowering the temperature of the fluid L (fluid cooling function). However, the fluid cooling function is not required and can be omitted. The reason for this is that, for example, when the pipes T3 and T4 are placed in a low temperature environment, the fluid cooling function is also unnecessary.

使用液體作為流體L之情形,係取代壓縮機90而使用泵。 In the case where a liquid is used as the fluid L, a pump is used instead of the compressor 90.

本發明能適用必須抑制消耗電力大之半導體元件之動作溫度上升以使穩定動作之任意之積層模組(積層半導體元件)與其構裝構造。本發明不限定於以電子電路為主體之半 導體元件或模組,亦能廣泛適用於其他種類之大電力半導體元件或模組(例如發光元件、發光元件模組、光通訊元件、光通訊模組等)。進而,在指向分析機器之小型化之μ TAS(微全程分析系統)中,亦能適用於使被測定流體流入微小流路之領域。 According to the present invention, it is possible to apply a laminated module (multilayer semiconductor element) and a structure in which it is necessary to suppress an increase in the operating temperature of a semiconductor element having a large power consumption to stabilize the operation. The invention is not limited to the half with the electronic circuit as the main body Conductor elements or modules can also be widely applied to other types of large power semiconductor components or modules (such as light-emitting components, light-emitting component modules, optical communication components, optical communication modules, etc.). Further, in the μ TAS (Micro Whole Process Analysis System) which is directed to the miniaturization of the analysis machine, it is also applicable to the field in which the fluid to be measured flows into the minute flow path.

10‧‧‧基板 10‧‧‧Substrate

11、11a、11b‧‧‧第1半導體元件 11, 11a, 11b‧‧‧1st semiconductor component

12、12a、12b‧‧‧第2半導體元件 12, 12a, 12b‧‧‧ second semiconductor component

14‧‧‧貫通電極 14‧‧‧through electrode

15‧‧‧導電性球體 15‧‧‧Electrical sphere

16‧‧‧填料 16‧‧‧Filling

17‧‧‧接著劑 17‧‧‧Adhesive

20‧‧‧中介層 20‧‧‧Intermediary

21‧‧‧通道 21‧‧‧ channel

22‧‧‧側壁 22‧‧‧ side wall

23‧‧‧上壁 23‧‧‧Upper wall

24‧‧‧下壁 24‧‧‧ Lower wall

25‧‧‧箭頭 25‧‧‧ arrow

30、30a、30b、30c‧‧‧中介層 30, 30a, 30b, 30c‧ ‧ intermediary

31‧‧‧通道 31‧‧‧ channel

32‧‧‧側壁 32‧‧‧ side wall

33‧‧‧上壁 33‧‧‧Upper wall

33a‧‧‧開口 33a‧‧‧ openings

34‧‧‧下壁 34‧‧‧The lower wall

34’‧‧‧母材 34’‧‧‧Material

35、35a‧‧‧箭頭 35, 35a‧‧ arrow

36‧‧‧貫通電極 36‧‧‧through electrodes

37、38‧‧‧導電性球體 37, 38‧‧‧ Conductive spheres

40、40a、40b‧‧‧積層模組 40, 40a, 40b‧‧‧ layered modules

41‧‧‧通道 41‧‧‧ channel

42‧‧‧罩體 42‧‧‧ Cover

42a、42b‧‧‧罩半體 42a, 42b‧‧‧ cover half

43‧‧‧入口 43‧‧‧ entrance

44‧‧‧出口 44‧‧‧Export

45‧‧‧腳部 45‧‧‧foot

46‧‧‧安裝部 46‧‧‧Installation Department

47a、47b、48、49‧‧‧箭頭 47a, 47b, 48, 49‧‧‧ arrows

50‧‧‧內部空間 50‧‧‧Internal space

51、51a‧‧‧堰部 51, 51a‧‧‧堰

52‧‧‧罩體 52‧‧‧ Cover

52a‧‧‧罩半體 52a‧‧ hood half

52b‧‧‧罩半體 52b‧‧‧ cover half

55‧‧‧接著層 55‧‧‧Next layer

56‧‧‧樹脂 56‧‧‧Resin

57‧‧‧罩體 57‧‧‧ Cover

58‧‧‧入口 58‧‧‧ entrance

59‧‧‧出口 59‧‧‧Export

61a‧‧‧熱反射層 61a‧‧‧Hot reflective layer

61b‧‧‧熱放射層 61b‧‧‧Thermal radiation layer

62a、62b‧‧‧絕緣層 62a, 62b‧‧‧ insulation

63、64‧‧‧熱源 63, 64‧‧‧ heat source

63a‧‧‧箭頭 63a‧‧‧arrow

67‧‧‧接著材 67‧‧‧Next material

68‧‧‧電氣連接用墊 68‧‧‧Electrical connection pads

70‧‧‧中介層 70‧‧‧Intermediary

71‧‧‧通道 71‧‧‧ channel

71a‧‧‧第1區域 71a‧‧‧1st area

71b‧‧‧第2區域 71b‧‧‧2nd area

72a‧‧‧側壁 72a‧‧‧ Sidewall

73‧‧‧上壁 73‧‧‧Upper wall

73a‧‧‧開口 73a‧‧‧ openings

74‧‧‧下壁 74‧‧‧The lower wall

75a、75b‧‧‧箭頭 75a, 75b‧‧‧ arrows

76‧‧‧遷移區域 76‧‧‧Migration area

77‧‧‧貫通電極 77‧‧‧through electrodes

78、79‧‧‧墊 78, 79‧‧‧ pads

80‧‧‧積層模組 80‧‧‧Layered modules

82‧‧‧罩體 82‧‧‧ Cover

83‧‧‧入口 83‧‧‧ Entrance

84‧‧‧出口 84‧‧‧Export

85‧‧‧腳部 85‧‧‧ feet

90‧‧‧壓縮機 90‧‧‧Compressor

91‧‧‧動力源 91‧‧‧Power source

G‧‧‧間隙 G‧‧‧ gap

L‧‧‧流體 L‧‧‧ fluid

L2‧‧‧第2流體 L2‧‧‧Second fluid

P‧‧‧泵 P‧‧‧ pump

T1、T2、T3、T4‧‧‧配管 T1, T2, T3, T4‧‧‧ piping

圖1A係顯示將使用金屬細線進行電氣連接後之積層模組(接合模組)搭載於基板上之構裝構造之剖面說明圖。 1A is a cross-sectional explanatory view showing a structure in which a build-up module (joining module) which is electrically connected by using a thin metal wire is mounted on a substrate.

圖1B係顯示將使用貫通電極進行電氣連接後之積層模組(貫通電極模組)搭載於基板上之構裝構造之剖面說明圖。 1B is a cross-sectional explanatory view showing a structure in which a build-up module (through electrode module) which is electrically connected by using a through electrode is mounted on a substrate.

圖2A係顯示於圖1A之積層模組(接合模組)追加了附有通道之中介層時之構裝構造之剖面說明圖。 Fig. 2A is a cross-sectional explanatory view showing a structure of a laminated module (joining module) of Fig. 1A in which an interposer having a channel is added.

圖2B係沿圖2A所示之中介層之A-A線之剖面圖。 Figure 2B is a cross-sectional view taken along line A-A of the interposer shown in Figure 2A.

圖3A係顯示於圖1B之積層模組(貫通電極模組)追加了附有通道之中介層時之構裝構造之剖面說明圖。 Fig. 3A is a cross-sectional explanatory view showing a structure of a laminated module (through electrode module) of Fig. 1B in which an interposer having a channel is added.

圖3B係沿圖3A所示之中介層之B-B線之剖面圖。 Figure 3B is a cross-sectional view taken along line B-B of the interposer shown in Figure 3A.

圖4A係顯示於圖3A之構裝構造追加覆蓋積層模組(貫通電極模組)之罩體而對其內部供應流體之構裝構造之剖面說明圖。 4A is a cross-sectional explanatory view showing a structure in which a cover body of a build-up layer module (through electrode module) is additionally provided in the structure of FIG. 3A and a fluid is supplied to the inside.

圖4B係沿圖4A之構裝構造之C-C線之剖面圖。 Fig. 4B is a cross-sectional view taken along line C-C of the structure of Fig. 4A.

圖5A係顯示於圖4A之構裝構造追加了將罩體與積層模組(貫通電極模組)間之空間分隔之堰部之構裝構造第1 例之剖面說明圖。 FIG. 5A shows the first structure of the structure in which the space between the cover and the build-up module (through electrode module) is added to the structure of FIG. 4A. An illustration of a section of the example.

圖5B係沿圖5A之構裝構造之C-C線之剖面圖。 Figure 5B is a cross-sectional view taken along line C-C of the structure of Figure 5A.

圖6係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第1例中於基板安裝罩體前之狀態之立體圖。 FIG. 6 is a perspective view showing a state in which the structure of the structure in FIG. 4A is added to the structure in which the space between the cover and the laminated module is separated, and the first example of the structure is attached to the substrate.

圖7A係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第2例中形成堰部之程序之立體圖。 Fig. 7A is a perspective view showing a procedure for forming a crotch portion in a second example of a structure in which a structure for partitioning a space between a cover and a laminated module is added to the structure of Fig. 4A.

圖7B係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第2例中形成堰部之程序之立體圖,係圖7A之後續。 Fig. 7B is a perspective view showing a procedure for forming a crotch portion in a second example of a structure in which a structure for partitioning a space between a cover and a laminated module is added to the structure of Fig. 4A, and is followed by Fig. 7A.

圖8A係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第2例中形成堰部之程序之剖面說明圖。 Fig. 8A is a cross-sectional explanatory view showing a procedure for forming a crotch portion in a second example of a structure in which a structure for separating a space between a cover and a laminated module is added to the structure of Fig. 4A.

圖8B係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第2例中形成堰部之程序之剖面說明圖,係圖8A之後續。 8B is a cross-sectional explanatory view showing a procedure for forming a crotch portion in a second example of a structure in which a structure for separating a space between a cover and a laminated module is added to the structure of FIG. 4A, and is a follow-up view of FIG. 8A. .

圖9係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第3例之立體圖,係顯示於基板安裝罩體前之狀態。 Fig. 9 is a perspective view showing a third example of a structure in which a structure for partitioning a space between a cover and a build-up module is added to the structure of Fig. 4A, and is shown in a state before the substrate is mounted on the cover.

圖10A係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第4例之製造方法之立體圖。 FIG. 10A is a perspective view showing a manufacturing method of a fourth example of a structure in which a structure for separating a space between a cover and a build-up module is added to the structure of FIG. 4A.

圖10B係顯示於圖4A之構裝構造追加了將罩體與積層 模組間之空間分隔之堰部之構裝構造第4例之製造方法之立體圖,係圖10A之後續。 Fig. 10B shows the structure and structure of Fig. 4A added with a cover and a laminate A perspective view of the manufacturing method of the fourth example of the structure of the space partition between the modules is followed by FIG. 10A.

圖11A係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第4例之製造方法之剖面說明圖。 Fig. 11A is a cross-sectional explanatory view showing a manufacturing method of a fourth example of a structure in which a structure for separating a space between a cover and a laminated module is added to the structure of Fig. 4A.

圖11B係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第4例之製造方法之剖面說明圖,係圖11A之後續。 Fig. 11B is a cross-sectional explanatory view showing a manufacturing method of a fourth example in which the structure of the structure of Fig. 4A is added with a space separating the space between the cover and the laminated module, and is followed by Fig. 11A.

圖12A係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第5例之製造方法之立體圖。 Fig. 12A is a perspective view showing a manufacturing method of a fifth example of a structure in which a structure for partitioning a space between a cover and a laminated module is added to the structure of Fig. 4A.

圖12B係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第5例之製造方法之立體圖,係圖12A之後續。 Fig. 12B is a perspective view showing a manufacturing method of a fifth example in which the structure of the structure of Fig. 4A is added with a space separating the space between the cover and the laminated module, and is followed by Fig. 12A.

圖13A係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第5例之製造方法之剖面說明圖。 Fig. 13A is a cross-sectional explanatory view showing a manufacturing method of a fifth example of a structure in which a structure for separating a space between a cover and a laminated module is added to the structure of Fig. 4A.

圖13B係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第5例之製造方法之剖面說明圖,係圖13A之後續。 Fig. 13B is a cross-sectional explanatory view showing a manufacturing method of a fifth example in which the structure of the structure of Fig. 4A is added with a space separating the space between the cover and the laminated module, and is followed by Fig. 13A.

圖13C係顯示於圖4A之構裝構造追加了將罩體與積層模組間之空間分隔之堰部之構裝構造第5例之製造方法之剖面說明圖,係圖13B之後續。 Fig. 13C is a cross-sectional explanatory view showing a manufacturing method of a fifth example in which the structure of the structure of Fig. 4A is added with a space separating the space between the cover and the laminated module, and is followed by Fig. 13B.

圖13D係顯示於圖4A之構裝構造追加了將罩體與積層 模組間之空間分隔之堰部之構裝構造第5例之製造方法之剖面說明圖,係圖13C之後續。 Figure 13D shows the structure of Figure 4A with the addition of a cover and a laminate. The cross-sectional explanatory view of the manufacturing method of the fifth example of the structure of the space partition between the modules is followed by FIG. 13C.

圖14係顯示本發明之第1實施形態之積層模組所使用之通道具有放射/反射構造之中介層構成之剖面說明圖。 Fig. 14 is a cross-sectional explanatory view showing the configuration of an interposer having a radiation/reflection structure in a channel used in the laminated module according to the first embodiment of the present invention.

圖15A係顯示使用圖14之中介層之本發明之第1實施形態之積層模組(之構裝構造)之剖面說明圖。 Fig. 15A is a cross-sectional explanatory view showing a build-up module (configuration structure) of the first embodiment of the present invention using the interposer of Fig. 14;

圖15B係沿著圖15A所示之中介層之D-D線之剖面圖。 Figure 15B is a cross-sectional view taken along line D-D of the interposer shown in Figure 15A.

圖16A係顯示本發明之第2實施形態之積層模組所使用之通道具有放射/反射構造之中介層構成之剖面說明圖。 Fig. 16 is a cross-sectional explanatory view showing an interposer structure in which a channel used in a laminated module according to a second embodiment of the present invention has a radiation/reflection structure.

圖16B係顯示本發明之第3實施形態之積層模組所使用之通道具有放射/反射構造之中介層構成之剖面說明圖。 Fig. 16B is a cross-sectional explanatory view showing a configuration of an interposer having a radiation/reflection structure in a channel used in the laminated module according to the third embodiment of the present invention.

圖17係顯示本發明之第1實施形態之積層模組所使用之中介層之製造方法第1例之剖面說明圖。 Fig. 17 is a cross-sectional explanatory view showing a first example of a method of manufacturing an interposer used in the laminated module according to the first embodiment of the present invention.

圖18係顯示本發明之第1實施形態之積層模組所使用之中介層之製造方法第2例之剖面說明圖。 FIG. 18 is a cross-sectional explanatory view showing a second example of the method of manufacturing the interposer used in the multilayer module according to the first embodiment of the present invention.

圖19係顯示本發明之第1實施形態之積層模組所使用之中介層之製造方法第3例之剖面說明圖。 Fig. 19 is a cross-sectional explanatory view showing a third example of the method of manufacturing the interposer used in the multilayer module according to the first embodiment of the present invention.

圖20係顯示本發明之第1實施形態之積層模組所使用之中介層之製造方法第4例之剖面說明圖。 Fig. 20 is a cross-sectional explanatory view showing a fourth example of the method of manufacturing the interposer used in the laminated module according to the first embodiment of the present invention.

圖21A係利用流體之斷熱膨脹使冷卻效果增加之中介層之分解立體圖。 Fig. 21A is an exploded perspective view of the interposer using the thermal expansion of the fluid to increase the cooling effect.

圖21B係圖21A之中介層之立體圖。 Figure 21B is a perspective view of the interposer of Figure 21A.

圖21C(a)係顯示圖21A之中介層之流路剖面積變化之剖面說明圖,(b)係其俯視說明圖。 Fig. 21C(a) is a cross-sectional explanatory view showing a change in a cross-sectional area of a flow path of the interposer of Fig. 21A, and (b) is a plan view.

圖22A係顯示將圖21A之中介層與積層模組(接合模組)組合而成之積層模組之構裝構造第1例之剖面說明圖。 Fig. 22A is a cross-sectional explanatory view showing a first example of a structure of a laminated module in which the interposer layer and the build-up module (joining module) of Fig. 21A are combined.

圖22B係沿著圖22A之E-E線之剖面圖。 Figure 22B is a cross-sectional view taken along line E-E of Figure 22A.

圖23A係顯示將圖21A之中介層與積層模組(貫通電極模組)組合而成之積層模組之構裝構造第2例之剖面說明圖。 FIG. 23A is a cross-sectional explanatory view showing a second example of a structure of a laminated module in which the interposer layer of FIG. 21A and the build-up module (through electrode module) are combined.

圖23B係沿著圖23A之F-F線之剖面圖。 Figure 23B is a cross-sectional view taken along line F-F of Figure 23A.

圖24A係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之變形例之俯視說明圖。 Fig. 24A is a plan explanatory view showing a modification of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖24B係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之其他變形例之俯視說明圖。 Fig. 24B is a plan explanatory view showing another modification of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖25A係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之再一變形例之俯視說明圖。 Fig. 25A is a plan explanatory view showing still another modification of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖25B係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之再一變形例之俯視說明圖。 Fig. 25B is a plan explanatory view showing still another modification of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖26A係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之製造方法第1例之剖面說明圖。 Fig. 26A is a cross-sectional explanatory view showing a first example of a manufacturing method of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖26B係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之製造方法第1例之立體圖。 Fig. 26B is a perspective view showing a first example of the manufacturing method of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖27A係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之製造方法第2例之剖面說明 圖。 Fig. 27A is a cross-sectional view showing a second example of the manufacturing method of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid. Figure.

圖27B係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之製造方法第2例之立體圖。 Fig. 27B is a perspective view showing a second example of the manufacturing method of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖28A係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之製造方法第3例之剖面說明圖。 Fig. 28A is a cross-sectional explanatory view showing a third example of the manufacturing method of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖28B係顯示利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)之製造方法第3例之立體圖。 Fig. 28B is a perspective view showing a third example of the manufacturing method of the interposer (see Figs. 21A to 21C) in which the cooling effect is increased by the thermal expansion of the fluid.

圖29係顯示於圖23A之構裝構造第2例中於基板安裝罩體前之狀態之立體圖。 Fig. 29 is a perspective view showing a state in which the cover is attached to the substrate in the second example of the structure of Fig. 23A.

圖30係顯示將利用流體之斷熱膨脹使冷卻效果增加之中介層(參照圖21A~圖21C)與積層模組組合而成之構裝構造中之流體供應例之系統圖。 Fig. 30 is a system diagram showing an example of fluid supply in a structure in which an interposer (see Figs. 21A to 21C) in which a cooling effect is increased by a thermal expansion of a fluid and a laminated module is used.

圖31係顯示習知之積層模組之構裝構造(與冷卻法)之剖面說明圖。 Fig. 31 is a cross-sectional explanatory view showing a structure (and a cooling method) of a conventional laminated module.

10‧‧‧基板 10‧‧‧Substrate

11b‧‧‧第1半導體元件 11b‧‧‧1st semiconductor component

12b‧‧‧第2半導體元件 12b‧‧‧2nd semiconductor component

14‧‧‧貫通電極 14‧‧‧through electrode

15‧‧‧導電性球體 15‧‧‧Electrical sphere

16‧‧‧填料 16‧‧‧Filling

30a‧‧‧中介層 30a‧‧‧Intermediary

31‧‧‧通道 31‧‧‧ channel

32‧‧‧側壁 32‧‧‧ side wall

33‧‧‧上壁 33‧‧‧Upper wall

34‧‧‧下壁 34‧‧‧The lower wall

36‧‧‧貫通電極 36‧‧‧through electrodes

37、38‧‧‧導電性球體 37, 38‧‧‧ Conductive spheres

40b‧‧‧積層模組 40b‧‧‧Layered module

61a‧‧‧熱反射層 61a‧‧‧Hot reflective layer

61b‧‧‧熱放射層 61b‧‧‧Thermal radiation layer

Claims (6)

一種積層模組,其特徵在於,具備:中介層;配置於前述中介層單側之1個以上之第1半導體元件;以及配置於前述中介層之與前述第1半導體元件相反側之1個以上之第2半導體元件;前述中介層具有:具有流體流動之通道之本體、以及配置於該本體之區劃前述通道之內壁之既定區域之熱放射層及熱反射層之至少一方。 A laminated module comprising: an interposer; one or more first semiconductor elements disposed on one side of the interposer; and one or more disposed on an opposite side of the interposer from the first semiconductor element The second semiconductor element: the interposer has at least one of a body having a passage through which the fluid flows, and a heat radiation layer and a heat reflection layer disposed in a predetermined region of the body defining the inner wall of the passage. 如申請專利範圍第1項之積層模組,其中,前述中介層之前述熱放射層配置於發熱量相對大之前述第1半導體元件之側。 The multilayer module according to the first aspect of the invention, wherein the heat radiation layer of the interposer is disposed on a side of the first semiconductor element having a relatively large amount of heat generation. 如申請專利範圍第1項之積層模組,其中,前述中介層之前述熱反射層配置於發熱量相對小之前述第2半導體元件之側。 The laminated module according to claim 1, wherein the heat reflecting layer of the interposer is disposed on a side of the second semiconductor element having a relatively small amount of heat generation. 如申請專利範圍第1項之積層模組,其中,前述中介層之前述熱放射層配置於發熱量相對大之前述第1半導體元件之側,前述中介層之前述熱反射層配置於發熱量相對小之前述第2半導體元件之側。 The laminated module according to claim 1, wherein the heat radiation layer of the interposer is disposed on a side of the first semiconductor element having a relatively large amount of heat generation, and the heat reflection layer of the interposer is disposed at a relative amount of heat generation The side of the second semiconductor element is small. 一種中介層,其特徵在於,具備:具有流體流動之通道之本體;以及配置於前述本體之區劃前述通道之內壁之既定區域之熱放射層及熱反射層之至少一方。 An interposer comprising: a body having a passage through which a fluid flows; and at least one of a heat radiation layer and a heat reflection layer disposed in a predetermined region of the inner wall of the passage that defines the passage. 如申請專利範圍第5項之中介層,其中,前述熱放射層配置於發熱量相對大之半導體元件之側,前述熱反射層配置於發熱量相對小之半導體元件之側。 The interposer of claim 5, wherein the heat radiation layer is disposed on a side of the semiconductor element having a relatively large amount of heat generation, and the heat reflection layer is disposed on a side of the semiconductor element having a relatively small amount of heat generation.
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