TW201303962A - Method for forming contact holes - Google Patents

Method for forming contact holes Download PDF

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TW201303962A
TW201303962A TW100123368A TW100123368A TW201303962A TW 201303962 A TW201303962 A TW 201303962A TW 100123368 A TW100123368 A TW 100123368A TW 100123368 A TW100123368 A TW 100123368A TW 201303962 A TW201303962 A TW 201303962A
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layer
forming
dielectric layer
contact hole
opening
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TW100123368A
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Chinese (zh)
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TWI525659B (en
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Chieh-Te Chen
Yi-Po Lin
Feng-Yih Chang
Chih-Wen Feng
Sheng-Yuan Tsai
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United Microelectronics Corp
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Abstract

In an exemplary method for forming contact holes, a substrate overlaid with an etching stop layer and an interlayer dielectric layer in that order is firstly provided. A first etching process then is performed to form at least a first contact opening in the interlayer dielectric layer. A first carbon-containing dielectric layer subsequently is formed overlying the interlayer dielectric layer and filling into the first contact opening. After that, a first anti-reflective layer and a first patterned photo resist layer are sequentially formed in that order overlying the carbon-containing dielectric layer. Next, a second etching process is performed by using the first patterned photo resist layer as an etching mask to form at least a second contact opening in the interlayer dielectric layer.

Description

一種接觸孔形成方法Contact hole forming method

本發明是有關於一種在半導體元件上形成接觸孔的方法,且特別是有關於一種採用雙重圖案化(double patterning)技術來形成接觸孔的方法。The present invention relates to a method of forming a contact hole on a semiconductor element, and more particularly to a method of forming a contact hole using a double patterning technique.

隨著半導體製程的進步和微電子元件的微小化,單一晶片上的半導體元件的密度越來越大,相對地元件之間的間隔也越來越小。這使得接觸孔(contact hole)蝕刻製程的困難度越來越高。With advances in semiconductor processes and miniaturization of microelectronic components, the density of semiconductor components on a single wafer is increasing, and the spacing between opposing components is becoming smaller. This makes the contact hole etching process more difficult.

傳統接觸孔的作法,係利用光阻層作為遮罩,對下方的內層介電(Inter layer Dielectric,ILD)層進行蝕刻。尤其在28奈米(nm)的製程下,接觸孔蝕刻的間距(pitch),即兩鄰近接觸孔中心點間之距離,必須小於110奈米,而且顯影後關鍵尺寸(after development inspect critical dimension,ADICD)則必須大約55至70奈米。就現行單一曝光圖案化(Single Exposure Patterning;SP)的黃光機台技術而言,無法於一次曝光製程中完成間距小於110奈米的接觸孔。The conventional contact hole method uses a photoresist layer as a mask to etch the underlying inner layer dielectric (ILD) layer. Especially in the 28 nm process, the pitch of the contact hole etching, that is, the distance between the center points of the two adjacent contact holes, must be less than 110 nm, and the after development inspect critical dimension, ADICD) must be approximately 55 to 70 nm. With regard to the current single exposure patterning (SP) yellow light machine technology, contact holes with a pitch of less than 110 nm cannot be completed in one exposure process.

為了解決上述問題,目前業界常見的作法是採用雙重圖案化技術來形成接觸孔。例如,採用微影-微影-蝕刻(Litho-Litho-Etch,LLE)製程,利用兩個光罩對光阻層進行兩次曝光後,再進行一次蝕刻,藉以在下方的內層介電層中形成接觸孔。亦或是採用微影-蝕刻-微影-蝕刻(Litho-Etch -Litho-Etch,LELE)製程,利用兩個光罩分別對兩個光阻層進行兩次曝光,及以兩次蝕刻將光阻圖案轉移至硬罩幕層中,再進行一次蝕刻,藉以在下方介電層中形成接觸孔。In order to solve the above problems, it is common practice in the industry to form a contact hole by using a double patterning technique. For example, using a lithography-lithography-etching (LLEho-Litho-Etch (LLE) process, two photoresist layers are used to expose the photoresist layer twice, and then an etch is performed to allow the underlying dielectric layer to be underneath. A contact hole is formed in the middle. Or use the lithography-etching-lithography-etching (Litho-Etch-Litho-Etch, LELE) process, using two masks to expose the two photoresist layers twice, and to etch the light twice. The resist pattern is transferred into the hard mask layer and an etching is performed to form a contact hole in the lower dielectric layer.

然而,由於黃光製程在光阻顯影後,常因關鍵尺寸(Critical Dimension,CD)不合規格,或對準不良亦或對焦失效(defocus),而需要剝除光阻進行重工(rework),很可能因此損害第一次光阻層顯影(或蝕刻)製程在光阻或硬罩幕上所形成的圖案,進而影響後續的製程良率。However, since the yellow light process is often developed due to critical dimensions (Critical Dimension, CD), or misalignment or defocus, the yellow light process needs to be stripped of the photoresist for rework. This may damage the pattern formed by the first photoresist layer development (or etching) process on the photoresist or hard mask, thereby affecting subsequent process yield.

因此有需要提供一種不會受到光阻重工影響的接觸孔形成方法,以提高半導體元件的製程良率。Therefore, there is a need to provide a contact hole forming method that is not affected by photoresist rework to improve the process yield of a semiconductor device.

有鑑於此,本發明的目的就是在提供一種接觸孔形成方法,包括下述步驟:首先提供一個基材,其上依序覆蓋一個蝕刻停止層以及一個內層介電層。接著進行第一蝕刻製程,於內層介電層中形成至少一個第一開口。再於內層介電層上,形成第一含碳介電層,並藉以填充第一開口。之後,於第一含碳介電層上,依序形成第一抗反射層和第一圖案化光阻層。然後,以第一圖案化光阻層為蝕刻罩幕,進行第二蝕刻製程,於內層介電層中形成至少一個第二開口。In view of the above, an object of the present invention is to provide a contact hole forming method comprising the steps of first providing a substrate on which an etch stop layer and an inner dielectric layer are sequentially covered. A first etching process is then performed to form at least one first opening in the inner dielectric layer. A first carbon-containing dielectric layer is formed over the inner dielectric layer to fill the first opening. Thereafter, a first anti-reflective layer and a first patterned photoresist layer are sequentially formed on the first carbon-containing dielectric layer. Then, the first patterned photoresist layer is used as an etching mask, and a second etching process is performed to form at least one second opening in the inner dielectric layer.

在本發明之一實施例中,第一抗反射層和第一圖案化光阻層的形成,可包括一光阻重工製程。In an embodiment of the invention, the forming of the first anti-reflective layer and the first patterned photoresist layer may include a photoresist rework process.

在本發明之一實施例中,第一抗反射層的形成,包含下述步驟:首先於第一含碳介電層上,形成第一底部抗反射層(Bottom Anti-Reflective Coating,BARC)。然後,於第一底部抗反射層上形成第一介質抗反射層(Dielectric Anti-Reflective Coating,DARC)。In an embodiment of the invention, the forming of the first anti-reflective layer comprises the steps of first forming a first bottom anti-reflective coating (BARC) on the first carbon-containing dielectric layer. Then, a first dielectric anti-reflective coating (DARC) is formed on the first bottom anti-reflective layer.

在本發明之一實施例中,第一開口的形成,包括下述步驟:首先於內層介電層上,依序形成第二含碳介電層、第二抗反射層以及第二圖案化光阻層。接著,以第二圖案化光阻層為蝕刻罩幕,進行第一蝕刻製程,於內層介電層中形成第一開口。In an embodiment of the invention, the forming of the first opening includes the steps of: sequentially forming a second carbon-containing dielectric layer, a second anti-reflective layer, and a second patterning on the inner dielectric layer. Photoresist layer. Then, the second patterned photoresist layer is used as an etching mask, and a first etching process is performed to form a first opening in the inner dielectric layer.

在本發明之一實施例中,形成第一開口之後,更包括剝除第二含碳介電層、第二抗反射層以及第二圖案化光阻層。In an embodiment of the invention, after the forming the first opening, further comprising stripping the second carbon-containing dielectric layer, the second anti-reflective layer, and the second patterned photoresist layer.

在本發明之一實施例中,第二抗反射層的形成,包含下述步驟:先於第二含碳介電層上形成第二底部抗反射層。再於第二底部抗反射層上形成第二介質抗反射層。In an embodiment of the invention, the forming of the second anti-reflective layer comprises the step of forming a second bottom anti-reflective layer on the second carbon-containing dielectric layer. A second dielectric anti-reflective layer is formed on the second bottom anti-reflective layer.

在本發明之一實施例中,第一介質抗反射層和第二介質抗反射層,分別是一種含矽介電層。其中,此含矽介電層的材質係選自於由二氧化矽、氮化矽、氮氧化矽、氮碳化矽以及上述之任意組合所組成之一族群。在本發明之一實施例中,第一底部抗反射層和第二底部抗反射層,皆係由含有碳氫氧(CHO)的聚合物所組成。In an embodiment of the invention, the first dielectric anti-reflective layer and the second dielectric anti-reflective layer are respectively a germanium-containing dielectric layer. The material of the germanium-containing dielectric layer is selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, cerium oxynitride, and any combination thereof. In an embodiment of the invention, the first bottom anti-reflective layer and the second bottom anti-reflective layer are both composed of a polymer containing carbon and oxygen (CHO).

在本發明之一實施例中,第一開口和第二開口,皆貫穿內層介電層和蝕刻停止層,而將基材暴露於外。In one embodiment of the invention, the first opening and the second opening both extend through the inner dielectric layer and the etch stop layer to expose the substrate to the outside.

根據上述實施例,本發明的實施例,提供一種使用兩次微影蝕刻製程,在半導體基材之中形成接觸孔的先進方法。其係先以第一次微影蝕刻步驟,在半導體基材的內層介電層之中先形成至少一個第一開口;再以含碳介電層填充此第一開口,並藉由黃光製程,於此一含碳介電層上,形成抗反射層以及圖案化光阻層。接著,進行第二次蝕刻製程,在內層介電層之中先形成至少一個第二開口。In accordance with the above-described embodiments, embodiments of the present invention provide an advanced method of forming contact holes in a semiconductor substrate using a two-time lithography process. Forming at least one first opening in the inner dielectric layer of the semiconductor substrate by using a first lithography etching step; filling the first opening with a carbon-containing dielectric layer, and using yellow light The process, on the carbon-containing dielectric layer, forms an anti-reflective layer and a patterned photoresist layer. Then, a second etching process is performed to form at least one second opening in the inner dielectric layer.

由於第一次微影蝕刻製程所形成的第一開口,可被含碳介電層所覆蓋,而完全不受第二次微影蝕刻製程的影響。即便形成第二開口的黃光製程,有需要進行光阻重工步驟,也不會因此而造成第一開口的損害,或加大第一開口的關鍵尺寸。因此可防止因第二次微影蝕刻製程的光阻重工步驟,造成接觸孔關鍵尺寸增加的問題,達到提高半導體元件的製程良率的發明目的。Since the first opening formed by the first lithography process can be covered by the carbon-containing dielectric layer, it is completely unaffected by the second lithography process. Even if the yellow light process of forming the second opening requires a photoresist rework step, the first opening is not damaged or the critical dimension of the first opening is increased. Therefore, the problem of increasing the critical dimension of the contact hole due to the photoresist rework step of the second lithography process can be prevented, and the object of improving the process yield of the semiconductor device can be achieved.

為讓本發明之上述和其他目的、特徵和優點能更明顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細說明如下。The above and other objects, features and advantages of the present invention will become more <RTIgt;

本發明的目的,就是在提供一種使關鍵尺寸不會受到光阻重工影響的接觸孔形成方法,以提高半導體元件的製程良率。為讓本發明之上述和其他目的、特徵和優點能更明顯易懂,下文特舉數個較佳實施例,並配合所附圖式,作詳細說明如下。SUMMARY OF THE INVENTION An object of the present invention is to provide a contact hole forming method for preventing critical dimensions from being affected by photoresist rework to improve the process yield of a semiconductor device. The above and other objects, features and advantages of the present invention will become more <RTIgt;

請參照圖1A至圖1D,圖1A至圖1D係根據本發明的一較佳實施例所繪示的一種在半導體元件中形成接觸孔的製程剖面圖。Referring to FIG. 1A to FIG. 1D, FIG. 1A to FIG. 1D are cross-sectional views showing a process of forming a contact hole in a semiconductor device according to a preferred embodiment of the present invention.

其中,形成接觸孔的法包括下述步驟:首先提供一個基材101。例如,提供一晶圓(wafer)或提供一矽覆絕緣(Silicon On Isolator,SOI)等之半導體基材。Among them, the method of forming the contact hole includes the following steps: First, a substrate 101 is provided. For example, a wafer is provided or a semiconductor substrate such as a Silicon On Isolator (SOI) is provided.

接著,在基材101上依序形成一個蝕刻停止層102以及一個內層介電層103,以覆蓋基材101。其中,內層介電層103,可利用電漿加強化學氣相沈積製程等薄膜沈積技術來形成。其材質可包含未摻雜矽氧、摻雜矽氧,如四乙氧基矽烷(Tetetra-Ethyl-Ortho-Silicate,TEOS)矽氧、或硼磷矽玻璃、氟矽氧、磷矽氧、硼矽氧、低介電常數(Low K)材料、超低介電常數(Ultra Low K)材料或上述之任意組合。Next, an etch stop layer 102 and an inner dielectric layer 103 are sequentially formed on the substrate 101 to cover the substrate 101. The inner dielectric layer 103 can be formed by a thin film deposition technique such as a plasma enhanced chemical vapor deposition process. The material may include undoped xenon, doped with oxygen, such as Tetetra-Ethyl-Ortho-Silicate (TEOS), or borophosphonium, fluorophosphonium, phosphorus, oxygen, boron Niobium oxide, low dielectric constant (Low K) material, ultra low dielectric constant (Ultra Low K) material or any combination of the above.

然後,於內層介電層103上,進行一個第一蝕刻製程,以於內層介電層103中形成至少一個接觸開口109。Then, on the inner dielectric layer 103, a first etching process is performed to form at least one contact opening 109 in the inner dielectric layer 103.

在本發明的較佳實施例中,進行第一蝕刻製程之前,包括:先於內層介電層103上,依序形成含碳的介電層104、抗反射層以及圖案化光阻層107。In a preferred embodiment of the present invention, before performing the first etching process, the carbon-containing dielectric layer 104, the anti-reflective layer, and the patterned photoresist layer 107 are sequentially formed on the inner dielectric layer 103. .

其中圖案化光阻層107具有至少一個圖案開口108(如圖1A所繪示)。含碳介電層104,較佳是一種以電漿輔助化學氣相沉積(Plasma-Enhanced Chemical Vapor Deposition,PECVD)方式,形成於內層介電層103上的硬質罩幕(hard mask)。在本實施例之中,含碳的介電層104是採用應用材料公司所提供的先進圖膜(Advanced Patterning Film,APF)。抗反射層,則係由位於含碳的介電層104上方的底部抗反射層105,以及位於底部抗反射層105上方的介質抗反射層106共同構成。介質抗反射層106,較佳是一種含矽介電層,其材質係選自於由二氧化矽、氮化矽、氮氧化矽、氮碳化矽以及上述之任意組合所組成之一族群。底部抗反射層105係將有機材料,例如含有碳氫氧(CHO)的聚合物,旋塗(spin on)於含碳的介電層104上方,其中含有碳氫氧(CHO)的聚合物,較佳係由乳酸乙酯(ethyl lactate)或丙二醇甲醚醋酸酯,(1-Methoxy-2-propyl acetate or propylene glycol mono-methyl ether acetate)或二者之組合所組成。The patterned photoresist layer 107 has at least one pattern opening 108 (as shown in FIG. 1A). The carbon-containing dielectric layer 104 is preferably a hard mask formed on the inner dielectric layer 103 by a Plasma-Enhanced Chemical Vapor Deposition (PECVD) method. In the present embodiment, the carbon-containing dielectric layer 104 is an Advanced Patterning Film (APF) provided by Applied Materials. The anti-reflective layer is formed by a bottom anti-reflective layer 105 above the carbon-containing dielectric layer 104 and a dielectric anti-reflective layer 106 above the bottom anti-reflective layer 105. The dielectric anti-reflective layer 106 is preferably a germanium-containing dielectric layer selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, cerium oxynitride, and any combination thereof. The bottom anti-reflective layer 105 is an organic material, such as a hydrocarbon containing carbon-oxygen (CHO), spin-on over a carbon-containing dielectric layer 104 containing a hydrocarbon-hydrogen (CHO) polymer. Preferably, it consists of ethyl lactate or propylene glycol mono-methyl ether acetate or a combination of the two.

另外,在本發明的另一些實施例中,形成接觸開口109的圖案化光阻層107,可以是一種三層光阻結構(tri-layer photoresist structure),其包含依序堆疊的ArF光阻層,含矽之有機光阻層(SHB)和I-line光阻層(未繪示)。且在進行第一次蝕刻製程之前,還包括進行一個圖案轉移步驟:先藉由曝光顯影在ArF光阻層形成的圖案開口108,再以ArF光阻層為罩幕進行至少一次乾式蝕刻製程,將圖案開口108的圖案依序轉移至SHB光阻層和I-line光阻層。In addition, in other embodiments of the present invention, the patterned photoresist layer 107 forming the contact opening 109 may be a tri-layer photoresist structure including sequentially stacked ArF photoresist layers. , an organic photoresist layer (SHB) containing an antimony and an I-line photoresist layer (not shown). And before performing the first etching process, further comprising performing a pattern transfer step of first performing the at least one dry etching process by using the pattern opening 108 formed in the ArF photoresist layer by exposure and development, and then using the ArF photoresist layer as a mask. The pattern of the pattern openings 108 is sequentially transferred to the SHB photoresist layer and the I-line photoresist layer.

接著,以圖案化光阻層107為罩幕,進行第一蝕刻製程,並於內層介電層103中形成至少一個接觸開口109。在本發明的較佳實施例之中,第一蝕刻製程是採用乾式蝕刻製程,使接觸開口109貫穿內層介電層103和蝕刻停止層102,而將基材101暴露於外。但在其他實施例之中,接觸開口109僅延伸進入內層介電層103之中,並未貫穿內層介電層103和蝕刻停止層102。Next, using the patterned photoresist layer 107 as a mask, a first etching process is performed, and at least one contact opening 109 is formed in the inner dielectric layer 103. In a preferred embodiment of the present invention, the first etching process uses a dry etching process to expose the contact opening 109 through the inner dielectric layer 103 and the etch stop layer 102 to expose the substrate 101 to the outside. However, in other embodiments, the contact opening 109 extends only into the inner dielectric layer 103 and does not extend through the inner dielectric layer 103 and the etch stop layer 102.

在形成接觸開口109之後,將圖案化光阻層107、底部抗反射層105和介質抗反射層106予以剝除(如圖1B所繪示)。之後,再於內層介電層103上,形成另外一個含碳介電層110,並藉以填充開口109。與含碳介電層104相同,含碳介電層110,較佳也是一種以電漿輔助化學氣相沉積所形成的硬質罩幕。在本實施例之中,含碳介電層110也是採用應用材料公司所提供的先進圖膜。但在其他實施例之中,含碳介電層104和110兩者材質可以不同。After the contact opening 109 is formed, the patterned photoresist layer 107, the bottom anti-reflective layer 105, and the dielectric anti-reflective layer 106 are stripped (as shown in FIG. 1B). Thereafter, another carbon-containing dielectric layer 110 is formed on the inner dielectric layer 103, thereby filling the opening 109. Like the carbon-containing dielectric layer 104, the carbon-containing dielectric layer 110 is preferably a hard mask formed by plasma-assisted chemical vapor deposition. In the present embodiment, the carbon-containing dielectric layer 110 is also an advanced film provided by Applied Materials. However, in other embodiments, the carbon-containing dielectric layers 104 and 110 may be made of different materials.

之後,再於含碳介電層110上,依序形成底部抗反射層111、介質抗反射層112和圖案化光阻層113。其中圖案化光阻層113,還具有至少一個圖案開口114(如圖1C所繪示)。在本發明的較佳實施例中,介質抗反射層112是一種含矽介電層,其材質係選自於由二氧化矽、氮化矽、氮氧化矽、氮碳化矽以及上述之任意組合所組成之一族群。底部抗反射層111,係將有機材料,例如含有碳氫氧(CHO)的聚合物,旋塗於含碳介電層110上。其中含有碳氫氧(CHO)的聚較佳係由乳酸乙酯、丙二醇甲醚醋酸酯或二者之組合所組成。Thereafter, a bottom anti-reflective layer 111, a dielectric anti-reflective layer 112, and a patterned photoresist layer 113 are sequentially formed on the carbon-containing dielectric layer 110. The patterned photoresist layer 113 further has at least one pattern opening 114 (as shown in FIG. 1C). In a preferred embodiment of the present invention, the dielectric anti-reflective layer 112 is a germanium-containing dielectric layer selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, cerium oxynitride, and any combination thereof. One of the groups that make up. The bottom anti-reflective layer 111 is spin-coated on the carbon-containing dielectric layer 110 by an organic material such as a hydrocarbon-containing (CHO)-containing polymer. The poly(hydrocarbyloxy) (CHO)-containing polymer preferably consists of ethyl lactate, propylene glycol methyl ether acetate or a combination of the two.

值得注意的是,雖然在上述施例中,介質抗反射層112、底部抗反射層111和圖案化光阻層113的材質,較佳係分別與介質抗反射層105、底部抗反射層106和圖案化光阻層107相同。但是並不限定於此,在其他實施例之中,介質抗反射層112、底部抗反射層111和圖案化光阻層113的材質,可以分別與介質抗反射層106、底部抗反射層105和圖案化光阻層107不同。由於,形成成圖案化光阻層、介質抗反射層和底部抗反射層的步驟及材料,已為該技術領域中具有通常知識者所習知,故相關步驟及材料應可不在此贅述。It should be noted that, in the above embodiment, the materials of the dielectric anti-reflective layer 112, the bottom anti-reflective layer 111 and the patterned photoresist layer 113 are preferably respectively combined with the dielectric anti-reflective layer 105 and the bottom anti-reflective layer 106. The patterned photoresist layer 107 is the same. However, the material of the dielectric anti-reflective layer 112, the bottom anti-reflective layer 111, and the patterned photoresist layer 113 may be respectively combined with the dielectric anti-reflective layer 106 and the bottom anti-reflective layer 105, and in other embodiments. The patterned photoresist layer 107 is different. Since the steps and materials for forming the patterned photoresist layer, the dielectric anti-reflective layer, and the bottom anti-reflective layer are well known to those skilled in the art, the related steps and materials should not be described herein.

接著,以圖案化光阻層113為罩幕,進行第二蝕刻製程,於內層介電層103中,形成至少一個接觸開口115(如圖1D所繪示)。在本發明的較佳實施例之中,第二蝕刻製程是採用乾式蝕刻製程,使接觸開口115貫穿內層介電層103和蝕刻停止層102,而將基材101暴露於外。但在其他實施例之中,接觸開口115僅延伸進入內層介電層103之中,並未貫穿內層介電層103和蝕刻停止層102。Next, the second photoresist process is performed by using the patterned photoresist layer 113 as a mask. In the inner dielectric layer 103, at least one contact opening 115 is formed (as shown in FIG. 1D). In a preferred embodiment of the present invention, the second etching process uses a dry etching process to expose the contact opening 115 through the inner dielectric layer 103 and the etch stop layer 102 to expose the substrate 101 to the outside. However, in other embodiments, the contact opening 115 extends only into the inner dielectric layer 103 and does not penetrate the inner dielectric layer 103 and the etch stop layer 102.

之後,將餘留在內層介電層103上的含碳介電層110加以剝除,即形成如圖1E所繪示的接觸孔(接觸開口109和115)結構。Thereafter, the carbon-containing dielectric layer 110 remaining on the inner dielectric layer 103 is stripped to form a contact hole (contact openings 109 and 115) as shown in FIG. 1E.

根據上述實施例,本發明的實施例,提供一種使用兩次微影蝕刻製程,在半導體基材之中形成接觸孔的先進方法。其係先以第一次微影蝕刻步驟,在半導體基材的內層介電層之中先形成至少一個第一開口;再以含碳介電層填充此第一開口,並藉由黃光製程,於此一含碳介電層上,形成抗反射層以及圖案化光阻層。接著,進行第二次蝕刻製程,在內層介電層之中先形成至少一個第二開口。In accordance with the above-described embodiments, embodiments of the present invention provide an advanced method of forming contact holes in a semiconductor substrate using a two-time lithography process. Forming at least one first opening in the inner dielectric layer of the semiconductor substrate by using a first lithography etching step; filling the first opening with a carbon-containing dielectric layer, and using yellow light The process, on the carbon-containing dielectric layer, forms an anti-reflective layer and a patterned photoresist layer. Then, a second etching process is performed to form at least one second opening in the inner dielectric layer.

由於第一次微影蝕刻製程所形成的第一開口,可被含碳介電層所覆蓋,而完全不受第二次微影蝕刻製程的影響。即便形成第二開口的黃光製程,有需要進行光阻重工步驟,也不會因此而造成第一開口的損害,或加大第一開口的關鍵尺寸。因此可防止因第二次微影蝕刻製程的光阻重工步驟,造成接觸孔關鍵尺寸增加的問題,達到提高半導體元件的製程良率的發明目的。Since the first opening formed by the first lithography process can be covered by the carbon-containing dielectric layer, it is completely unaffected by the second lithography process. Even if the yellow light process of forming the second opening requires a photoresist rework step, the first opening is not damaged or the critical dimension of the first opening is increased. Therefore, the problem of increasing the critical dimension of the contact hole due to the photoresist rework step of the second lithography process can be prevented, and the object of improving the process yield of the semiconductor device can be achieved.

雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.

101...基材101. . . Substrate

102...蝕刻停止層102. . . Etch stop layer

103...內層介電層103. . . Inner dielectric layer

104...含碳介電層104. . . Carbon-containing dielectric layer

106...介質抗反射層106. . . Dielectric anti-reflection layer

105...底部抗反射層105. . . Bottom anti-reflection layer

107...圖案化光阻層107. . . Patterned photoresist layer

108...圖案開口108. . . Pattern opening

109...接觸開口109. . . Contact opening

110...含碳介電層110. . . Carbon-containing dielectric layer

112...介質抗反射層112. . . Dielectric anti-reflection layer

111...底部抗反射層111. . . Bottom anti-reflection layer

113...圖案化光阻層113. . . Patterned photoresist layer

114...圖案開口114. . . Pattern opening

115...接觸開口115. . . Contact opening

圖1A至圖1D係根據本發明的一較佳實施例所繪示的一種在半導體元件中形成接觸孔的製程剖面圖。1A through 1D are cross-sectional views showing a process of forming a contact hole in a semiconductor device in accordance with a preferred embodiment of the present invention.

圖1E係根據圖1A至圖1D的製程所形成的接觸孔結構剖面圖。1E is a cross-sectional view showing the structure of a contact hole formed in accordance with the process of FIGS. 1A to 1D.

101...基材101. . . Substrate

102...蝕刻停止層102. . . Etch stop layer

103...內層介電層103. . . Inner dielectric layer

110...含碳介電層110. . . Carbon-containing dielectric layer

112...介質抗反射層112. . . Dielectric anti-reflection layer

111...底部抗反射層111. . . Bottom anti-reflection layer

113...圖案化光阻層113. . . Patterned photoresist layer

114...圖案開口114. . . Pattern opening

Claims (13)

一種接觸孔形成方法,包括:提供一基材,其上依序覆蓋一蝕刻停止層以及一內層介電層;進行一第一蝕刻製程,於該內層介電層中形成至少一第一開口;於該內層介電(Inter layer Dielectric,ILD)層上,形成一第一含碳介電層,並藉以填充該第一開口;於該第一含碳介電層上,形成一第一抗反射層以及一第一圖案化光阻層,以及以該第一圖案化光阻層為一蝕刻罩幕,進行一第二蝕刻製程,於該內層介電層中形成至少一第二開口。A method for forming a contact hole, comprising: providing a substrate on which an etch stop layer and an inner dielectric layer are sequentially covered; performing a first etching process to form at least a first layer in the inner dielectric layer Opening a first carbon-containing dielectric layer on the inner layer dielectric layer (ILD) to fill the first opening; forming a first layer on the first carbon-containing dielectric layer An anti-reflective layer and a first patterned photoresist layer, and the first patterned photoresist layer is an etching mask, performing a second etching process to form at least a second layer in the inner dielectric layer Opening. 如申請專利範圍第1項所述之接觸孔形成方法,其中該第一抗反射層和該第一圖案化光阻層的形成,可包括一光阻重工(rework)步驟。The contact hole forming method of claim 1, wherein the forming of the first anti-reflective layer and the first patterned photoresist layer may include a photoresist rework step. 如申請專利範圍第1項所述之接觸孔形成方法,其中形成該第一抗反射層的步驟,包含;形成一第一底部抗反射層(Bottom Anti-Reflective Coating,BARC)於該第一含碳介電層上;以及形成一第一介質抗反射層(Dielectric Anti-Reflective Coating,DARC)於該第一底部抗反射層上。The method for forming a contact hole according to claim 1, wherein the step of forming the first anti-reflective layer comprises: forming a first bottom anti-reflective coating (BARC) in the first And forming a first dielectric anti-reflective coating (DARC) on the first bottom anti-reflective layer. 如申請專利範圍第3項所述之接觸孔形成方法,其中該第一底部抗反射層係由含有碳氫氧(CHO)的聚合物所組成。The contact hole forming method according to claim 3, wherein the first bottom anti-reflection layer is composed of a polymer containing carbon oxyhydrogen (CHO). 如申請專利範圍第3項所述之接觸孔形成方法,其中該第一介質抗反射層為一含矽介電層。The contact hole forming method of claim 3, wherein the first dielectric anti-reflective layer is a germanium-containing dielectric layer. 如申請專利範圍第5項所述之接觸孔形成方法,其中該含矽介電層的材質係選自於由二氧化矽、氮化矽、氮氧化矽、氮碳化矽以及上述之任意組合所組成之一族群。The method for forming a contact hole according to claim 5, wherein the material of the germanium-containing dielectric layer is selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, cerium oxynitride, and any combination thereof. Form a group of people. 如申請專利範圍第1項所述之接觸孔形成方法,其中形成該第一開口的步驟,包括:於該內層介電層上,依序形成一第二含碳介電層、一第二抗反射層以及一第二圖案化光阻層;以及以該第二圖案化光阻層為一蝕刻罩幕,進行該第一蝕刻製程,於該內層介電層中形成該第一開口。The method for forming a contact hole according to claim 1, wherein the step of forming the first opening comprises: sequentially forming a second carbon-containing dielectric layer and a second on the inner dielectric layer The first anti-reflective layer and the second patterned photoresist layer; and the second patterned photoresist layer is an etch mask, the first etching process is performed, and the first opening is formed in the inner dielectric layer. 如申請專利範圍第7項所述之接觸孔形成方法,其中在形成該第一開口之後,更包括剝除該第二含碳介電層、該第二抗反射層以及該第二圖案化光阻層。The contact hole forming method of claim 7, wherein after forming the first opening, further comprising stripping the second carbon-containing dielectric layer, the second anti-reflective layer, and the second patterned light Resistance layer. 如申請專利範圍第7項所述之接觸孔形成方法,其中形成該第二抗反射層的步驟,包含;形成一第二底部抗反射層於該第二含碳介電層上;以及形成一第二介質抗反射層於該第二底部抗反射層上。The method for forming a contact hole according to claim 7, wherein the forming the second anti-reflective layer comprises: forming a second bottom anti-reflective layer on the second carbon-containing dielectric layer; and forming a A second dielectric anti-reflective layer is on the second bottom anti-reflective layer. 如申請專利範圍第9項所述之接觸孔形成方法,其中該第二底部抗反射層係由含有碳氫氧(CHO)的聚合物所組成。The contact hole forming method according to claim 9, wherein the second bottom anti-reflective layer is composed of a polymer containing carbon oxyhydrogen (CHO). 如申請專利範圍第9項所述之接觸孔形成方法,其中該第二介質抗反射層為一含矽介電層。The contact hole forming method of claim 9, wherein the second dielectric anti-reflective layer is a germanium-containing dielectric layer. 如申請專利範圍第11項所述之接觸孔形成方法,其中該含矽介電層的材質係選自於由二氧化矽、氮化矽、氮氧化矽、氮碳化矽以及上述之任意組合所組成之一族群。The method for forming a contact hole according to claim 11, wherein the material of the germanium-containing dielectric layer is selected from the group consisting of cerium oxide, cerium nitride, cerium oxynitride, cerium oxynitride, and any combination thereof. Form a group of people. 如申請專利範圍第1項所述之接觸孔形成方法,其中該第一開口與該第二開口,貫穿該內層介電層和該蝕刻停止層,而將該基材暴露於外。The contact hole forming method of claim 1, wherein the first opening and the second opening penetrate the inner dielectric layer and the etch stop layer to expose the substrate to the outside.
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Publication number Priority date Publication date Assignee Title
TWI660405B (en) * 2018-05-25 2019-05-21 Nanya Technology Corporation Method of manufacturing semiconductor device
US10529586B2 (en) 2018-05-25 2020-01-07 Nanya Technology Corporation Method of manufacturing semiconductor device

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