TW201303331A - Adapter for a test device, and test device for the testing of circuit boards - Google Patents

Abstract

The present invention relates to an adapter for a parallel tester for the testing of non-componented circuit boards and a parallel tester for the testing of non-componented circuit boards. According to the invention, in each case at least two test needles are located in several guide holes of a test specimen guide plate which may be arranged adjacent to a test specimen, and these test needles are electrically insulated from one another. By this means it is possible to conduct a four-wire measurement in a parallel tester, while still providing a high density of contact points.

Description

Adapter for a test device and test device for circuit board test

The present invention relates to an adapter for use in a test device and a test device for circuit board testing. In particular, an adapter for a parallel tester for componentless board testing and a parallel tester for componentless board testing.

Devices for board testing are basically divided into two population groups: a finger tester that uses a plurality of contact fingers to sequentially scan a test point of a circuit board under test; and a parallel tester that is multiplexed The method of contact simultaneously contacts all board test points of a circuit under test.

In the case of the parallel tester, a further distinction is made between the universal tester and the dedicated tester.

The universal tester is a parallel tester with a basic grid. The basic grid is a regular grid that is joined to the contact points of an evaluation device. Since the board test points of a circuit board under test are usually arranged in a grid deviating from the regular pattern of the base grid, each board test point connecting the board to be tested must be provided with the base grid. One of the touch points of the adapter. The adapters are also referred to as grid adapters because the adapters convert the predetermined regular base grid of the test device into a generally irregular arrangement of circuit board test points of a circuit under test. One of the adapters of this type typically has a plurality of guide plates spaced apart from each other, wherein the guide plates are formed with guide holes for the test pins. The test pins can be mounted at the angle at the adapter Thus, the contact points of the regular basic grid can be electrically connected to the test points of the boards, usually by the regular layout of the basic grid.

Typically the adapter is not placed directly in the base grid, but rather a so-called full grid is provided between the base grid and the adapter. Like the adapter, a full grid raft is constructed of a plurality of guides, and a plurality of contact pins are arranged in the same pattern as the basic grid. These contact pins are elastic. The reason for using this full grid raft is that it is difficult to insert a resilient contact pin between the adapters because the resilient contact pins are too thick to be mounted to the adapter at an angle. On the other hand, it is necessary to compensate for the uneven height difference due to the unevenness on the board to be tested or the tilt position of the needle in the adapter, and the method of using the full-grid elastic contact pin is necessary. .

In addition to a full grid crucible, a resilient conductive rubber sheet may be provided to create an electrical connection between the needle of the adapter and the corresponding contact point of the base grid. In any case, for each type of circuit board under test, a special one must be made. In another aspect, the base grid and the full grid are independent of the type of board under test. A parallel tester with a basic grid is also referred to as a universal tester because only the adapter must be specifically matched to an individual board type. Other components of the test device can be used to test any type of circuit board.

On the other hand, the dedicated testers are parallel testers having a contact plate, and the contact elements of the contact plates are arranged in a pattern with the test board of the circuit board of the circuit under test. The contact elements of the contact plate are individually connected directly to the terminals of an evaluation device by wires or thin cables. These special tests The testers are especially used in the testing of microchips (ICs). However, such dedicated testers are also increasingly being used for testing on boards, especially when the boards are very small and the board test points are tightly set. However, the production of the contact plate is very laborious because individual contact elements must be soldered by hand to the corresponding cable. Therefore, the dedicated tester has the disadvantage of requiring simultaneous access to thousands of board test points when used on large partless boards.

A parallel tester having a basic grid plate forming a basic grid on its surface is disclosed in EP 875 767 B1. The basic grid plate is a multi-layer circuit board in which a plurality of contact points of the basic grid are electrically connected to each other by operating a scanning channel in the basic grid plate. Thus, in any case, the plurality of contact points of the basic grid joined by one of the scanning channels are electrically connected to one of the terminals of an evaluation electronic unit in any case. In this way, a plurality of contact points of the basic grid can be made available by using one terminal of the evaluation electronic unit, and a contact element of a higher density basic grid can be provided without relatively increasing the evaluation electron. The capacity of the device. An adapter and/or converter is placed on the base grid and the circuit board under test can be placed in the adapter and/or the converter.

A module for a parallel tester is disclosed in WO 02/31516 A1, wherein the parallel tester has an elongated section containing one of the contact points, the contact points forming part of the basic grid of the parallel tester . A riser is mounted below the elongate section and a portion of the evaluation electronics for evaluating the test signal is located on the riser. The contact points on the elongate section are arranged in a grid having a grid space of no more than 2 mm, and are electrically connected or communicated with a single input of an evaluation electronics unit. The method of touching is to electrically connect at least two contact points of a module to each other.

Another module for one of the parallel testers for the board test is disclosed in WO 2008/071541 A2. The module has a support plate and a contact plate. The contact plate is formed by a rigid circuit board section and at least one resilient circuit board section, also referred to as the basic grid element. The basic grid element provides a plurality of contact points that individually form a portion of the contact points of the base grid. The basic grid element is mounted on one end of the support plate and the flexible circuit board section is bent by a method for arranging at least a portion of the remaining area of the contact plate to be parallel to the support plate. Each contact point of the basic grid element is in electrical contact with a conductor path running in the contact plate and extends from the basic grid element into the flexible circuit board section. A multiplicity of the modules is mounted in the parallel tester one by one by forming the basic grid elements in a continuous basic grid plate, wherein the basic grid is described as being arranged in a regular pattern The touch point of the style.

An example of an adapter design is disclosed in WO 2009/047160 A2 or US 2010/0283498 A1.

DE 44 41 347 A1 discloses a method and a device for testing a part module by means of a four-wire measurement. To this end, at least four needles that are free to move are provided in the X and Y directions. Testing of the part module requires significantly less contact than the partless board test. In the test of a partless circuit board, each conductor path must be individually contacted. On the other hand, in the testing of the component module, a functional test or an in-circuit test can be performed in which the function of a complete circuit is tested by a small number of contacts.

A finger for performing a four-wire measurement is described in US 6,384,614 B1 Test probe for the tester.

EP 1 031 840 A2 discloses a test device for circuit board testing in which the electrode is in contact with a contact point of the test object by a layer of electrically conductive rubber. The conductive rubber layer is designed to be pressed together to reduce the resistance in the direction of pressure. In this way, it is possible to arrange individual electrodes in the contact plate very closely, while still being in individual contact with the test points of the board. The arrangement of the electrodes can be even so close that the two adjacent electrodes together contact one of the contact points of a circuit board, one of which provides a measurement current and the other electrode measures the voltage.

DE 197 15 094 A1 discloses one of the adapters for circuit board testing, which consists of a minimum number of individual parts and can be assembled quickly and easily. The adapter has a plurality of guide plates drilled with holes. Needle-shaped test probes are mounted in the holes. An upper guide has a standard grid layout of holes that conform to the grid layout of the contact points of an electronic test or analysis unit. The lower guide plate provides a drilling arrangement corresponding to the position of the test point of the circuit board under test. Each hole in the upper guide plate is assigned to one of the holes of the lower guide. A needle-shaped test probe is advanced into the corresponding holes so that the probe is clamped in each ply.

The present invention is based on the problems encountered in the manufacture of an adapter and a parallel tester, and the present invention enables very accurate testing of a componentless circuit board having a high contact density.

These problems can be solved by a feature with the first feature of the patent application scope. The connector and a parallel tester having the features of the ninth application patent are solved. Advantageous developments of the present invention are disclosed in the related subsidiary of the scope of the patent application.

An adapter according to the present invention is used in a parallel tester for a partless circuit board test test, the adapter comprising: at least one basic grid guide and a sample guide, wherein the basic grid The guide plate has a plurality of via holes arranged in a regular grid relative to a basic grid of a parallel tester, and the sample guides have circuit board test points arranged relative to a circuit board under test a plurality of guide holes of the pattern, and one end section of the plurality of test pins is rested in one of the guide holes of the basic grid guide and the other end section is placed in one of the guide holes of the sample guide .

The invention is characterized in that in any case at least two test pins are disposed in a plurality of guide holes of the sample guide, and the test pins are mounted together in the guide holes of the test guide and insulated from each other.

Since in any case at least two test pins are disposed in the plurality of via holes, the corresponding circuit board test points are simultaneously contacted by the two test pins, so that a four-wire measurement can be implemented in the circuit board test points. A four-wire measurement is more accurate than a second-line measurement.

The adapters that are closely adjacent to the vias have been tested. One of the board test points of one of the tested boards can be simultaneously contacted by the two test pins. This also allows for a four-wire measurement. However, the density of the board test points being contacted is low because the two via holes occupy significantly more space than the via holes that accommodate the two test pins in accordance with the present invention.

Since the test pins are insulated from each other, it is ensured that they are arranged together in the guide The test pins in the holes contact individual board test points that are independent of each other, so the contact resistance between the test pins and the individual board test points can be reliably excluded. If there is an electrical contact between the two test pins, the current through the two test pins cannot be completely separated.

In order to insulate a test pin provided together in a via hole, at least one of the test pins has a coating of electrical insulation covering at least a test pin segment disposed in the region of the via hole, wherein One of the test pins is not covered by the adjacent tip. Preferably, all of the test pins in the pilot hole cover the coating.

The coating is preferably made of aluminum oxide or titanium oxide, or the coating is a carbon coating.

However, the test pins can also be insulated from each other by providing a film interposed therebetween. The film may comprise at least one section of the test needle in the form of a sleeve. The film is made of a wear resistant plastic, especially a reinforced fiber plastic.

A parallel tester according to the present invention comprises: a sample contact plate having a plurality of via holes arranged in a predetermined pattern, and the pattern is a pattern of test points with respect to a circuit board of a circuit board to be tested, wherein The plurality of pairs of test pins are individually mounted in a common hole of the sample contact plate by one end section thereof. Therefore, in any case, one of the circuit boards of the circuit under test can be combined with a hole. A test is targeted at the contact.

The parallel tester is designed as a universal tester having a basic grid and an adapter as described above. However, the parallel tester can also be used as a special A tester is used, wherein the test pin is directly connected to an evaluation device by a wire or a cable. Also in the embodiment of the dedicated tester, it is preferred that the test pins disposed together in a hole are electrically insulated from each other, wherein the electrical insulation can be achieved by one of the aforementioned coating means or a film.

Preferably, the parallel tester is also designed such that each test pin is electrically connected to one of the terminals of the evaluation device, wherein in any case two or more test pins are connected to the same terminal of the evaluation device, connected to the The test pins of the same terminal of the evaluation device are placed in respective different holes of the sample contact plate. The principle of the test pin group connection and the connection of the test pin group to a common terminal of the evaluation device can be obtained from EP 875 767 B1. In a universal tester having a basic grid plate, the connection may be affected by running a scan channel in the basic grid plate, and the wire or cable may be directly connected to a dedicated tester. One of the evaluation devices is a terminal.

The combination of the test holes arranged in one of the sample contact plates, and the provision of at least two test pins in each hole, the connection of the plurality of test pins in different holes is particularly advantageous, for each parallel tester. The number of test pins is increased, and due to the connection of the test pins, there is no need to increase the capacity of the evaluation device.

The invention is first described with the aid of a parallel tester in the form of a universal tester (Figs. 1 to 5).

This parallel tester is arranged in a regular grid with a plate-shaped basic grid element 1 (Fig. 5) in the form of multiple contact points in the form of contact pads. Basic grid Each contact point of the grid element 1 is connected to one of the terminals of an evaluation device 2. The basic grid element 1 can comprise a plurality of elongated modules 3, as is known from US 7,893,705 and EP 1 322 967 B1, respectively.

A full grid raft 4 having a plurality of spring contact pins 5 mounted on the basic grid element 1 is arranged in the same contact point as the contact point of the basic grid element 1 In the grid, therefore, each contact point of the basic grid element 1 touches a spring contact pin 5 and the contact is an electrical contact. The spring contact pins 5 are arranged in parallel with each other.

The electrical connection between the spring contact pins 5 arranged in the regular grid and the irregularly arranged contact points of a circuit board 6 to be tested (hereinafter referred to as circuit board test points) is produced by an adapter 7. The adapter 7 is formed by a plurality of guide plates 8 arranged in parallel with each other (Fig. 1). Adjacent to the full grid 匣 4 is a plate assembly 9 having two plates each having an array of holes in the array of contact points of the spring contact pins 5 of the full grid 匣 4 and the base grid. The board assembly 9 will then be referred to as the basic grid unit 9, and the basic grid unit 9 comprises a cover 10 and a structural panel 11. The cover is arranged directly adjacent to the full grid 匣4 and has a thickness of 1.5 mm. The structural panel 11 is in contact with the cover 10. The structural panel 11 has a thickness of 3 mm and is provided to the adapter for the necessary mechanical strength on the side facing the full grid.

Since the basic grid unit 9 has an array of holes in the arrangement of the spring contact pins 5 of the full grid 匣4 and the contact points of the basic grid, the cover 10 and the structural panel 11 of the basic grid unit are individually Represents a basic grid basic grid panel 10,11.

A fixing plate 12 has a gap from the structural plate 11 , and the fixed plate 12 The thickness is 3 mm.

The four thin guide plates 8 are arranged with a gap therebetween. The sheets 8 individually have a thickness of 0.3 mm. The number of the guides varies depending on the size of the area that is expected to be covered by an adapter (=test field), the maximum offset of the board test point, and the contact point corresponding to the basic grid, and the adapter The thickness. The adapter 7 is provided with a plate unit having three plates facing the side of the circuit board, which will be referred to as the circuit board unit 13 hereinafter. The circuit board unit 13 includes a structural board 14, a guide 15 and a cover 16. The structural panel 14 provides the necessary mechanical strength to the board unit 13, which in this embodiment has a thickness of 4 mm.

Outside the test field, the cover 10 and the cover 16 are screwed to the other structural plates 11, 14 of the adapter. Therefore these screw connections do not affect the electrical characteristics of the adapter.

The guide plate 15 in this order is a thin guide having a thickness of 0.3 mm. In such a thin plate, the holes for guiding the test pins and the contact pins can be formed more easily with better precision than in thick structural plates and thick fixed plates. The guide plate 15 and the cover plate 16 have a hole pattern corresponding to the test board pattern of the circuit board to ensure that the test pins of the adapter 7 are accurately aligned with the circuit board test points.

All of the plates except the cover 10, 16 are each supported by a plurality of substantially known cylindrical mechanisms 17. Extending between the basic grid unit 9 and the circuit board unit 13 is a plurality of positioning pins 18, and each positioning pin 18 passes through the fixing plate 12 and one of the holes of the guiding plate 8 to be surely engaged, so the guiding plate 8 and the fixing plate 12 are precisely aligned with each other. The positioning pins are on the basic grid The cell unit 9 and the circuit board unit 13 also serve as spacers.

The adapter 7 has a test pin 19 guided in the guide plates 8, 15. The test pins 19 are provided on the circuit board 6 to be tested for contact with the pad field. The contact pins 20 can also be provided in an adapter adjacent to the test pins 19. The contact pins 20 are provided with plated through holes that contact the circuit board 6.

The test pins 19 can be of different diameters and individually have a circular cross section. When the ends of the test pins 19 face the full grid, the test pins 19 provide a projection. The projection 21 can be formed by a sleeve that slides or contracts or by crimping the test needle 19. Crimp is an easier and more economical option. However, the test needle needs to have a comparable mechanical strength and this comparable mechanical strength is more suitable for thicker test needles. For a thinner test needle, the test needle will more advantageously provide an additional sleeve.

A stepped hole is provided in the cover 10 for accommodating the projection 21 of the test pin 19 (Figs. 1 and 2). The stepped holes ensure that the test pin 19 having the projection 21 does not move through the plate 10, thereby preventing the test pin 19 from falling to the side of the circuit board 6 to be tested. The test pins 19 are mounted so as to be free to move in the direction of the full grid 匣4.

The thin guide plates 8, 15 have a through hole which is significantly smaller than the two cover plates 10, 16, the structural plate 11 and the fixed plate 12. Therefore, the positions of the test pins 19 are substantially fixed by the through holes of the thin wall guides 8, 15. The guide plate 15 is disposed on the sample side of the adapter 7. The guide plate 15 is a part of the circuit board unit 13 and is located between the structural board 14 and the cover plate 16, and the guide plate 15 It will then be referred to as a sample guide because the through holes of the guide 15 are arranged The pattern of the board test point of a board 6 (sample) to be tested. According to the present invention, at least two test pins 19 are disposed in a plurality of through holes of the sample guide 15. FIG. 3 is a through hole of the sample guide 15 through which the two test pins 19 extend, and the through holes are also referred to as guide holes 22. The corresponding through holes in the adjacent structural panel 14 and cover 16 are sufficiently large to be in contact with the test pins 19. Therefore, the positions of the test pins 19 are individually fixed by the guide holes 22 in the sample guide 15.

The test pins 19 have a tapered tip 23 and an adjacent cylindrical body 24. In the region of the substrate, the test pins have a diameter of about 80 microns, an optimum diameter ranging from 70 microns to 100 microns, and more preferably between 75 microns and 85 microns. These test pins are made of metal, especially made of a highly conductive copper alloy. In this embodiment, the via 22 has a diameter of about 180 microns. The vias have a diameter ranging from 170 microns to 190 microns.

A section of the test pin 19 extending through the sample guide 15 is provided with a coating 25 of insulation. For example, the coating 25 can be a ceramic coating of aluminum oxide or titanium oxide. The coating 25 can also be a carbon coating wherein the carbon exhibits a non-conductive structure like a diamond. These coatings are wear resistant, so that even if the test pins 19 are frequently rubbed against one another, insulation is ensured. From the region of the tapered tip 23, the coating extends to the end of the test pin 19 of the full grid so far, and the uncoated region is not at risk of contact with two adjacent test pins. The tapered tip 23 faces the area of the sample without an insulating coating 25, so electrical contact can be made by the board test points of the sample 6. However, it is optimal that the coating also extends beyond the tip of the cone A section of 23. In the present embodiment, the angle of the tapered tip 23 is approximately 90 degrees. However, the tapered tip can also be a smaller angle.

The two test pins 19 in one of the guide holes 22 are in contact with the same circuit board test point of the circuit board under test, so that a measurement current of a predetermined current intensity is supplied by one of the two test pins 19, and at the same time another test pin This voltage is removed and the voltage drops in the associated conductor path of the board under test. This measurement principle is also referred to as four-wire measurement. In determining the ohmic resistance of the measured conductor path of the circuit board under test, the contact resistance between the test pins 19 and the test point of the board is ignored by the four-wire measurement, which makes the measurement very accurate.

In the particular embodiment as shown in Figure 3, in any case only a single test pin 19 extends through the through hole of the additional guide 8, so that such testing is in the area of the additional guide 8. The needles 19 are spatially separated from one another.

In another embodiment (Fig. 4), in either case the two test pins 19 are guided through one of the guide holes 22 of the sample guide 15 and also passed adjacent to the sample guide 15 One of the guide plates 8 has a through hole.

Under this arrangement, the area in which the two test pins 19 can be contacted is significantly larger, for which reason the electrical insulation sections of the two test pins 19 are correspondingly longer. Compared to the specific embodiment of Figure 3, this means that the coating extends from the region of the tip 23 to the other end of the test pins. The section therefore also extends through the guides 8 adjacent to the circuit board unit 13. Compared with the pattern according to FIG. 3, the advantage of this embodiment is that the section of the test pin adjacent to the circuit board under test is less sharply perpendicular to the guide plates 8, 15 and the circuit board to be tested. tilt. Decreasing the tilt in the section adjacent to the sample The oblique position indicates that the ends of the tips 23 of the two test pins 19 are closely disposed together in a guide hole 22 so that they can contact a smaller board test point. The test pin 19 is resilient so that the remaining sections of the test pin 19 can be bent away from each other by guiding by means of the additional guide 8.

Internally, an unpublished experiment has created an adapter with a test pin in which all of the test pins are guided in separate through holes of the sample guide, however, the test pins and the holes should be made Small enough to allow for four-wire measurements. A minimum gap of 40 microns between a test pin having a diameter of 60 microns, a hole having a diameter of 80 microns, and a hole of two holes is theoretically achievable. It is difficult to accurately make such a small hole in a guide plate on the one hand. Although laborious, the technical means currently available are in principle feasible. However, it has been found that a test needle having a diameter of only 60 microns is very difficult to handle. For example, the test needles are so light and the holes are so small that it is very difficult to guide the test needles through the individual guide plates due to the friction during insertion. It has been found that test pins having a thickness of at least 70 microns, preferably 75 microns and more preferably 80 microns are easier to handle because the test pins are heavier and more stable, so an adapter can be more easily equipped with these test pins. .

In addition, the two test pins 19 fixed to a common guide hole 22 are more closely mounted than the thinner test pins that are guided by the individual guide holes, and the arrangement according to the present invention can contact a smaller circuit. Board test point.

By the mutual insulation of the test pins 19 fixed in a guide hole 22, it is ensured that the four-wire measurement can be surely performed. In the present embodiment, one of the wear resistant coatings is effective for electrical insulation.

An abrasion resistant plastic film can also be provided as an insulating layer between the two test pins within the scope of the present invention. For grid adapters, the test pins have been coated with an electrically insulating plastic. These conventional plastic coatings are fixed for use on the test pins to ensure compliance with insulation requirements, where the two test pins are simply contacted with minimal stress. However, these known plastic coatings are not abrasion resistant and therefore are not sufficient to pass through a common through hole as a long term insulation in the section guiding the test pins. Expediently, a reinforced fiber plastic coating is provided, in particular by strengthening the plastic coating with nanofibers, which can be applied to needles having the smallest thickness but high strength. In addition to this plastic coating, a thin plastic sleeve and a plastic film can be provided between the two test pins.

The above invention has been explained by the aid of a universal tester having a basic grid and an adapter.

However, the invention is also applicable to a dedicated tester (Fig. 6). This dedicated tester has a sample contact plate 26 of a test pin 19 that is secured to the board test point pattern of a circuit under test. Adjacent to the sample contact plate 26 may provide one or more guides (not shown) on the side of the sample contact plate 26 facing away from the circuit board under test 6. The guides maintain the ends of the test pins at a distance away from the circuit board under test, and a metal wire 27 can be joined to each test pin by soldering. The test pins can be secured in the guide plates by friction locking or form locking. For example, the friction lock is generated by slightly pushing adjacent two guide plates toward each other, so that the test pins are clamped in the through holes of the guide plates. For example, the form lock can be provided by a particular geometry of one of the test pins, such as a thick end that does engage a test pin corresponding to one of the holes in a guide. These test pins are individually welded to the review The metal line 27 of the terminal of the device 2 is evaluated. These metal wires 27 can be combined in a cable.

In accordance with the present invention, in any case a pair of test pins are arranged in a plurality of holes in the sample contact plate in order to simultaneously contact a common circuit board test point. The test points are electrically insulated from one another in sequence, for example by one of the aforementioned coatings. In any case, the arrangement of at least two test pins electrically insulated from each other in a hole in the sample contact plate provides the benefits of a universal tester as described above: on the one hand, a very precise fourth can be achieved Line measurements; and on the other hand, boards with high board test point densities can be reliably contacted.

Individually shown in Figures 5 and 6 is a parallel tester for double-sided testing of a circuit board. In any case, therefore, a two-sample contact plate is provided, wherein the sample contact plate is represented by the associated adapter 7 and its circuit board unit 13 according to the universal tester of FIG. The invention can also be implemented in a parallel tester for one-sided testing of a componentless circuit board.

The present invention can be briefly summarized as follows: The present invention relates to an adapter for a parallel tester for componentless circuit board testing and a parallel tester for componentless circuit board testing.

In accordance with the present invention, in any case at least two test pins are disposed in a plurality of guide holes that can be arranged adjacent to one of the sample contact plates of the sample, and the test pins are electrically insulated from each other.

In this way, it is possible to perform a four-wire measurement in a parallel tester while at the same time providing a high contact density.

1‧‧‧Basic Grid Elements

2‧‧‧Evaluation device

3‧‧‧ modules

4‧‧‧Full grid匣

5‧‧‧ Spring contact pin

6‧‧‧Circuit board

7‧‧‧Adapter

8‧‧‧ Guide

9‧‧‧Basic Grid Unit

10‧‧‧ Cover

11‧‧‧Structural board

12‧‧‧ Fixed plate

13‧‧‧Circuit unit

14‧‧‧Structural board

15‧‧‧ Guide plate (sample guide)

16‧‧‧ Cover

17‧‧‧ Columnar mechanism

18‧‧‧ Positioning tips

19‧‧‧Test pin

20‧‧‧Contact pin

21‧‧‧Protruding

22‧‧‧ Guide hole

23‧‧‧ tip

24‧‧‧ base

25‧‧‧ Coating

26‧‧‧Sample contact plate

27‧‧‧Metal wire

28‧‧‧ cable

The features, aspects and embodiments of the present invention will be described with reference to the drawings, in which:

Figure 1 is a detailed cross-sectional view of an adapter and a full grid.

Figure 2 is an enlarged view of the boundary region between the adapter of Fig. 1 and the full grid.

Figure 3 is a cross-sectional view of a guide hole of the adapter having two test pins in Figure 1.

Figure 4 is a cross-sectional view of the pilot hole area and the two test pins of one of the adapters of another embodiment.

Figure 5 is a simplified exploded view of a parallel tester (universal tester) with full grid turns and adapters.

Figure 6 is a simplified exploded view of a parallel tester (dedicated tester).

8‧‧‧ Guide

14‧‧‧Structural board

15‧‧‧ Guide plate (sample guide)

16‧‧‧ Cover

19‧‧‧Test pin

22‧‧‧ Guide hole

23‧‧‧ tip

24‧‧‧ base

25‧‧‧ Coating

Claims (22)

An adapter for use in a parallel tester for a partless circuit board test, the adapter comprising: at least one basic grid guide, wherein the basic grid guide has a arrangement in a regular grid a plurality of holes, the regular grid being a basic grid relative to one of the parallel testers; a sample guide having a plurality of guide holes arranged in a pattern, wherein the pattern is a circuit relative to a circuit under test a pattern of plate test points; and a plurality of test pins, in any case with one end section resting on one of the holes of the basic grid guide and the other end section resting on one of the sample guides In the guide hole, in which case at least two test pins are disposed in the plurality of guide holes of the sample guide, and the test pins are insulated from each other. The adapter of claim 1, wherein at least one of the test pins disposed together in the guide holes of the sample guide has an electrically insulating coating, the coating being at least covered in the A test needle segment in the region of the via, wherein one of the adjacent tips of the test pin is not covered. The adapter of claim 2, wherein all of the test pins disposed together in the guide holes of the sample guide are provided with the electrically insulating coating. The adapter of claim 2, wherein the coating is made of aluminum oxide or titanium oxide, or the coating is a carbon coating. The adapter of claim 3, wherein the coating is made of aluminum oxide or titanium oxide, or the coating is a carbon coating. The adapter of claim 1, wherein the adapter is disposed together The test needle of one of the isotropic holes has a diameter of at least 70 microns, preferably at least 75 microns. The adapter of claim 5, wherein the test needles disposed together with one of the guide holes have a diameter of at least 70 microns, preferably at least 75 microns. The adapter of claim 1, wherein the pilot holes provided with the two test pins have a diameter ranging from 160 micrometers to 200 micrometers, and most preferably between 170 micrometers and 190 micrometers. The adapter of claim 7, wherein the pilot holes provided with the two test pins have a diameter ranging from 160 micrometers to 200 micrometers, and most preferably between 170 micrometers and 190 micrometers. The adapter of claim 1, wherein the test pins disposed together with the guide holes of the sample guide are also disposed in a hole of an additional guide. The adapter of claim 9, wherein the plurality of test pins disposed together with the guide holes of the sample guide are also disposed in a hole of an additional guide. A parallel tester comprising: a sample contact plate having a plurality of via holes arranged in a pattern, and the pattern is a pattern of test points relative to a circuit board of a circuit board under test, wherein In the case, the plurality of pairs of test pins are disposed on a common hole of the sample contact plate by one end portion thereof. The parallel tester of claim 12, wherein each test pin is electrically connected to a unit of an evaluation device, wherein in any case, two More or more test pins are individually connected to the same terminal of the evaluation device, and in any case the test pins connected to the same terminal of the evaluation device are placed in different holes of the sample contact plate. The parallel tester of claim 8, wherein the at least one test pin disposed in pairs in the hole of the sample contact plate has an electrically insulating coating, the coating being at least covered in the A test needle segment in a hole in which one of the adjacent tips of the test pin is not covered. The parallel tester of claim 13, wherein the at least one test pin disposed in pairs in the hole of the sample contact plate has an electrically insulating coating, the coating being at least disposed on the A test needle segment in a hole in which one of the adjacent tips of the test pin is not coated. The parallel tester of claim 14, wherein in any case, the test pins disposed in pairs in the holes of the sample contact plate are provided with the electrically insulating coating. The parallel tester of claim 15, wherein in any case, the test pins disposed in pairs in the holes of the sample contact plate are provided with the electrically insulating coating. The parallel tester of claim 12, wherein the parallel tester has a plate-shaped basic grid element, the plate-shaped basic grid element is provided with an adapter, and the sample contact plate is the turn Part of the connector, wherein it is more preferred in any case that the plate-shaped basic grid element has a plurality of contact points arranged in a regular grid for contacting a test pin, and in any case two or more The contact points of the plate-shaped basic grid elements are electrically connected to each other by a method of a conductor path in any case. The parallel tester of claim 17, wherein the parallel tester has a plate-shaped basic grid element, the plate-shaped basic grid element is provided with an adapter, and the sample contact plate is the turn Part of the connector, wherein it is more preferred in any case that the plate-shaped basic grid element has a plurality of contact points arranged in a regular grid for contacting a test pin, and in any case two or more The contact points of the plate-shaped basic grid elements are electrically connected to each other by a method of a conductor path in any case. The parallel tester of claim 18, wherein the adapter is designed to be consistent with any one of the first to eleventh aspects of the patent application, wherein the sample guide of the adapter represents the Sample contact plate. The parallel tester of claim 19, wherein the adapter is designed to be consistent with any one of claims 1 to 11, wherein the sample guide of the adapter represents the Sample contact plate. The parallel tester of any one of clauses 13 to 19, wherein the test pins are connected to the evaluation device by a metal wire.