DE19644725C1 - System for testing electric printed circuit board - Google Patents

Abstract

The system comprises a basic scanning panel with several contact points (5) and test contacts (9), for producing an electric connection respectively between a test point of the PCB to be tested and the contact points. At least two test contacts emanate from at least one contact point. Each test contact is contactable with a test point of the electric PCB to be tested. The test contacts which emanate from a common contact point, respectively stand in contact with a test point of a mains (N1,N2), so that the mains fulfil the adjacency criterion. A unit is provided for the masking of one or more of the electrical connections between contact points.

Description

The invention relates to a device for testing electrical Printed circuit boards according to the preamble of claim 1 and a Method using this device.

Printed circuit boards have a large number of networks, their Density on the printed circuit boards continues with the progressive miniaturization of electronic components increasingly increased.

Known devices for testing printed circuit boards can are basically divided into two groups. To the first Group includes devices with adapters, all of which Test points of a circuit board at the same time using the adapter be contacted. The second group includes the so-called Finger tester. These are devices with two or more Test probes scan the individual test points sequentially.

Test devices with adapters go, for example, from DE 42 37 591 A1, DE 44 06 538 A1, DE 43 23 276 A1, EP 215 146 B1 and DE 38 38 413 A1.

Such adapters basically serve the uneven Configuration of the test points of the circuit board to be tested the even contact grid of the electrical test device adapt. With modern circuit boards to be tested they are Checkpoints no longer arranged in a uniform grid, which is why the connection between the contact grid and the Contact points producing test points in the adapter with a Inclination or deflection are arranged or a so-called called translator is provided, the uniform contact traster in the uneven configuration of the test points "translated".  

Regardless of the type of device, the individual Networks for interruptions in the networks ("interruption test") and on electrical connections to other networks ("short circuit test ") tested. The short circuit test can both the detection of low-resistance as well as high-resistance connections sen.

Both for the interruption test and for the short circuit test different measuring methods are known. Here will every network for a short circuit or branch of a network examined for an interruption, so that with modern conductors plates with a large number of nets Number of individual measurements must be carried out.

Attempts have been made to optimize the individual measuring processes and to minimize their number, a variety of different procedures have been proposed and implemented.

The invention has for its object a simple training to create a device for testing printed circuit boards with of printed circuit boards with a high test point density and / or very small distances between the test points can be tested nen. In addition, a method is to be specified in which this Device is used.

The task is performed by a device with the features of Claim 1 or by a method with in claim 8 given procedural steps solved. Advantageous configurations are specified in the subclaims.

The device according to the invention has a basic grid several contact points, with at least one of the con at least two test contacts, each based on because another test point of the circuit board to be tested are aligned.

The allocation of a contact point with two or more test contacts allowed multiple times despite the ambiguity of the measurement signal occupied contact point a surprisingly simple and safe Detection of interruptions or short circuits, with conductors  plates can be measured that are exceptionally high Have density at checkpoints.

The ambiguity, especially uncertainty in the short circuit test of the measurement signal can be done by a device for masking one or more of those who share a common contact point Test contacts are eliminated, being in a first measurement process the test points of the circuit board with a first predetermined Group of test contacts and in a second measurement process contact a second predetermined group of test contacts are bar, the groups of test contacts are selected so that clear statements for the interruption test as well as for the short circuit test can be achieved.

Another way of removing the ambiguity of the Measurement signal lies in the use of so-called adjacency data, being the checkpoints with a common contact place of the basic grid and thus via the test con clocks are short-circuited, only with test points of networks in Contact, of which based on the adjacency data it is excluded that they form a short circuit with one another can. As a result, even in a single measurement Interruption test and a short circuit test can be carried out.

Of course, it is also possible to use Adja cency data in combination with the device for masking the To use test contacts.

According to the inventive method, at least two Networks of a circuit board short-circuited. With this simple The method step can have a surprising number of measurement processes be saved.

The invention will be exemplified with reference to the drawings wrote. Schematically simplified:  

Fig. 1a, 1b each show a section through a portion of a test apparatus according to the invention,

Fig. 2 shows a simple network arrangement serves to illustrate the application of the device according to the invention,

FIGS. 3a, 3b are each a detail of a grid pattern array for explaining a two-stage measuring method.

The device according to the invention for testing printed circuit boards 1 is a testing device with an adapter 2 , which is arranged between a printed circuit board 1 to be tested and a full grid cassette 3 . The full grid cassette 3 lies on a test surface 4 of the test device, which has a multiplicity of regularly arranged pad surfaces 5 , which serve as contact points. The pad areas 5 preferably consist of rectangular gold plates, each pad area 5 being connected via a conductor track 6 to a known evaluation electronics (not shown).

The adapter 2 has z. B. three horizontally arranged guide plates 7 , in which through holes 8 are introduced. The through bores 8 are penetrated by approximately vertically aligned test needles 9 . The test needles 9 serve as test contacts. The test contacts can also be designed as spring contacts or conductive rubbers or the like. Guiding rubbers serving as test contacts are known, for example, from EP 0 369 112 B1.

On the adapter 2 , vertical side walls 10 are provided at the side, which hold the guide plates 7 at a predetermined distance and complete the space delimited by the guide plates 7 since.

The test needles 9 are simple rigid needles which protrude with an upper end 11 above the top guide plate 7 in order to contact a test point on the circuit board 1 each.

The lower ends 12 of the test needles 9 each rest in the bores 8 of the lowermost guide plate 7 . The adapter 2 has a base plate 13 below the lowermost guide plate 7 , in which vertical through holes 14 are made. The through bores 14 are aligned with the bores 8 of the lowermost guide plate 7 , wherein in the through bores 14 a cylindrical bush 15 is slidably mounted and is secured in the bore 14 against falling out.

The full grid cassette 3 has a structure known per se from several layers with vertical bores 16 , in each of which a full grid pin 17 is mounted. The full grid pins 17 each consist of an upper and a lower pin section 18 , 19 , which are each connected via a coil spring 20 to each other ela stically and electrically conductively. The spring 20 has a larger diameter than the pin sections 18 , 19 , and the respective bores 16 are designed in stages so that the full grid pins 17 are held captively in the full grid cassette. The free end of the upper pin section 18 is designed as a tip 21 and the free end of the lower pin section 19 has a blunt contact surface 22 .

With the blunt contact surfaces 22 , the full grid pins 17 lie on the pad surfaces 5 , whereby they are pressed upwards against the bushes 15 and thus the test needles 9 elastically press up against the test points of the printed circuit board 1 . The pad areas are arranged in a regular grid and thus form a basic grid. Compared to this regular grid of the basic grid, the test needles 9 are deflected so that they set the uniform grid of the basic grid to the uneven configuration of the test points.

An essential difference from conventional test devices is that the pad surfaces 5 are each assigned two full grid pins 17 or two test needles 9 . This assignment can and will generally vary, that is to say that some pad areas 5 are each occupied with only one test needle 9 and some pad areas 5 with two or more test needles 9 . The special assignment of the pad surfaces 5 with test needles 9 depends on the type of electrical circuit boards to be tested.

The number of usable measuring points is increased by the multiple assignment of the pad areas 5 with test needles 9 .

When testing with the test device according to the invention, a device for masking certain electrical connections between the pads forming the contact points of the basic grid and the test points of the circuit board 1 to be tested can be provided in order to eliminate the ambiguity or ambiguity generated by the double or multiple assignment.

This device for masking certain electrical connections is, for example, a film mask 30 (in FIG. 1b, the film mask 30 is drawn in somewhat clearly for the sake of clarity), which, for example, has a thickness of 0.1 mm from a laminate FR4 epoxy material is formed and is inserted, for example, between the test surface 4 and the full grid cassette 3 or the full grid cassette 3 and the adapter 2 or the adapter 2 and the circuit board 1 to be tested. The film mask 30 has perforated and non-perforated areas 31 , 32 . The unperforated areas 32 interrupt an electrical connection, whereas the perforated areas 31 do not affect an electrical connection passing through them.

A film mask 30 , which can be inserted between the test surface 4 and the full grid cassette 3 , can have unperforated areas 32 which extend over an entire pad surface 5 or only include the contact region of a full grid needle 17 and the corresponding pad surface 5 and thus selectively one interrupt certain connec tion to a full grid needle 17 .

A preferred execution is of the invention explained with reference to Fig. 2 and Fig. 3a, 3b. Fig. 2 shows two networks N1 and N2 of a circuit board, the end points of the networks N1, N2 each forming test points P10-P13 and P20-P24. Fig. 3a and 3b schematically show a portion of a simplified Folienmas ke 30 with the pad surfaces disposed therebelow 5 (broken lines). On the film mask 30 , the areas 31 , 32 relevant for the electrical connections are shown by a circle, the non-perforated areas 32 being hatched and the perforated areas 31 not being hatched.

On the pad areas 5 , the areas which are each assigned to a test point of the networks N1, N2 shown in FIG. 2 are identified by the corresponding number of the test point (FIGS . 3a, 3b). Furthermore, the areas of the pad fields which are assigned to a test point of a network of the circuit board 1 to be tested, which is not shown in FIG. 2, are each identified by a cross.

During a first measurement process ( FIG. 3a), the test points P10, P20, P21 and P23 are in electrical connection with a pad surface 5 and thus with the evaluation electronics. In the first measurement process, a short circuit test is carried out between the two networks N1, N2, it being examined whether there is an electrical connection between the test point P10 of the network N1 and one of the test points P20, P21 or P23. If there is no electrical connection, the short-circuit test is positive.

For a second measuring operation (Fig. 3b), the film mask 30 to the center distance a of two adjacently arranged, relevant for electrical connection portions 31, 32 of the Folienmas ke 30 in the direction (arrow 35) displaced to the longitudinal extent of the pad surfaces. 5 As a result, electrical connections that existed in the first measurement process are partially interrupted or electrical connections that were interrupted during the first measurement process are made. In the embodiment shown, the test points P10, P11, P12, P13, P22 and P24 are connected to a pad surface and thus to the evaluation electronics in the second measurement process. In the second measuring process, an interruption test is carried out between test points P10, P11, P12 and P13 or between test points P22 and P24.

In the second measuring process, the network N1 is thus completely open Interruption tested. The network N2 is only between the tests score P22 and P24 tested for interruption, but the other sections already in the first measuring process for interruption have been tested. Since in the first measuring process also the short final test, the two networks N1 and N2 are complete tested.

It is thus possible to test the nets of a printed circuit board completely without ambiguity with the multiple loading of the pad surfaces 5 according to the invention by using a single foil mask 30 in two measuring processes, the film mask 30 only being shifted somewhat between the two measuring processes.

For this, however, the arrangement of the perforated and non-perforated areas 31 , 32 must meet the following conditions:

• a) To carry out a short circuit test at least from each network to be examined with at least one test point are connected to the evaluation electronics. The short one final test can of course about both measurement processes be distributed, however, the against each other under searching networks with at least one test point each the evaluation electronics within a measuring process in Ver must be bound.
• b) Each test point of a network must have at least one measurement operation with at least one other test point of the same Network are connected to the evaluation electronics, so that an interruption test between the two test points can be done.

Condition b) is a minimum requirement that does not necessarily lead to a complete measurement. Considering, for example, the network N1 in FIG. 2, two measurement processes would meet this condition, in which the test points P10 and P11 would be measured in a first measurement process and the test points P12 and P13 would be measured in a second measurement process. In this case, the middle area of the network N1 between the branching points K1 and K2 would not be covered. The test points are therefore to be distributed over the two measuring processes so that each line section is recorded at least once during the interruption test. This can generally be achieved by scanning a test point from one of the end regions in at least one of the two measurement processes. On the network N1, P10 is combined with P12 or P13 or P11 with P12 or P13 during a single measurement process. It is of course also possible to scan a network section by section, with no gaps between the sections of the two measuring processes.

For certain network topographies, the use of a single one Foil mask for both measuring processes very complex or even be impossible, so that a separate film for each measurement mask is used to remove any ambiguity in the measurements to avoid.

Another possibility to rule out an ambiguity of the test results, although two test points of different networks are contacted with the same pad area, is the use of so-called adjacency data. An adjacency calculation determines which networks cannot fundamentally produce a short circuit due to their spatial distances. As a result, short-circuit tests between the networks fulfilling the adjacency criterion can be omitted, and such networks can be short-circuited over a pad area without the risk of incorrect measurements. Thus, a pad surface without the risk of Fehlmes solutions repeatedly with probe needles 9 are available when communicating with a common pad area 5 in the electrical connection test needles 9 are respectively connected to networks in contact satisfy the adjacency criterion.

When calculating whether there is basically none between two networks Short circuit can exist, usually the geome first the network was calculated with 1.5 times the width and then determined Tells whether these networks always a predetermined Ab to each other stand by. If this is the case, the two networks are called "not adjacent" and therefore not at risk of short-circuit. They meet the adjacency criterion and can therefore be used without Ge if an incorrect measurement is short-circuited over a pad surface the.

Fulfill all nets that are electrically connected via a pad surface which are or are short-circuited, the adjacency criterion the measurement without restrictions with any known measuring method ren done. It can e.g. B. also with that from DE 41 34 193 A1 (US 5,268,645.) Known field measurement or with a capacitance ven measurement both interruptions and short circuits in can be measured in a single measuring process.

For security reasons, some users test the sub refraction test the networks with very high currents, so guarantee It is constant that networks that are too thin are not in operation, but rather blow during the test. For this, high currents are applied to the Networks created. Such high currents cannot be achieved in just a few ms are created, but they have to last for a certain time takes a few seconds, for example. For this it is very beneficial if some networks are temporarily connected or are short-circuited via a pad surface, so that in several Networks at the same time the high current can be built up. This is not only advantageous for test devices with adapters, but can also be used in an advantageous manner with the finger testers are used, two networks, for example, using two measuring fingers short-circuited or temporarily connected to each other.

Claims (12)

1. Device for testing electrical circuit boards with a basic grid with several contact points ( 5 ), test contacts ( 9 ) for generating an electrical connection between each test point of the circuit board to be tested ( 1 ) and the contact points ( 5 ), characterized in that At least one contact point ( 5 ) has at least two test contacts ( 9 ), each test contact being contactable with a test point on the electrical circuit board to be tested. 2. Device according to claim 1, characterized in that the test contacts ( 9 ), which emanate from a common contact point ( 5 ), are each in contact with a test point of a network (N1, N2), the networks (N1, N2 ) meet the adjacency criterion. 3. Apparatus according to claim 1 or 2, characterized by a device for masking one or more of the electrical connections between the or the contact ( 5 ), each of which at least two test contacts ( 9 ) emanate, so that the ambiguity for a measuring process speed of the measurement results can be eliminated by the multiple assignment of one or more contact points ( 5 ). 4. Device according to one of claims 1 to 3, characterized in that an adapter ( 2 ) is provided, which is arranged on a Vollra sterkassette ( 3 ), wherein the Vollrasterkas set ( 3 ) rests on a test surface ( 4 ) of the test device , Which has pad areas ( 5 ) as contact points, which are arranged regularly, each pad area ( 5 ) being connected via a conductor track ( 6 ) to an electronic evaluation system. 5. Device according to one of claims 1 to 4, characterized in that the test contacts are test needles ( 9 ) and in particular rigid needles. 6. Device according to one of claims 3 to 5, characterized in that the device for masking one or more of the electrical connections is a film mask ( 30 ) having perforated and non-perforated areas ( 31 , 32 ), so that the electrical connections are selective between the test points and the contact points can be interrupted by inserting the film mask into the device for testing electrical circuit boards. 7. Device according to one of claims 1 to 6, characterized in that the test contacts ( 9 ) are deflected relative to the regular grid of the basic grid, so that they implement the uniform grid of the basic grid on the uneven configuration of the test points. 8. A method for testing a circuit board using a device according to one of claims 1 to 7, characterized in that a first and a second measuring process for testing interruptions and short circuits is carried out, at least in one of the two measuring processes one or more of the Electrical connections between the or the contact points ( 5 ), each of which at least two test contacts ( 9 ) are masked out, so that the ambiguity of the measurement results is eliminated by the multiple assignment of one or more contact points ( 5 ). 9. The method according to claim 8, characterized, that the test points of the circuit board in the first measuring process with a first predetermined group of test contacts and in the second measuring process with a second predetermined group pe can be contacted by test contacts, the groups the test contacts are selected so that the networks between which a short-circuit test is carried out in each case, not are temporarily connected via a contact point, and that at least every test point in one of the two measuring processes is scanned once, with at least one further test point of the same network is scanned to an interruption test test. 10. The method according to claim 8 or 9, characterized in that in both measuring operations one or more of the electrical connections between the or the contact points ( 5 ); from which at least two test contacts ( 9 ) are masked. 11. The method according to claim 10, characterized, that one to mask the electrical connections zige foil mask is used between the two Measuring operations is shifted somewhat. 12. The method according to any one of claims 8 to 11 for testing a circuit board with several networks, taking an interruption test with high amperage is carried out, characterized, that for the interruption test at least two networks pace rarely connected.