201246605 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種發光一極體及其製作方法，尤指一種對位於録 塾正下方之半導體層平坦化的發光二極體及其製作方法。 【先前技術】 發光二極體因具有環保效果、高光電轉換效率、體積小、壽命 長、波長固定與低發熱等優點，已經廣泛的運用於生活環境中。例 如，大至城市中的大型顯示看板、衔道上的交通號誌，小至電器開 關指示燈、S幕的背光源等’都可以看見逐漸由發光二極體取代傳 統光源的趨勢。隨著應用範圍的擴增，胁發光二鋪的發光效率 之要求日益增加。因此，提升發光二極體的發光效率成為相關產業 所追求的目標之一。 影響發光二極體的發光效率’主要因素可分為_，一個為内 部量子效率⑽隱⑴職—碰—⑼’另一個為取光效率①咖 Extraction Efficiency)。前者的内部量子效率，表示每秒從發光二極 體之主動層(Aetive laye糖射出光子數除以每秒從外部注入電子 數。後者的取級率，是指發光二極_部產生光子，在經過元件 本身吸收、卿、反雜f際上在元件外料量酬光子數目。雖 然目前的蠢晶製程技術不斷精進，有效的減少義晶缺陷以及改善蟲 晶的組成成分與結構，使得發光二極體電光轉換效率不斷提升，並 201246605 進而提升内部量子效率。然而，縱使發光二極 效率，受限於材料吸收或臨界角損失相素 w的内部量子 能僅會有少部分，真正能從發光二_向外動層所發出光量可 體的取光效率提升，仍存在很大的進步空間麵改:此’發光二極 【發明内容】 本發明之主要目的之一在於提供一種發光二 法，以提升發光二極體之發光效率。 及其1作方 為達上述之目的，本發明提供一種發 包括一第一半導體層、一主動 述發光二極體 層且有一笛驗★ &一第一半導體層。第-半導體 =二!主動層設於第，層上。第二= 二=2第二半導趙層具有不同於第-導電類型之- 導電_，㈣㈣版上树彳—第一凹陷。 為達上述之目的，本發明另 體包括-第-半導體層、一主_、種發先—極體。上述發光二極 體層具有一第—導 曰以及一第二半導體層。第-半導 電^•，且主動層設於第一半導體層上。第二半 -第；電類:層上’且第二半導體層具有不同於第-導電類型之 而瓣之加具有-凹陷， 底錢面具有一第三表面粗縫度均方根值。 4 201246605 為達上述之目的，本發明提供一種發光二極體之製作方法。首 先’形成-第-半導體層、—主動層以及—第二半導體層於一基板 上中第―半導體層之上表面具有―第—表面粗輪度均方根值。 然後’於第二半導體層之上表面形成—第一凹陷，使第―凹陷之深 度大於第—表面粗财均方根值。第-半_層具有-第—導電類 型’且第二半導體層具有不同於第—導電類型之—第二導電類型。 々本發明係於對應於第一銲塾之第二半導體之表面形成第一凹 ’使其底部表面的第二表面祕度均方根值小於位於第―凹陷外 之第一表面_度均綠值，藉此可有效提升發光二極體之取光效 率，進而增加升發光二極體之亮度。 【實施方式】 為使熟習本發明所屬技術領域之—般技藝者能更近—步了解本 發明’下域列舉本發明之較佳實關，並配合所關示，詳細說 明本發明的構成内容及所欲達成之功效。 〇月多考第1圖至第4圖’第1圖至第4圖為本發明-較佳實施例 之發光—極體之製作方法示意圖，其中第4_本發明較佳實施例 之發光一極體之剖面示意圖。如第丨圖所示，提供—基板1〇，且基 有發光區l〇a與一非發光區1〇b。然後，依序於基板川 上形成一第一半導體層12、一主動層14以及-第二半導體層16， 其中第半導體層12具有一第一導電類型，且第二半導體層Μ具 201246605 有不同於帛導電類型之—第二導電麵。於本實施例中，基板川 可以是藍寶石(sapphirc)基板’但不以此為限，例如可以為玻璃雄 化鎵(GaP)、磷石申化鎵(GaAsP)、碼化鋅(znse)、硫化辞、石西硫 化鋅(ZnSSe)或碳蝴SlQ等基板。纽，第—半導體層12可為利 聽晶製程並採用第-導電類型之摻雜氣體所形成之摻雜有第一導 電類型之摻雜物的遙晶層，例如換雜有鎂之氮化鎵。主動層Μ可為 ^量子井’以作為發光二極體之發光層，且可利用多次蠢晶製程 來形成，但不限於此。第二半導體層16可為利縣晶製程並採用第 -導電類型之撸雜氣體所形成之換雜有第二導電類型之摻雜物之蟲 :曰層’例如_有奴氮化鎵，但本發料限於上述職方法。於 本貫施例中，第—導電類型為㈣，且第二導電類型為p型，但不 限=此，亦可互換^值得注意的是，在形成第二半導體層1㈣，第 :物層16之上表面16a會同時形成一粗縫表面，使上表面恤 第表面粗I度均方根值，例如介於2麵埃與7麵埃之間。 魏第2圖所不，接著，進行一第―1虫刻製程，例如乾触刻製程， 德於非發光區跡中之第二半導體層Μ、主動層Μ以及部分 第了半導體層U，以於第二半導體層16與主動層14中形成一缺口 ^缺口 18曝露出部分第—半導體層u。於本實關中，曝露 :之第一半導體層12之上表面12a係具有—第四表面嫌度均方根 ⑽I於2_埃與7_埃之間，但本實施例之第四表面粗糖 度均方根值係柯於第—表面_朗方根值。 6 201246605 如第3圖所示，麸徭，推y_ …、设進仃—微影製程與 二 二半導體層16之上表面l6a 蝕一製輕，於第 -半導體層12之上表面d 一凹陷2〇 ’且於曝露出之第 之底部表面2〇a係'具有-第表t第二凹㈣’其中第—凹陷 之底部表面22a係具有度均方根值’且第二凹陷22 也哲 表面粗糙度均方根值。於本實施例 ’第广製程可為’刻製程，例如:反應性離 ，製程’但•此’亦可為-濕_製程，例3 用蝕刻液輕酸_酸之_ j如使 於形成第-凹陷20與第二凹藉此帛—糊製程不僅用 表面2〇a與第二凹陷22之底;：平坦化第一凹陷_^ 值小於位於第-_2G外之第—表二絲_度均方根 =度均_制、純^_2㈣四表=面 幸乂佳介於第-表面粗财均方根值之百分之2Q與8q之間。此外， 第一凹陷20之深度係大於第二半導體層16之上表面收之第一表 ^造度均方根值’使第-凹陷2〇之底部表面池低於第二半導體 曰16之上表面i6a，且第二凹陷22之深度係大於曝露出之第一半 導體層12之上表面12a的第四表面粗趟度均方根值，使第二凹陷 22之底部表面22a低於曝露出之第一半導體層12之上表面以。 於本實施例中’形成第1陷2G與第二凹陷22之步驟係先於第 一半導體層丨2與第二半導體層16上形成—遮罩圖案層％，且遮罩 圖案層24具有二穿孔24a、24b ’分別曝露出第一半導體層12與第 201246605 二半導體層16,以定義出第一凹陷20與第二凹陷22之位置，然後 再同時對卜半導體層12與第二半導體層16進行_，以形成第 -凹陷20與第二凹陷22。接著，再移除遮罩圖案層24。不過，本 發明形成第-凹陷20與第二凹陷22之步驟不限於此，第一凹陷2〇 與第二凹陷22亦可分開形成。 如第4圖所示，接下來，於第二料體層16上形成一電流阻障 層(current blocking layer)26，使電流阻障層26填入第一凹陷2〇中， 並位於第-凹陷20上且延伸至第—凹陷2G外之部份第二半導體層 16上。接著’於電流阻障層26與第二料體層16上覆蓋一透明電 極28。本實酬之透明電極可由例如氧化_、氧化鱗等透明導 電材料或厚度薄之金屬薄膜所構成。然後，於第—凹陷2()上之透明 電極28上形成-第-銲塾3〇,且同時於第二凹陷22中之第一半導 體層12上形成-第二銲塾32。最後’移除基板⑴。至此已完成本 實施例之發光二極體100。本發明並不限需移除基板1〇，亦可未進 行移除基板10之步驟。並且，本發明之第—轉3G與第二鲜塾^ 並不限於同時形成，亦可分_成。另外，本發明之電流阻障層26 並不限延伸至第-凹㈣外之第二半導騎16或填人[凹陷20 中，而主要位於第一凹陷20之正上方。 於本實施例之發光二極體100中，電流阻障層26係填滿第一凹 陷，並延伸至部分第二半導體層16之上表面W，以用於阻擔電 流通過，且電流阻障層之厚度約略介於誦埃與励〇〇埃: 8 201246605 .不限於此。並且，第-輝塾30係位於第一凹陷2〇之正上方，亦即 位於電流轉層26之正上方，科—料3G之面積係小於第—凹 陷20之面積。此外，第二銲墊32之面積小於第二凹陷22之面積， 且第二鮮塾32之厚度係大於第二凹陷22之深度。值得注意的是， 本實施例之第-凹陷20之底部表面2〇a的第二表面粗縫度均方根值 小於位於第-凹陷20外之第-表面粗輪度均方根值，並且第一凹陷 20係對應於阻播光線之第一銲墊3〇以及阻擋電流之電流阻障層 26。藉此從主動層14產生之光線照射至第一凹陷2〇的底部表面挪 時會因表面粗縫度較低而較易被全反射，使光線避免因被電流阻障 層26吸收而產生損失，並且光線可被主騎14吸收然後再射出， 或者藉由發光二極體卿之底部反射至電流阻障層％以外之區域， 進而提升發光二極體卿之取光效率，且增加亮度。此外，本實施 例之第二凹陷22之底部表面22a的第三表面祕度均方根值小於位 於第-凹fe 22外之第四表面粗輪度均方根值，可有效降低第二鲜墊 32與第-半導體層12之接觸電阻，進而降低發光二極體1 阻值。 本七月之發光—極體並不限於同日杨成有第—凹陷Μ與第二凹 陷22。於本發明之其他實施例中，發光二極體100可僅於第二半導 體層16之上表面⑹形成有第—凹陷20,使第-凹陷2G之底部表 面施的第二表面麵造度均方根值小於位於第-凹陷20外之第-表 面粗I度均方根值。或者，發光二極體廳可僅於第 2 之上表面㈣成有第二凹陷22，使第二凹陷22之底部表面瓜 9 201246605 =::細方根值小於位於第二_外之第四表面粗 ^上所述，本發_於軸於第-銲墊之第二半導體之表面形成 第一凹陷，使其底部表_第二表面粗糙度均方根值小於位於第一 凹陷外之第-表面祕度均方根值，並且於對應於第二銲塾之第一 半導體之表面形絲二_，使其底部表_第三表面姆度均方 根值小於位於第二㈣外之第四表面嫌度均方根值，II此可有效 提升發光二㈣之取級率，且降低發光二極體之電崎，進而增 加升發光二極體之亮度。 以上所述縣本㈣之難實_，驗本發”請專利範圍 所做之均賴化齡飾，皆闕本發明之涵蓋範圍。 【圖式簡單說明】 第1圖至第4縣本發明—較佳實細之發光二極體之製作方法示 意圖。 / /x l〇a發光區 12第一半導體層 14 主動層 16a上表面 【主要元件符號說明】 10基板 10b非發光區 i2a上表面 16第二半導體層 201246605 18 缺口 20 20a 底部表面 22 22a 底部表面 24 24a 穿孔 24b 26 電流阻障層 28 30 第一銲墊 32 100 發光二極體 第一凹陷 第二凹陷 遮罩圖案層 穿孔 透明電極 第二銲墊 11201246605 6. The invention relates to a light-emitting diode and a manufacturing method thereof, and more particularly to a light-emitting diode for flattening a semiconductor layer directly under a recording and manufacturing method thereof . [Prior Art] Light-emitting diodes have been widely used in living environments due to their environmentally friendly effects, high photoelectric conversion efficiency, small size, long life, fixed wavelength and low heat generation. For example, large display billboards in the city, traffic signs on the track, as small as the electrical switch indicator, the backlight of the S-curtain, etc. can all see the tendency to gradually replace the traditional light source with the light-emitting diode. With the expansion of the application range, the luminous efficiency of the illuminating two shop is increasing. Therefore, improving the luminous efficiency of the light-emitting diode has become one of the goals pursued by the related industries. The main factors affecting the luminous efficiency of the light-emitting diodes are _, one is the internal quantum efficiency (10), the hidden (1) is the first-touch-(9)', and the other is the extraction efficiency. The internal quantum efficiency of the former means that the active layer of the light-emitting diode per second (the number of photons emitted by the Aetive laye sugar is divided by the number of electrons injected from the outside every second. The rate of the latter is the photon of the light-emitting diode. In the absorption of the component itself, the amount of photons in the material outside the component, although the current stupid process technology continues to improve, effectively reducing the defects of the crystal and improving the composition and structure of the crystal, making the light The efficiency of diode electro-optic conversion is continuously increasing, and 201246605 further enhances the internal quantum efficiency. However, even though the efficiency of the light-emitting diode is limited by the material absorption or the critical angular loss, the internal quantum energy of the phase element w can only be a small part. The light-emitting efficiency of the light-emitting two-outward moving layer is improved, and there is still a great improvement in the spatial surface modification: this 'light-emitting diode' [invention] One of the main purposes of the present invention is to provide a two-lighting method In order to improve the luminous efficiency of the light-emitting diode. The invention provides a first semiconductor layer and an active The light-emitting diode layer has a scatter test & a first semiconductor layer. The first semiconductor = two! The active layer is disposed on the first layer. The second = two = 2 second semiconductor layer has a different conductivity than the first conductive layer Type - Conductive _, (4) (4) 上上上彳 - First recess. For the above purposes, the present invention further includes a - a first semiconductor layer, a main _, a seed first-pole body. The above-mentioned light-emitting diode layer has a first conductive layer and a second semiconductor layer, the first semi-conductive layer, and the active layer is disposed on the first semiconductor layer. The second half-the first; the electrical class: the layer and the second semiconductor layer has a different The first conductivity type has a sag plus a depression, and the bottom money mask has a third surface rough RMS value. 4 201246605 To achieve the above object, the present invention provides a method for fabricating a light-emitting diode. The formation-first-semiconductor layer, the active layer, and the second semiconductor layer have a "first-surface coarse radiance rms value" on the upper surface of the first semiconductor layer on a substrate. Then 'on the second semiconductor layer Forming on the upper surface - the first depression, so that the depth of the first depression is greater than a surface coarse root mean square value. The first-half layer has a -first conductivity type and the second semiconductor layer has a second conductivity type different from the first conductivity type. The present invention is corresponding to the first welding The surface of the second semiconductor of the crucible forms a first concave portion such that the root mean square value of the second surface of the bottom surface is smaller than the first surface _ degree green value outside the first recess, thereby effectively improving the light emitting diode The light extraction efficiency of the body further increases the brightness of the light-emitting diode. [Embodiment] In order to make the present invention familiar to those skilled in the art, the present invention is better. The actual content of the present invention and the desired effect are described in detail in the context of the present invention. Figure 1 to Figure 4 of the monthly multi-test is a first embodiment to a fourth embodiment of the present invention - a preferred embodiment A schematic diagram of a method for fabricating a light-emitting body, wherein a fourth embodiment of the light-emitting diode of the preferred embodiment of the present invention. As shown in the figure, a substrate 1 is provided, and a light-emitting region 10a and a non-light-emitting region 1b are provided. Then, a first semiconductor layer 12, an active layer 14, and a second semiconductor layer 16 are formed on the substrate, wherein the second semiconductor layer 12 has a first conductivity type, and the second semiconductor layer cooker 201246605 is different from帛 Conductive type - the second conductive surface. In this embodiment, the substrate may be a saphirc substrate, but not limited thereto, and may be, for example, glass maleic gallium (GaP), phosphorite gallium (GaAsP), zinc nitride (znse), Substrate such as vulcanized sulphate, sulphate zinc sulfide (ZnSSe) or carbon butterfly SlQ. The germanium-semiconductor layer 12 may be a remote crystal layer doped with a dopant of a first conductivity type formed by a doping gas of a first conductivity type, for example, nitriding with magnesium gallium. The active layer Μ may be a quantum well as the light-emitting layer of the light-emitting diode, and may be formed by using multiple odd-crystal processes, but is not limited thereto. The second semiconductor layer 16 may be a Lixian crystal process and is formed by a doping gas of a first conductivity type and mixed with a dopant of a second conductivity type: a germanium layer, for example, a slave gallium nitride, but This release is limited to the above methods. In the present embodiment, the first conductivity type is (four), and the second conductivity type is p type, but is not limited to this, and may be interchanged. It is noted that the second semiconductor layer 1 (four), the first layer is formed. The upper surface 16a of the 16 surface will simultaneously form a rough surface, such that the surface of the upper surface of the top surface has a root mean square value of, for example, between 2 angstroms and 7 angstroms. Wei Di 2 does not, and then, a 1:1 insect engraving process, such as a dry etch process, a second semiconductor layer Μ, an active layer Μ, and a portion of the first semiconductor layer U in the non-luminous region trace, A notch 18 is formed in the second semiconductor layer 16 and the active layer 14 to expose a portion of the first semiconductor layer u. In the present disclosure, the upper surface 12a of the first semiconductor layer 12 has a fourth surface susceptibility root mean square (10) I between 2 angstroms and 7 angstroms, but the fourth surface roughness of the embodiment The root mean square value is the value of the first-surface_lang square root. 6 201246605 As shown in Fig. 3, the bran, push y_, set into the 仃-lithography process and the surface of the second semiconductor layer 16 is etched lightly, and the surface d of the first semiconductor layer 12 is recessed. 2〇' and the exposed bottom surface 2〇a' has 'the second t (fourth) of the t-th', wherein the bottom surface 22a of the first-depression has a degree of root mean square value' and the second recess 22 Surface roughness root mean square value. In the present embodiment, the 'wide process' can be 'engraving process, for example: reactive separation, process 'but · this can also be - wet _ process, example 3 with an etchant light acid _ acid _ j as in forming The first recess 20 and the second recess are formed by the surface 2〇a and the bottom of the second recess 22; the flattened first recess _^ value is smaller than the first-second filament outside the -2G_ Degree-averaged square root = degree average _ system, pure ^ _2 (four) four tables = face lucky good between the first - surface coarse RMS value between 2Q and 8q. In addition, the depth of the first recess 20 is greater than the first surface of the second semiconductor layer 16 and the rms value of the first surface is 'the bottom surface of the first recess 2 is lower than the second semiconductor 曰16. The surface i6a, and the depth of the second recess 22 is greater than the root mean square value of the fourth surface roughness of the exposed upper surface 12a of the first semiconductor layer 12, so that the bottom surface 22a of the second recess 22 is lower than the exposed surface The upper surface of the first semiconductor layer 12 is. In the present embodiment, the steps of forming the first recess 2G and the second recess 22 are formed on the first semiconductor layer 2 and the second semiconductor layer 16 as a mask pattern layer %, and the mask pattern layer 24 has two The through holes 24a, 24b' respectively expose the first semiconductor layer 12 and the second semiconductor layer 16 of the 201246605 to define the positions of the first recess 20 and the second recess 22, and then simultaneously the semiconductor layer 12 and the second semiconductor layer 16 _ is performed to form the first recess 20 and the second recess 22. Next, the mask pattern layer 24 is removed. However, the steps of forming the first recess 20 and the second recess 22 in the present invention are not limited thereto, and the first recess 2 〇 and the second recess 22 may be formed separately. As shown in FIG. 4, a current blocking layer 26 is formed on the second body layer 16, so that the current blocking layer 26 is filled in the first recess 2, and is located in the first recess. 20 extends over a portion of the second semiconductor layer 16 outside the first recess 2G. A transparent electrode 28 is then overlaid on the current barrier layer 26 and the second body layer 16. The transparent electrode of the present invention can be composed of a transparent conductive material such as oxidized _, oxidized scale or a thin metal film. Then, a -th bead 3? is formed on the transparent electrode 28 on the first recess 2, and a second pad 32 is formed on the first semiconductor layer 12 in the second recess 22. Finally, the substrate (1) is removed. The light-emitting diode 100 of this embodiment has been completed up to this point. The present invention is not limited to removing the substrate 1 or the step of removing the substrate 10. Further, the first to third 3G and the second fresh sputum of the present invention are not limited to being formed at the same time, and may be divided into _. In addition, the current blocking layer 26 of the present invention is not limited to extend to the second semi-guide 16 of the first-concave (four) or fill in the recess 20, but is located directly above the first recess 20. In the light emitting diode 100 of the present embodiment, the current blocking layer 26 fills the first recess and extends to the upper surface W of the portion of the second semiconductor layer 16 for blocking current flow and current blocking. The thickness of the layer is approximately between 诵 与 and 〇〇 〇〇: 8 201246605. Not limited to this. Further, the first-figure 30 is located directly above the first recess 2〇, that is, directly above the current transfer layer 26, and the area of the material 3G is smaller than the area of the first recess 20. In addition, the area of the second pad 32 is smaller than the area of the second recess 22, and the thickness of the second fresh slab 32 is greater than the depth of the second recess 22. It is to be noted that the root mean square value of the second surface of the bottom surface 2〇a of the first recess 20 of the embodiment is smaller than the root mean square value of the first surface rough round outside the first recess 20, and The first recess 20 corresponds to a first pad 3 that blocks light and a current blocking layer 26 that blocks current. Thereby, the light generated from the active layer 14 is irradiated to the bottom surface of the first recess 2〇, and the surface is less likely to be totally reflected due to the lower surface roughness, so that the light is prevented from being lost by being absorbed by the current barrier layer 26. And the light can be absorbed by the main rider 14 and then emitted, or reflected by the bottom of the light-emitting diode to the area other than the current barrier layer %, thereby improving the light-collecting efficiency of the light-emitting diode and increasing the brightness. In addition, the root mean square value of the third surface of the bottom surface 22a of the second recess 22 of the embodiment is smaller than the root mean square value of the fourth surface outside the first concave fe 22, which can effectively reduce the second fresh The contact resistance of the pad 32 and the first semiconductor layer 12 further reduces the resistance of the light-emitting diode 1. This July's luminescence—the polar body is not limited to the same day, Yang Cheng has the first—the depression and the second depression. In other embodiments of the present invention, the light-emitting diode 100 may be formed with the first recess 20 only on the upper surface (6) of the second semiconductor layer 16, and the second surface surface roughness of the bottom surface of the first recess 2G. The square root value is smaller than the root mean square value of the first surface roughness of the first surface outside the first recess 20 . Alternatively, the light-emitting diode chamber may have a second recess 22 only on the second upper surface (four), so that the bottom surface of the second recess 22 has a melon 9 201246605 =:: the square root value is smaller than the fourth-outer fourth The surface is thicker than described above, the first hole is formed on the surface of the second semiconductor of the first pad, so that the root mean square value of the bottom surface of the second surface is smaller than that of the first recess a surface rms rms value, and the surface of the first semiconductor corresponding to the second solder dies, such that the bottom surface _ third surface rms rms value is smaller than the second (four) The rms value of the four surface susceptibility, II can effectively improve the grading rate of the illuminating two (four), and reduce the galvanic of the illuminating diode, thereby increasing the brightness of the illuminating diode. The above-mentioned county (four) is difficult to achieve _, the test of the hair", the scope of the patent is based on the scope of the invention. [Figure simple description] Figure 1 to the fourth county of the invention - compared Schematic diagram of the manufacturing method of the fine light-emitting diode. / /xl〇a light-emitting region 12 first semiconductor layer 14 active layer 16a upper surface [main component symbol description] 10 substrate 10b non-light-emitting region i2a upper surface 16 second semiconductor Layer 201246605 18 Notch 20 20a Bottom surface 22 22a Bottom surface 24 24a Perforation 24b 26 Current barrier layer 28 30 First pad 32 100 Light-emitting diode First recess Second recess Mask pattern Layer Perforated transparent electrode Second pad 11