TW201222852A - Solar cell with smooth wafer backside and method of manufacturing this cell - Google Patents

Solar cell with smooth wafer backside and method of manufacturing this cell Download PDF

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TW201222852A
TW201222852A TW099140982A TW99140982A TW201222852A TW 201222852 A TW201222852 A TW 201222852A TW 099140982 A TW099140982 A TW 099140982A TW 99140982 A TW99140982 A TW 99140982A TW 201222852 A TW201222852 A TW 201222852A
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Taiwan
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layer
wafer
back surface
type semiconductor
solar cell
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TW099140982A
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Chinese (zh)
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TWI425647B (en
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yi-min Pan
Kuan-Lun Chang
Hung-Yi Chang
Chi-Hsiung Chang
Chun-Min Wu
Ying-Yen Chiu
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Big Sun Energy Technology Inc
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

A method of manufacturing a solar cell with a smooth wafer backside includes the steps of: providing a first wafer having a first front side, a first backside and first side surfaces connecting the first front side to the first backside; forming a thin film resistance layer on the first backside and the first side surfaces of the first wafer; roughening the first front side of the first wafer; doping and diffusing the first front side of the first wafer to form a diffused layer and a phosphide layer on the diffused layer; removing the phosphide layer and the thin film resistance layer; forming an anti-reflection coating (ARC) layer on the diffused layer; and forming front side electrodes on the ARC layer and forming a backside metal layer and backside electrodes on the first backside of the first wafer. A solar cell manufactured according to the above-mentioned method is also disclosed.

Description

201222852 六、發明說明: 【發明所屬之技術領域】 本發明係關於一種具有平坦晶圓背面之太陽能電池 及其製造方法。 【先前技術】 太陽能電池是一種能量轉換的光電元件,它是經由 太陽光照射後,把光的能量轉換成電能,此種光電元件 稱為太陽能電池(Solar Cell)。 在傳統的太陽能電池的製程中,表面粗化的蝕刻製 程會使晶圓的正面及背面同時織構化(圖案化),也就是 被刻以紋理。如此一來,被織構化的背面的表面積會增 加。另一方面,晶圓的背面所附著的鋁層並非是理想的 鏡面,因而造成光線在背面被吸收的比例增加。此外, 被織構化的背面的不平整表面使得銘與石夕的結合性不 佳’降低了背面電場(BSF)的效應,因而也降低了太陽能 電池的内部量子效率(IQE)。 圖1顯示一種傳統太陽能電池之局部剖面圖。如圖1 所示’傳統的太陽能電池100包含一基板110、一抗反 射層120、一正面電極13〇、一背面電極14〇及一背面金 屬層150。基板U0具有一 N型半導體層u〇N及一卩型 半導體層ΙΙΟΡ。;^型半導體層110N包覆p型半導體層 hop並電連接至背面金屬層150〇抗反射層12〇位於基 板110之一正面110F上。正面電極13〇位於抗反射層12〇 上並電連接至N型半導體層110N。背面金屬層“ο形成 201222852 於基板110之一背面HOB ,背面電極u〇 層150上。 於者面金屬 由於N型半導體層謂電連接至背面金屬層⑼, 故會有漏電流產生,降低太陽能電池的效率。因此 終的製程需要切割出一邊緣絕緣溝槽16〇,以阻止》最 流的產生。如此一來’還要多出一道雷射切割的程:電 費時費工。 【發明内容】 因此,本發明之一個目的係提供一種具有平坦晶圓 背面之太陽能電池及其製造方法,以提升太陽能電=的 内部量子效率。 ^ 為達上述目的,本發明提供一種具有平坦晶圓背面 之太陽能電池之製造方法,包含以下步驟:提供一第一 晶圓,第一晶圓包含一第一正面、一第一背面及連接第 一正面及第一背面之多個第一側面;於第一晶圓之第一 背面及此等第一側面形成一薄膜阻抗層;對第一晶圓之 第一正面刻以紋理;對第一晶圓之第一正面進行摻雜及 擴散處理’以形成一擴散層及於擴散層上之一麟化物層; 移除磷化物層及薄膜阻抗層;於擴散層上形成一抗反射 層;以及於抗反射層上形成多個正面電極,並於第一晶 圓之第一背面形成一背面金屬層及多個背面電極。 本發明亦提供一種太陽能電池,其包含一基板、一 抗反射層、一正面電極、一背面金屬層以及一背面電極。 基板具有一正面、一背面及多個側面。基板係由一靠近 201222852 正面之第一型半導體層及一靠近背面之第二型半導體層 所構成’正面具有一粗化圖案,背面具有—平坦結構。 抗反射層位於基板之正面之粗化圖案上。正面電極位於 抗反射層上,並電連接至第一型半導體層。背面金屬層 及背面電極位於基板之背面之平坦結構上。此等側面係 由第一型半導體層之多個側面及第二型半導體層之多個 側面所組成。 藉由本發明之太陽能電池及其製造方法,可以保有 # 平坦的晶圓的背面,以利增強鋁與矽晶圓的結合性,提 高背面電場(BSF)的效應;再來,也可減少光被吸收,因 而也提升太陽能電池的内部量子效率(IQE)e此外,上述 太陽能電池可以不需要形成邊緣絕緣溝槽,因此可以降 低製程成本、提升產能、避免雷射切割造成的有效面積 減少。 為讓本發明之上述内容能更明顯易懂,下文特舉— 較佳實施例,並配合所附圖式,作詳細說明如下。 【實施方式】 圖2至10顯示依據本發明之太陽能電池之製造方法 之各步驟的對應結構。圖14顯示依據本發明之太陽能電 ,之製造方法之流程圖。以下將配合圖14及2至1〇來 說明本發明之太陽能電池之製造方法。 。首先,如圖2與14所示,於步驟⑷,提供一第—晶 圓10,第—晶圓譬如是石夕晶圓,並包含一第一正面U、 一第-背面12及連接第—正面u及第—背面12之多個 201222852 第一側面13。當然’第一曰曰曰圓1〇上面可能有些許粒子 或雜質19,所以可以進行清洗程序,將粒子或雜質η 去除,所剩下的結構如圖3所示。 接著,如圖4與14所示,於步驟⑻,於第__晶_^ 之第一背面12及此等第一側面13形成一薄膜阻抗層2〇。 舉例而言,薄膜阻抗層20係為一氮化石夕層、氧化秒 然後,如圖5與14所示,於步驟(c),對第一晶圓μ #之第一正面η刻以紋理。由於第一背面12及第一侧面 13係被薄膜阻抗層20所包覆,所以第一背面12及第一 側面13都不會被刻以紋理而粗化並織構化。 接著,如圖6與14所示,於步驟⑷,對第一晶圓ι〇 之第一正面11進行摻雜及擴散處理,以形成一擴散層3〇 及於擴散層30上之一磷化物層35。舉例而言磷化物 層35之材料包含磷矽玻璃(Ph〇sph〇r〇us SUicate Giass, PSG)。在太陽能電池的晶m經過擴散製程後,♦晶圓的 •表面會形成一層PSG,必須去除,以免對太陽能電池具 有不利的影響。由於薄膜阻抗層20包覆住第—晶圓10 之第-侧面13 ’所以第一側面13並不會全部形成擴散 層30。 然後,如圖7與14所示,於步驟⑷,移除碟化物層 35及薄膜阻抗層20,其中所採用的步驟係將第一晶圓1〇 浸泡到一碟化物移除溶液中,以利用磷化物移除溶液移 除磷化物層35及薄膜阻抗層2〇。舉例而言,磷化物移 除溶液可以是氫氟酸溶液,其能洗去psG以及薄膜阻抗 201222852 層。 接著,如圖8與14所示,於步驟(f),於擴散層3〇 上升> 成一抗反射層4〇,其材料譬如是氮化石夕。 然後,如圖9與14所示,於步驟(g),於抗反射層4〇 上形成多個正面電極50,並於第一晶圓1〇之第一背面12 形成一背面金屬層60及多個背面電極70。背面金屬層6〇 的材料包含鋁。由於鋁層是形成在平坦的背面上,所以 可以減少光線在背面被吸收的比例,並能提升鋁與矽的201222852 VI. Description of the Invention: [Technical Field] The present invention relates to a solar cell having a flat wafer back surface and a method of fabricating the same. [Prior Art] A solar cell is an energy-converting photovoltaic element that converts light energy into electrical energy after being irradiated by sunlight. This photovoltaic element is called a solar cell. In the conventional solar cell process, the surface roughening process causes the front and back sides of the wafer to be simultaneously textured (patterned), that is, textured. As a result, the surface area of the textured back surface increases. On the other hand, the aluminum layer attached to the back side of the wafer is not an ideal mirror surface, and thus the proportion of light absorbed on the back side is increased. In addition, the uneven surface of the textured back surface makes the combination of Ming and Shi Xi poor, reducing the effect of the back surface electric field (BSF) and thus the internal quantum efficiency (IQE) of the solar cell. Figure 1 shows a partial cross-sectional view of a conventional solar cell. As shown in Fig. 1, the conventional solar cell 100 includes a substrate 110, an anti-reflection layer 120, a front electrode 13A, a back electrode 14A, and a back metal layer 150. The substrate U0 has an N-type semiconductor layer u 〇 N and a 卩-type semiconductor layer ΙΙΟΡ. The ?-type semiconductor layer 110N is covered with a p-type semiconductor layer hop and electrically connected to the back metal layer 150. The anti-reflective layer 12 is located on one of the front faces 110F of the substrate 110. The front surface electrode 13 is located on the anti-reflection layer 12A and is electrically connected to the N-type semiconductor layer 110N. The back metal layer ο forms 201222852 on the back surface HOB of the substrate 110 and the back electrode u 〇 layer 150. The surface metal is electrically connected to the back metal layer (9) due to the N-type semiconductor layer, so that leakage current is generated, and solar energy is lowered. The efficiency of the battery. Therefore, the final process needs to cut an edge insulating trench 16〇 to prevent the most streamlined generation. In this way, 'there is one more laser cutting process: the electricity is time-consuming and labor-intensive. Accordingly, it is an object of the present invention to provide a solar cell having a flat wafer back surface and a method of fabricating the same to enhance the internal quantum efficiency of solar power = ^ To achieve the above object, the present invention provides a flat wafer back surface The method for manufacturing a solar cell includes the steps of: providing a first wafer, the first wafer comprising a first front surface, a first back surface, and a plurality of first side surfaces connecting the first front surface and the first back surface; Forming a thin film resistive layer on the first back surface of the wafer and the first side; patterning the first front surface of the first wafer; and performing the first front surface of the first wafer Doping and diffusion treatment to form a diffusion layer and a slab layer on the diffusion layer; removing the phosphide layer and the film resistance layer; forming an anti-reflection layer on the diffusion layer; and forming a plurality of anti-reflection layers a front electrode, and a back metal layer and a plurality of back electrodes are formed on the first back surface of the first wafer. The invention also provides a solar cell comprising a substrate, an anti-reflection layer, a front electrode, and a back metal a substrate and a back electrode. The substrate has a front surface, a back surface and a plurality of side surfaces. The substrate is formed by a first type semiconductor layer adjacent to the front surface of 201222852 and a second type semiconductor layer adjacent to the back surface. The back surface has a flat structure. The anti-reflection layer is located on the roughened pattern on the front side of the substrate. The front surface electrode is on the anti-reflection layer and is electrically connected to the first type semiconductor layer. The back metal layer and the back surface electrode are flat on the back surface of the substrate. Structurally, the sides are composed of a plurality of sides of the first type semiconductor layer and a plurality of sides of the second type semiconductor layer. The solar cell and its manufacturing method can maintain the back surface of the #flat wafer to enhance the bonding between the aluminum and the germanium wafer, and improve the effect of the back surface electric field (BSF); in addition, the light can be absorbed, and thus Increasing the internal quantum efficiency (IQE) of the solar cell. In addition, the above solar cell can eliminate the need to form edge insulating trenches, thereby reducing process cost, increasing throughput, and avoiding effective area reduction caused by laser cutting. The content can be more clearly understood, and the following is a detailed description of the preferred embodiment and the accompanying drawings, which will be described in detail below. [Embodiment] FIGS. 2 to 10 show steps of a method for manufacturing a solar cell according to the present invention. Corresponding structure Fig. 14 is a flow chart showing a method of manufacturing a solar cell according to the present invention. A method of manufacturing a solar cell of the present invention will be described below with reference to Figs. 14 and 2 to 1B. . First, as shown in FIG. 2 and FIG. 14 , in step (4), a first wafer 10 is provided, and the first wafer is a Shi Xi wafer, and includes a first front surface U, a first back surface 12 and a connection portion. Front side u and a plurality of 201222852 first side 13 of the back-to-back side 12. Of course, there may be some particles or impurities 19 on the first circle, so the cleaning process can be performed to remove the particles or impurities η, and the remaining structure is shown in Fig. 3. Next, as shown in FIGS. 4 and 14, in the step (8), a thin film resistive layer 2 形成 is formed on the first back surface 12 of the __ crystal_^ and the first side surfaces 13. For example, the thin film resistive layer 20 is a nitride layer, oxidized second. Then, as shown in FIGS. 5 and 14, in the step (c), the first front side η of the first wafer μ# is textured. Since the first back surface 12 and the first side surface 13 are covered by the film resistive layer 20, the first back surface 12 and the first side surface 13 are not textured and roughened and textured. Next, as shown in FIGS. 6 and 14, in the step (4), the first front surface 11 of the first wafer is doped and diffused to form a diffusion layer 3 and a phosphide on the diffusion layer 30. Layer 35. For example, the material of the phosphide layer 35 comprises Phosphorus glass (Ph〇sph〇r〇us SUicate Giass, PSG). After the crystal m of the solar cell is subjected to a diffusion process, a surface of the wafer will form a layer of PSG, which must be removed to avoid adverse effects on the solar cell. Since the thin film resistive layer 20 covers the first side 13' of the first wafer 10, the first side surface 13 does not entirely form the diffusion layer 30. Then, as shown in FIGS. 7 and 14, in step (4), the dish layer 35 and the film resistive layer 20 are removed, wherein the step is to soak the first wafer 1 一 into a dish removal solution to The phosphide layer 35 and the thin film resistive layer 2 are removed using a phosphide removal solution. For example, the phosphide removal solution can be a hydrofluoric acid solution that washes away psG and film impedance 201222852 layers. Next, as shown in Figs. 8 and 14, in step (f), the diffusion layer 3 is raised > into an anti-reflection layer 4, the material of which is, for example, nitride nitride. Then, as shown in FIGS. 9 and 14, in step (g), a plurality of front electrodes 50 are formed on the anti-reflective layer 4, and a back metal layer 60 is formed on the first back surface 12 of the first wafer 1 and A plurality of back electrodes 70. The material of the back metal layer 6〇 contains aluminum. Since the aluminum layer is formed on the flat back surface, the proportion of light absorbed on the back side can be reduced, and the aluminum and the crucible can be lifted.

結合性,增加背面電場(BSF)的效應,因而也增加了太陽 能電池的内部量子效率(IQE)。 值得注意的是,到圖9為止,即可作為可正常運作 的太陽能電池。然而,亦可以再切割出邊緣絕緣溝槽, 如圖10所示,以符合某些特殊需求。 圖Π至13顯示利用兩晶圓疊合來形成薄膜阻抗層 之各步驟的對應結構。首先,如圖u所示,將第一晶圓 10與一第二晶圓1〇,疊合成一堆疊體18,第—晶圓^之 第一正面11靠著第二晶圓10,之一第二正面u,。接著, 對堆疊體進行電漿增強化學氣相沈積(pEcvD)以形成 薄膜阻抗層20。前述步驟⑺及步驟(b)都可兹 PECVD而完成。 疋楮由 刀啡作I8。如此一來, 可以將第-晶® U)浸泡到—粗化#刻液(譬如是強驗的 虱虱化鉀(KOH))中,以對第一晶圓1() 、 乐—正面1 1玄|| 以紋理。或者,第一晶圓10及第一曰 ^ 次弟一日日® 10'皆可同時姑 刻以紋理。此外,本發明亦提供一 π用上述製造方法 201222852 所製造出之太陽能電池。請參見圖9,太陽能電池包含 基板10、抗反射層40、正面電極50、背面金屬層60以 及背面電極70。 基板10具有正面11、背面12及多個側面13。基板 10係由一靠近正面11之第一型半導體層14及一靠近背 面12之第二型半導體層15所構成。舉例而言,第一塑 半導體層14係為N型半導體層,第二型半導體層15係The combination increases the effect of the back surface electric field (BSF) and thus the internal quantum efficiency (IQE) of the solar cell. It is worth noting that as far as Figure 9 is concerned, it can be used as a solar cell that can operate normally. However, the edge insulating trenches can also be cut again, as shown in Figure 10, to meet certain special needs. Figures 13 through 13 show the corresponding structures of the steps of forming a thin film impedance layer by laminating two wafers. First, as shown in FIG. 5, the first wafer 10 and the second wafer are stacked into a stack 18, and the first front surface 11 of the first wafer 11 is placed against the second wafer 10, one of which The second front is u. Next, the stacked body is subjected to plasma enhanced chemical vapor deposition (pEcvD) to form a thin film resistive layer 20. Both the above steps (7) and (b) can be completed by PECVD. I used the knife to make I8. In this way, the first wafer can be immersed into the coarsening # 液液 (such as the strong potassium KOH) to the first wafer 1 (), Le - front 1 1 mystery | | with texture. Alternatively, the first wafer 10 and the first one of the first day of the day can be engraved with texture at the same time. Further, the present invention also provides a solar cell manufactured by the above manufacturing method 201222852. Referring to Fig. 9, the solar cell includes a substrate 10, an anti-reflection layer 40, a front surface electrode 50, a back metal layer 60, and a back surface electrode 70. The substrate 10 has a front surface 11 , a back surface 12 , and a plurality of side surfaces 13 . The substrate 10 is composed of a first type semiconductor layer 14 adjacent to the front surface 11 and a second type semiconductor layer 15 adjacent to the back surface 12. For example, the first plastic semiconductor layer 14 is an N-type semiconductor layer, and the second-type semiconductor layer 15 is a

為P型半導體層。正面11具有一粗化圖案11R,背面12 具有一平坦結構12S。抗反射層40位於基板1〇之正面u 之粗化圖案11R上。正面電極50位於抗反射層4〇上, 並電連接至第一型半導體層14。背面金屬層6〇及背面 電極70位位於基板10之背面12之平坦結構12S上。此 等側面13係由第一型半導體層14之多個側面14 s及第 二型半導體層15之多個側面15S所組成。亦即,第二型 半導體層1 5之側面1 5S係露出於外。 此外,基於上述的理由,此太陽能電池之基板1〇及 抗反射層40可以不需具有邊緣絕緣溝槽。 藉由本發明之太陽能電池及其製造方法’可以保有 平坦的晶圓的背面,以利增強鋁與矽晶圓的結合性,提 高背面電場(BSF)的效應’㈣,也可減少光二收因 而也提升太陽能電池的内部量子效率(IQE)。此外,上述 太陽能電池可以*需要形成邊緣絕緣溝槽,因此可 低製程成本、提升產能、避免雷射 扣刀剖k成的有效面藉 減少。此外’本發明之製造方’忒由積 J以/σ用傳統製程所愛 的設備’而不需要另外添靖設備以增加成本。 斤需 201222852 在較佳實施例之詳細說明中所提出之具體實施例僅 用以方便說明本發明之技術内容,而非將本發明狹義地 限制於上述實施例,在不超出本發明之精神及以下申請 專利範圍之情況,所做之種種變化實施,皆屬於本發明 之範圍。It is a P-type semiconductor layer. The front surface 11 has a roughened pattern 11R, and the back surface 12 has a flat structure 12S. The anti-reflection layer 40 is located on the roughened pattern 11R of the front surface u of the substrate 1 . The front surface electrode 50 is located on the anti-reflection layer 4A and is electrically connected to the first type semiconductor layer 14. The back metal layer 6 and the back electrode 70 are located on the flat structure 12S of the back surface 12 of the substrate 10. The side faces 13 are composed of a plurality of side faces 14 s of the first type semiconductor layer 14 and a plurality of side faces 15S of the second type semiconductor layer 15. That is, the side surface 15S of the second type semiconductor layer 15 is exposed. Further, for the above reasons, the substrate 1 and the anti-reflection layer 40 of the solar cell may not necessarily have edge insulating trenches. The solar cell of the present invention and the method of manufacturing the same can maintain a flat back surface of the wafer to enhance the bonding between the aluminum and the germanium wafer, and improve the effect of the back surface electric field (BSF), which can also reduce the light absorption. Improve the internal quantum efficiency (IQE) of solar cells. In addition, the above solar cells can be required to form edge insulating trenches, thereby reducing process cost, increasing throughput, and avoiding the reduction of effective surface area of the laser. Further, the 'manufacturer of the present invention' does not need to add additional equipment to increase the cost by the product of the conventional process. The specific embodiments of the present invention are intended to be illustrative only, and not to limit the scope of the present invention to the above embodiments without departing from the spirit of the invention. In the case of the following patent claims, various changes are made and are within the scope of the invention.

201222852 【圖式簡單說明】 圖1顯示-種傳統太陽能電 EJ 〇 1Λ θ 心句4剖面圖。 0顯不依據本發明之太陽能電池之製造方法 之各步驟的對應結構。 圖u至13顯示利用兩晶圓疊合來形成薄膜阻抗層 之各步驟的對應結構。 圖14顯示依據本發明之太陽能電池之製造方法之流 程圖。 【主要元件符號說明】 (a)〜(g):方法步驟 10 :第一晶圓/基板 10':第二晶圓 11 :第一正面 11 ·第二正面 11R :粗化圖案 12 :第一背面 12S :平坦結構 1 3 :第一側面 14 :第一型半導體層 14 S .側面 15.第二型半導體層 15S :侧面 18 :堆疊體 19 :粒子或雜質 20 :薄膜阻抗層 201222852 30 :擴散層 35 :磷化物層 40 :抗反射層 50 :正面電極 60 :背面金屬層 70 :背面電極 80 :邊緣絕緣溝槽 100 :太陽能電池 110 :基板 110B :背面 110F :正面 110N : N型半導體層 110P : P型半導體層 120 :抗反射層 130 :正面電極 140 :背面電極 1 5 0 :背面金屬層 160 :邊緣絕緣溝槽201222852 [Simple description of the diagram] Figure 1 shows a cross-sectional view of a traditional solar electric EJ 〇 1Λ θ sentence. 0 shows the corresponding structure of each step of the method for manufacturing a solar cell according to the present invention. Figures u through 13 show the corresponding structures of the steps of forming a thin film resistive layer by laminating two wafers. Fig. 14 is a flow chart showing a method of manufacturing a solar cell according to the present invention. [Description of Main Component Symbols] (a) to (g): Method Step 10: First Wafer/Substrate 10': Second Wafer 11: First Front 11 • Second Front 11R: Roughened Pattern 12: First Back surface 12S: flat structure 1 3 : first side surface 14 : first type semiconductor layer 14 S . side surface 15. second type semiconductor layer 15S : side surface 18 : stacked body 19 : particles or impurities 20 : thin film resistive layer 201222852 30 : diffusion Layer 35: phosphide layer 40: anti-reflection layer 50: front electrode 60: back metal layer 70: back electrode 80: edge insulating trench 100: solar cell 110: substrate 110B: back surface 110F: front surface 110N: N-type semiconductor layer 110P : P-type semiconductor layer 120 : anti-reflection layer 130 : front electrode 140 : back electrode 1 5 0 : back metal layer 160 : edge insulating trench

Claims (1)

201222852 七、申請專利範園: 1. 一種具有平坦晶圓背面之太陽能電池之製造方 法,包含以下步驟: (a)提供一第一晶圓’該第一晶圓包含一第一正面、 一第一背面及連接該第一正面及該第一背面之多個第一 侧面; (b)於該第一晶圓之該第一背面及該等第一側面形成 一薄膜阻抗層; 籲 (c)對該第一晶圓之該第一正面刻以紋理; (d) 對該第一晶圓之該第一正面進行摻雜及擴散處 理,以形成一擴散層及於該擴散層上之一磷化物層; (e) 移除該麟化物層及該薄膜阻抗層; (f) 於該擴散層上形成一抗反射層;以及 (g) 於該抗反射層上形成多個正面電極,並於該第一 晶圓之該第-背面形成—背面金屬層及多個背面電極。 2_如申請專利範圍第【項所述之方法,其中該薄膜 • 阻抗層係為一氮化矽層或氧化矽層。 3.如申請專利範圍第i項所述之方法,其中該步驟 (b)包含: 合成一堆疊體’該 圓之一第二正面; (bl)將該第一晶圓與—第二晶圓疊 第一晶圓之該第一正面靠著該第二晶 以及 (b2)對該堆疊體進符番 且瓶進仃電漿增強化學氣相沈積(pEC VD) 以形成該薄膜阻抗層。 •如申°月專利範圍第2項所述之方法,其中該步驟 201222852 (e)包含: (cl)分離該堆疊體;以及 (c2)將該第一晶圓浸泡到一粗化蝕刻液中,以對該第 一晶圓之該第一正面刻以紋理。 5.如申請專利範圍第i項所述之方法,其中該步驟 (e) 包含: (el)將該第一晶圓浸泡到一磷化物移除溶液中,以利 用該磷化物移除溶液移除該磷化物層及該薄膜阻抗層。 • 6.如申請專利範圍第1項所述之方法,其中該步驟 (f) 及該步驟(b)都是藉由PecvD而完成。 8. —種太陽能電池,包含: 一基板,具有一正面、一背面及多個側面,該基板 係由一靠近該正面之第一型半導體層及一靠近該背面之 第二型半導體層所構成’該正面具有一粗化圖案,該背 面具有一平坦結構; 一抗反射層,位於該基板之該正面之該粗化圖案上; 鲁一正面電極,位於該抗反射層上’並電連接至該第 一型半導體層; 一背面金屬層及一背面電極,兩者皆位於該基板之 該背面之該平坦結構上,其中該等側面係由該第—型半 導體層之多個側面及該第二型半導體層之多個側面所組 成0 9. 如申請專利範圍第8項所述之太陽能電池,其中 該基板及該抗反射層不具有邊緣絕緣溝槽。 10. 如申請專利範圍第8項所述之太陽能電池,其 14 201222852 中該第一型半導體層係為N型半導體層,該第二型半導 體層係為P型半導體層。201222852 VII. Application for Patent Park: 1. A method for manufacturing a solar cell having a flat wafer back surface, comprising the steps of: (a) providing a first wafer, the first wafer comprising a first front side, a first a back surface and a plurality of first sides connecting the first front surface and the first back surface; (b) forming a thin film resistive layer on the first back surface and the first side surfaces of the first wafer; The first front surface of the first wafer is textured; (d) doping and diffusing the first front surface of the first wafer to form a diffusion layer and a phosphorous layer on the diffusion layer (e) removing the slab layer and the film resistive layer; (f) forming an anti-reflective layer on the diffusion layer; and (g) forming a plurality of front electrodes on the anti-reflective layer, and The first back surface of the first wafer forms a back metal layer and a plurality of back electrodes. 2_ The method of claim 2, wherein the film/impedance layer is a tantalum nitride layer or a tantalum oxide layer. 3. The method of claim i, wherein the step (b) comprises: synthesizing a stack of 'the second front side of the circle; (bl) the first wafer and the second wafer The first front side of the first wafer is stacked against the second crystal and (b2) the stack is formed and the vial plasma enhanced chemical vapor deposition (pEC VD) is formed to form the thin film resistive layer. The method of claim 2, wherein the step 201222852 (e) comprises: (cl) separating the stack; and (c2) immersing the first wafer in a roughening etchant And patterning the first front surface of the first wafer. 5. The method of claim i, wherein the step (e) comprises: (el) immersing the first wafer in a phosphide removal solution to utilize the phosphide removal solution In addition to the phosphide layer and the film resistive layer. 6. The method of claim 1, wherein the step (f) and the step (b) are performed by PecvD. 8. A solar cell comprising: a substrate having a front surface, a back surface, and a plurality of side surfaces, the substrate being formed by a first type semiconductor layer adjacent to the front surface and a second type semiconductor layer adjacent to the back surface 'The front side has a roughened pattern, the back surface has a flat structure; an anti-reflection layer is located on the roughened pattern of the front side of the substrate; a front surface electrode is located on the anti-reflection layer' and is electrically connected to a first type of semiconductor layer; a back metal layer and a back electrode, both of which are located on the flat structure of the back surface of the substrate, wherein the sides are formed by a plurality of sides of the first type semiconductor layer and the first The solar cell of claim 8, wherein the substrate and the anti-reflective layer do not have edge insulating trenches. 10. The solar cell of claim 8, wherein the first type semiconductor layer is an N type semiconductor layer and the second type semiconductor layer is a P type semiconductor layer. [S] 15[S] 15
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